JPH1093227A - Ceramic wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress the decline in jointing strength between a surface conductor layer and a metal plating layer to be as small as possible, without decreasing the matching in shrinkage at the time of simultaneous baking, in a simultaneously baked ceramic wiring board for which there is no established technology of selectively eliminating ceramic particles from the surface conductor layer. SOLUTION: At least at the surface of a ceramic substrate 2, a conductor layer 8 is formed which is formed by baking simultaneously with the ceramic substrate 2 and which contains a high-melting point metal and ceramic particles. On a conductor layer 8, a metal plating layer 9 is formed. The conductor layer 8 is constituted of a first conductor layer 10, formed on the ceramic substrate 2 side and a second conductor layer 11 which is formed on the metal plating layer 9 side and which contains proportionately more high-melting point metal than the first conductor layer 10 does.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic wiring board having improved adhesion of metal plating to a conductor layer formed by simultaneous firing with a ceramic substrate.

[0002]

2. Description of the Related Art A package on which a high-performance, highly-integrated LSI is mounted is excellent in insulation and heat dissipation, can handle high-speed signals, and has a large number of input / output terminals and a narrow pitch. It is required to be possible and the like, and a ceramic package is known as a package satisfying such required characteristics. As a ceramic package, an aluminum nitride package is expected as a highly heat-dissipating package that can be miniaturized, in place of a conventional alumina package. Silicon nitride, which is less heat-dissipating than aluminum nitride, but has excellent mechanical strength and fracture toughness and has realized a thermal conductivity of 40 W / mK or more, which is higher than that of alumina, is also required for packaging. Applications are in progress.

[0003] In the above ceramic package, signal wiring is usually routed using an internal conductor layer formed by simultaneous firing with an aluminum nitride multilayer substrate, a silicon nitride multilayer substrate, or the like, and both main surfaces or one side of the multilayer substrate are provided. In general, a structure in which input / output terminals electrically connected to the internal conductor layer, that is, internal input / output terminals and external input / output terminals, are formed on the main surface of the device. Internal I / O terminals
For example, it becomes a connection terminal (electrode) with a semiconductor element, and is connected to the semiconductor element by wire bonding or a bump electrode. External terminals such as pins and solder bumps are joined to the external input / output terminals.

The input / output terminals in the above-described aluminum nitride or silicon nitride package are formed by simultaneous firing with an aluminum nitride multilayer substrate or a silicon nitride multilayer substrate, as in the case of the internal conductor layer. Generally, those made of a high melting point metal such as Mo or Mo are used.
Therefore, wire bonding or solder bonding cannot be performed as it is, and corrosion or the like may occur. Therefore, Ni plating or Au plating is usually applied thereon.

Meanwhile, in the case of a co-fired ceramic substrate, a conductor pattern made of a high melting point metal, that is, an internal conductor layer, input / output terminals, and the ceramic substrate itself are sintered in order to prevent warping and cracking of the fired substrate. It is essential to match the amount of shrinkage. Therefore, the amount of shrinkage of the conductor layer is controlled by using a conductor paste using a powder in which the same type of ceramic powder as the ceramic substrate is mixed with the high melting point metal powder. Therefore, on the surface of the input / output terminals of the co-fired ceramic substrate, ceramic particles mixed with the conductor paste exist in addition to the high melting point metal.

Here, in order to secure the adhesion strength of the metal plating layer formed on the surface of the input / output terminals, ceramics that do not contribute to the adhesion to the metal plating layer are removed, and a high melting point that contributes to the adhesion of the metal plating layer is removed. It is necessary to increase the metal surface coverage. Otherwise, when the package is mounted on a printed circuit board or the like, the bonding strength between the input / output terminal surface and the metal plating layer is insufficient, so that separation or the like occurs from this interface, and the reliability can be maintained. Will be gone. In conventional alumina packages, an etching technique has been put to practical use that selectively melts and removes only alumina without melting the high-melting metal conductor. It was possible to sufficiently secure the bonding strength between the output terminal surface and the metal plating layer.

However, in a package made of aluminum nitride or silicon nitride, an etching technique for selectively removing only aluminum nitride or silicon nitride from the surface of the conductor layer has not been established, and it is not effective for aluminum nitride or silicon nitride. Such an etchant also acts as an etchant on refractory metals such as W and Mo.
For this reason, if etching conditions that can sufficiently remove aluminum nitride and silicon nitride are selected, the high-melting-point metal that constitutes the conductor layer is removed, while if etching conditions that prevent removal of the high-melting-point metal are selected, nitriding occurs. There is a problem that aluminum and silicon nitride cannot be sufficiently removed, and the bonding strength between the input / output terminal and the metal plating layer cannot be sufficiently increased.

In particular, in recent semiconductor packages, the size of input / output terminals and the pitch have been reduced in order to cope with the reduction in package size and the increase in the number of input / output terminals. However, in such a small-sized and high-density input / output terminal, insufficient bonding strength of a metal plating layer made of ceramics particularly present on the terminal surface is a problem.

[0009]

As described above, in the package made of aluminum nitride or silicon nitride, a co-base such as aluminum nitride or silicon nitride used in forming the conductor layer is selected from the surface conductor layers such as input / output terminals. However, there is a problem that the bonding strength of a metal plating layer formed on a conductor layer such as an input / output terminal is insufficient because a technique for removing the conductive layer has not been established.

As described above, in a co-fired ceramic wiring board in which the technique for selectively removing ceramic particles from the surface conductor layer such as input / output terminals has not been established, the coverage of the surface conductor layer by the refractory metal conductor is low. Since the mixing ratio of the high melting point metal and the ceramic powder in the conductor paste is governed, the reduction in the bonding strength of the metal plating layer is minimized without lowering the consistency of shrinkage during simultaneous firing. Is a challenge.

SUMMARY OF THE INVENTION The present invention has been made to address such a problem, and is intended to provide a co-fired ceramic substrate for which simultaneous co-firing has not been established for removing ceramic particles from the surface conductor layer. It is an object of the present invention to provide a ceramic wiring substrate that can suppress a decrease in bonding strength between a surface conductor layer and a metal plating layer as much as possible without lowering the consistency of the amount of shrinkage.

[0012]

According to a first aspect of the present invention, there is provided a ceramic wiring board formed by simultaneously firing a ceramic substrate and at least a surface of the ceramic substrate with the ceramic substrate. In a ceramic wiring board including a conductor layer containing a metal and ceramic particles, and a metal plating layer provided on the conductor layer, the conductor layer includes a first conductor layer provided on the ceramic substrate side. And a second conductor layer provided on the metal plating layer side and having a higher content of the refractory metal than the first conductor layer.

The second conductor layer may be thinner than the first conductor layer, or the second conductor layer may be thinner than the first conductor layer.
Is divided into two or more patterns, and the first
Characterized by being formed on a conductor layer.

In the ceramic wiring board according to the present invention, the conductor layer comprises at least a first conductor layer on the ceramic substrate side and a second conductor layer having a higher melting point metal content than the first conductor layer. ing. The first conductor layer, for example, contains ceramic particles to the extent that the amount of shrinkage between the ceramic substrate and the conductor layer during co-firing can be matched, as in the case of the conventional conductor layer. The second conductor layer provided in the first conductor layer has a higher content of the refractory metal than that of the first conductor layer, so that the content of the refractory metal is increased stepwise to improve the bonding strength of the metal plating layer. At the same time as increasing the stress, the stress based on the difference in the amount of shrinkage due to the simultaneous firing is alleviated stepwise, thereby preventing the ceramic substrate from being warped or cracked.

Further, the thickness of the second conductor layer is made smaller than the thickness of the first conductor layer, or the second conductor layer is divided into two or more patterns, so that Since the stress based on the difference in the amount of shrinkage during firing from the second conductor layer can be reduced, the reliability of the conductor layer made of these laminates can be improved.

[0016]

Embodiments of the present invention will be described below.

FIG. 1 is a sectional view showing the structure of an embodiment in which the ceramic wiring substrate of the present invention is applied to a semiconductor package. A semiconductor package 1 shown in FIG. 1 has a multilayer ceramic substrate 2 in which a plurality of ceramic layers 2a, which are insulating layers, are integrated in a multilayer manner as a package base. An internal conductor layer 5 including a filled conductor layer 4 filled in a through hole provided in each ceramic layer 2a is provided by simultaneous firing with the multilayer ceramic substrate 2. One main surface (for example, upper surface) of the multilayer ceramic substrate 2
Are the mounting surfaces of the semiconductor elements.

The constituent material of the multilayer ceramic substrate 2 is not particularly limited, and various ceramic materials from oxide ceramics such as aluminum oxide to non-oxide ceramics such as aluminum nitride and silicon nitride may be used. However, the present invention is particularly effective when a sintered body containing aluminum nitride or silicon nitride as a main component, for which a technique for selectively removing ceramic particles from the surface conductor layer has not been established, is used. However, a ceramic sintered body, such as alumina, for which an etching technique is put to practical use is also effective in reducing the number of steps and preventing the formation of porosity due to etching.

On one main surface of the above-mentioned multilayer ceramic substrate 2, a first input / output terminal 6 electrically connected to one end of the internal conductor layer 5 is provided, and the other main surface is provided. Is provided with a second input / output terminal 7 electrically connected to the other end of the internal conductor layer 5. These first and second input / output terminals 6 and 7 are respectively provided with a surface conductor layer 8 formed by simultaneous firing with the multilayer ceramic substrate 2,
And a metal plating layer 9 provided on the surface conductor layer 8 by the simultaneous firing.

The first input / output terminal 6 is an electrical connection terminal (internal input / output terminal / electrode) with a semiconductor element to be mounted.
The second input / output terminal 7 serves as a connection portion such as a pin serving as an external connection terminal or a solder bump (external input / output terminal /
Function as terminal joints). Note that the first and second input / output terminals 6, 7 can be formed only on one main surface.

Various metals can be applied to the metal plating layer 9 according to the intended use. For example, Ni, Au, C
u, Ag, or a combination thereof is used. Specific examples of the metal plating layer 9 include a laminated structure of a Ni plating layer and an Au plating layer, which have functions such as securing electrical and mechanical reliability during soldering and preventing oxidation of the surface of the Ni layer. The Au plating layer also functions as a wire bonding property imparting layer.

Here, the inner conductor layer 5 and the surface conductor layer 8
Are formed by co-firing with the multilayer ceramic substrate 2 as described above.
It is mainly composed of refractory metals such as Mo and Mo and ceramic particles. The ceramic particles in the conductor layers 5 and 8 are used to match the amount of shrinkage between the multilayer ceramic substrate 2 and the conductor layers 5 and 8 during simultaneous firing, and basically, the same type of ceramic powder as the multilayer ceramic substrate 2 is used. Used.

Each of the above-mentioned surface conductor layers 8 is a first conductor layer 10 provided on the multilayer ceramic substrate 2 side.
And a second conductive layer 11 provided on the metal plating layer 9 side. Since the first conductor layer 10 is disposed on the side of the multilayer ceramic substrate 2, the amount of shrinkage between the multilayer ceramic substrate 2 and the surface conductor layer 8 during simultaneous firing is matched, and the multilayer ceramic substrate 2 is warped or cracked. As shown in FIG. 2, a relatively large amount of ceramic particles 12 is contained so as to prevent such problems. For example, the first conductor layer 10 contains ceramic particles 12 of the same degree as the inner conductor layer 5, and more specifically, a conductor layer containing the ceramic particles 12 at about 20 to 50% by volume (the inner conductor layer 5 is also The same is preferable.

On the other hand, as shown in FIG. 2, the content of the refractory metal particles 13 in the second conductor layer 11 is set higher than that in the first conductor layer 10. As described above, by making the second conductor layer 11 disposed on the metal plating layer 9 side contain a relatively large amount of high melting point metal particles 13, the bonding strength between the surface conductor layer 8 and the metal plating layer 9 is improved. It is possible to increase. The second conductor layer 11 only needs to contain the ceramic particles 12 to such an extent that a crack or the like does not occur based on a difference in shrinkage from the first conductor layer 10.

More specifically, although it depends on the content ratio of the ceramic particles 12 in the first conductor layer 10, the second conductor layer 11 contains 10 to 40% by volume of the ceramic particles 12.
It is preferable that the conductive layer contains a high melting point metal particle 13 from the viewpoint of the bonding property with the metal plating layer 9.
Preferably, the conductor layer contains about 90 to 60% by volume. If the content of the refractory metal particles 13 in the second conductor layer 11 is less than 60% by volume, the bonding strength with the metal plating layer 9 may not be sufficiently increased. If the content ratio exceeds 90% by volume and the content ratio of the ceramic particles 12 relatively decreases too much,
The difference in the amount of shrinkage from the first conductor layer 10 increases, which may cause cracks and the like.

The stress based on the difference in the amount of contraction between the first conductor layer 10 and the second conductor layer 11 is equal to the thickness t _{2 of} the second conductor layer 11.
Is smaller than the thickness t ₁ of the first conductor layer 10 (t ₂ <t ₁ ).
By doing so, it can be further alleviated. Second
The conductor layer 11 increases the occupancy of the refractory metal particles 13 at the interface with the metal plating layer 9 to the
Since the bonding strength between the first conductive layer 10 and the metal plating layer 9 is improved, the first conductive layer 10 can be made thinner than the first conductive layer 10. And warpage of the multilayer ceramic substrate 2 can be more effectively prevented.

The thickness ratio (t ₁ / t ₂ ) between the first conductor layer 10 and the second conductor layer 11 differs depending on the total thickness t of the surface conductor layer 8, but about t ₁ / t ₂ > 3. It is preferable that Specifically, the total thickness t of the surface conductor layer 8 is 10 to 40 μm.
m, the thickness t ₁ of the first conductor layer 10 is preferably about ₇ to 30 μm, and the thickness t ₂ of the second conductor layer 11 is preferably about ₃ to 10 μm.

Further, in order to alleviate the stress based on the difference in the amount of contraction between the first conductor layer 10 and the second conductor layer 11, as shown in FIG. Pattern 11
a, 11a... and divided patterns 11a, 11a
It is also effective to form the second conductor layer 11 having a... on the first conductor layer 10. The division patterning of the second conductor layer 11 is more effective when applied in combination with the thickness ratio of the first conductor layer 10 and the second conductor layer 11 described above.

As described above, the surface conductor layer 8 formed by the simultaneous firing has a laminated structure of the first conductor layer 10 and the second conductor layer 11, and the first conductor layer 10 has the same structure as the inner conductor layer 5. ,
The ceramic particles 12 are contained to the extent that the amount of shrinkage with the multilayer ceramic substrate 2 during co-firing can be matched, while the stress caused by the difference in the amount of shrinkage with the first conductor layer 10 in the second conductor layer 1 is extremely high. By increasing the content ratio of the high melting point metal particles 13 in the first conductor layer 10 so that the multilayer ceramic substrate 2 and the conductor layer 5
In addition to preventing the multilayer ceramic substrate 2 from being warped or cracked due to the simultaneous firing of the metal substrate 8, the bonding strength between the surface conductor layer 8 and the metal plating layer 9 by the simultaneous firing can be increased. This is because the stress based on the difference in the amount of shrinkage between the multilayer ceramic substrate 2 and the conductor layers 5 and 8 during simultaneous firing is gradually reduced, and the content ratio of the high melting point metal particles 13 is gradually increased. It is based on being.

The thickness t ₂ of the _second conductor layer 11 is set to the first value.
Or less than the thickness t ₁ of the conductor layer 10
By dividing the conductive layer 11 into two or more patterns, the stress based on the difference in the amount of shrinkage of the first conductive layer 10 and the second conductive layer 11 during firing can be further reduced,
This makes it possible to improve the reliability of the surface conductor layer 8 composed of a laminate of the first conductor layer 10 and the second conductor layer 11.

As described above, in the semiconductor package 1 of this embodiment, the structure of the multilayer ceramic substrate 2 is made of aluminum nitride, silicon nitride, or the like, for which a technique for selectively removing ceramic particles from the surface conductor layer 8 has not been established. Even when used as a material, the bonding strength between the surface conductor layer 8 and the metal plating layer 9 can be increased while the amount of shrinkage between the multilayer ceramic substrate 2 and the surface conductor layer 8 is matched, so that the semiconductor package 1 It is possible to greatly improve the mounting reliability and the like.

Further, in the semiconductor package 1 of the above-described embodiment, the surface conductor layer 5 has a two-layer structure of the first conductor layer 10 and the second conductor layer 11, but the surface conductor layer in the present invention is The structure is not limited to the two-layer structure, and a multilayer structure of three or more layers in which the content ratio of the high melting point metal is changed stepwise can be used. In this case, the conductor layer serving as the outermost surface layer of the surface conductor layer 5 may be a single layer of a high melting point metal depending on an intermediate conductor layer.

The semiconductor package 1 of the embodiment described above
Are bonding and mounting of the semiconductor element, electrical connection between the electrode of the semiconductor element and the first input / output terminal 6 (in the case of flip chip, connection at the time of mounting), hermetic sealing of the semiconductor element with a ceramic cap or the like, After forming external connection terminals such as pins and solder bumps on the second input / output terminal 7, the PG
It is used as an A package or a BGA package.

Next, a method of manufacturing the semiconductor package 1 of the above-described embodiment will be described. First, a plurality of ceramic green sheets corresponding to each ceramic layer 2a are prepared, and through holes are formed in these ceramic green sheets in accordance with the internal signal wiring pattern of the internal conductor layer 5. Next, W or Mo is placed in the through hole.
A conductor paste containing a high melting point metal as the main component and a ceramic powder of the same type as the ceramic green sheet is filled, and the conductor paste is printed on the ceramic green sheet according to the shape of the printed conductor layer 3.

Of the plurality of ceramic green sheets, the ceramic green sheets serving as both main surfaces of the multilayer ceramic substrate 2 first have a conductive paste having the same composition as the conductive paste used to form the above-described internal conductive layer 5. Is printed in accordance with the patterns of the first and second input / output terminals 6 and 7. Next, a conductor paste having a higher content of the high melting point metal in the same pattern is applied thereon.

The required number of such ceramic green sheets are laminated, pressed, degreased and fired to simultaneously sinter the ceramic base material and the conductor layer, thereby obtaining the desired semiconductor package 1. Is obtained. By using a plurality of conductor pastes having different contents of the high melting point metal, the first conductor layer 1
The surface conductor layer 8 composed of the second conductor layer 11 having a high content ratio of 0 and a higher melting point metal can be easily formed. When the surface conductor layer 8 has a multilayer structure of three or more layers, conductor pastes corresponding to the number of layers may be prepared and applied in order.

Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 4 is a sectional view showing an embodiment in which the ceramic wiring board of the present invention is applied to a circuit board. The circuit board 14 shown in FIG. 4 has a ceramic substrate 1 on one main surface of a single-plate-shaped ceramic substrate 15 made of the same ceramic material as in the first embodiment.
The wiring layer 16 is formed by the conductor layer 8 formed by co-firing with the metal layer 5 and the metal plating layer 9 provided on the co-firing conductor layer 8.

As described in the first embodiment, the co-fired conductor layer 8 includes a first conductor layer 10 provided on the ceramic substrate 15 side and a second conductor layer provided on the metal plating layer 9 side.
The second conductor layer 11 is set to have a higher content of high melting point metal particles than the first conductor layer 10. The specific configuration is as described in the first embodiment.

In such a circuit board 14 as well, the amount of shrinkage between the ceramic substrate 15 and the co-fired conductor layer 8 is matched to prevent the ceramic substrate 15 from warping or cracking, and the co-fired conductor layer 8 and the metal The bonding strength with the plating layer 9 can be increased. Therefore, the reliability and the like of the circuit board 14 can be greatly improved.

The surface conductor layer of the ceramic wiring board according to the present invention may be provided with electrodes and terminal joints as described above.
Alternatively, it can be applied to various conductor layers such as a wiring layer forming a circuit pattern, but in order to cope with a reduction in package size and an increase in the number of input / output terminals, the size and pitch have been reduced. This is particularly effective for input / output terminals. This is because small and high-density input / output terminals are particularly affected by ceramic particles existing on the surface of the conductor layer.

[0041]

As described above, according to the ceramic wiring board of the present invention, even when using a ceramic material for which a technique for selectively removing ceramic particles from a surface conductor layer has not been established, simultaneous use is possible. The bonding strength between the surface conductor layer and the metal plating layer can be increased without lowering the consistency of the amount of shrinkage during firing. Therefore, the reliability of the ceramic wiring board used as a semiconductor package, a circuit board, or the like can be greatly improved.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing an embodiment in which a ceramic wiring board of the present invention is applied to a semiconductor package.

FIG. 2 is an enlarged sectional view showing an input / output terminal portion of the semiconductor package shown in FIG. 1;

FIG. 3 is a sectional view of a main part showing a modification of the semiconductor package shown in FIG. 1;

FIG. 4 is a cross-sectional view showing another embodiment in which the ceramic wiring board of the present invention is applied to a circuit board.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Semiconductor package 2 ... Multilayer ceramic substrate 6, 7 ... Input / output terminal 8 ... Surface conductor layer 9 ... Metal plating layer 10 ... First conductor layer 11 ... Second conductor layer 12 ... Ceramic particles 13 ... High melting point metal particles

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁶ Identification code FI H05K 3/46 H05K 3/46 T

Claims (5)

[Claims] 1. A ceramic substrate, a conductor layer formed on at least a surface of the ceramic substrate by simultaneous sintering with the ceramic substrate and containing a high melting point metal and ceramic particles, and a metal provided on the conductor layer In a ceramic wiring board comprising a plating layer, the conductor layer is provided on a side of the ceramic substrate and a first conductor layer provided on the side of the metal plating layer, and has a higher melting point than the first conductor layer. A ceramic wiring board comprising: a second conductor layer having a high metal content. 2. The ceramic wiring board according to claim 1, wherein a thickness of said second conductor layer is smaller than a thickness of said first conductor layer. 3. The ceramic wiring board according to claim 1, wherein the second conductor layer is divided into two or more patterns,
A ceramic wiring board formed on the first conductor layer. 4. The ceramic wiring board according to claim 1, wherein the ceramic substrate has a multilayer structure, and the multilayer ceramic substrate has an internal conductor layer electrically connected to the conductor layer. Ceramic wiring board. 5. The ceramic wiring board according to claim 1, wherein said ceramic substrate is made of a sintered body containing aluminum nitride or silicon nitride as a main component.