JP2008034722A - Manufacturing method of circuit board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a circuit board capable of reducing the failure of insulated breakdown voltage between adjoining wiring, while materializing the microfabrication of the processing size of wiring. <P>SOLUTION: An insulating layer 3 is formed on a board 1. Next, a conductor 4a and a conductor 4b adjoining the conductor 4a are formed on the surface of the insulating layer 3, and at least a side surface of the upper part of the conductor 4a and the conductor 4b is processed into a forward tapered shape profile. Then, by press fitting the conductor 4a and the conductor 4b into the insulating layer 3, the conductor 4a and the conductor 4b are arranged into the insulating layer 3 in a self-adjusting way. Consequently, the insulating layer 3 is formed between the conductor 4a and the conductor 4b having a convex shape 3a, and also a region 5 which does not come into contact with the insulating layer 3 is formed in the side of the conductor 4a (the side of the conductor 4b). <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a circuit board manufacturing method.

  As portable electronic devices such as mobile phones, PDAs, DVCs, and DSCs are accelerating their functions, miniaturization and weight reduction are essential for their acceptance in the market. There is a need for a system LSI. On the other hand, these electronic devices are required to be more convenient and convenient, and higher functionality and higher performance are required for LSIs used in the devices. For this reason, as the number of I / Os increases with higher integration of LSI chips, there is a strong demand for miniaturization of the package itself. In order to achieve both of these, a semiconductor package suitable for high-density board mounting of semiconductor components Development is strongly demanded. In order to respond to such a demand for higher density, it is required that the circuit board on which the LSI chip is mounted be compatible with a narrow pitch (corresponding to higher density) of the wiring pattern.

FIG. 3 is a cross-sectional view schematically showing the structure of a conventional circuit board disclosed in Patent Document 1. As shown in FIG. A conventional circuit board (printed wiring board) includes a substrate (base body) 101 having at least an outer surface made of metal, an adhesive layer (surface-treated metal material) 108 formed on the upper surface of the substrate 101, and the adhesive layer 108. An insulating layer (resin layer) 104 formed on the wiring layer, and a wiring layer (metal foil) 106 having a circuit pattern formed by partially etching the insulating layer 104. In order to realize a high density circuit board, it is effective to reduce the processing dimension of the wiring layer 106 having this circuit pattern.
JP 2000-156550 A

  However, when the processing dimension of the wiring layer 106 is miniaturized, the interval (space) between adjacent wirings is shortened accordingly, and a sufficient withstand voltage between adjacent wirings is ensured when a high voltage is applied. There is a problem that it becomes difficult. This is because there is an etching damage layer (or unbonded end of the insulation layer, etc.) on the surface layer of the insulation layer located between adjacent wirings, and dielectric breakdown via the surface layer portion occurs when a high voltage is applied. This is because it is likely to occur. If the withstand voltage at this portion is defective, the reliability of the circuit board is significantly lowered. Therefore, the conventional circuit board has a certain limit in miniaturization, that is, miniaturization of the processing dimension of the wiring layer.

  The present invention has been made in view of such a situation, and an object of the present invention is to manufacture a circuit board capable of reducing a breakdown voltage defect between adjacent wirings while realizing miniaturization of a wiring processing dimension. To provide technology.

  In order to solve the above problems, a circuit board manufacturing method according to the present invention includes a first step of forming an insulating layer on a substrate, a first conductive portion on the surface of the insulating layer, and the first conductive portion. A second step of forming a second conductive part adjacent to the conductive part, and processing at least the upper side surfaces of the first conductive part and the second conductive part into a forward tapered shape; and the first conductive part and the second conductive part A third step of press-fitting the conductive portion into the insulating layer, and in the third step, a gap is formed between the side surfaces of the first conductive portion and the second conductive portion and the insulating layer. It is characterized by.

  According to the present invention, a gap (a region where the insulating layer is not in contact with the side surface of the conductive portion) is provided between the side surface of each conductive portion (the first conductive portion and the second conductive portion) and the insulating layer. Since the circuit board is formed by press-fitting a conductive portion whose side surface is processed into a forward tapered shape into the insulating layer, the process of manufacturing such a circuit board becomes simple. Further, the manufacturing cost can be reduced.

  In the above configuration, in the second step, it is preferable that the first conductive portion and the second conductive portion are processed so that the cross-sectional shapes thereof are trapezoidal. By doing so, it is possible to easily manufacture a circuit board in which the contact portion between the side surface of each conductive portion (the first conductive portion and the second conductive portion) and the insulating layer becomes a trapezoidal lower bottom portion. Therefore, the path length of the surface layer portion of the insulating layer from the first conductive portion to the second conductive portion is maximized, and a circuit board that is less prone to dielectric breakdown is provided at low cost.

  In the above configuration, the third step includes a step of press-fitting the first conductive portion and the second conductive portion in a state where the insulating layer is semi-cured, and a step of heating and curing the insulating layer. preferable. By doing in this way, each conductive part (the first conductive part and the second conductive part) is arranged in the insulating layer in a self-aligned manner and easily, and the side surface of each conductive part and the insulating layer are arranged. It is possible to create a gap between them. For this reason, a circuit board can be manufactured further at low cost.

  According to the present invention, it is possible to easily manufacture a circuit board with reduced insulation breakdown voltage between adjacent wirings and improved reliability.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, embodiments of the invention will be described with reference to the drawings. In all the drawings, the same reference numerals are given to the same components, and the description will be omitted as appropriate.

  FIG. 1 is a schematic sectional view showing a configuration of a circuit board according to an embodiment of the present invention. The circuit board of this embodiment will be described based on FIG.

  The circuit board of this embodiment includes a substrate 1, a protective layer 2 provided on the substrate 1, an insulating layer 3 provided on the protective layer 2, and a plurality of orders embedded in the insulating layer 3. The conductive parts 4a-4c which have a taper shape, and the insulating layer 6 provided so that the insulating layer 3 and the conductive parts 4a-4c may be covered are provided. Here, the insulating layer 3 has a convex portion 3a between the conductive portion 4a and the conductive portion 4b adjacent thereto. The convex portion 3a means a portion of the insulating layer located above the bottom portion (the lower surface portion of the conductive portions 4a to 4c) in the concave portion of the insulating layer 3. In addition, the forward tapered shape means a state in which the dimensional width is gradually narrowed from the lower side to the upper side like a trapezoid, for example, and in this case, the conductive portions 4a to 4c are arranged from the lower surface side to the upper surface. The state where the dimension width is narrowing toward the part is shown. Further, a space (space) is generated between the convex portion 3a of the insulating layer 3 and the side surface of the conductive portion 4a (side surface of the conductive portion 4b), and the insulating layer 6 is interposed in that portion, and the conductive portion 4a A region 5 not in contact with the insulating layer 3 is provided on the side surface (side surface of the conductive portion 4b). The substrate 1 is the “substrate” of the present invention, the insulating layer 3 is the “insulating layer” of the present invention, the conductive portion 4a is the “first conductive portion” of the present invention, and the conductive portion 4b is the “second” of the present invention. Is an example.

  Specifically, in the circuit board according to the present embodiment, for example, a metal plate made of copper (Cu) is employed for the substrate 1. The substrate 1 may be a resin substrate made of an epoxy insulating material or a wiring substrate in which wiring layers and resin layers are alternately formed.

The protective layer 2 is made of, for example, an insulating resin whose main component is an epoxy resin, and is provided on the substrate 1 with a thickness of about 10 μm. The protective layer 2 functions as a protective film for securing a dielectric strength between each conductive portion and the substrate 1 when a high voltage is applied to each conductive portion (conductive portions 4a to 4c). When a resin substrate or a wiring substrate is employed as the substrate 1, a moisture-resistant protective film having a function of protecting the substrate 1 from moisture or the like is employed as the protective layer 2.

  The insulating layer 3 is made of, for example, a thermosetting resin whose main component is an epoxy resin, and is provided on the protective layer 2 with a thickness of about 100 μm. Here, as for the insulating layer 3, while the recessed part is formed in the position corresponding to the electroconductive parts 4a-4c, the electroconductive parts 4a-4c are each arrange | positioned in this recessed part. That is, the insulating layer 3 includes a convex portion 3a having a height (about 30 μm) that is substantially flush with the upper surface of the conductive portions 4a and 4b between the conductive portion 4a and the conductive portion 4b adjacent thereto. It has a structure. Also, the same structure is formed between the conductive portion 4b and the conductive portion 4c adjacent thereto. The insulating layer 3 desirably has high thermal conductivity from the viewpoint of improving the heat dissipation of the circuit board. For this reason, it is preferable that the insulating layer 3 contains silver, bismuth, copper, aluminum, magnesium, tin, zinc, and alloys thereof, silica, alumina, silicon nitride, aluminum nitride, or the like as a highly thermally conductive filler.

  For example, a metal such as copper or aluminum is used for the conductive portions 4a to 4c, and the thickness thereof is, for example, about 30 μm. The cross-sectional shapes of the conductive portions 4a to 4c are trapezoidal, and the side surfaces of the conductive portions 4a to 4c are all forward tapered. The conductive portions 4a to 4c constitute part of a wiring pattern arranged in a line / space (L / S) shape, and the upper surface thereof is substantially flush with the upper surface of the insulating layer 3 (upper portion of the convex portion 3a). In this way, it is embedded in the insulating layer 3. Further, the side surface of the conductive portion 4a (side surface of the conductive portion 4b) and the insulating layer 3 are in contact between the side surface of the conductive portion 4a (side surface of the conductive portion 4b) and the convex portion 3a of the insulating layer 3. No area 5 is provided. The forward taper angle is preferably about 45 degrees, for example, from the viewpoint of achieving both the miniaturization of the conductive portions 4a and 4b and the ease of forming the region 5.

  Here, the conductive portion 4a and the conductive portion 4b are provided adjacent to each other. In the present embodiment, it is assumed that the distance (space) between the conductive portion 4a and the conductive portion 4b is particularly miniaturized to the manufacturing limit (allowable minimum space value at the time of manufacturing).

For example, a photo solder resist film made of an insulating resin containing an epoxy resin as a main component is employed as the insulating layer 6, and is provided with a thickness of about 50 μm so as to cover the insulating layer 3 and the conductive portions 4 a to 4 c. At this time, the insulating layer 6 is also embedded in the region 5 where the side surface of the conductive portion 4a (side surface of the conductive portion 4b) and the insulating layer 3 are not in contact with each other. The insulating layer 6 has a function of protecting each conductive portion (conductive portions 4a to 4c) from the external environment. In addition, a filler for increasing thermal conductivity may be added in the insulating layer 6.
(Production method)
FIG. 2 is a schematic cross-sectional view for explaining a manufacturing process of the circuit board according to the embodiment of the present invention shown in FIG.

  First, as shown in FIG. 2A, a metal plate made of, for example, copper (Cu) is prepared as the substrate 1. And the protective layer 2 which consists of insulating resin which has an epoxy resin as a main component is formed into a film on this board | substrate 1 by the roll coat method. Here, the thickness of the protective layer 2 is about 10 μm, for example. The protective layer 2 functions as a protective film for securing a dielectric strength between each conductive portion and the substrate 1 when a high voltage is applied to each conductive portion (conductive portions 4a to 4c). When a resin substrate or a wiring substrate is employed as the substrate 1, a moisture-resistant protective film having a function of protecting the substrate 1 from moisture or the like is employed as the protective layer 2.

As shown in FIG. 2 (B), a laminated film made of an insulating layer 3 and a copper foil (not shown) on the protective layer 2 is thermocompression bonded under vacuum or reduced pressure to have a thickness of about 100 μm. Then, an insulating layer 3 made of a thermosetting resin mainly composed of an epoxy resin and a copper foil (not shown) having a thickness of about 3 μm are formed. Thereafter, copper is plated on the surface of the copper foil using an electroless plating method and an electrolytic plating method. Thereby, the wiring layer 4 made of copper having a thickness of about 30 μm is formed on the insulating layer 3. In this step, the insulating layer 3 which is a thermosetting resin is not completely thermoset, and maintains a semi-cured state (a state in which it easily flows).

  As shown in FIG. 2C, the wiring layer 4 is patterned using a photolithography technique and an etching technique. As a result, conductive portions 4 a to 4 c constituting a part of the wiring pattern are formed on the insulating layer 3. At this time, by adjusting the etching conditions, the cross-sectional shapes of the conductive portions 4a to 4c are made trapezoidal (the side surfaces of the conductive portions 4a to 4c have a forward taper of about 45 degrees).

  As shown in FIG. 2D, the substrate 1 on which the conductive portions 4a to 4c are formed is uniformly pressed (about 10 MPa) against the conductive portions 4a to 4c so as to be sandwiched between flat plates (not shown) from above and below. Then, the conductive portions 4a to 4c are pushed into the insulating layer 3 (step of press-fitting). Since the insulating layer 3 is in a semi-cured state (easy to flow), the conductive portions 4a to 4c are easily embedded in the insulating layer 3, and the insulating layer 3 is recessed at a position corresponding to the conductive portions 4a to 4c. Is formed, and the convex portion 3a is integrally formed in the insulating layer 3 between the conductive portion 4a and the conductive portion 4b adjacent thereto. At this time, the upper surfaces of the conductive portions 4a and 4b are buried until they are substantially flush with the upper surface of the insulating layer 3 (the upper portion of the convex portion 3a). At the same time, an interval (space) is generated between the side surface of the conductive portion 4a (side surface of the conductive portion 4b) and the convex portion 3a of the insulating layer 3, and the side surface of the conductive portion 4a (side surface of the conductive portion 4b) A region 5 that is not in contact with the insulating layer 3 is provided. Subsequently, the insulating layer 3 is completely cured (step of curing) by applying heat treatment (150 ° C., 30 minutes) to the insulating layer 3.

  Finally, as shown in FIG. 1, as the insulating layer 6, for example, a photo solder resist film made of an insulating resin mainly composed of an epoxy resin is applied so as to cover the insulating layer 3 and the conductive portions 4 a to 4 c. It is formed with a thickness of 50 μm. At this time, the insulating layer 6 is also embedded in the region 5 where the side surface of the conductive portion 4a (side surface of the conductive portion 4b) and the insulating layer 3 are not in contact with each other. The insulating layer 6 has a function of protecting each conductive portion (conductive portions 4a to 4c) from the external environment. In addition, a filler for increasing thermal conductivity may be added in the insulating layer 6.

  Through these steps, the circuit board of this embodiment is manufactured.

According to the circuit board and the manufacturing method thereof of the present embodiment described above, the following effects can be obtained.
(1) A gap (a region 5 where the insulating layer 3 is not in contact with the side surfaces of the conductive portions 4a and 4b) between the side surfaces of the respective conductive portions (conductive portions 4a and 4b) and the insulating layer 3 (convex portions 3a). Is formed by press-fitting the conductive portions 4a and 4b whose side surfaces are processed into a forward tapered shape into the insulating layer 3, so that the process of manufacturing such a circuit board becomes simple. Further, the manufacturing cost can be reduced.
(2) By producing the cross-sectional shape of the conductive portions 4a and 4b so as to have a trapezoidal shape whose side surfaces are forward-tapered, the contact portion between the side surfaces of the conductive portions 4a and 4b and the insulating layer 3 has a trapezoidal shape. The circuit board which becomes the bottom portion can be easily manufactured. Therefore, the path length of the surface layer portion of the insulating layer 3 (the convex portion 3a of the insulating layer 3) from the end portion A of the conductive portion 4a to the end portion B of the conductive portion 4b is maximized, resulting in more dielectric breakdown. A difficult circuit board is provided at low cost.
(3) The conductive portions 4a and 4b whose upper side surfaces are processed into a forward tapered shape are press-fitted into the insulating layer 3, thereby forming recesses in the insulating layer 3, and the conductive portions 4a and 4b are formed in the recesses. By disposing, the insulating layer 3 is provided between the conductive portion 4a and the conductive portion 4b adjacent thereto, and a gap (conductive portion) is provided between the side surface of each conductive portion (conductive portions 4a and 4b) and the insulating layer 3. A region 5) where the insulating layer 3 is not in contact with the side surfaces of 4a and 4b can be generated. For this reason, the path length (effective distance) of the surface layer portion of the insulating layer 3 located between the conductive portion 4a and the conductive portion 4b is increased as compared with the prior art, and dielectric breakdown through the surface layer portion of the insulating layer 3 is unlikely to occur. A circuit board with improved reliability is provided.
(4) By making the cross-sectional shape of the conductive portions 4a and 4b into a trapezoidal shape whose side surface is a forward taper, the contact portion between the side surface of the conductive portion 4a (the side surface of the conductive portion 4b) and the insulating layer 3 becomes a base. Only the lower bottom part of the shape is formed, and the path length of the surface layer part of the insulating layer 3 (the convex part 3a of the insulating layer 3) extending from the end A of the conductive part 4a to the end B of the conductive part 4b is maximized. . As a result, the dielectric breakdown between the conductive portion 4a and the conductive portion 4b adjacent thereto via the surface layer portion of the insulating layer 3 (interface between the insulating layer 3 and the insulating layer 6) is less likely to occur, and the circuit board Reliability is further improved. In addition, when the area | region 5 which is not in contact with the insulating layer 3 is provided in a part of the surface side (upper surface side) of the side surface (side surface of the conductive portion 4b) of the conductive portion 4a, only that portion increases the path length. Therefore, the effect of suppressing the dielectric breakdown can be enjoyed accordingly.
(5) Even if the distance (space) between the conductive portion 4a and the conductive portion 4b adjacent to the conductive portion 4a is the same as the conventional size, according to the present configuration, the effective interval against dielectric breakdown at that portion is increased, Reliability degradation of the circuit board can be suppressed. For this reason, the space | interval (space) between the electroconductive part 4a and the electroconductive part 4b adjacent to this can further be narrowed, and the further refinement | miniaturization of a circuit board can be implement | achieved.
(6) The conductive portions 4a and 4b processed into a trapezoidal shape (the conductive portions 4a and 4b whose side surfaces are processed into a forward tapered shape) are pushed into the insulating layer 3 by applying pressure to the insulating layer 3 to be self-aligned. The region 5 that does not contact the insulating layer 3 can be easily provided on the side surface of the conductive portion 4a (side surface of the conductive portion 4b). For this reason, cost reduction of a circuit board is realizable.

  In the above embodiment, the example of the circuit board provided with the insulating layer 6 so as to cover the insulating layer 3 and the respective conductive parts (conductive parts 4a to 4c) and the method for manufacturing the circuit board are shown, but the present invention is not limited thereto. For example, a circuit board without the insulating layer 6 may be used. Also in this case, the above effect can be enjoyed.

  In the said embodiment, although the example which employ | adopted the photo solder resist film which has a function which protects each electroconductive part (electrically conductive part 4a-4c) as the insulating layer 6 was shown, this invention is not limited to this, For example, an insulating layer 6, the same material as that of the insulating layer 3 may be adopted, and another conductive portion may be provided thereon. In this case, in addition to enjoying the above effects, the circuit board having further improved insulation resistance can be multilayered.

  In the above embodiment, the example in which the upper surfaces of the conductive portions 4a and 4b are substantially flush with the upper surface of the insulating layer 3 (the upper portion of the convex portion 3a) is shown. However, the present invention is not limited to this. If a region 5 that does not contact the insulating layer 3 is provided on the side surfaces of 4a and 4b, the upper surface of the insulating layer 3 (the upper portion of the convex portion 3a) is recessed even if the upper surfaces of the conductive portions 4a and 4b protrude. You may go out. Also in this case, it is possible to enjoy the effect that dielectric breakdown is less likely to occur according to the increase in the path length.

  In the said embodiment, although the example whose cross-sectional shape is trapezoid was shown as the electroconductive part 4a (conductive part 4b) which has a forward taper shape, this invention is not limited to this, For example, the upper end part of a rectangular electroconductive part It is good also as chamfering with respect to and making only an upper side part into a forward taper shape. Similarly, only the upper end portion may be rounded. In this case, a region 5 not in contact with the insulating layer 3 is provided in the forward tapered portion provided in the conductive portion 4a (conductive portion 4b), and this portion contributes to an increase in the path length.

1 is a schematic cross-sectional view of a circuit board according to an embodiment of the present invention. (A)-(D) The schematic sectional drawing for demonstrating the manufacturing process of the circuit board by embodiment shown in FIG. The schematic sectional drawing of the conventional circuit board.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Board | substrate, 2 ... Protective layer, 3 ... Insulating layer, 3a ... Convex part of the insulating layer 3, 4a ... Conductive part, 4b ... Conductive adjacent to the conductive part 4a 5, regions where the side surfaces of the conductive portions 4 a and 4 b are not in contact with the insulating layer 3, 6.

Claims (3)

A first step of forming an insulating layer on the substrate;
A first conductive portion and a second conductive portion adjacent to the first conductive portion are formed on the surface of the insulating layer, and at least the upper side surfaces of the first conductive portion and the second conductive portion are arranged in order. A second step of processing into a tapered shape;
A third step of press-fitting the first conductive portion and the second conductive portion into the insulating layer;
With
In the third step, a gap is generated between side surfaces of the first conductive portion and the second conductive portion and the insulating layer.   The method for manufacturing a circuit board according to claim 1, wherein in the second step, the first conductive portion and the second conductive portion are processed so that the cross-sectional shapes thereof are trapezoidal.   The third step includes a step of press-fitting the first conductive portion and the second conductive portion in a state where the insulating layer is semi-cured, and a step of heating and curing the insulating layer. A method for manufacturing a circuit board according to claim 1.

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