WO2012129819A1 - Radio frequency emitting front end module in global system for mobile communication manufactured with quad flat non-leaded package - Google Patents

Radio frequency emitting front end module in global system for mobile communication manufactured with quad flat non-leaded package Download PDF

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Publication number
WO2012129819A1
WO2012129819A1 PCT/CN2011/072590 CN2011072590W WO2012129819A1 WO 2012129819 A1 WO2012129819 A1 WO 2012129819A1 CN 2011072590 W CN2011072590 W CN 2011072590W WO 2012129819 A1 WO2012129819 A1 WO 2012129819A1
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Prior art keywords
radio frequency
power amplifier
gsm
end module
block
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PCT/CN2011/072590
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French (fr)
Chinese (zh)
Inventor
陈俊
谢利刚
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锐迪科创微电子（北京）有限公司
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Publication of WO2012129819A1 publication Critical patent/WO2012129819A1/en

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Definitions

  • GSM RF transmit front-end module in quad flat no-lead package
  • the present invention relates to the field of second generation mobile communications, and more particularly to a GSM radio frequency front end module employing a quad flat no-lead package. Background technique
  • GSM Global System for Mobile Communication
  • GSM Global System for Mobile Communication
  • the shipment of GSM handheld devices accounts for the vast majority of all current mobile communication device shipments, while the smaller, lower cost RF front-end modules are the development trend of GSM mobile terminals.
  • a GSM RF transmit front-end module includes a GSM RF power amplifier die, a controller die, a matching network, and an RF antenna switch die.
  • RF power amplifier dies are typically fabricated using GaAs Heterojunction Bipolar Transistors (GaAs HBTs) or Silicon-Based Field Effect Transistors (MOSFETs) to achieve power amplification of GSM RF signals.
  • the controller die is typically fabricated using a complementary metal oxide semiconductor (CMOS) process that controls the operation of the entire RF transmit front-end module based on external control signals from the RF transmit front-end module, such as controlling the RF output of the RF power amplifier die. The power level, the path of the RF antenna switch, etc.
  • CMOS complementary metal oxide semiconductor
  • the matching network is the output matching network of the RF power amplifier die and is typically composed of multiple inductors, capacitors, or transformers.
  • the matching network can be implemented either by using discrete components or by using an Integrated Passive Device (IPD) process to make the matching network a single die.
  • IPD Integrated Passive Device
  • the RF antenna switch die is usually a single-pole multi-throw RF switch, including the RF transmit path and the RF receive path. It is usually fabricated by a gallium arsenide high mobility field effect transistor (GaAs HEMT) process or P-type insulation. -N type (PIN) diode process is implemented.
  • GaAs HEMT gallium arsenide high mobility field effect transistor
  • PIN PIN type
  • the GSM RF front-end module needs to be packaged into a single semiconductor device in the form of a Land Grid Array (LGA).
  • LGA Land Grid Array
  • the RF power amplifier die, controller die, matching network (discrete components or IPD die), and RF antenna switch die are mounted on the LGA Above the multilayer laminate substrate ( Laminate Substrate), the bond wires and the metal traces on the LGA substrate are connected to each other.
  • FIG. 1 A schematic diagram of a typical LGA package GSM RF front-end module is shown in FIG.
  • the commonly used LGA substrate is a multilayer laminated substrate comprising two or more metal layers (the metal material is usually copper or aluminum), and the adjacent metal layer passes through the insulating material layer (which may be epoxy) Or materials such as ceramics are isolated from each other, and different metal layers may be connected to each other through via holes.
  • the metal material is usually copper or aluminum
  • the insulating material layer which may be epoxy
  • materials such as ceramics are isolated from each other, and different metal layers may be connected to each other through via holes.
  • the GSM RF front-end module 100 includes four dies: a power controller die (CMOS controller die), an Ul, a GaAs HBT RF power amplifier die U2, an IPD die U3, and RF antenna switch die U4.
  • CMOS controller die power controller die
  • Ul GaAs HBT RF power amplifier die
  • IPD die U3 IPD die U3
  • RF antenna switch die U4 RF antenna switch die
  • the above four dies are mounted on the upper surface of the LGA substrate, and the bonding pads (pads) on the four dies are connected to the corresponding pins of the module through the bonding wires 111, such as the bonding of the CMOS controller dies U1.
  • the pad is connected to the control signal pins VC1, VC2, VC3, and VC4 through the bonding wires, and the bonding pads of the RF power amplifier die U2 are connected to the RF input signal pins RFinl, RFin2, etc. through the bonding wires, the IPD tube.
  • the bonding pads of the core U3 are connected to the ground signal pins GND1, GND2, GND3, and GND4 through bonding wires, and the bonding pads of the RF antenna switching die U4 are connected to the RF receiving signal pins RX1 through the bonding wires. RX2 and so on.
  • passive components such as inductors required in the circuit can be fabricated, such as the planar spiral inductors 101 and 102 as shown in FIG. 1, or the linear inductor 106, etc., and the inductor devices are all fabricated on a certain layer of the LGA substrate.
  • the ports of these inductors are directly connected to the pins of the module (for example, one end of the planar spiral inductor 102 is connected to the power signal pin VCC2, one end of the 106 is connected to the power signal pin VCC1), or through the key
  • the bonding wires are connected to the bonding pads on the corresponding die (for example, one end of 101 is connected to the corresponding bonding pad of the RF antenna switching die U4 through a bonding wire, and one end of 102 passes through the bonding wire and the IPD pipe.
  • the respective bond pads of the core U3 are connected, and one end of the 106 is connected to the IPD die U3 and the corresponding bond pads of the RF power amplifier die U2 via bond wires).
  • the interconnections between the dies can be directly connected by bond wires between the respective bond pads on the respective dies (eg between CMOS controller die U1 and RF antenna switch die U4) Directly connected by a bonding wire, the IPD die U3 and the RF antenna switching die U4 are directly connected by a bonding wire, and the RF power amplifier die U2 and the IPD die U3 are directly connected by a bonding wire) Or first, the bonding pad on the first die may be connected to one end of the upper trace of the LGA substrate through a bonding wire, and then the other end of the trace is connected to the second die through the bonding wire.
  • Bonding the pads thereby achieving interconnection of the corresponding bonding pads of the two dies (eg, bonding pads on the CMOS controller die U1 are connected by bonding wires)
  • the other end of the 110 is connected to the bond pad on the RF power amplifier die U2 via a bond wire.
  • the planar spiral inductor 102 fabricated on the upper metal layer of the LGA substrate is connected to the second metal layer through the via 103, the trace 104 is in the second metal layer, and is connected to the upper metal layer through the via 105. Then, the trace 104 is connected to the power pin VCC2 of the RF transmitting front end module.
  • the thickness of the LGA substrate metal layer is several tens of micrometers, and the fabrication line width can reach several hundred micrometers, so that the parasitic resistance of the fabricated inductor is small (usually below 0.1 ohm), and a high Q inductance is obtained.
  • the high efficiency of the GSM RF front-end module is guaranteed. Especially in the GSM low frequency band (824MHz-915MHz), the Q value of the inductor used has a great influence on the performance of the RF front-end module.
  • the fabrication of the LGA substrate includes lamination of a metal layer and an insulating material layer, drilling and filling of a metal material, lithographic metal layer trace pattern, etching of unnecessary patterns, plating of metal, etc.; mounting on the finished LGA substrate Dies, then connect the bonding pads, pins and ports that need to be connected through the bonding device; finally, the entire substrate, the die and the bonding wires are covered by the sealing resin, and finally the GSM RF emission of the LGA package is completed.
  • Front end module The fabrication of the LGA substrate includes lamination of a metal layer and an insulating material layer, drilling and filling of a metal material, lithographic metal layer trace pattern, etching of unnecessary patterns, plating of metal, etc.
  • the IPD method is adopted in the GSM RF front-end module of the LGA package described above to implement the output matching network of the RF power amplifier; of course, discrete components such as inductors and capacitors may also be used to implement the output matching network.
  • discrete components such as inductors and capacitors may also be used to implement the output matching network.
  • the process steps of mounting these discrete components on the LGA substrate are also required during the fabrication of the LGA packaged GSM RF transmit front-end module.
  • the GSM RF transmitting front-end module in the form of an LGA package is complicated to manufacture, so that the cost of the entire module is 4 ⁇ .
  • the cost of LGA substrate manufacturing and packaging accounts for about 50% of the total cost of LGA packaged GSM RF front-end transmitter modules.
  • reducing the packaging cost of the GSM RF front-end module is an effective means of reducing its total cost.
  • Quad Flat Non-leaded package The most widely used package in semiconductor packages is the Quad Flat Non-leaded package (QFN).
  • QFN package does not require a multi-layer substrate. It is a flat, flat metal frame, semiconductor.
  • the die is mounted on a surface between the metal frames, and the bonding pads on the die are connected to the corresponding pins of the QFN metal frame by bonding wires, as shown in FIG. 2, and finally resin or plastic is used.
  • the semiconductor device of the QFN package is completed by encapsulating the die and the QFN metal frame. As shown in Fig. 2, in the QFN packaged semiconductor device 200, two dies U1 and U2 are mounted on the QFN metal frame. On the metal surface of the center of 201, U1 can be passed through the bonding wire 202.
  • QFN Connect to the corresponding bond pads of U2 or connect the corresponding bond pads of U1 and U2 to the pins of the QFN frame.
  • QFN has a very rich supply source and does not need to be customized like LGA.
  • the manufacturing process is also very simple, so the cost of QFN package is very low.
  • the GSM RF transmit front-end module can be manufactured in a QFN package, it will have a significant cost advantage.
  • the metal frame in the QFN package is a monolithic metal that is integral throughout the electrical connection, placing discrete passive components on it is more difficult than the LGA form.
  • Most of the current industry explorations using QFN package manufacturing products do not integrate the output matching network, but are implemented on the printed circuit board (PCB) of the product.
  • PCB printed circuit board
  • RFMD USA has introduced RF2173, a GSM RF power amplifier product in QFN package, which does not include an RF antenna switch, is not a complete GSM RF transmit front-end module, and it places the output matching network of the RF power amplifier outside the package.
  • the integration of the entire RF transmission front end is low, and the cost advantage of the QFN package is not fully reflected.
  • the technical problem to be solved by the present invention is to provide a GSM radio frequency transmitting front-end module using a quad flat no-lead package to solve the high cost of manufacturing the existing GSM radio frequency front-end module, resulting in a handheld device with a GSM radio-emitting front-end module.
  • the overall price cost is too high.
  • the present invention provides a GSM RF transmitting front-end module using a quad flat no-lead package
  • the metal frame of the module includes: an output matching network, an RF antenna switch, a power controller and an RF power amplifier, wherein the output matching network, the RF antenna switch, the power controller, and the RF power amplifier are respectively fabricated into corresponding semiconductor dies by using different semiconductor processes, and the semiconductor die is mounted On the metal frame.
  • the GSM radio frequency transmitting front end module of the present invention adopts a quad flat no-lead package, wherein at least one choke inductor on the radio frequency power amplifier is made of a semi-corrosive metal strip disposed on the metal frame.
  • one end of the semi-corroded metal strip is in communication with a pin on the metal frame.
  • the metal strip has a shape of a straight line, an arc or a serpentine shape.
  • the radio frequency power amplifier is an RF power amplifier that supports GSM high frequency band and low frequency band signal amplification.
  • the radio frequency power amplifier is a radio frequency power amplifier manufactured by a gallium arsenide heterojunction bipolar transistor process or a silicon-on-insulator process.
  • the output matching network is manufactured by using an integrated passive device process.
  • the radio frequency antenna switch is fabricated by a gallium arsenide high electron mobility field effect transistor process
  • the power controller is fabricated by a complementary metal oxide semiconductor process.
  • the output matching network and the RF antenna switch are fabricated into a semiconductor die by a silicon-on-insulator process.
  • the GSM radio frequency transmitting front-end module adopting the quad flat no-lead package of the invention can effectively reduce the cost of the GSM radio frequency front-end module, thereby reasonably reducing the handheld with the GSM radio-emitting front-end module.
  • Figure 1 is a structural diagram of a conventional GSM RF transmitting front-end module in an LGA package
  • Circuit diagram of the module Structure diagram of the module;
  • the main idea of the present invention is to solve the problem that the existing GSM RF transmitting front-end module is expensive to manufacture and the overall cost of the handheld device with the GSM RF transmitting front-end module is too high.
  • the GSM RF front-end module in the quad flat no-lead (QFN) package of the present invention can effectively reduce the cost of the GSM RF front-end module, thereby reasonably reducing the overall price cost of the GSM handheld device.
  • QFN quad flat no-lead
  • FIG. 3 and FIG. 4 it is a circuit diagram of a GSM radio frequency transmitting front-end module adopting a QFN package according to an embodiment of the present invention; wherein the module is a QFN metal
  • the frame 300 includes four semiconductor devices, namely: an output matching network U1, a radio frequency antenna switch U2, a power controller (CMOS controller) U3, and a radio frequency power amplifier U4.
  • the integrated passive device U1, the RF antenna switch U2, the power controller U3, and the RF power amplifier U4 are respectively fabricated into corresponding semiconductor dies by using different semiconductor processes, and the above-described semiconductor die is mounted on the metal frame 300. on.
  • the output matching network U1 and the RF antenna switch U2 are mounted on the area 305 of the QFN metal frame 300, and the power controller U3 and the RF power amplifier U4 are mounted on the area 304 of the QFN metal frame 300.
  • the output matching network U1 is manufactured by using an integrated passive device (IPD) process; the RF antenna switch U2 can be fabricated by using a gallium arsenide high electron mobility field effect transistor process;
  • the controller U3 may be fabricated by a process of a complementary metal oxide semiconductor;
  • the RF power amplifier U4 is a radio frequency power amplifier capable of supporting signal amplification of a GSM high frequency band (1710 MHz-1910 MHz signal) and a low frequency band (824 MHz-915 MHz signal);
  • the RF power amplifier U4 can be fabricated using a gallium arsenide heterojunction bipolar transistor process or a silicon-on-insulator (SOI) process.
  • IPD integrated passive device
  • SOI silicon-on-insulator
  • the output matching network U1 and the RF antenna switch U2 may also be integrated by a suitable semiconductor process, such as a silicon-on-insulator (SOI) process.
  • a suitable semiconductor process such as a silicon-on-insulator (SOI) process.
  • SOI silicon-on-insulator
  • the power controller U3 can also The RF power amplifier U4 is integrated using a suitable semiconductor process to form a semiconductor die.
  • Which semiconductor process such as bipolar-field effect transistor process, BiCMOS: Bipolar-CMOS
  • BiCMOS Bipolar-CMOS
  • the RF antenna switch U2 is a single-pole four-throw RF antenna switch; the GSM RF input signal RFinl (GSM high-band 1710MHz-1910MHz signal) and RFin2 (GSM low-band 824MHz-915MHz signal) are completed by the RF power amplifier U4. Power amplification.
  • the output matching network U1 includes not only the planar spiral inductors 306 and 307 shown in FIG. 4 but also a plurality of passive components such as capacitors and inductors.
  • the single-pole four-throw RF antenna switch U2 is connected to the GSM high-band and low-band transmit signal path and at least one receive signal path.
  • the single-pole is connected to the antenna pin ANT of the GSM RF transmit front-end module.
  • the throws are respectively connected to the GSM high-band transmit signal and the low-band transmit signal and the two receive signals RX1, RX2.
  • the power controller U3 controls the working state of the entire GSM radio frequency transmitting front end module according to the externally input control signals VC1-VC4, such as controlling the output signal power level of the radio frequency power amplifier U4 and the radio frequency to which the single pole knife is connected in the radio frequency antenna switch U2. path.
  • the semiconductor die and the pins on the QFN metal frame 300 are connected by a bonding wire 303.
  • the at least one choke inductor disposed on the radio frequency power amplifier is made of a semi-corroded metal strip 301 disposed on the QFN metal frame 300. As shown in FIG. 5, the strip 301 is respectively opposite to the QFN metal.
  • the pins on the frame 300 are in communication, and the bottom surface of the metal strip 301 is higher than the bottom surfaces of all the pins on the QFN metal frame 300 and the semiconductor die attach area. At least three or more of the pins on the QFN metal frame 300 are in direct current communication.
  • the bonding pads on the QFN metal frame 300 that need to be grounded are connected to the large-area connected ground portion on the QFN metal frame.
  • the output matching network U1, the RF antenna switch U2, the power controller U3, and the RF power amplifier U4 included in the QFN metal frame 300 can also have an electrostatic discharge (ESD) path, thereby providing ESD protection.
  • ESD electrostatic discharge
  • the present invention also needs to implement DC power supply of the RF power amplifier Very low parasitic resistance in the path (choke inductor), especially in the GSM low-band (800MHz-915MHz) RF power amplifier operating peak current up to 1.5A, requiring the inductor's parasitic resistance to be less than 0.1 ohm, will not The efficiency of the RF power amplifier has a large impact.
  • the output matching network U1 is manufactured by semiconductor manufacturing technology, and the thickness of the conductive metal layer film is very thin, usually on the order of micrometers, and the resulting parasitic resistance of the inductor is large, which will deteriorate the efficiency of the RF power amplifier U4. Therefore, in this embodiment, as shown in FIG.
  • the choke inductor provided on the RF power amplifier U4 of the GSM low frequency band is realized by the metal strip 301 on the QFN metal frame 300.
  • the first end of the metal strip 301 is in communication with the power supply pins (VCC1, VCC2) of the QFN metal frame 300, and the power supply pins (VCC1, VCC2) pass through the bonding wires.
  • the corresponding bonding pads that can be connected to the power controller U3 and the RF antenna switch U2 are powered by the power supply; the second end of the metal strip 301 is connected to the pins 308, 309 of the QFN metal frame 300, at the power supply pin (VCC1)
  • the portion including the metal strip 301 between the VCC2) and the pins 308, 309 constitutes a choke inductor of the GSM low-band RF power amplifier; the bottom surface of the shaded portion of the metal strip 301 is higher than the regions 304, 305 And the bottom surface of all pins.
  • the semi-etched metal strip 301 is covered with the resin encapsulation material to be insulated from the surrounding non-physically connected metal pins. Isolation, such as isolation from metal pins VC1-VC4; and two or more metal pins connected by metal strip 301, still maintain DC communication, as shown in Figure 4, metal pins 308 and VCC2 .
  • the metal thickness of the semi-etched metal strip 301 is usually half the thickness of the pin, about 100 microns, and the width is usually also 100 microns, and the DC parasitic resistance is small.
  • the metal strip 301 can be made thicker (more than a few tens of micrometers), its parasitic resistance is very small, and it is fully suitable for the choke inductor of the GSM low-band RF power amplifier.
  • the relationship between the metal strip 301 and the thickness and position of the pin is shown in the sectional view of the QFN package shown in FIG.
  • the inductance value that the metal strip 301 can achieve is related to its length, and the longer the length, the larger the inductance value; in order to minimize the overall size of the final QFN packaged GSM RF front-end module, it is required in the circuit.
  • the design is designed to ensure that the inductance of the inductor is between 2nH and 5nH, which can be achieved by reasonable design of the output matching network of the RF power amplifier die U4, which is common knowledge to those skilled in the art.
  • the shape of the metal strip 301 is not limited to a straight line, and may be a curved shape such as a curved shape or a serpentine shape, as long as the equivalent inductance value reaches the circuit design requirement.
  • two or more similar choke inductors can be implemented on the QFN, and used for GSM low-band RF power amplifiers, GSM high-band RF power amplifiers, and their pre-stage choke inductors. .
  • increasing the number of such choke inductors increases the difficulty and size of the design and manufacture of the QFN metal frame, and trade-offs are required in the specific implementation, but are within the spirit of the present invention.
  • the RF power amplifier U4 in the embodiment includes two RF power amplifier circuits, and supports the GSM low frequency band (824MHZ-915MHz) and the GSM high frequency band.
  • the metal strip 301 as described above realizes the choke inductor required for the GSM low-band RF power amplifier circuit, and the choke inductor required for the GSM high-band RF power amplifier circuit has low requirements for parasitic resistance and Q value.
  • a bonding wire is used in combination with an inductance on the output matching network U1.
  • the GSM RF transmitting front-end module of the QFN package in the embodiment is used in the power supply pin of the PCB board in practical application.
  • VCC1, VCC2 It is necessary to connect at least one decoupling capacitor (Cl, C2) with a capacitance range of nF-uF.
  • the electrostatic protection (ESD) level of the capacitor device usually fabricated on the output matching network U1 is weak, and is 50V-500V in the human body mode (HBM), which cannot meet the ESD level of HBM>2000V which is usually required for industrial products.
  • the ESD protection device is usually not provided in the IPD process used to make the output matching network U1.
  • the overall design of the GSM RF transmission front-end module can only avoid the direct interference of the device on the output matching network U1 by static electricity.
  • the GSM RF transmitting front-end module includes four dies manufactured by different processes, but the number of dies is not intended to limit the spirit of the present invention. Any changes and modifications commensurate with the present invention are considered to be within the scope of the appended claims.
  • the GSM radio frequency transmitting front-end module adopting the QFN package of the present invention can effectively reduce the cost of the GSM radio frequency transmitting front-end module, thereby reasonably reducing the overall capacity of the handheld device with the GSM radio transmitting front-end module. Price cost.
  • the invention may, of course, be embodied in various other forms and modifications without departing from the spirit and scope of the invention.

Abstract

A radio frequency (RF) emitting front end module in global system for mobile communication (GSM) manufactured with quad flat non-leaded package is disclosed. There are an output match network, a radio frequency antenna switch, a power controller and a radio frequency power amplifier on a metal frame of the module, wherein the output match network, the radio frequency antenna switch, the power controller and the radio frequency power amplifier are manufactured as corresponding semiconductor dies by utilizing different semiconductor technology, and the semiconductor dies are attached to the metal frame. The solution of the RF emitting front end module in GSM can effectively reduce the cost of the RF front end module in GSM so as to reduce the total price cost of the handheld device with the RF emitting front end module in GSM.

Description

采用四方扁平无引脚封装的 GSM射频发射前端模块 技术领域  GSM RF transmit front-end module in quad flat no-lead package
本发明涉及第二代移动通信领域， 具体地说， 本发明涉及一种采用四方扁 平无引脚封装的 GSM射频发射前端模块。 背景技术  The present invention relates to the field of second generation mobile communications, and more particularly to a GSM radio frequency front end module employing a quad flat no-lead package. Background technique
当前，第三代移动通信系统正在全球范围内越来越广泛地进行部署和应用， 然而， 作为第二代移动通信标准的 GSM ( Global System for Mobile Communication ), 仍然是世界上应用最为广泛的移动通信标准。 GSM手持设备 的出货量， 占据了目前所有移动通信设备出货量的绝大多数， 而更小尺寸、 更 低成本的射频前端模块是 GSM手机终端的发展趋势。  Currently, third-generation mobile communication systems are being deployed and applied more and more widely around the world. However, GSM (Global System for Mobile Communication), the second-generation mobile communication standard, is still the most widely used mobile in the world. Communication standard. The shipment of GSM handheld devices accounts for the vast majority of all current mobile communication device shipments, while the smaller, lower cost RF front-end modules are the development trend of GSM mobile terminals.
通常， 一个 GSM射频发射前端模块包括 GSM射频功率放大器管芯、控制 器管芯、 匹配网络以及射频天线开关管芯等部分。 射频功率放大器管芯通常需 要采用砷化镓异质结双极型晶体管 （GaAs HBT ) 或者硅基场效应晶体管 ( MOSFET )工艺制造， 实现对 GSM射频信号的功率放大。 控制器管芯通常 采用互补金属氧化物半导体（CMOS ) 工艺制造， 其根据外部输入到射频发射 前端模块的控制信号来控制整个射频发射前端模块的工作状态， 如控制射频功 率放大器管芯输出射频信号的功率大小、 选择射频天线开关的通路等。 匹配网 络是射频功率放大器管芯的输出匹配网络， 通常由多个电感、 电容或变压器无 源器件组成。 匹配网络的实现形式既可以是采用分立元器件制造， 也可以采用 集成无源器件（IPD, Integrated Passive Device )工艺将匹配网络制造成一个管 芯。 射频天线开关管芯通常是一个单刀多掷的射频开关， 包括了射频发射通路 及射频接收通路， 通常由砷化镓高迁移率场效应晶体管（GaAs HEMT )工艺制 造， 也可以使用 P型 -绝缘 -N型 （PIN )二极管工艺实现。 如上所述， GSM射 频发射前端模块中的多个功能模块采用了不同的半导体制造工艺， 因此它是一 个多芯片模组（MCM, Multi-Chip-Module )。  Typically, a GSM RF transmit front-end module includes a GSM RF power amplifier die, a controller die, a matching network, and an RF antenna switch die. RF power amplifier dies are typically fabricated using GaAs Heterojunction Bipolar Transistors (GaAs HBTs) or Silicon-Based Field Effect Transistors (MOSFETs) to achieve power amplification of GSM RF signals. The controller die is typically fabricated using a complementary metal oxide semiconductor (CMOS) process that controls the operation of the entire RF transmit front-end module based on external control signals from the RF transmit front-end module, such as controlling the RF output of the RF power amplifier die. The power level, the path of the RF antenna switch, etc. The matching network is the output matching network of the RF power amplifier die and is typically composed of multiple inductors, capacitors, or transformers. The matching network can be implemented either by using discrete components or by using an Integrated Passive Device (IPD) process to make the matching network a single die. The RF antenna switch die is usually a single-pole multi-throw RF switch, including the RF transmit path and the RF receive path. It is usually fabricated by a gallium arsenide high mobility field effect transistor (GaAs HEMT) process or P-type insulation. -N type (PIN) diode process is implemented. As mentioned above, the multiple functional modules in the GSM RF transmit front-end module use different semiconductor manufacturing processes, so it is a multi-chip module (MCM, Multi-Chip-Module).
通常 GSM射频发射前端模块都需要采用栅格阵列封装（LGA, Land Grid Array )形式来封装成一个单独的半导体器件。 所述射频功率放大器管芯、 控制 器管芯、 匹配网络（分立元件或 IPD管芯）以及射频天线开关管芯贴装在 LGA 多层层压基板 ( Laminate Substrate )之上， 通过键合线（ Bondwire )及 LGA基 板上的金属走线相互连接，一个典型的 LGA封装 GSM射频发射前端模块的示 意图如图 1所示。 通常所采用的 LGA基板是多层层压基板， 包括了 2层或 2 层以上的金属层（金属材料通常是铜或者铝等材料 ),相邻金属层通过绝缘材料 层（可以是环氧树脂或者陶瓷等材料）相互隔离， 不同金属层之间可以通过过 孔相互连接。 Usually, the GSM RF front-end module needs to be packaged into a single semiconductor device in the form of a Land Grid Array (LGA). The RF power amplifier die, controller die, matching network (discrete components or IPD die), and RF antenna switch die are mounted on the LGA Above the multilayer laminate substrate ( Laminate Substrate), the bond wires and the metal traces on the LGA substrate are connected to each other. A schematic diagram of a typical LGA package GSM RF front-end module is shown in FIG. The commonly used LGA substrate is a multilayer laminated substrate comprising two or more metal layers (the metal material is usually copper or aluminum), and the adjacent metal layer passes through the insulating material layer (which may be epoxy) Or materials such as ceramics are isolated from each other, and different metal layers may be connected to each other through via holes.
如图 1所示， 所述 GSM射频发射前端模块 100中， 包括 4个管芯： 功率 控制器管芯（ CMOS控制器管芯） Ul、 GaAs HBT射频功率放大器管芯 U2、 IPD 管芯 U3及射频天线开关管芯 U4。 上述 4个管芯贴装在 LGA基板的上表面， 4 个管芯上的键合焊盘（ Pad )通过键合线 111连接到模块的相应管脚， 如 CMOS 控制器管芯 Ul 的键合焊盘通过键合线连接到控制信号管脚 VC1、 VC2、 VC3 及 VC4等， 射频功率放大器管芯 U2的键合焊盘通过键合线连接到射频输入信 号管脚 RFinl、 RFin2等， IPD管芯 U3的键合焊盘通过键合线连接到接地信号 管脚 GND1、 GND2、 GND3及 GND4等， 射频天线开关管芯 U4的键合焊盘通 过键合线连接到射频接收信号管脚 RX1、 RX2等。 LGA基板上还可以制作电 路中所需的电感等无源器件， 如图 1中所示的平面螺旋电感 101及 102, 或直 线电感 106等， 上述电感器件都制作于 LGA基板的某一层金属层上， 并且这 些电感的端口或者直接与模块的管脚相连接（如平面螺旋电感 102的一端与电 源信号管脚 VCC2相连接， 106的一端与电源信号管脚 VCC1相连接）， 或者通 过键合线与相应的管芯上的键合焊盘相连接（如 101的一端通过键合线与射频 天线开关管芯 U4的相应键合焊盘相连接， 102的一端通过键合线与 IPD管芯 U3的相应键合焊盘相连接， 106的一端通过键合线与 IPD管芯 U3及射频功率 放大器管芯 U2的相应键合焊盘相连接）。 在 LGA封装中， 管芯之间的相互连 接， 可以通过各自管芯上的相应键合焊盘之间通过键合线直接连接（如 CMOS 控制器管芯 U1与射频天线开关管芯 U4之间通过键合线直接相连接， IPD管芯 U3与射频天线开关管芯 U4之间通过键合线直接相连接，射频功率放大器管芯 U2与 IPD管芯 U3之间通过键合线直接相连接）； 或者可以首先将第一管芯上 的键合焊盘通过键合线连接到 LGA基板上层走线的一端， 然后将所述走线的 另外一端通过键合线连接到第二管芯上的键合焊盘， 从而实现了两个管芯相应 键合焊盘的相互连接 (如 CMOS控制器管芯 U1上的键合焊盘通过键合线连接 到 LGA上走线 110的一端， 110的另外一端通过键合线再连接到射频功率放大 器管芯 U2上的键合焊盘）。 As shown in FIG. 1, the GSM RF front-end module 100 includes four dies: a power controller die (CMOS controller die), an Ul, a GaAs HBT RF power amplifier die U2, an IPD die U3, and RF antenna switch die U4. The above four dies are mounted on the upper surface of the LGA substrate, and the bonding pads (pads) on the four dies are connected to the corresponding pins of the module through the bonding wires 111, such as the bonding of the CMOS controller dies U1. The pad is connected to the control signal pins VC1, VC2, VC3, and VC4 through the bonding wires, and the bonding pads of the RF power amplifier die U2 are connected to the RF input signal pins RFinl, RFin2, etc. through the bonding wires, the IPD tube. The bonding pads of the core U3 are connected to the ground signal pins GND1, GND2, GND3, and GND4 through bonding wires, and the bonding pads of the RF antenna switching die U4 are connected to the RF receiving signal pins RX1 through the bonding wires. RX2 and so on. On the LGA substrate, passive components such as inductors required in the circuit can be fabricated, such as the planar spiral inductors 101 and 102 as shown in FIG. 1, or the linear inductor 106, etc., and the inductor devices are all fabricated on a certain layer of the LGA substrate. On the layer, and the ports of these inductors are directly connected to the pins of the module (for example, one end of the planar spiral inductor 102 is connected to the power signal pin VCC2, one end of the 106 is connected to the power signal pin VCC1), or through the key The bonding wires are connected to the bonding pads on the corresponding die (for example, one end of 101 is connected to the corresponding bonding pad of the RF antenna switching die U4 through a bonding wire, and one end of 102 passes through the bonding wire and the IPD pipe. The respective bond pads of the core U3 are connected, and one end of the 106 is connected to the IPD die U3 and the corresponding bond pads of the RF power amplifier die U2 via bond wires). In LGA packages, the interconnections between the dies can be directly connected by bond wires between the respective bond pads on the respective dies (eg between CMOS controller die U1 and RF antenna switch die U4) Directly connected by a bonding wire, the IPD die U3 and the RF antenna switching die U4 are directly connected by a bonding wire, and the RF power amplifier die U2 and the IPD die U3 are directly connected by a bonding wire) Or first, the bonding pad on the first die may be connected to one end of the upper trace of the LGA substrate through a bonding wire, and then the other end of the trace is connected to the second die through the bonding wire. Bonding the pads, thereby achieving interconnection of the corresponding bonding pads of the two dies (eg, bonding pads on the CMOS controller die U1 are connected by bonding wires) To one end of the trace 110 on the LGA, the other end of the 110 is connected to the bond pad on the RF power amplifier die U2 via a bond wire.
如图 1所示， 制作在 LGA基板上层金属层的平面螺旋电感 102通过过孔 103连接到第二层金属层， 走线 104在第二层金属层， 并通过过孔 105连接到 上层金属层， 进而走线 104连接到射频发射前端模块的电源管脚 VCC2。 需要 说明的是， LGA基板金属层的厚度为几十微米， 制作线宽可以达到数百微米， 从而使得制作的电感的寄生电阻 4艮小（通常在 0.1欧姆以下）,得到高 Q值电感， 保证了 GSM射频前端模块的高效率。尤其在 GSM低频段（ 824MHz-915MHz ), 所用电感的 Q值对射频前端模块性能影响很大。  As shown in FIG. 1, the planar spiral inductor 102 fabricated on the upper metal layer of the LGA substrate is connected to the second metal layer through the via 103, the trace 104 is in the second metal layer, and is connected to the upper metal layer through the via 105. Then, the trace 104 is connected to the power pin VCC2 of the RF transmitting front end module. It should be noted that the thickness of the LGA substrate metal layer is several tens of micrometers, and the fabrication line width can reach several hundred micrometers, so that the parasitic resistance of the fabricated inductor is small (usually below 0.1 ohm), and a high Q inductance is obtained. The high efficiency of the GSM RF front-end module is guaranteed. Especially in the GSM low frequency band (824MHz-915MHz), the Q value of the inductor used has a great influence on the performance of the RF front-end module.
LGA基板的制造包括金属层和绝缘材料层的层压、 钻孔并填充金属材料、 光刻金属层走线图形、 刻蚀多余图形、 电镀金属等步骤； 制造完成的 LGA基 板之上贴装多个管芯， 然后通过键合设备连接各个需要连接的键合焊盘、 管脚 和端口等； 最后再经过密封树脂包覆整个基板、 管芯及键合线， 最终完成 LGA 封装的 GSM射频发射前端模块。 需要说明的是， 在上述举例的 LGA封装的 GSM射频发射前端模块中采用了 IPD方法来实现射频功率放大器的输出匹配 网络； 当然， 也可以采用电感、 电容等分立元件来实现输出匹配网络。 当采用 分立元件形式的输出匹配网络时，在 LGA封装 GSM射频发射前端模块的制造 过程中， 还需要增加将这些分立元件贴装在 LGA基板上的工序步骤。 如上所 述， 无论是采用 IPD形式的输出匹配网络， 还是采用分立元件来构成输出匹配 网络， LGA封装形式的 GSM射频发射前端模块的制造都很复杂， 使得整个模 块的成本 4艮高。通常， LGA封装 GSM射频前端发射模块的总体成本当中， LGA 基板制造及封装的成本占到了 50%左右。 如上所述， 可以看到， 降低 GSM射 频前端模块的封装成本是降低其总成本的有效手段。  The fabrication of the LGA substrate includes lamination of a metal layer and an insulating material layer, drilling and filling of a metal material, lithographic metal layer trace pattern, etching of unnecessary patterns, plating of metal, etc.; mounting on the finished LGA substrate Dies, then connect the bonding pads, pins and ports that need to be connected through the bonding device; finally, the entire substrate, the die and the bonding wires are covered by the sealing resin, and finally the GSM RF emission of the LGA package is completed. Front end module. It should be noted that the IPD method is adopted in the GSM RF front-end module of the LGA package described above to implement the output matching network of the RF power amplifier; of course, discrete components such as inductors and capacitors may also be used to implement the output matching network. When using an output matching network in the form of discrete components, the process steps of mounting these discrete components on the LGA substrate are also required during the fabrication of the LGA packaged GSM RF transmit front-end module. As mentioned above, whether it is an output matching network in the form of IPD or a discrete component to form an output matching network, the GSM RF transmitting front-end module in the form of an LGA package is complicated to manufacture, so that the cost of the entire module is 4艮. In general, the cost of LGA substrate manufacturing and packaging accounts for about 50% of the total cost of LGA packaged GSM RF front-end transmitter modules. As mentioned above, it can be seen that reducing the packaging cost of the GSM RF front-end module is an effective means of reducing its total cost.
在半导体封装中应用最为广泛的封装形式是四方扁平无弓 )脚封装（ QFN, Quad Flat Non-leaded package )„ QFN封装不需要采用多层基板， 它是一块整体 的棵露扁平金属框， 半导体管芯贴装在该金属框中间的一个表面上， 通过键合 线将管芯上的键合焊盘连接到 QFN金属框的相应管脚之上，如图 2所示，最后 采用树脂或塑料等密封材料将管芯及 QFN金属框包覆， 就完成了 QFN封装的 半导体器件。 如图 2中所示， QFN封装的半导体器件 200中， 两个管芯 U1和 U2贴装在 QFN金属框架 201中心的金属表面上， 通过键合线 202, 可以将 U1 和 U2的相应键合焊盘连接在一起， 或者将 U1和 U2的相应键合焊盘与 QFN 框架的管脚相连接。 QFN作为半导体领域广泛使用的标准封装形式， 具有非常 丰富的供货来源， 并且不需要像 LGA那样对其进行定制化制造， 制造工序也 非常筒单， 因此 QFN封装的成本非常低廉， 这是本领域人员所共知的。 The most widely used package in semiconductor packages is the Quad Flat Non-leaded package (QFN). QFN package does not require a multi-layer substrate. It is a flat, flat metal frame, semiconductor. The die is mounted on a surface between the metal frames, and the bonding pads on the die are connected to the corresponding pins of the QFN metal frame by bonding wires, as shown in FIG. 2, and finally resin or plastic is used. The semiconductor device of the QFN package is completed by encapsulating the die and the QFN metal frame. As shown in Fig. 2, in the QFN packaged semiconductor device 200, two dies U1 and U2 are mounted on the QFN metal frame. On the metal surface of the center of 201, U1 can be passed through the bonding wire 202. Connect to the corresponding bond pads of U2 or connect the corresponding bond pads of U1 and U2 to the pins of the QFN frame. As a standard package widely used in the semiconductor field, QFN has a very rich supply source and does not need to be customized like LGA. The manufacturing process is also very simple, so the cost of QFN package is very low. Well known to the field.
如上所述， 如果可以采用 QFN封装制造 GSM射频发射前端模块， 将会具 有很大的成本优势。但是， 由于 QFN封装中的金属框架是一整块金属， 整个在 电气连接上是一体的， 因此在其上贴装分立无源器件会比 LGA形式更加困难。 当前业内探索采用 QFN封装制造产品中多数不能集成输出匹配网络，而是在产 品贴装的印刷电路板（PCB )上实现。 例如， 美国 RFMD公司曾推出采用 QFN 封装的 GSM射频功率放大器产品 RF2173 , 它不包括射频天线开关， 不是一个 完整的 GSM射频发射前端模块， 并且它将射频功率放大器的输出匹配网络放 在封装之外的 PCB上， 使得整个射频发射前端的集成度较低， QFN封装的成 本优势没有完全体现。  As mentioned above, if the GSM RF transmit front-end module can be manufactured in a QFN package, it will have a significant cost advantage. However, since the metal frame in the QFN package is a monolithic metal that is integral throughout the electrical connection, placing discrete passive components on it is more difficult than the LGA form. Most of the current industry explorations using QFN package manufacturing products do not integrate the output matching network, but are implemented on the printed circuit board (PCB) of the product. For example, RFMD USA has introduced RF2173, a GSM RF power amplifier product in QFN package, which does not include an RF antenna switch, is not a complete GSM RF transmit front-end module, and it places the output matching network of the RF power amplifier outside the package. On the PCB, the integration of the entire RF transmission front end is low, and the cost advantage of the QFN package is not fully reflected.
在专利申请（申请号 200910202072.3 )中， 提出了一种在 QFN封装上采用 键合线制作用于射频功率放大器的电感的方法， 可以实现片内集成高 Q值， 低 损耗输出匹配网络。 但是该方法在一个封装内可以实现的电感器数量及其电感 值都受很大限制； 并且输出匹配网络中所需的电容元件仍然需要在半导体管芯 上实现， 这就增加了键合线连接关系的复杂度。 对于 GSM 四频段射频功率放 大器的输出匹配网络来讲， 通常需要多个电感和电容元件， 采用这一技术不能 完全满足要求。  In the patent application (Application No. 200910202072.3), a method for fabricating an inductor for a radio frequency power amplifier using a bonding wire on a QFN package is proposed, which can realize an on-chip integrated high Q value and low loss output matching network. However, the number of inductors and their inductance values that can be achieved in one package is greatly limited; and the capacitive components required in the output matching network still need to be implemented on the semiconductor die, which increases the bond wire connection. The complexity of the relationship. For the output matching network of the GSM quad-band RF power amplifier, multiple inductor and capacitor components are usually required, and this technique cannot fully meet the requirements.
综上所述， 如何提供一种集成度高、 尺寸小、 成本低， 并且可以实现高 Q 值电感的四方扁平无引脚（QFN )封装的 GSM射频发射前端模块， 便成为亟 待解决的问题。 发明内容  In summary, how to provide a GSM RF front-end module with high integration, small size, low cost, and quad flat no-lead (QFN) package that can achieve high Q inductance is a problem to be solved. Summary of the invention
本发明所要解决的技术问题是提供一种采用四方扁平无引脚封装的 GSM 射频发射前端模块， 以解决现有的 GSM射频发射前端模块制作成本高， 造成 带有 GSM射频发射前端模块的手持设备的整体价格成本过高问题。  The technical problem to be solved by the present invention is to provide a GSM radio frequency transmitting front-end module using a quad flat no-lead package to solve the high cost of manufacturing the existing GSM radio frequency front-end module, resulting in a handheld device with a GSM radio-emitting front-end module. The overall price cost is too high.
为解决上述技术问题，本发明提供了一种采用四方扁平无引脚封装的 GSM 射频发射前端模块， 该模块的金属框架上包括： 输出匹配网络、射频天线开关、 功率控制器及射频功率放大器， 其特征在于， 所述输出匹配网络、 射频天线开 关、 功率控制器及射频功率放大器分别采用不同半导体工艺制作成相应的半导 体管芯， 并将上述半导体管芯贴装在所述金属框架上。 To solve the above technical problem, the present invention provides a GSM RF transmitting front-end module using a quad flat no-lead package, and the metal frame of the module includes: an output matching network, an RF antenna switch, a power controller and an RF power amplifier, wherein the output matching network, the RF antenna switch, the power controller, and the RF power amplifier are respectively fabricated into corresponding semiconductor dies by using different semiconductor processes, and the semiconductor die is mounted On the metal frame.
进一步地， 本发明所述采用四方扁平无引脚封装的 GSM射频发射前端模 块， 其中， 所述射频功率放大器上至少一个扼流电感由在所述金属框架上设置 的半腐蚀金属条制成。  Further, the GSM radio frequency transmitting front end module of the present invention adopts a quad flat no-lead package, wherein at least one choke inductor on the radio frequency power amplifier is made of a semi-corrosive metal strip disposed on the metal frame.
进一步地，其中，所述半腐蚀的金属条一端与所述金属框架上的管脚连通。 进一步地， 其中， 所述金属条的形状为直线、 弧形或者蛇形。  Further, wherein one end of the semi-corroded metal strip is in communication with a pin on the metal frame. Further, wherein the metal strip has a shape of a straight line, an arc or a serpentine shape.
进一步地， 其中， 所述射频功率放大器为支持 GSM 高频段和低频段信号 放大的射频功率放大器。  Further, wherein the radio frequency power amplifier is an RF power amplifier that supports GSM high frequency band and low frequency band signal amplification.
进一步地， 其中， 所述射频功率放大器为采用砷化镓异质结双极型晶体管 工艺或绝缘体上硅工艺制造的射频功率放大器。  Further, wherein the radio frequency power amplifier is a radio frequency power amplifier manufactured by a gallium arsenide heterojunction bipolar transistor process or a silicon-on-insulator process.
进一步地， 其中， 所述输出匹配网络采用集成无源器件工艺制造。  Further, wherein the output matching network is manufactured by using an integrated passive device process.
进一步地， 其中， 所述射频天线开关采用砷化镓高电子迁移率场效应晶体 管工艺制造； 所述功率控制器采用互补金属氧化物半导体工艺制造。  Further, wherein the radio frequency antenna switch is fabricated by a gallium arsenide high electron mobility field effect transistor process; the power controller is fabricated by a complementary metal oxide semiconductor process.
进一步地， 其中， 将所述输出匹配网络和射频天线开关采用绝缘体上硅工 艺制作成 1个半导体管芯。  Further, wherein the output matching network and the RF antenna switch are fabricated into a semiconductor die by a silicon-on-insulator process.
进一步地， 其中， 所述金属框架上至少有三个或三个以上的管脚是直流连 通的。  Further, wherein at least three or more of the pins on the metal frame are DC-connected.
与现有技术相比， 本发明所述采用四方扁平无引脚封装的 GSM射频发射 前端模块， 能够有效降低 GSM射频前端模块的成本， 从而合理地， 降低了带 有 GSM射频发射前端模块的手持设备的整体价格成本。 附图说明  Compared with the prior art, the GSM radio frequency transmitting front-end module adopting the quad flat no-lead package of the invention can effectively reduce the cost of the GSM radio frequency front-end module, thereby reasonably reducing the handheld with the GSM radio-emitting front-end module. The overall price cost of the equipment. DRAWINGS
图 1为现有的采用 LGA封装的 GSM射频发射前端模块结构图；  Figure 1 is a structural diagram of a conventional GSM RF transmitting front-end module in an LGA package;
图 2为现有的四方扁平无引脚（QFN )封装结构图；  2 is a conventional quad flat no-lead (QFN) package structure diagram;
模块的电路示意图； 模块的结构图； Circuit diagram of the module; Structure diagram of the module;
模块的沿图 4所示切线 A-A的剖面图。 具体实施方式 A cross-sectional view of the module taken along line A-A shown in FIG. detailed description
本发明的主要思想是解决现有的 GSM射频发射前端模块制作成本高， 造 成带有 GSM射频发射前端模块的手持设备的整体价格成本过高问题。 本发明 所述采用四方扁平无引脚（QFN )封装的 GSM射频发射前端模块， 能够有效 降低 GSM射频前端模块的成本， 从而合理地， 降低了带有 GSM手持设备的整 体价格成本。 以下对具体实施方式进行详细描述， 但不作为对本发明的限定。  The main idea of the present invention is to solve the problem that the existing GSM RF transmitting front-end module is expensive to manufacture and the overall cost of the handheld device with the GSM RF transmitting front-end module is too high. The GSM RF front-end module in the quad flat no-lead (QFN) package of the present invention can effectively reduce the cost of the GSM RF front-end module, thereby reasonably reducing the overall price cost of the GSM handheld device. The detailed description is not to be construed as limiting the invention.
下面是本发明所提出 QFN封装的技术方案的一个具体实施例，如图 3和 4 所示， 为本发明实施例所述采用 QFN封装的 GSM射频发射前端模块的电路示 意图； 其中模块的 QFN金属框架 300上包括了 4个半导体器件， 分别是： 输出 匹配网络 U1 , 射频天线开关 U2, 功率控制器（CMOS控制器） U3, 射频功率 放大器 U4。 所述集成无源器件 Ul、 射频天线开关 U2、 功率控制器 U3及射频 功率放大器 U4分别采用不同半导体工艺制作成相应的半导体管芯， 并将上述 的半导体管芯贴装在所述金属框架 300上。  The following is a specific embodiment of the technical solution of the QFN package proposed by the present invention. As shown in FIG. 3 and FIG. 4, it is a circuit diagram of a GSM radio frequency transmitting front-end module adopting a QFN package according to an embodiment of the present invention; wherein the module is a QFN metal The frame 300 includes four semiconductor devices, namely: an output matching network U1, a radio frequency antenna switch U2, a power controller (CMOS controller) U3, and a radio frequency power amplifier U4. The integrated passive device U1, the RF antenna switch U2, the power controller U3, and the RF power amplifier U4 are respectively fabricated into corresponding semiconductor dies by using different semiconductor processes, and the above-described semiconductor die is mounted on the metal frame 300. on.
在本实施例中输出匹配网络 U1和射频天线开关 U2贴装在 QFN金属框架 300的区域 305上， 功率控制器 U3和射频功率放大器 U4贴装在 QFN金属框 架 300的区域 304上。  In the present embodiment, the output matching network U1 and the RF antenna switch U2 are mounted on the area 305 of the QFN metal frame 300, and the power controller U3 and the RF power amplifier U4 are mounted on the area 304 of the QFN metal frame 300.
其中， 在本实施例中所述输出匹配网络 U1采用制作集成无源器件（IPD ) 的工艺制造； 所述射频天线开关 U2可以采用砷化镓高电子迁移率场效应晶体 管工艺制造； 所述功率控制器 U3可以采用互补金属氧化物半导体的工艺制造； 所述射频功率放大器 U4为能够支持 GSM高频段（ 1710MHz-1910MHz信号） 和低频段（ 824MHz-915MHz信号）信号放大的射频功率放大器； 所述射频功 率放大器 U4 可以采用砷化镓异质结双极型晶体管工艺或绝缘体上硅（SOI: Silicon-On-Insulator ) 的工艺制造。  In the embodiment, the output matching network U1 is manufactured by using an integrated passive device (IPD) process; the RF antenna switch U2 can be fabricated by using a gallium arsenide high electron mobility field effect transistor process; The controller U3 may be fabricated by a process of a complementary metal oxide semiconductor; the RF power amplifier U4 is a radio frequency power amplifier capable of supporting signal amplification of a GSM high frequency band (1710 MHz-1910 MHz signal) and a low frequency band (824 MHz-915 MHz signal); The RF power amplifier U4 can be fabricated using a gallium arsenide heterojunction bipolar transistor process or a silicon-on-insulator (SOI) process.
当然，在本发明其他实施例中，输出匹配网络 U1和射频天线开关 U2还可 以采取一种合适的半导体工艺， 如绝缘体上硅 ( SOI: Silicon-On-Insulator )工艺 的方式集成在一起， 形成一个半导体管芯； 同理， 也可以将功率控制器 U3和 射频功率放大器 U4采用一种合适的半导体工艺集成在一起， 形成一个半导体 管芯。 具体采用何种半导体工艺 （如双极型-场效应管工艺， BiCMOS : Bipolar-CMOS )制造及具体如何组合这些功能电路， 则根据具体设计要求来进 行选择， 这对于本领域专业人员来说是共知的， 在本发明中不做具体限定。 Of course, in other embodiments of the present invention, the output matching network U1 and the RF antenna switch U2 may also be integrated by a suitable semiconductor process, such as a silicon-on-insulator (SOI) process. a semiconductor die; for the same reason, the power controller U3 can also The RF power amplifier U4 is integrated using a suitable semiconductor process to form a semiconductor die. Which semiconductor process (such as bipolar-field effect transistor process, BiCMOS: Bipolar-CMOS) is used to fabricate and how to combine these functional circuits, according to specific design requirements, which is suitable for professionals in the field. It is well known that it is not specifically limited in the present invention.
在本实施例中射频天线开关 U2为一个单刀四掷的射频天线开关； GSM射 频输入信号 RFinl ( GSM高频段 1710MHz- 1910MHz信号）和 RFin2 ( GSM低 频段 824MHz-915MHz信号） 经过射频功率放大器 U4完成功率放大。 所述该 输出匹配网络 U1不仅包括图中 4所示的平面螺旋电感 306、 307, 还包括若干 电容及电感等无源器件。  In this embodiment, the RF antenna switch U2 is a single-pole four-throw RF antenna switch; the GSM RF input signal RFinl (GSM high-band 1710MHz-1910MHz signal) and RFin2 (GSM low-band 824MHz-915MHz signal) are completed by the RF power amplifier U4. Power amplification. The output matching network U1 includes not only the planar spiral inductors 306 and 307 shown in FIG. 4 but also a plurality of passive components such as capacitors and inductors.
所述单刀四掷的射频天线开关 U2与 GSM高频段和低频段的发射信号通路 及至少一个接收信号通路相连， 在本实施例中其单刀连接到 GSM射频发射前 端模块的天线管脚 ANT, 四掷分别连接到 GSM高频段发射信号和低频段发射 信号及两路接收信号 RX1、 RX2。  The single-pole four-throw RF antenna switch U2 is connected to the GSM high-band and low-band transmit signal path and at least one receive signal path. In this embodiment, the single-pole is connected to the antenna pin ANT of the GSM RF transmit front-end module. The throws are respectively connected to the GSM high-band transmit signal and the low-band transmit signal and the two receive signals RX1, RX2.
所述功率控制器 U3根据外部输入的控制信号 VC1-VC4来控制整个 GSM 射频发射前端模块的工作状态， 如控制射频功率放大器 U4的输出信号功率大 小以及射频天线开关 U2中单刀所连接到的射频通路。  The power controller U3 controls the working state of the entire GSM radio frequency transmitting front end module according to the externally input control signals VC1-VC4, such as controlling the output signal power level of the radio frequency power amplifier U4 and the radio frequency to which the single pole knife is connected in the radio frequency antenna switch U2. path.
如图 4所示， 所述半导体管芯之间、 所述半导体管芯与 QFN金属框架 300 上的管脚之间均通过键合线 303相连。  As shown in FIG. 4, between the semiconductor dies, the semiconductor die and the pins on the QFN metal frame 300 are connected by a bonding wire 303.
所述射频功率放大器上设置的至少一个扼流电感由在 QFN金属框架 300 上设置的半腐蚀的金属条 301制成的， 如图 5所示， 该金属条 301两端分别与 所述 QFN金属框架 300上的管脚连通，且该金属条 301的底表面高于所述 QFN 金属框架 300上所有管脚及贴装半导体管芯区域的底表面。 在 QFN金属框架 300上至少有三个或者三个以上的管脚是直流连通的。  The at least one choke inductor disposed on the radio frequency power amplifier is made of a semi-corroded metal strip 301 disposed on the QFN metal frame 300. As shown in FIG. 5, the strip 301 is respectively opposite to the QFN metal. The pins on the frame 300 are in communication, and the bottom surface of the metal strip 301 is higher than the bottom surfaces of all the pins on the QFN metal frame 300 and the semiconductor die attach area. At least three or more of the pins on the QFN metal frame 300 are in direct current communication.
如图 4所示， 所述 QFN金属框架 300上需要接地的键合焊盘均连接到了 QFN金属框架上的大面积连通的接地部分。 同时， 所述 QFN金属框架 300上 包括的输出匹配网络 Ul、 射频天线开关 U2、 功率控制器 U3和射频功率放大 器 U4还可以具有静电释放（ESD )通路， 从而起到了 ESD保护作用， 这种配 置方式可以大幅提高输出匹配网络 U1上电容器件的 ESD等级， 满足工业产品 要求。  As shown in FIG. 4, the bonding pads on the QFN metal frame 300 that need to be grounded are connected to the large-area connected ground portion on the QFN metal frame. At the same time, the output matching network U1, the RF antenna switch U2, the power controller U3, and the RF power amplifier U4 included in the QFN metal frame 300 can also have an electrostatic discharge (ESD) path, thereby providing ESD protection. The method can greatly improve the ESD level of the capacitor component on the output matching network U1 to meet the requirements of industrial products.
需要进一步说明的是， 由于本发明还需要实现射频功率放大器的直流供电 通路上很低寄生电阻的电感 （扼流电感）， 尤其是在 GSM 低频段 ( 800MHz-915MHz )射频功率放大器工作的峰值电流高达 1.5A, 要求电感器 的寄生电阻小于 0.1欧姆， 才不会对射频功率放大器的效率造成较大影响。 而 通常输出匹配网络 U1制造采用半导体制造技术，其导电金属层薄膜厚度很薄， 通常为微米量级， 由此制作的电感寄生电阻都较大，将恶化射频功率放大器 U4 的效率。 因此在本实施例中， 如图 4所示， GSM低频段的射频功率放大器 U4 上设置的扼流电感由 QFN金属框架 300上的金属条 301来实现。具体地，在本 发明的实施例中， 金属条 301的第一端与 QFN金属框架 300的电源供电管脚 ( VCC1、 VCC2 )是连通的， 电源供电管脚（VCC1、 VCC2 )通过键合线可以 连接到功率控制器 U3及射频天线开关 U2的相应键合焊盘为其提供电源供电； 金属条 301的第二端与 QFN金属框架 300的管脚 308、 309连通， 在供电管脚 ( VCC1、 VCC2 )与管脚 308、 309之间的包括金属条 301在内的部分， 就构 成了 GSM低频段射频功率放大器的扼流电感； 金属条 301上阴影部分的底表 面高于区域 304、 305和所有管脚的底表面。 这样最后 QFN封装的 GSM射频 发射前端模块的背面只有金属管脚及区域 304、 305是棵露的， 而半腐蚀金属条 301 被树脂封装材料包覆， 从而与周围非物理连接的金属管脚绝缘隔离， 如与 金属管脚 VC1-VC4绝缘隔离； 而通过金属条 301连接的两个或两个以上的金 属管脚， 仍然是保持直流连通的， 如图 4所示， 金属管脚 308与 VCC2。 半腐 蚀金属条 301的金属厚度通常为管脚厚度的一半， 约为 100微米， 宽度通常也 可以达到 100微米，直流寄生电阻很小。由于金属条 301可以制作得比较厚（超 过几十微米）， 所以其寄生电阻非常小， 完全适于构成 GSM低频段射频功率放 大器的扼流电感。 这里金属条 301与管脚厚度及位置的关系， 如图 5所示 QFN 封装剖面图。 It should be further noted that, since the present invention also needs to implement DC power supply of the RF power amplifier Very low parasitic resistance in the path (choke inductor), especially in the GSM low-band (800MHz-915MHz) RF power amplifier operating peak current up to 1.5A, requiring the inductor's parasitic resistance to be less than 0.1 ohm, will not The efficiency of the RF power amplifier has a large impact. Usually, the output matching network U1 is manufactured by semiconductor manufacturing technology, and the thickness of the conductive metal layer film is very thin, usually on the order of micrometers, and the resulting parasitic resistance of the inductor is large, which will deteriorate the efficiency of the RF power amplifier U4. Therefore, in this embodiment, as shown in FIG. 4, the choke inductor provided on the RF power amplifier U4 of the GSM low frequency band is realized by the metal strip 301 on the QFN metal frame 300. Specifically, in the embodiment of the present invention, the first end of the metal strip 301 is in communication with the power supply pins (VCC1, VCC2) of the QFN metal frame 300, and the power supply pins (VCC1, VCC2) pass through the bonding wires. The corresponding bonding pads that can be connected to the power controller U3 and the RF antenna switch U2 are powered by the power supply; the second end of the metal strip 301 is connected to the pins 308, 309 of the QFN metal frame 300, at the power supply pin (VCC1) The portion including the metal strip 301 between the VCC2) and the pins 308, 309 constitutes a choke inductor of the GSM low-band RF power amplifier; the bottom surface of the shaded portion of the metal strip 301 is higher than the regions 304, 305 And the bottom surface of all pins. Thus, only the metal pins and the regions 304 and 305 are exposed on the back side of the GSM RF front-end module of the final QFN package, and the semi-etched metal strip 301 is covered with the resin encapsulation material to be insulated from the surrounding non-physically connected metal pins. Isolation, such as isolation from metal pins VC1-VC4; and two or more metal pins connected by metal strip 301, still maintain DC communication, as shown in Figure 4, metal pins 308 and VCC2 . The metal thickness of the semi-etched metal strip 301 is usually half the thickness of the pin, about 100 microns, and the width is usually also 100 microns, and the DC parasitic resistance is small. Since the metal strip 301 can be made thicker (more than a few tens of micrometers), its parasitic resistance is very small, and it is fully suitable for the choke inductor of the GSM low-band RF power amplifier. Here, the relationship between the metal strip 301 and the thickness and position of the pin is shown in the sectional view of the QFN package shown in FIG.
由于键合过程中半腐蚀金属条 301的下表面悬空， 为了减小制造工艺上的 风险，将金属条 301连接到电路中的所有键合线都选择在 QFN金属框架的管脚 (如图 4中的 VCC1、 VCC2、 308和 309 )上键合。 还需要说明的是， 金属条 301 所能实现的电感值与其长度是相关的， 其长度越长则电感值越大； 为了使 最终完成的 QFN封装 GSM射频前端模块的整体尺寸最小， 需要在电路设计中 设计保证该电感的感值在 2nH到 5nH之间， 这可以通过射频功率放大器管芯 U4的输出匹配网络的合理设计达到， 这对于本领域技术人员来说是共知常识。 同时需要注意的是， 金属条 301的形状不限定为直线， 也可以是弧形或者 蛇形等弯曲形状， 只要其等效电感值达到电路设计要求即可。 并且， 根据实际 需要的不同，也可以在 QFN上实现两根或两根以上的类似扼流电感， 同时用于 GSM低频段射频功率放大器、 GSM高频段射频功率放大器、 及其前级扼流电 感。但是，增加这样的扼流电感数目会增加 QFN金属框架设计和制造的难度及 尺寸， 需要在具体实施中进行权衡选择， 但都在本发明的精神之内。 Since the lower surface of the semi-corroded metal strip 301 is suspended during the bonding process, in order to reduce the risk in the manufacturing process, all the bonding wires connecting the metal strip 301 to the circuit are selected in the pins of the QFN metal frame (see FIG. 4). The upper VCC1, VCC2, 308 and 309) are bonded. It should also be noted that the inductance value that the metal strip 301 can achieve is related to its length, and the longer the length, the larger the inductance value; in order to minimize the overall size of the final QFN packaged GSM RF front-end module, it is required in the circuit. The design is designed to ensure that the inductance of the inductor is between 2nH and 5nH, which can be achieved by reasonable design of the output matching network of the RF power amplifier die U4, which is common knowledge to those skilled in the art. At the same time, it should be noted that the shape of the metal strip 301 is not limited to a straight line, and may be a curved shape such as a curved shape or a serpentine shape, as long as the equivalent inductance value reaches the circuit design requirement. Moreover, depending on actual needs, two or more similar choke inductors can be implemented on the QFN, and used for GSM low-band RF power amplifiers, GSM high-band RF power amplifiers, and their pre-stage choke inductors. . However, increasing the number of such choke inductors increases the difficulty and size of the design and manufacture of the QFN metal frame, and trade-offs are required in the specific implementation, but are within the spirit of the present invention.
另外， 如图 3所示， 本实施例中射频功率放大器 U4中包括两路射频功率 放大器电路， 同时支持 GSM 低频段（ 824MHZ-915MHz ) 和 GSM 高频段 In addition, as shown in FIG. 3, the RF power amplifier U4 in the embodiment includes two RF power amplifier circuits, and supports the GSM low frequency band (824MHZ-915MHz) and the GSM high frequency band.
( 1710MHz-1910MHz )。 如上所述的金属条 301 实现了 GSM低频段射频功率 放大器电路所需的扼流电感， 而 GSM 高频段射频功率放大器电路所需的扼流 电感， 由于其对于寄生电阻及 Q值要求较低， 在本实施例中采用了键合线与输 出匹配网络 U1上电感相结合的方式实现。 另夕卜， 如图 4所示， 本实施例所述 QFN封装的 GSM射频发射前端模块在实际应用时， 在 PCB 板上供电管脚(1710MHz-1910MHz). The metal strip 301 as described above realizes the choke inductor required for the GSM low-band RF power amplifier circuit, and the choke inductor required for the GSM high-band RF power amplifier circuit has low requirements for parasitic resistance and Q value. In this embodiment, a bonding wire is used in combination with an inductance on the output matching network U1. In addition, as shown in FIG. 4, the GSM RF transmitting front-end module of the QFN package in the embodiment is used in the power supply pin of the PCB board in practical application.
( VCC1、 VCC2 )需要连接至少一个去耦电容（Cl、 C2 ), 其容值范围为 nF-uF 量级。 (VCC1, VCC2) It is necessary to connect at least one decoupling capacitor (Cl, C2) with a capacitance range of nF-uF.
另外， 通常在输出匹配网络 U1 上制作的电容器件的静电保护 （ESD )等 级较弱， 在人体模式（HBM ) 下为 50V-500V, 不能达到工业产品通常要求的 HBM>2000V的 ESD等级。 并且， 制作输出匹配网络 U1所采用的 IPD工艺中 通常都不提供 ESD保护器件， 只能通过整个 GSM射频发射前端模块的整体设 计来避免输出匹配网络 U1上器件受到静电的直接侵害。  In addition, the electrostatic protection (ESD) level of the capacitor device usually fabricated on the output matching network U1 is weak, and is 50V-500V in the human body mode (HBM), which cannot meet the ESD level of HBM>2000V which is usually required for industrial products. Moreover, the ESD protection device is usually not provided in the IPD process used to make the output matching network U1. The overall design of the GSM RF transmission front-end module can only avoid the direct interference of the device on the output matching network U1 by static electricity.
另外， 需要说明的是， 在本实施例中 GSM射频发射前端模块中包括了 4 个采用不同工艺制造的管芯，然而管芯的数目并不是作为对本发明精神的限制。 在本实施例基础之上的任意改变及修改， 都被认为仍在本发明权利要求书的保 护范围之内。 与现有技术相比， 本发明所述采用 QFN封装的 GSM射频发射前 端模块， 能够有效降低 GSM射频发射前端模块的成本， 从而合理地， 降低了 带有 GSM射频发射前端模块的手持设备的整体价格成本。 当然， 本发明还可有其他多种实施例， 在不背离本发明精神及其实质的情 些相应的改变和变形都应属于本发明所附的权利要求的保护范围。  In addition, it should be noted that, in the embodiment, the GSM RF transmitting front-end module includes four dies manufactured by different processes, but the number of dies is not intended to limit the spirit of the present invention. Any changes and modifications commensurate with the present invention are considered to be within the scope of the appended claims. Compared with the prior art, the GSM radio frequency transmitting front-end module adopting the QFN package of the present invention can effectively reduce the cost of the GSM radio frequency transmitting front-end module, thereby reasonably reducing the overall capacity of the handheld device with the GSM radio transmitting front-end module. Price cost. The invention may, of course, be embodied in various other forms and modifications without departing from the spirit and scope of the invention.

Claims

权利要求书  Claim
属框架上包括： 输出匹配网络、射频天线开关、 功率控制器及射频功率放大器， 其特征在于， 所述输出匹配网络、 射频天线开关、 功率控制器及射频功率放大 器分别采用不同半导体工艺制作成相应的半导体管芯， 并将上述半导体管芯贴 装在所述金属框架上。 块， 其特征在于， 所述射频功率放大器上至少一个扼流电感由在所述金属框架 上设置的半腐蚀金属条制成。 块， 其特征在于， 所述半腐蚀的金属条一端与所述金属框架上的管脚连通。 块， 其特征在于， 所述金属条的形状为直线、 弧形或者蛇形。 块， 其特征在于， 所述射频功率放大器为支持 GSM 高频段和低频段信号放大 的射频功率放大器。 块， 其特征在于， 所述射频功率放大器为采用砷化镓异质结双极型晶体管工艺 或绝缘体上硅工艺制造的射频功率放大器。 块， 其特征在于， 所述输出匹配网络采用集成无源器件工艺制造。 块， 其特征在于， 所述射频天线开关采用砷化镓高电子迁移率场效应晶体管工 艺制造； 所述功率控制器采用互补金属氧化物半导体工艺制造。 块， 其特征在于， 将所述输出匹配网络和射频天线开关采用绝缘体上硅工艺制 作成 1个半导体管芯。 The framework includes: an output matching network, an RF antenna switch, a power controller, and a radio frequency power amplifier, wherein the output matching network, the RF antenna switch, the power controller, and the RF power amplifier are respectively fabricated into different corresponding semiconductor processes. The semiconductor die is mounted on the metal frame. And a block, wherein the at least one choke inductor on the radio frequency power amplifier is made of a semi-corroded metal strip disposed on the metal frame. And a block, wherein one end of the semi-corroded metal strip is in communication with a pin on the metal frame. The block is characterized in that the shape of the metal strip is a straight line, an arc shape or a serpentine shape. The block is characterized in that the radio frequency power amplifier is an RF power amplifier that supports GSM high frequency band and low frequency band signal amplification. The block is characterized in that the RF power amplifier is a radio frequency power amplifier manufactured by a gallium arsenide heterojunction bipolar transistor process or a silicon-on-insulator process. Block, characterized in that the output matching network is fabricated using an integrated passive device process. The block is characterized in that the radio frequency antenna switch is manufactured by a gallium arsenide high electron mobility field effect transistor process; and the power controller is fabricated by a complementary metal oxide semiconductor process. The block is characterized in that the output matching network and the RF antenna switch are fabricated into a semiconductor die by a silicon-on-insulator process.
10、 根据权利要求 1至 9中任一所述采用四方扁平无引脚封装的 GSM射 频发射前端模块， 其特征在于， 所述金属框架上至少有三个或三个以上的管脚 是直流连通的。  10. A GSM radio frequency transmitting front end module using a quad flat no-lead package according to any one of claims 1 to 9, wherein at least three or more of the pins on the metal frame are in direct current communication. .
PCT/CN2011/072590 2011-03-25 2011-04-11 Radio frequency emitting front end module in global system for mobile communication manufactured with quad flat non-leaded package WO2012129819A1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021006021A1 (en) * 2019-07-09 2021-01-14 株式会社村田製作所 High-frequency module and communication device

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8587101B2 (en) 2010-12-13 2013-11-19 International Rectifier Corporation Multi-chip module (MCM) power quad flat no-lead (PQFN) semiconductor package utilizing a leadframe for electrical interconnections
US9362215B2 (en) 2010-12-13 2016-06-07 Infineon Technologies Americas Corp. Power quad flat no-lead (PQFN) semiconductor package with leadframe islands for multi-phase power inverter
US9324646B2 (en) 2010-12-13 2016-04-26 Infineon Technologies America Corp. Open source power quad flat no-lead (PQFN) package
US9449957B2 (en) 2010-12-13 2016-09-20 Infineon Technologies Americas Corp. Control and driver circuits on a power quad flat no-lead (PQFN) leadframe
US9620954B2 (en) 2010-12-13 2017-04-11 Infineon Technologies Americas Corp. Semiconductor package having an over-temperature protection circuit utilizing multiple temperature threshold values
US9443795B2 (en) 2010-12-13 2016-09-13 Infineon Technologies Americas Corp. Power quad flat no-lead (PQFN) package having bootstrap diodes on a common integrated circuit (IC)
US9711437B2 (en) 2010-12-13 2017-07-18 Infineon Technologies Americas Corp. Semiconductor package having multi-phase power inverter with internal temperature sensor
US9659845B2 (en) 2010-12-13 2017-05-23 Infineon Technologies Americas Corp. Power quad flat no-lead (PQFN) package in a single shunt inverter circuit
US9524928B2 (en) 2010-12-13 2016-12-20 Infineon Technologies Americas Corp. Power quad flat no-lead (PQFN) package having control and driver circuits
CN104009772A (en) * 2013-02-26 2014-08-27 民瑞科技股份有限公司 GSM mobile communication front-end module circuit device
EP2775518A3 (en) * 2013-03-07 2017-11-08 International Rectifier Corporation Power Quad Flat No-Lead (PQFN) package in a single shunt inverter circuit
CN104143547B (en) * 2014-07-25 2016-08-24 西安交通大学 A kind of low stray inductance GaN power integration module of shunt capacitance intermediate layout
CN104320154A (en) * 2014-10-29 2015-01-28 络达科技股份有限公司 Multimode multi-frequency front end device
JP6646491B2 (en) * 2016-03-24 2020-02-14 サンデン・オートモーティブコンポーネント株式会社 Electronic circuit device and inverter-integrated electric compressor having the same
EP4084069A4 (en) * 2020-01-23 2023-05-17 Huawei Technologies Co., Ltd. Chip device and wireless communication device
CN111653552B (en) * 2020-06-16 2022-06-10 西安科技大学 Square flat chip packaging structure with high electromagnetic pulse interference resistance
CN111865280A (en) * 2020-07-22 2020-10-30 中科芯(苏州)微电子科技有限公司 Stacked radio frequency switch circuit
CN112687675B (en) * 2021-03-16 2021-06-29 荣耀终端有限公司 Die, module, wafer and manufacturing method of die

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1659698A (en) * 2002-06-06 2005-08-24 皇家飞利浦电子股份有限公司 Quad flat non-leaded package comprising a semiconductor device
CN101271878B (en) * 2007-03-22 2010-06-09 中芯国际集成电路制造(上海)有限公司 Lead frame
CN101917166A (en) * 2010-07-28 2010-12-15 锐迪科创微电子（北京）有限公司 Configurable radio-frequency power amplifier and radio-frequency transmitting front-end module with same
CN101971332A (en) * 2008-03-12 2011-02-09 费查尔德半导体有限公司 Semiconductor die package including embedded flip chip

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101657896B (en) * 2008-02-03 2011-12-28 香港应用科技研究院有限公司 Electronic circuit package
US8175541B2 (en) * 2009-02-06 2012-05-08 Rfaxis, Inc. Radio frequency transceiver front end circuit
CN101714852A (en) * 2009-09-22 2010-05-26 锐迪科微电子（上海）有限公司 Double-frequency radio-frequency power amplifier circuit chip
CN101667810B (en) * 2009-09-29 2011-11-16 锐迪科科技有限公司 Chip of double-frequency radio-frequency power amplifier circuit
CN101814927B (en) * 2010-04-14 2014-07-02 中兴通讯股份有限公司 Multimode all-frequency-band radio-frequency emitting device and method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1659698A (en) * 2002-06-06 2005-08-24 皇家飞利浦电子股份有限公司 Quad flat non-leaded package comprising a semiconductor device
CN101271878B (en) * 2007-03-22 2010-06-09 中芯国际集成电路制造(上海)有限公司 Lead frame
CN101971332A (en) * 2008-03-12 2011-02-09 费查尔德半导体有限公司 Semiconductor die package including embedded flip chip
CN101917166A (en) * 2010-07-28 2010-12-15 锐迪科创微电子（北京）有限公司 Configurable radio-frequency power amplifier and radio-frequency transmitting front-end module with same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021006021A1 (en) * 2019-07-09 2021-01-14 株式会社村田製作所 High-frequency module and communication device
WO2021006020A1 (en) * 2019-07-09 2021-01-14 株式会社村田製作所 High frequency module and communication device

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