WO2011104774A1 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
WO2011104774A1
WO2011104774A1 PCT/JP2010/005170 JP2010005170W WO2011104774A1 WO 2011104774 A1 WO2011104774 A1 WO 2011104774A1 JP 2010005170 W JP2010005170 W JP 2010005170W WO 2011104774 A1 WO2011104774 A1 WO 2011104774A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor device
insulating film
circuit
silicon
electrode
Prior art date
Application number
PCT/JP2010/005170
Other languages
French (fr)
Japanese (ja)
Inventor
修 石川
隆弘 横山
順治 伊藤
Original Assignee
パナソニック株式会社
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Filing date
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Publication of WO2011104774A1 publication Critical patent/WO2011104774A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H1/00Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
    • H03H2001/0021Constructional details
    • H03H2001/0064Constructional details comprising semiconductor material
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/46Networks for connecting several sources or loads, working on different frequencies or frequency bands, to a common load or source
    • H03H7/463Duplexers
    • H03H7/465Duplexers having variable circuit topology, e.g. including switches
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/70Multiple-port networks for connecting several sources or loads, working on different frequencies or frequency bands, to a common load or source
    • H03H9/72Networks using surface acoustic waves
    • H03H9/725Duplexers

Definitions

  • the present invention relates to a semiconductor device.
  • Communication devices such as mobile phones are required to integrate communication functions corresponding to different communication methods and different frequencies in the same device, and there is a strong demand for further enhancement of functionality and size. It is necessary to integrate a signal processing circuit block having a plurality of different functions such as a digital signal processing block and a high-frequency analog signal processing block on one chip. Furthermore, there is a strong demand for integrating a large signal block for transmission and a very small small signal block for reception on the same chip, although they are the same high-frequency analog signal processing block.
  • RFICs Radio Frequency Integrated Circuits
  • MMICs Microwave Monolithic Integrated Circuits
  • GaAs Semi-insulating substrates
  • RFICs and MMICs are so-called single function ICs such as only a switch circuit function and a power amplification circuit function, and their applications are extremely limited.
  • these ICs and electronic components that cannot be integrated on a semiconductor chip, such as filters and antenna duplexers, are often combined and mounted on a multilayer ceramic substrate or multilayer resin substrate to be used as a high-frequency module.
  • GaAs which is a compound semiconductor
  • GaAs devices as compound semiconductors with problems in integration and interface circuits with silicon LSIs have been avoided, and silicon semiconductor devices are transmitted. Research to apply to and reception is spreading.
  • SOS Silicon-on-Sapphire
  • a silicon layer is formed on a sapphire substrate as a silicon-based high-frequency semiconductor
  • the SOS device can realize a degree of integration and miniaturization that cannot be achieved by a GaAs device, and can realize high-frequency characteristics equivalent to or higher than those of a GaAs device.
  • SOS devices which were 30 years ago when SOS devices were first developed, their manufacturing methods have been innovative.
  • an SOS substrate manufacturing method in addition to the epitaxial method that has been performed for several decades, a method of improving the epitaxial method and recrystallizing the amorphous silicon layer in the lateral direction has been put into practical use for about 10 years ago. ing. Furthermore, in recent years, completely different from the epitaxial method, a completely new SOS made by a bonding method using a hydrogen bond or van der Waals bond generated by bringing a sapphire substrate and a silicon substrate having an oxide film formed thereon into close contact therewith. System boards have also been proposed and some have been announced.
  • the layer structure of the new substrate made by this bonding method is the structure of silicon layer-oxide film layer-sapphire substrate in order from the top of the main surface side.
  • the substrate is a sapphire substrate. It is often classified as an SOS-based device, not a silicon-on-insulator substrate.
  • FIG. 11 is a plan view showing the structure of a conventional semiconductor device.
  • FIG. 12 is a plan view showing the configuration of the conventional semiconductor device shown in FIG. 11 with the heat dissipation member omitted.
  • a semiconductor device 801 shown in FIG. 11 is a so-called high-frequency module, and specifically has a power amplification function for transmission located immediately below an antenna of a mobile phone.
  • the semiconductor device 801 includes a wiring board 802 and passive components 804a and 804b mounted on the wiring board 802. These passive components 804a and 804b are mounted on the wiring board 802 so that the substrate-side electrode 812a and the electrodes 809 of the passive components 804a and 804b are electrically connected.
  • the passive components of the semiconductor device 801 two types of passive components 804a having a height higher than that of the semiconductor chip 803 and passive components 804b having a height lower than that of the semiconductor chip 803 are used. Of these, as shown in FIG.
  • the high-passive passive component 804a is mounted outside the heat dissipation member 805.
  • the passive component 804b having a lower height than the semiconductor chip 803 is disposed inside the heat dissipation member 805.
  • the electrodes 809 and the substrate-side electrodes 812a of the passive components 804a and 804b are usually electrically joined and physically fixed simultaneously using a joining material 807 such as solder.
  • the front surface 803a of the semiconductor chip 803 is mounted in a so-called face-down direction toward the main surface of the wiring board 802, and the back surface of the semiconductor chip 803 faces the upper surface.
  • FIG. 13 is a cross-sectional view taken along line X-X ′ of the conventional semiconductor device shown in FIG.
  • a wiring board 802 is formed by laminating a large number of insulator layers 811 and has a metal electrode wiring layer in its inner layer.
  • the back surface 803d of the semiconductor chip 803 located on the main surface 802a side of the wiring substrate 802 and the ceiling portion 805b covering the upper portion of the semiconductor chip 803 are physically fixed by a joint portion 805d with the heat dissipation member of the semiconductor chip 803.
  • the marking 806 indicating the model number of the product of the semiconductor device is described on the surface 805c of the ceiling portion of the heat radiation member. As shown in FIG.
  • the back surface 803 d of the semiconductor chip 803 is joined to a ceiling portion 805 b that covers the upper portion of the semiconductor chip 803 via a joint portion 805 d with the heat dissipation member of the semiconductor chip 803. Further, the electrode on the surface 803 a of the semiconductor chip 803 is electrically connected to the substrate side electrode 812 a through the bump electrode 808.
  • the heat generated on the surface 803a of the semiconductor chip 803 configured as described above is also dissipated from the surface 803a of the semiconductor chip 803.
  • the heat generated on the front surface 803a of the semiconductor chip 803 is conducted to the back surface 803d of the semiconductor chip 803, and enters the ceiling portion 805b that covers the upper portion of the semiconductor chip 803 via the joint portion 805d with the heat dissipation member of the semiconductor chip 803. It is transmitted. Then, the light is transmitted from the ceiling portion 805 b to the side wall portion 805 a surrounding the semiconductor chip 803.
  • the side wall portion 805a is located on the lower surface 802b of the wiring board 802 through the bonding material 807, the board-side electrode 812a, and the via hole (through hole) 810 penetrating the wiring board 802 and embedding the metal electrode, for example, grounding It is electrically and thermally connected to a reference potential supply terminal 812c that provides a potential and has a large area. Therefore, the heat generated on the surface 803a of the semiconductor chip 803 is transmitted to the reference potential supply terminal 812c.
  • the conventional semiconductor device 801 has a structure that solves the heat generation problem of the semiconductor chip 803.
  • FIG. 14 is a circuit block diagram showing a circuit configuration of a semiconductor chip of a conventional semiconductor device.
  • the internal circuit of the semiconductor chip 803 included in the conventional semiconductor device 801 has a power amplification function for transmission as described above.
  • the internal circuit of the semiconductor chip 803 includes two power amplifier circuits (for example, for GSM 900 MHz band and DCS 1800 MHz band) in which three stages of transistors 813a are connected in series. Yes.
  • the plurality of power amplifier circuits of these two systems are connected to a control circuit 813b, and the control circuit 813b controls on / off of the bias circuits of the plurality of power amplifier circuits of the specific system in accordance with a signal input to the Vcontrol terminal. To do.
  • a GSM 900 MHz band signal is input to the GSM input terminal Pin (GSM) and amplified by about 30 dB, and a maximum of about 2 watts is obtained from the GSM output terminal Pout (GSM). Is output.
  • the DCS 1800 MHz band signal is input to the GSM input terminal Pin (DCS), amplified by about 30 dB, and output from the DCS output terminal Pout (DCS) at about 1 watt or less. Which of these two systems is operated can be controlled by the Vcontrol terminal.
  • the conventional semiconductor device described above has a large number of parts and has a very large external dimension, which is so large that the conventional semiconductor device cannot be built in when the conventional semiconductor device is arranged in a mobile phone that supports multiband or the like. End up. That is, the size and number of the wiring board 802, the semiconductor chip 803, and the passive component 804 are large.
  • an object of the present invention is to realize a small semiconductor device in which a predetermined circuit is configured.
  • a semiconductor device includes an insulating substrate, an insulating film formed on the insulating substrate, an island shape formed on the insulating film, and a first active device formed.
  • a first silicon island region which is a silicon layer; a passive circuit region having a passive circuit formed outside the first silicon island region; an electrode formed outside the first silicon island region and outside the passive circuit region;
  • the configuration can be simplified. That is, in the semiconductor device according to the present invention, the silicon island region is on the insulating film located at a predetermined location on the insulating substrate, and the passive circuit region is outside the silicon island region. These silicon island regions and passive circuit regions are integrated on an insulating substrate and can be processed by semiconductor process technology, so the resistance and capacitance configured as passive circuits are extremely small, in units of several tens of microns. Can be made with. Furthermore, electronic components are mounted on the electrodes. However, in the semiconductor device of the present invention, passive components such as resistors, capacitors, and inductors can be formed on the insulating substrate simultaneously with the active devices.
  • bandpass filters are conventionally mounted on printed circuit boards of mobile phone sets.
  • Such electronic components can also be mounted on a semiconductor device.
  • electronic components that are conventionally mounted on a printed circuit board can be mounted in the vacant space. Therefore, for example, further miniaturization as a portable device can be realized.
  • the passive circuit can be manufactured by the semiconductor process technology as described above, the components conventionally mounted on the printed circuit board can be mounted on the insulating substrate on which the silicon island region and the passive circuit region are formed. It can be realized as one communication module. Therefore, a small semiconductor device having a predetermined circuit can be realized. As a result, the mobile device using the semiconductor device according to the present invention can be miniaturized.
  • the predetermined circuit may be a high frequency circuit.
  • a high frequency circuit is a circuit in which the frequency of a signal to be handled is high.
  • the high frequency is, for example, a frequency used for wireless communication, specifically a frequency used for communication of a mobile phone terminal, and more specifically, 1920 MHz-1980 MHz Band I, 1850 MHz-1910 MHz Band II, 1710 MHz- Band III of 1785 MHz, Band IV of 1710 MHz-1755 MHz, Band V of 824 MHz-849 MHz, Band VI of 830 MHz-840 MHz, Band VIII of 880 MHz-915 MHz, and Band IX of 1749.9 MHz-1784.9 MHz.
  • the insulating film below the first silicon island region, the insulating film below the passive circuit, and the insulating film below the electronic component may be separated from each other.
  • the degree of isolation (so-called isolation characteristics) between the first active device, the passive circuit, and the electronic component can be increased, and the high-frequency characteristics of the semiconductor device are improved.
  • the insulating film may be formed on the entire surface of the insulating substrate.
  • the adhesion between the insulating substrate and the insulating film can be made extremely strong, so that problems such as peeling of the insulating film do not occur, and a stable semiconductor device can be manufactured during mass production. In other words, the yield of the manufacturing process is improved. Furthermore, by forming this insulating film thick, it is possible to increase the Q value, which is one measure of the high-frequency performance of the passive components constituting the passive circuit.
  • the semiconductor device further includes a second silicon island region that is a silicon layer formed in an island shape on the insulating film and on which the second active device is formed, and the second active device includes the semiconductor A switch that selectively switches connection and disconnection between an antenna connected to the device and the predetermined circuit may be used.
  • the semiconductor device further includes a third silicon island region that is a silicon layer formed in an island shape on the insulating film and on which a third active device is formed, and the third active device includes the predetermined active device.
  • a microcomputer for controlling the circuit may be used.
  • control circuit that controls a predetermined circuit.
  • the control circuit includes a circuit that switches an operation mode (for example, a normal mode and a power consumption reduction mode) of a predetermined circuit.
  • an operation mode for example, a normal mode and a power consumption reduction mode
  • a circuit for switching connection of a high-frequency switch mounted on a semiconductor device and a circuit for switching a transmission / reception frequency can be given.
  • the first active device may be a transistor, and the microcomputer may include a bias control circuit that controls a bias voltage of the transistor.
  • the microcomputer may have an interface circuit with an external device connected to the semiconductor device.
  • the electrode is formed on a surface of the insulating substrate opposite to the surface on which the insulating film is formed, and the semiconductor device further penetrates the insulating substrate and connects the wiring and the electrode.
  • An electrode may be provided.
  • the insulating substrate may be a sapphire substrate, the insulating film may be silicon dioxide, and the insulating substrate and the silicon island region may be bonded to each other via the insulating film.
  • the insulating substrate and the silicon island region are bonded to each other through the insulating film without using an adhesive or the like, for example, a heat dissipating member such as the heat dissipating member 805 in FIGS. 11 to 13 is unnecessary.
  • a heat dissipating member such as the heat dissipating member 805 in FIGS. 11 to 13 is unnecessary.
  • the heat generated from the silicon island region is efficiently diffused to the sapphire substrate as the insulating substrate, and there is no problem even if the heat radiating member necessary for the conventional semiconductor device is omitted.
  • a small semiconductor device having a predetermined circuit can be realized.
  • FIG. 1 is a plan view showing an example of the configuration of the semiconductor device according to the first embodiment.
  • FIG. 2 is a cross-sectional view taken along line A-A ′ of the semiconductor device shown in FIG.
  • FIG. 3 is a circuit diagram showing an equivalent circuit of the semiconductor device shown in FIG.
  • FIG. 4 is a plan view showing an example of the configuration of the semiconductor device according to the second embodiment.
  • FIG. 5 is a sectional structural view taken along line B-B ′ of the semiconductor device shown in FIG. 4.
  • FIG. 6 is a plan view showing an example of the configuration of the semiconductor device according to the third embodiment.
  • FIG. 7 is a plan view showing an example of the configuration of the semiconductor device according to the fourth embodiment.
  • FIG. 1 is a plan view showing an example of the configuration of the semiconductor device according to the first embodiment.
  • FIG. 2 is a cross-sectional view taken along line A-A ′ of the semiconductor device shown in FIG.
  • FIG. 3 is a circuit diagram showing an equivalent circuit of the semiconductor
  • FIG. 8 is a cross-sectional view showing an example of the configuration of the semiconductor device according to the fifth embodiment.
  • FIG. 9 is a plan view showing an example of the configuration of the semiconductor device according to the sixth embodiment.
  • FIG. 10 is a circuit diagram showing an equivalent circuit of the semiconductor device shown in FIG.
  • FIG. 11 is a plan view showing the structure of a conventional semiconductor device.
  • FIG. 12 is a plan view showing the configuration of the conventional semiconductor device shown in FIG. 11 with the heat dissipation member omitted.
  • FIG. 13 is a cross-sectional view taken along line X-X ′ of the conventional semiconductor device shown in FIG.
  • FIG. 14 is a circuit block diagram showing a circuit configuration of a semiconductor chip of a conventional semiconductor device.
  • the semiconductor device includes an insulating substrate, an insulating film formed on the insulating substrate, and a silicon layer formed in an island shape on the insulating film and having a first active device formed thereon.
  • the first active device, the passive circuit, the electronic component, and the wiring include a predetermined circuit. Configure.
  • FIG. 1 is a plan view showing an example of the configuration of the semiconductor device according to the first embodiment
  • FIG. 2 is a cross-sectional view of the semiconductor device shown in FIG. 1, taken along the line AA ′
  • FIG. 2 is a circuit diagram showing an equivalent circuit of the semiconductor device shown in FIG.
  • a semiconductor device 100 shown in FIGS. 1 and 2 has a high-frequency circuit and is a receiving semiconductor device used for, for example, a mobile phone.
  • the semiconductor device 100 includes an insulating substrate 101, insulating films 102a to 102c, a silicon island region 103, and the like.
  • a high frequency circuit having a SAW (Surface Acoustic Wave) filter SAW and including a transistor Tr, a capacitor C, and a SAW filter SAW as shown in FIG. 3 is realized.
  • SAW Surface Acoustic Wave
  • the transistor Tr is the first active device of the present invention
  • the capacitor C is the passive circuit of the present invention
  • the SAW filter SAW is the electronic component of the present invention.
  • FIG. 1 the SAW filter SAW is shown in a semi-transparent view so that the electrode configuration located below can be easily seen.
  • the insulating substrate 101 is, for example, a sapphire substrate having a planar size of about 1 ⁇ 2 mm.
  • Each of the insulating films 102 a to 102 c is formed in an island shape on the insulating substrate 101. Specifically, it is, for example, a silicon dioxide film formed at a predetermined position on the main surface side of the sapphire substrate as the insulating substrate 101.
  • the silicon island region 103 is the first silicon island region of the present invention, and is formed on the insulating film 102a, and the transistor Tr is formed on the upper surface side.
  • the silicon island region 103 is left above the insulating films 102a to 102c, and, for example, a MOS (Metal-Oxide-Silicon) type transistor Tr is formed.
  • MOS Metal-Oxide-Silicon
  • a part of the first wiring layer 108 is used as the source electrode S, the drain electrode D, and the gate electrode G of the MOS transistor Tr, and the material is low resistance polysilicon or the like. Specifically, the first wiring layer 108 disposed on the gate oxide film 105 becomes the gate electrode G of the MOS transistor Tr. The other part of the first wiring layer 108 is used as one electrode of the capacitor C.
  • the gate oxide film 105 is, for example, silicon dioxide (SiO 2 ), and is interposed between the gate electrode G and the silicon island region 103.
  • the interlayer insulating film 107 is, for example, SiO 2 and is interposed between the first wiring layer 108 on the insulating film 102b and the second wiring layer 104 above the insulating film 102b.
  • the capacitor C is realized by the first wiring layer 108 on the insulating film 102b, the interlayer insulating film 107, and the second wiring layer 104 above the insulating film 102b. That is, the capacitor C is a MIM (Metal Insulator Metal) capacitor.
  • the second wiring layer 104 is made of, for example, an aluminum material for connecting a lead-out electrode from the MOS transistor Tr to the outside and each circuit element to form a predetermined circuit.
  • circuit elements include the above-described MOS transistor Tr, MIM (Metal-Insulator-Metal) capacitor C, and predetermined electrodes P1 to P5 provided on the insulating substrate 101.
  • SAW filter SAW which is an electronic component to be mounted.
  • the second wiring layer 104 is the wiring of the present invention, and connects the transistor Tr, the capacitor C, and the SAW filter SAW.
  • the transistor Tr, the capacitor C, the SAW filter SAW, and the second wiring layer 104 constitute a predetermined circuit such as a receiving circuit of a mobile phone, for example.
  • the bonding material 109 is, for example, solder that electrically and physically connects the SAW filter SAW to the electrode pads P1 to P5. Specifically, the bonding material 109 connects the component electrode 110 of the SAW filter SAW and the electrode pads P1 to P5.
  • the electrode pads P1 to P5 correspond to the electrodes of the present invention and are formed outside the silicon island region 103 and outside the passive circuit region.
  • the passive circuit region is a region where the capacitor C is formed, and specifically, a region where the interlayer insulating film 107 constituting the capacitor C is formed.
  • the electrode pads P_G1 to P_G3, RFin, P_Vdd, RFout1 and RFout2 are electrode pads for external connection of the semiconductor device 100.
  • bonding wires are formed on these electrode pads P_G1 to P_G3, RFin, P_Vdd, RFout1 and RFout2 to connect to the package or the like.
  • the electrode pads P_G1 to P_G3 are ground terminals connected to the ground
  • the electrode pad P_Vdd is a power supply terminal to which the voltage Vdd is supplied
  • the electrode pad RFin is received by an antenna connected to the semiconductor device 100.
  • the received signal is input to the semiconductor device 100
  • the electrode pad RFout1 and the electrode pad RFout2 are output terminals of the semiconductor device 100.
  • the SAW filter SAW is a balanced output type SAW filter, which removes noise from an unbalanced high-frequency signal input via the electrode pad P1 and the bonding material 109, and outputs a balanced high-frequency signal from which the noise has been removed.
  • This SAW filter SAW is mounted by an electronic component high-speed mounting machine called a mounter after each circuit element other than the SAW filter SAW of the semiconductor device 100 is configured.
  • FIG. 3 is implemented by the semiconductor device 100 configured as described above. Here, the receiving circuit shown in FIG. 3 will be briefly described.
  • the transistor Tr has a gate connected to the electrode pad RFin, a source connected to the electrode pad P_G1, and a drain connected to one end of the capacitor C. The drain is also connected to the electrode pad Vdd.
  • this transistor is a source-grounded amplification transistor, for example, LNA (LowLNoise Amplifier).
  • the DC component of the high frequency signal amplified by the transistor Tr is cut by the capacitor C and input to the SAW filter SAW.
  • the high-frequency signal input to the SAW filter SAW is unbalanced, noise is removed by the SAW filter SAW, and the balanced high-frequency signal is output from the electrode pads RFout1 and RFout2. That is, balanced output is performed.
  • the receiving circuit realized by the semiconductor device 100 amplifies the input high frequency signal, removes noise, and outputs a balanced output.
  • the semiconductor device 100 includes the insulating substrate 101, the insulating films 102a to 102c formed on the insulating substrate 101, the island shape on the insulating film 102a, and the transistor Tr.
  • a silicon island region 103 which is a formed silicon layer, a passive circuit region having a capacitor C formed outside the silicon island region 103, and electrode pads P1 to P5 formed outside the silicon island region 103 and outside the passive circuit region
  • a SAW filter SAW mounted on the electrode pads P1 to P5 and a second wiring layer 104 for connecting the transistor Tr, the capacitor C, and the electrode pads P1 to P5, the transistor Tr, the capacitor C, and the SAW filter
  • the SAW and the second wiring layer 104 constitute a receiving circuit.
  • the semiconductor device 100 can be realized as an extremely small semiconductor device having a receiving circuit.
  • the size of the semiconductor device 100 can be about 1 mm ⁇ 2 mm in the plan view of FIG.
  • the silicon island region 103 and the passive circuit region are an integrated object formed on the insulating substrate 101 and can be processed by a semiconductor process technique, so that the silicon island region 103 and the passive circuit region can be formed in units of several tens of microns. That is, as described above, the capacitor C and the like can be manufactured by a semiconductor process technology, so that components conventionally mounted on a printed circuit board can be mounted on the insulating substrate 101 in which the silicon island region and the passive circuit region are formed. It can be realized as one communication module of a telephone.
  • the SAW filter SAW is mounted on the insulating substrate 101 instead of the conventional printed circuit board.
  • the semiconductor device 100 has the same size as that of a conventional semiconductor device, and there is a possibility that a communication module on which components conventionally mounted on a printed circuit board are mounted can be realized.
  • components mounted on a printed circuit board include a band pass filter, an antenna duplexer, and an isolator often used in a mobile phone set in addition to the SAW filter SAW.
  • the insulating substrate 101 is a sapphire substrate
  • the insulating films 102a to 102c are silicon dioxide
  • the insulating substrate 101 and the silicon island region 103 are interposed via the insulating film 102a. It is stuck together.
  • a heat radiating member such as the heat radiating member 805 in FIGS. A member becomes unnecessary and it can further reduce in size. Note that the heat generated from the silicon island region 103 is efficiently diffused to the insulating substrate 101, and there is no problem even if the heat radiating member necessary for the conventional semiconductor device is omitted.
  • the insulating film 102a, the insulating film 102b, and the insulating film 102c are separated from each other. Thereby, the degree of separation between the transistor Tr, the capacitor C, and the SAW filter SAW can be increased, and the high frequency characteristics of the semiconductor device 100 are improved.
  • a method of bonding the insulating substrate 101 and the silicon island region 103 through the insulating film 102a will be described. Specifically, as a method of bonding the insulating substrate 101 and a silicon substrate having SiO 2 on the surface because the surface is oxidized, hydrogen bonding or a fan generated by bringing the insulating substrate 101 and the silicon substrate into close contact with each other can be used. Bond and bond using Delwars bond. Then, after bonding, the silicon material in the unnecessary region and the SiO 2 in the unnecessary region are removed, and the insulating films 102a to 102c and the silicon island region 103, which are SiO 2 necessary for forming a predetermined circuit, are locally formed. Leave behind.
  • the insulating substrate 101 and the silicon island region 103 can be bonded to each other via the insulating film 102a.
  • the reason why the insulating films 102a to 102c are left locally is that, for example, the degree of isolation between the MOS transistor Tr and the capacitor C of the MIM is increased, the interaction due to the electromagnetic field is extremely reduced, and the malfunction is reduced. Because of that.
  • a high-frequency circuit can be operated in a state close to an ideal state by electrically connecting independent circuit elements having low interaction due to an electromagnetic field, that is, independent circuit elements using the first wiring layer 108 and the second wiring layer 104. Will be able to.
  • the semiconductor device according to the second embodiment is substantially the same as the semiconductor device 100 according to the first embodiment, except that an insulating film is formed on the entire surface of the insulating substrate.
  • the semiconductor device according to the present embodiment will be described focusing on differences from the semiconductor device 100 according to the first embodiment.
  • FIGS. 4 is a plan view showing an example of the configuration of the semiconductor device according to the second embodiment
  • FIG. 5 is a cross-sectional view taken along line B-B ′ of the semiconductor device shown in FIG. 4.
  • the semiconductor device 200 according to the present embodiment shown in FIGS. 4 and 5 is substantially the same as the semiconductor device 100 according to the first embodiment shown in FIGS. 1 to 3, but instead of the insulating films 102a to 102c.
  • the difference is that an insulating film 202 is formed on almost the entire main surface of the insulating substrate 101, and the silicon island region 103 is located on the insulating film 202.
  • the semiconductor device 200 according to the present embodiment can extremely increase the adhesion between the insulating substrate and the insulating film, so that the problem such as peeling of the insulating film does not occur and the semiconductor device is stable during mass production. Can be manufactured. In other words, the yield of the manufacturing process is improved. Furthermore, by forming this insulating film thick, it is possible to increase the Q value, which is one measure of the high-frequency performance of the passive components constituting the passive circuit.
  • the degree of adhesion between the first wiring layer 108 and the second wiring layer 104 and the insulating film 202 is stronger than the degree of adhesion between the first wiring layer 108 and the second wiring layer 104 and the insulating substrate 101. Therefore, the first wiring layer 108 and the second wiring layer 104 are not peeled off during the semiconductor process.
  • the semiconductor device according to the present embodiment includes a plurality of semiconductor devices 100 according to the first embodiment, and is a silicon layer that is formed in an island shape on the insulating film and has a second active device.
  • the second active device is a switch that selectively switches between connection and disconnection of an antenna connected to the semiconductor device and a predetermined circuit.
  • the semiconductor device according to the present embodiment has a third silicon island region that is a silicon layer formed in an island shape on the insulating film and on which the third active device is formed. This is a microcomputer for controlling the circuit.
  • FIG. 6 is a plan view showing an example of the configuration of the semiconductor device according to the third embodiment. In the figure, an antenna ANT connected to the semiconductor device 300 is also shown.
  • a semiconductor device 300 shown in FIG. 6 includes a silicon island in which receiving circuits Rx1 to Rx3 having a configuration similar to that of the semiconductor device 100 according to the first embodiment of the invention shown in FIG. A region 311, a silicon island region 312 in which the microcomputer block 314 is formed, an insulating film 302 a, and an insulating film 302 b are included.
  • the reception circuits Rx1 to Rx3 have different reception frequencies. That is, it is a reception system with three different frequencies similar to the semiconductor device 100 according to the first embodiment of the present invention.
  • the high-frequency switch functional block 313 is a second active device of the present invention, and selectively connects the antenna ANT and any of the receiving circuits Rx1 to Rx3. That is, these three systems are switched.
  • the high-frequency switch functional block 313 is formed in a silicon island region that is a silicon layer formed in an island shape on the insulating film 302a.
  • the silicon island region 311 in which the high frequency switch functional block 313 is formed corresponds to the second silicon island region of the present invention.
  • the microcomputer block 314 corresponds to the third active device of the present invention, and receives and executes data exchange and command commands with the outside.
  • the microcomputer block 314 corresponds to the microcomputer of the present invention and controls the receiving circuits Rx1 to Rx3.
  • an interface circuit function corresponding to the interface circuit of the present invention that receives data exchange and command commands from the outside
  • a function control circuit function that performs switching of a high frequency switch, selection of a reception frequency, and the like
  • a bias control circuit function corresponding to the bias control circuit of the present invention for switching operation modes (for example, a mode for suppressing power consumption, raising / lowering the operation voltage, turning on / off the power supply, etc.), and temporarily using commands and frequency information as data.
  • the microcomputer block 314 includes an interface circuit with external devices connected to the semiconductor device 300 and a bias control circuit that controls the bias voltages of the transistors Tr1 to Tr3 of the receiving circuits Rx1 to Rx3.
  • an antenna control signal line 341 is drawn out and connected to the high frequency switch function block 313, and the switching of the high frequency switch is performed via the antenna control signal line 341.
  • the microcomputer block 314 is formed in a silicon island region 312 which is a silicon layer formed in an island shape on the insulating film 302b.
  • the silicon island region where the microcomputer block 314 is formed corresponds to the third silicon island region of the present invention.
  • the antenna ANT has a capability of simultaneously receiving three frequencies, for example, a first frequency, a second frequency, and a third frequency.
  • the high frequency signal received by the antenna ANT is input to the antenna terminal SWa of the semiconductor device 300 of the present embodiment.
  • the antenna terminal SWa of the high-frequency switch functional block 313 is connected to the receiving circuit Rx2 that amplifies the second frequency band in the example of FIG. Therefore, the high-frequency signal input to the antenna terminal SWa is input to the gate terminal of the source-grounded transistor Tr2 in this case via the high-frequency second input signal line 352.
  • the high-frequency signal input to the gate terminal of the transistor Tr2 is amplified by the transistor Tr2 and output from the drain terminal of the transistor Tr2.
  • the signal amplified by the transistor is input from a drain terminal of the transistor to a balanced output type SAW filter SAW2 through a capacitor that blocks a DC current.
  • the high-frequency signal input to the SAW filter SAW2 is filtered with a predetermined bandwidth and is output to the second balanced output terminals RFout21 and RFout22.
  • terminals GND21 and GND22 are common ground terminals of the receiving circuit Rx2 when performing balanced output.
  • a DC bias of the gate is applied to the gate electrode of the transistor Tr2 via the second gate bias line 322.
  • a DC bias of the drain is applied to the drain electrode of the transistor Tr2 via the drain bias line 320.
  • the DC bias applied to these gate electrode and drain electrode is controlled by the microcomputer block 314.
  • Switching of connection between the antenna ANT and the receiving circuits Rx1 to Rx3 corresponding to each band is controlled by the microcomputer block 314 via the antenna control signal line 341.
  • the switch of the high-frequency switch function block 313 is switched to be connected to the high-frequency first input signal line 351, and a high-frequency signal is input to the gate of the transistor Tr1.
  • the bias point of the transistor Tr1 is set by the first gate bias line 321 and the drain bias line 320, and an amplification operation is performed.
  • the signal filtered by the SAW filter SAW2 is output from the first balanced output terminals RFout11 and RFout12.
  • the terminals GND11 and GND12 are common ground terminals of the receiving circuit Rx1 when performing balanced output.
  • the switch of the high-frequency switch function block 313 is switched so as to be connected to the high-frequency third input signal line 353, and a high-frequency signal is input to the gate of the transistor Tr3.
  • the bias point of the transistor Tr3 is set by the third gate bias line 323 and the drain bias line 320, and an amplification operation is performed.
  • the signal filtered by the SAW filter SAW3 is output from the third balanced output terminals RFout31 and RFout32.
  • the terminals GND31 and GND32 are common ground terminals of the receiving circuit Rx3 when performing balanced output.
  • These controls are performed by data from a high-performance microcomputer called a digital baseband that controls the entire device on which the semiconductor device 300 that is sent to the first data terminal D1, the second data terminal D2, and the third data terminal D3 is mounted. And is done by command.
  • a digital baseband that controls the entire device on which the semiconductor device 300 that is sent to the first data terminal D1, the second data terminal D2, and the third data terminal D3 is mounted. And is done by command.
  • the semiconductor device 300 has three semiconductor devices 100 according to the first embodiment, and is formed in an island shape on the insulating film 302a.
  • the high-frequency switch functional block 313 has a silicon island region 311 which is a formed silicon layer, and a high-frequency switch functional block 313 selectively switches between connection and disconnection of the antenna ANT connected to the semiconductor device and the receiving circuits Rx1 to Rx2. It is.
  • the semiconductor device 300 can be realized as one module including the high-frequency switch functional block 313 connected to the antenna ANT.
  • the semiconductor device 300 has a silicon island region 312 which is a silicon layer formed in an island shape on the insulating film 302b and in which the microcomputer block 314 is formed.
  • the microcomputer block 314 is a microcomputer for controlling the receiving circuits Rx1 to Rx3.
  • control circuit for controlling the receiving circuits Rx1 to Rx3 can be realized.
  • the control circuit includes a circuit that switches the operation mode (for example, the normal mode and the power consumption reduction mode) of the reception circuits Rx1 to Rx3.
  • a circuit for switching the connection of the high-frequency switch function block 313 mounted on the semiconductor device 300 and a circuit for switching a transmission / reception frequency can be given.
  • the high frequency switch functional block 313 and the microcomputer block 314 are formed on a silicon island region structure similar to the transistors Tr1 to Tr3 used in the amplifier circuits Rx1 to Rx3, that is, on the sapphire substrate as the insulating substrate 101.
  • This is a structure in which the silicon island region is located above the insulating films 302a and 302b. That is, the high-frequency switch functional block 313 and the microcomputer block 314 are circuit blocks formed using a plurality of transistors formed by a semiconductor process in the silicon island region.
  • the difference between the silicon island region 103 of the transistors Tr1 to Tr3 used in the receiving circuits Rx1 to Rx3, the silicon island region 311 of the high frequency switch functional block 313, and the silicon island region 312 of the microcomputer block 314 is only the number of active transistors.
  • the amplifier, the high-frequency switch function block 313, and the microcomputer block 314 are manufactured by the same semiconductor process.
  • three SAW filters are mounted on the sapphire substrate as the insulating substrate 101 instead of the conventional wiring substrate.
  • the SAW filter in this case similarly assumes a balanced output type SAW filter in the third embodiment.
  • the semiconductor device according to the fourth embodiment is substantially the same as the semiconductor device 300 according to the third embodiment, except that an insulating film is formed on the entire surface of the insulating substrate.
  • the semiconductor device according to the present embodiment will be described focusing on differences from the semiconductor device 300 according to the third embodiment.
  • a semiconductor device according to the fourth embodiment will be described with reference to FIG.
  • FIG. 7 is a plan view showing an example of the configuration of the semiconductor device according to the fourth embodiment.
  • the semiconductor device 400 according to the fourth embodiment shown in FIG. 7 has an insulation formed on almost the entire main surface side of the insulating substrate 101 as compared with the semiconductor device 300 according to the third embodiment shown in FIG.
  • the silicon island region 103 of the receiving circuits Rx1 to Rx3, the silicon island region 311 in which the high-frequency switch function block 313 is formed, and the silicon island region in which the microcomputer block 314 is formed on the insulating film 402 312 is different.
  • the semiconductor device 400 according to this embodiment can extremely increase the adhesion between the insulating substrate 101 and the insulating film 402, so that problems such as peeling of the insulating film 402 do not occur and the semiconductor device 400 is stable during mass production.
  • a simple semiconductor device can be manufactured. In other words, the yield of the manufacturing process is improved.
  • this insulating film thick it is possible to increase the Q value, which is one measure of the high-frequency performance of the passive components constituting the passive circuit. Therefore, the Q values of the capacitors C1 to C3 of the receiving circuits Rx1 to Rx3 can be increased.
  • the electrode is formed on the surface opposite to the surface on which the insulating film of the insulating substrate is formed, and further penetrates the insulating substrate. And a through electrode for connecting the wiring and the electrode.
  • FIG. 8 is a cross-sectional view showing an example of the configuration of the semiconductor device according to the fifth embodiment.
  • the semiconductor device 500 shown in FIG. 2 has the substrate back surface side electrode 513 for mounting the SAW filter SAW, and the insulating films 102 a and 102 b of the insulating substrate 101 formed thereon.
  • a substrate through electrode 512 that is formed on the surface opposite to the surface and penetrates the insulating substrate 101 and connects the second wiring layer 104 and the substrate back surface side electrode 513 is provided.
  • the substrate back surface side electrode 513 corresponds to the electrode of the present invention
  • the substrate through electrode 512 corresponds to the through electrode of the present invention.
  • the component electrode 110 of the SAW filter SAW is electrically connected to the substrate back surface side electrode 513 provided on the opposite main surface side of the sapphire substrate as the insulating substrate 101 through the bonding material 109 and is physically connected. Also fixed to.
  • a substrate through electrode 512 electrically connected to the substrate back surface side electrode 513 and provided at a predetermined position of the insulating substrate 101 is insulated from various circuit elements such as transistors and capacitors on the main surface side of the insulating substrate 101.
  • the component electrodes 110 of the SAW filter SAW on the opposite main surface side of the substrate 101 are electrically connected to each other to form a circuit.
  • a protective resin 501 is provided on the main surface side of the insulating substrate 101 and is connected to the connection bumps 503 through the front side column electrodes 502.
  • the semiconductor device 500 according to the present embodiment can mount the SAW filter SAW on the opposite main surface side of the insulating substrate 101 as compared with the semiconductor device 100 according to the first embodiment.
  • a further miniaturized semiconductor device can be realized.
  • the semiconductor device according to the present invention is realized as a receiving semiconductor device.
  • the semiconductor device according to the present invention is, for example, a transmitting semiconductor device used in a mobile phone. Can also be realized.
  • FIG. 9 is a plan view showing an example of the configuration of the semiconductor device according to the sixth embodiment
  • FIG. 10 is a circuit diagram showing an equivalent circuit of the semiconductor device shown in FIG.
  • a semiconductor device 600 includes an insulating substrate 101, insulating films 602a to 602g formed on the insulating substrate, a transistor Tr1 formed in a silicon island region 603a on the insulating film 602a, and an insulating film.
  • the isolator 650 formed on the insulating film 602f Note that the insulating film 602g is provided to insulate the intersecting wirings.
  • FIG. 10 is an equivalent circuit diagram of the semiconductor device 600 shown in FIG.
  • the electrode pad Pin shown in FIG. 9 is an input terminal, and a biased high-frequency signal Vg1 + RFin is input.
  • the electrode pad P_Vdd1 is a power supply terminal and is supplied with the voltage Vdd1.
  • the electrode pad P_Vdd2 is a power supply terminal and is supplied with the voltage Vdd2.
  • the electrode pad P_Vg2 is a bias terminal and is supplied with the bias voltage Vg2 of the transistors Tr2 and Tr3.
  • the electrode pads P_G1 to P_G3 are ground terminals connected to the ground.
  • the electrode pad Pout is an output terminal, and an output signal RFout is output.
  • the semiconductor device 600 includes the insulating substrate 101, the insulating films 602a to 602g formed on the insulating substrate 101, and the island shape on the insulating film 602a.
  • a silicon island region 603a which is a formed silicon layer and an island shape is formed on the insulating film 602c, and an island shape is formed on the silicon island region 603c which is a silicon layer where the transistor Tr2 is formed and an insulating film 602d.
  • a silicon island region 603d which is a silicon layer in which the transistor Tr3 is formed, a passive circuit region having capacitors C1 and C2 formed outside the silicon island regions 603a, 603c and 603d, and silicon island regions 603a, 603c and 603d. Electrode pads P61 to P63 formed outside and outside the passive circuit region; An isolator 650 mounted on the electrode pads P61 to P63, a transistor Tr1 to Tr2, capacitors C1 and C2, and a second wiring layer 104 for connecting the electrode pads P61 to P63, and the transistors Tr1 to Tr2 and the capacitor C1 and C2, the isolator 650, and the second wiring layer 104 constitute, for example, a transmission circuit of a mobile phone.
  • the semiconductor device 600 according to the present embodiment can be extremely miniaturized similarly to the semiconductor device 100 according to the first embodiment. That is, a small semiconductor device having a transmission circuit can be realized.
  • the configuration of the capacitor is shown as the passive circuit, but a configuration having an inductor may be used.
  • a spiral inductor that is often used in a high-frequency circuit can also be formed by a semiconductor process using the first wiring layer 108 and the second wiring layer 104, and can be miniaturized.
  • elements such as transistors, capacitors, and inductors are formed on the silicon island region and the insulating island region in the silicon island region formed on the sapphire substrate, that is, the substrate having a so-called SOS structure.
  • other elements may be formed on the substrate having the SOS structure.
  • you may combine with not only an electronic element but an optical element.
  • a passive element, an active element or the like manufactured in a separate process in advance may be arranged on the SOS substrate.
  • the insulating film is formed of SiO 2 obtained by oxidizing silicon.
  • the insulating film is not limited to a method of oxidizing silicon, and is separately deposited by a method such as a CVD method as an insulating film. Also good. Further, the insulating film is not limited to SiO 2 but may be another insulating film.
  • the silicon substrate is bonded and bonded to the sapphire substrate by the bonding method, but may be bonded by other methods.
  • the thickness of the insulating film in the other region except for the region immediately below the silicon island region may be formed to be thinner than the thickness immediately below the region.
  • the insulating film may be completely removed by etching or the like.
  • the thickness of the insulating film in other regions except just below the wiring layer may be made thinner than the thickness immediately below the insulating layer.
  • the material constituting the first wiring layer, the second wiring layer, and the electrode pad is not limited to the above-described material, and may be any material having conductivity, and may be Al, Cu, Au, for example. .
  • the shape and size of the silicon island region are not limited to the example shown in the above embodiment, and may be changed in any way.
  • Various devices including the semiconductor device according to the present invention are also included in the present invention.
  • active elements and passive elements formed on an SOS substrate high-frequency integrated circuits for transmission and reception including these elements, and high-frequency wireless communication systems including these elements and high-frequency integrated circuits are also included in the present invention.
  • the semiconductor device of the present invention is useful as a semiconductor device applied to a so-called front-end block for receiving and transmitting communication equipment such as a mobile phone, particularly a front-end block corresponding to multiband and multimode communication.

Abstract

Disclosed is a semiconductor device (100) provided with an insulating substrate (101), insulating films (102a to 102c) which are formed on the insulating substrate (101), a silicon island region (103) which is formed in the shape of an island on insulating film (102a) and which is a silicon layer formed with a transistor (Tr), a passive circuit region which is formed outside the silicon island region (103) and which has a capacitor (C), electrode pads (P1 to P5) which are formed outside the silicon island region (103) and outside the passive circuit region, a SAW filter (SAW) which is mounted on the electrode pads (P1 to P5), and a second wiring layer (104) for connecting the transistor (Tr), the capacitor (C), and the electrode pads (P1 to P5), wherein the transistor (Tr), the capacitor (C), the SAW filter (SAW), and the second wiring layer (104) configure a predetermined circuit.

Description

半導体装置Semiconductor device
 本発明は、半導体装置に関する。 The present invention relates to a semiconductor device.
 携帯電話などの通信機器は、異なる通信方式と異なる周波数に対応する通信機能を同一機器内に小型に一体化することが求められ、しかも更なる高機能化や小型化への要望が著しく強い。半導体チップ上にデジタル信号処理ブロックと高周波アナログ信号処理ブロックなどの複数の異なる機能を有する信号処理回路ブロックを1チップに集積化することが必要とされている。さらには、同じ高周波アナログ信号処理ブロックではあるが、送信用の大信号ブロックと受信用の極めて微弱な小信号ブロックを同一チップ上に集積化する要望も強い。 Communication devices such as mobile phones are required to integrate communication functions corresponding to different communication methods and different frequencies in the same device, and there is a strong demand for further enhancement of functionality and size. It is necessary to integrate a signal processing circuit block having a plurality of different functions such as a digital signal processing block and a high-frequency analog signal processing block on one chip. Furthermore, there is a strong demand for integrating a large signal block for transmission and a very small small signal block for reception on the same chip, although they are the same high-frequency analog signal processing block.
 これらの高集積化への技術要望に対し、シリコン半導体を用いたRFIC(Radio Frequency Integrated Circuit)やGaAsなどに代表される半絶縁性基板を用いたMMIC(Microwave Monolithic Integrated Circuit)などが高周波ICとして開発され量産されている。しかし、これらRFICやMMICは、スイッチ回路機能だけ、電力増幅回路機能だけといった、いわゆる単機能ICなどで、その用途は極めて限定的であった。 In response to these technical demands for high integration, RFICs (Radio Frequency Integrated Circuits) using silicon semiconductors and MMICs (Microwave Monolithic Integrated Circuits) using semi-insulating substrates such as GaAs are high frequency ICs. Developed and mass produced. However, these RFICs and MMICs are so-called single function ICs such as only a switch circuit function and a power amplification circuit function, and their applications are extremely limited.
 また、これらのICと、半導体チップには集積化できない電子部品、たとえばフィルターやアンテナ共用器などを組み合わせ、多層セラミック基板や多層樹脂基板上に同時実装して高周波モジュールとして使用されることも多い。 Also, these ICs and electronic components that cannot be integrated on a semiconductor chip, such as filters and antenna duplexers, are often combined and mounted on a multilayer ceramic substrate or multilayer resin substrate to be used as a high-frequency module.
 ところで、1990年代初頭より携帯電話が世界中で使用されるようになり、送信や受信に用いられるデバイスは化合物半導体であるGaAsが携帯電話では主力であった。近年、上述したように多バンド/多モードの携帯電話が要望されるにつれて、集積化やシリコンのLSIとのインターフェース回路で問題のある化合物半導体としてのGaAsデバイスは敬遠され、シリコンの半導体デバイスを送信や受信に応用する研究が広がりつつある。 By the way, mobile phones have been used all over the world since the early 1990s, and GaAs, which is a compound semiconductor, has been the main device for mobile phones as a device used for transmission and reception. In recent years, as multi-band / multi-mode mobile phones have been demanded as described above, GaAs devices as compound semiconductors with problems in integration and interface circuits with silicon LSIs have been avoided, and silicon semiconductor devices are transmitted. Research to apply to and reception is spreading.
 さらに最近では、シリコン系の高周波半導体としてサファイア基板上にシリコン層を形成したSOS(Silicon on Sapphire)デバイスが再び脚光を浴びつつある。その理由として、SOSデバイスは、GaAsデバイスにはできない集積度と微細化が実現でき、しかもGaAsデバイスと同等以上の高周波特性を実現できるからである。SOSデバイスと言っても、30年前のSOSデバイスが最初に開発された当時とは異なり、その製法は革新をとげてきた。 More recently, SOS (Silicon-on-Sapphire) devices in which a silicon layer is formed on a sapphire substrate as a silicon-based high-frequency semiconductor are attracting attention again. The reason is that the SOS device can realize a degree of integration and miniaturization that cannot be achieved by a GaAs device, and can realize high-frequency characteristics equivalent to or higher than those of a GaAs device. Unlike SOS devices, which were 30 years ago when SOS devices were first developed, their manufacturing methods have been innovative.
 SOS基板の製法としては、数十年前から行われているエピタキシャル法に加え、10年ほど前からはエピタキシャル法を改善し非晶質シリコン層を横方向に再結晶化する製法が実用化されている。さらに、近年はエピタキシャル法とは全く異なり、サファイア基板と表面に酸化膜を形成したシリコン基板とを密着させることで生じる水素結合やファンデルワールス結合などを利用した貼り合わせ法で作った全く新しいSOS系基板も提案がなされ、一部では発表もされている。この貼り合わせ法で作った新しい基板の層構造は、その主面側の最上部から順番に、シリコン層-酸化膜層-サファイア基板の構造であるが、基板がサファイア基板ということで、SOI(Silicon on Insulator)基板ではなく、通常はSOS系デバイスとして分類されることが多い。 As an SOS substrate manufacturing method, in addition to the epitaxial method that has been performed for several decades, a method of improving the epitaxial method and recrystallizing the amorphous silicon layer in the lateral direction has been put into practical use for about 10 years ago. ing. Furthermore, in recent years, completely different from the epitaxial method, a completely new SOS made by a bonding method using a hydrogen bond or van der Waals bond generated by bringing a sapphire substrate and a silicon substrate having an oxide film formed thereon into close contact therewith. System boards have also been proposed and some have been announced. The layer structure of the new substrate made by this bonding method is the structure of silicon layer-oxide film layer-sapphire substrate in order from the top of the main surface side. The substrate is a sapphire substrate. It is often classified as an SOS-based device, not a silicon-on-insulator substrate.
 さて、半導体チップと受動部品を組み合わせた所定の回路が構成された半導体装置として、配線基板上に半導体チップと受動部品とを実装する構成が提案されている(例えば、特許文献1参照)。 Now, as a semiconductor device in which a predetermined circuit combining a semiconductor chip and a passive component is configured, a configuration in which the semiconductor chip and the passive component are mounted on a wiring board has been proposed (for example, see Patent Document 1).
 図11は、従来の半導体装置の構造を示す平面図である。また、図12は、図11に示した従来の半導体装置において、放熱用部材を省略した状態の構成を示す平面図である。 FIG. 11 is a plan view showing the structure of a conventional semiconductor device. FIG. 12 is a plan view showing the configuration of the conventional semiconductor device shown in FIG. 11 with the heat dissipation member omitted.
 図11に示す半導体装置801は、いわゆる高周波モジュールであって、具体的には携帯電話のアンテナ直下に位置する送信用の電力増幅機能を有するものである。半導体装置801は、配線基板802と、当該配線基板802に実装された受動部品804a及び804bとを備える。これら受動部品804a及び804bは、基板側電極812aと、受動部品804a及び804bの電極809とが電気的に接続されるように、配線基板802に搭載される。半導体装置801の受動部品としては、半導体チップ803より高背の受動部品804aと半導体チップ803より低背の受動部品804bとの2種類が用いられ、このうち図11に示すように半導体チップ803より高背の受動部品804aは放熱用部材805の外側に搭載される。 A semiconductor device 801 shown in FIG. 11 is a so-called high-frequency module, and specifically has a power amplification function for transmission located immediately below an antenna of a mobile phone. The semiconductor device 801 includes a wiring board 802 and passive components 804a and 804b mounted on the wiring board 802. These passive components 804a and 804b are mounted on the wiring board 802 so that the substrate-side electrode 812a and the electrodes 809 of the passive components 804a and 804b are electrically connected. As the passive components of the semiconductor device 801, two types of passive components 804a having a height higher than that of the semiconductor chip 803 and passive components 804b having a height lower than that of the semiconductor chip 803 are used. Of these, as shown in FIG. The high-passive passive component 804a is mounted outside the heat dissipation member 805.
 また、図12に示したように半導体チップ803より低背の受動部品804bは、放熱用部材805の内部に配置される。受動部品804a及び804bの電極809と基板側電極812aとは、通常は半田などの接合材807を用いて電気的な接合と物理的な固定とが同時に行われる。また、半導体チップ803の表面803aは配線基板802の主面に向けて、いわゆるフェイスダウンの方向で実装され、半導体チップ803の裏面が上面を向いている。 Also, as shown in FIG. 12, the passive component 804b having a lower height than the semiconductor chip 803 is disposed inside the heat dissipation member 805. The electrodes 809 and the substrate-side electrodes 812a of the passive components 804a and 804b are usually electrically joined and physically fixed simultaneously using a joining material 807 such as solder. Further, the front surface 803a of the semiconductor chip 803 is mounted in a so-called face-down direction toward the main surface of the wiring board 802, and the back surface of the semiconductor chip 803 faces the upper surface.
 図13は、図12に示した従来の半導体装置のX-X’線における断面図である。 FIG. 13 is a cross-sectional view taken along line X-X ′ of the conventional semiconductor device shown in FIG.
 図13において、配線基板802は多数の絶縁体層811が積層されたもので、その内層には金属電極配線層を有している。配線基板802の主面802a側に位置する半導体チップ803の裏面803dと半導体チップ803の上部を覆う天井部805bは、半導体チップ803の放熱用部材との接合部805dで物理的に固定されており、放熱用部材の天井部の表面805cには、半導体装置の製品の型番を示すマーキング806が記載される。図13に示すように、半導体チップ803の裏面803dは、半導体チップ803の放熱用部材との接合部805dを介して半導体チップ803の上部を覆う天井部805bに接合される。また、半導体チップ803の表面803a上の電極はバンプ電極808を介して基板側電極812aと電気的に接続されている。 In FIG. 13, a wiring board 802 is formed by laminating a large number of insulator layers 811 and has a metal electrode wiring layer in its inner layer. The back surface 803d of the semiconductor chip 803 located on the main surface 802a side of the wiring substrate 802 and the ceiling portion 805b covering the upper portion of the semiconductor chip 803 are physically fixed by a joint portion 805d with the heat dissipation member of the semiconductor chip 803. The marking 806 indicating the model number of the product of the semiconductor device is described on the surface 805c of the ceiling portion of the heat radiation member. As shown in FIG. 13, the back surface 803 d of the semiconductor chip 803 is joined to a ceiling portion 805 b that covers the upper portion of the semiconductor chip 803 via a joint portion 805 d with the heat dissipation member of the semiconductor chip 803. Further, the electrode on the surface 803 a of the semiconductor chip 803 is electrically connected to the substrate side electrode 812 a through the bump electrode 808.
 このように構成された半導体チップ803の表面803aで発生した熱は、半導体チップ803の表面803aからも放熱される。 The heat generated on the surface 803a of the semiconductor chip 803 configured as described above is also dissipated from the surface 803a of the semiconductor chip 803.
 また、半導体チップ803の表面803aで発生した熱は、半導体チップ803の裏面803dまで伝導し、半導体チップ803の放熱用部材との接合部805dを介して半導体チップ803の上部を覆う天井部805bに伝わる。そして、天井部805bから半導体チップ803の周囲を囲む側壁部805aに伝わる。側壁部805aは、接合材807と、基板側電極812aと、配線基板802を貫通し金属電極を埋め込んであるビアホール(スルーホール)810とを介して、配線基板802の下面802bに位置し例えば接地電位を与え大きな面積を有する基準電位供給用端子812cに電気的且つ熱的に接続されている。よって、半導体チップ803の表面803aで発生した熱は、基準電位供給用端子812cに伝わる。 Further, the heat generated on the front surface 803a of the semiconductor chip 803 is conducted to the back surface 803d of the semiconductor chip 803, and enters the ceiling portion 805b that covers the upper portion of the semiconductor chip 803 via the joint portion 805d with the heat dissipation member of the semiconductor chip 803. It is transmitted. Then, the light is transmitted from the ceiling portion 805 b to the side wall portion 805 a surrounding the semiconductor chip 803. The side wall portion 805a is located on the lower surface 802b of the wiring board 802 through the bonding material 807, the board-side electrode 812a, and the via hole (through hole) 810 penetrating the wiring board 802 and embedding the metal electrode, for example, grounding It is electrically and thermally connected to a reference potential supply terminal 812c that provides a potential and has a large area. Therefore, the heat generated on the surface 803a of the semiconductor chip 803 is transmitted to the reference potential supply terminal 812c.
 このように、従来の半導体装置801は、半導体チップ803の発熱問題を解決する構造となっている。 Thus, the conventional semiconductor device 801 has a structure that solves the heat generation problem of the semiconductor chip 803.
 図14は、従来の半導体装置の半導体チップの回路構成を示す回路ブロック図である。 FIG. 14 is a circuit block diagram showing a circuit configuration of a semiconductor chip of a conventional semiconductor device.
 従来の半導体装置801が有する半導体チップ803の内部回路は、前述したように送信用の電力増幅機能を有するものである。具体的には、半導体チップ803の内部回路は、3段のトランジスタ813aを直列に接続した複数の電力増幅回路(例えばGSM方式の900MHz帯用とDCS方式の1800MHz帯用など)が2系統入っている。これら2系統の複数の電力増幅回路は制御回路813bにつながれており、制御回路813bはVcontrol端子に入力される信号に応じて、特定系統の複数の電力増幅回路のバイアス回路のオン又はオフの制御を行なう。 The internal circuit of the semiconductor chip 803 included in the conventional semiconductor device 801 has a power amplification function for transmission as described above. Specifically, the internal circuit of the semiconductor chip 803 includes two power amplifier circuits (for example, for GSM 900 MHz band and DCS 1800 MHz band) in which three stages of transistors 813a are connected in series. Yes. The plurality of power amplifier circuits of these two systems are connected to a control circuit 813b, and the control circuit 813b controls on / off of the bias circuits of the plurality of power amplifier circuits of the specific system in accordance with a signal input to the Vcontrol terminal. To do.
 このように構成された半導体チップ803により、例えば、GSM方式の900MHz帯の信号は、GSM入力端子Pin(GSM)に入力され約30dBほど増幅されGSM出力端子Pout(GSM)から最大約2ワットが出力される。同様に、DCS方式の1800MHz帯の信号は、GSM入力端子Pin(DCS)に入力され約30dBほど増幅されDCS出力端子Pout(DCS)から約1ワット以下で出力される。この2つの系統のいずれを動作させるかは、Vcontrol端子により制御できる。 With the semiconductor chip 803 configured in this manner, for example, a GSM 900 MHz band signal is input to the GSM input terminal Pin (GSM) and amplified by about 30 dB, and a maximum of about 2 watts is obtained from the GSM output terminal Pout (GSM). Is output. Similarly, the DCS 1800 MHz band signal is input to the GSM input terminal Pin (DCS), amplified by about 30 dB, and output from the DCS output terminal Pout (DCS) at about 1 watt or less. Which of these two systems is operated can be controlled by the Vcontrol terminal.
国際公開第2006/001087号International Publication No. 2006/001087
 しかしながら、以上説明した従来の半導体装置では、部品点数が多くその外形寸法は非常に大きく、マルチバンドなどに対応する携帯電話に従来の半導体装置を並べた場合には内蔵できないほどの大きさになってしまう。即ち、配線基板802や半導体チップ803や受動部品804の大きさとその数が多いからである。 However, the conventional semiconductor device described above has a large number of parts and has a very large external dimension, which is so large that the conventional semiconductor device cannot be built in when the conventional semiconductor device is arranged in a mobile phone that supports multiband or the like. End up. That is, the size and number of the wiring board 802, the semiconductor chip 803, and the passive component 804 are large.
 さらには、半導体チップ803の放熱を改善するために、放熱用部材805を別途設ける必要があるので、半導体装置の小型化がより困難である。さらには、半導体チップ803の裏面803dと放熱用部材805とを接合させる必要があるので、より工数的にも多いだけでなく、高さ合わせ等で厳しい管理基準をクリアーしながら生産をする必要があるなど、半導体装置の生産時のスループットを向上させることができなかった。 Furthermore, in order to improve the heat dissipation of the semiconductor chip 803, it is necessary to separately provide a heat dissipation member 805, so it is more difficult to reduce the size of the semiconductor device. Furthermore, since it is necessary to join the back surface 803d of the semiconductor chip 803 and the heat dissipation member 805, it is necessary not only to increase the man-hours but also to produce while clearing strict management standards such as height adjustment. For example, the throughput during production of semiconductor devices could not be improved.
 そこで、本発明は、所定の回路が構成された小型の半導体装置を実現することを目的とする。 Therefore, an object of the present invention is to realize a small semiconductor device in which a predetermined circuit is configured.
 上記課題を解決するため、本発明に係る半導体装置は、絶縁基板と、前記絶縁基板上に形成された絶縁膜と、前記絶縁膜上に島状に形成され、第1能動デバイスが形成されたシリコン層である第1シリコン島領域と、前記第1シリコン島領域外に形成された受動回路を有する受動回路領域と、前記第1シリコン島領域外かつ前記受動回路領域外に形成された電極と、前記電極上に搭載された電子部品と、前記第1能動デバイス、前記受動回路及び前記電極を接続するための配線とを備え、前記第1能動デバイス、前記受動回路、前記電子部品及び前記配線は、所定の回路を構成する。 In order to solve the above problems, a semiconductor device according to the present invention includes an insulating substrate, an insulating film formed on the insulating substrate, an island shape formed on the insulating film, and a first active device formed. A first silicon island region which is a silicon layer; a passive circuit region having a passive circuit formed outside the first silicon island region; an electrode formed outside the first silicon island region and outside the passive circuit region; An electronic component mounted on the electrode, and a wiring for connecting the first active device, the passive circuit, and the electrode, the first active device, the passive circuit, the electronic component, and the wiring Constitutes a predetermined circuit.
 これにより、所定の回路が構成された極めて小型な半導体装置を実現できる。また、その構成も簡略化できる。即ち、本発明に係る半導体装置では、絶縁基板上の所定の場所に位置する絶縁膜上にシリコン島領域があり、またシリコン島領域外に受動回路領域がある。これらのシリコン島領域及び受動回路領域は、絶縁基板上に形成された一体物であり、半導体のプロセス技術で加工できるので、受動回路として構成される抵抗や容量などは極めて小さく数十ミクロンの単位で作りこむことができる。さらには、電極上には電子部品が搭載されるが、本発明の半導体装置では抵抗や容量やインダクターなどの受動部品は絶縁基板上に能動デバイスと同時に形成できるので、受動部品を新たに電子部品として載せる必要はない。そして、受動部品を新たな電子部品として載せる必要がなくなった代わりに、携帯電話のセットでよく使われるバンドパスフィルターやアンテナ共用器やアイソレーターなど、従来は携帯電話のセットのプリント基板に搭載していたような電子部品をも半導体装置に搭載できる。言い換えると、空いたスペースに従来はプリント基板に搭載していたような電子部品を搭載できる。よって、例えば携帯機器として更なる小型化が実現できる。 This makes it possible to realize an extremely small semiconductor device in which a predetermined circuit is configured. Further, the configuration can be simplified. That is, in the semiconductor device according to the present invention, the silicon island region is on the insulating film located at a predetermined location on the insulating substrate, and the passive circuit region is outside the silicon island region. These silicon island regions and passive circuit regions are integrated on an insulating substrate and can be processed by semiconductor process technology, so the resistance and capacitance configured as passive circuits are extremely small, in units of several tens of microns. Can be made with. Furthermore, electronic components are mounted on the electrodes. However, in the semiconductor device of the present invention, passive components such as resistors, capacitors, and inductors can be formed on the insulating substrate simultaneously with the active devices. There is no need to put it on. Instead of having to place passive components as new electronic components, bandpass filters, antenna duplexers, and isolators that are often used in mobile phone sets, such as bandpass filters, are conventionally mounted on printed circuit boards of mobile phone sets. Such electronic components can also be mounted on a semiconductor device. In other words, electronic components that are conventionally mounted on a printed circuit board can be mounted in the vacant space. Therefore, for example, further miniaturization as a portable device can be realized.
 つまり、上述したように受動回路を半導体のプロセス技術で製造できるので、従来はプリント基板に搭載していた部品をシリコン島領域及び受動回路領域が形成された絶縁基板に搭載でき、例えば携帯電話の1つの通信モジュールとして実現できる。したがって、所定の回路が構成された小型の半導体装置を実現できる。その結果、本発明に係る半導体装置を用いた携帯機器の小型化を可能とする。 That is, since the passive circuit can be manufactured by the semiconductor process technology as described above, the components conventionally mounted on the printed circuit board can be mounted on the insulating substrate on which the silicon island region and the passive circuit region are formed. It can be realized as one communication module. Therefore, a small semiconductor device having a predetermined circuit can be realized. As a result, the mobile device using the semiconductor device according to the present invention can be miniaturized.
 また、前記所定の回路は高周波回路であってもよい。 Further, the predetermined circuit may be a high frequency circuit.
 これにより、高周波回路の半導体装置を実現できる。高周波回路とは、取り扱う信号の周波数が高周波の回路である。高周波とは、例えば、無線通信に用いられる周波数であり、特定的には携帯電話端末の通信に用いられる周波数であり、さらに特定的には1920MHz-1980MHzのBandI、1850MHz-1910MHzのBandII、1710MHz-1785MHzのBandIII、1710MHz-1755MHzのBandIV、824MHz-849MHzのBandV、830MHz-840MHzのBandVI、880MHz-915MHzのBandVIIIおよび1749.9MHz-1784.9MHzのBandIXである。 Thereby, a semiconductor device of a high frequency circuit can be realized. A high frequency circuit is a circuit in which the frequency of a signal to be handled is high. The high frequency is, for example, a frequency used for wireless communication, specifically a frequency used for communication of a mobile phone terminal, and more specifically, 1920 MHz-1980 MHz Band I, 1850 MHz-1910 MHz Band II, 1710 MHz- Band III of 1785 MHz, Band IV of 1710 MHz-1755 MHz, Band V of 824 MHz-849 MHz, Band VI of 830 MHz-840 MHz, Band VIII of 880 MHz-915 MHz, and Band IX of 1749.9 MHz-1784.9 MHz.
 また、前記第1シリコン島領域の下方の前記絶縁膜と、前記受動回路の下方の前記絶縁膜と、前記電子部品の下方の前記絶縁膜とは、離間してもよい。 Further, the insulating film below the first silicon island region, the insulating film below the passive circuit, and the insulating film below the electronic component may be separated from each other.
 これにより、第1能動デバイスと受動回路と電子部品との分離度(いわゆる、アイソレーション特性)を高めることができ、半導体装置の高周波特性が向上する。 Thereby, the degree of isolation (so-called isolation characteristics) between the first active device, the passive circuit, and the electronic component can be increased, and the high-frequency characteristics of the semiconductor device are improved.
 また、前記絶縁膜は、前記絶縁基板上の全面に形成されていてもよい。 The insulating film may be formed on the entire surface of the insulating substrate.
 これにより、絶縁基板と絶縁膜との密着力を極めて強くすることができるので、絶縁膜の剥がれ等の問題が発生せず、量産時に安定な半導体装置を製造することができる。言い換えると、製造工程の歩留まりが向上する。さらに、この絶縁膜を厚く形成することによって、受動回路を構成する受動部品の高周波性能の1つの目安であるQ値を大きくすることができる。 As a result, the adhesion between the insulating substrate and the insulating film can be made extremely strong, so that problems such as peeling of the insulating film do not occur, and a stable semiconductor device can be manufactured during mass production. In other words, the yield of the manufacturing process is improved. Furthermore, by forming this insulating film thick, it is possible to increase the Q value, which is one measure of the high-frequency performance of the passive components constituting the passive circuit.
 また、前記半導体装置は、さらに、前記絶縁膜上に島状に形成され、第2能動デバイスが形成されたシリコン層である第2シリコン島領域を有し、前記第2能動デバイスは、前記半導体装置に接続されたアンテナと、前記所定の回路との接続及び非接続を選択的に切り替えるスイッチであってもよい。 The semiconductor device further includes a second silicon island region that is a silicon layer formed in an island shape on the insulating film and on which the second active device is formed, and the second active device includes the semiconductor A switch that selectively switches connection and disconnection between an antenna connected to the device and the predetermined circuit may be used.
 これにより、アンテナと接続されるスイッチを含む1つのモジュールとして実現できる。 This can be realized as a single module including a switch connected to the antenna.
 また、前記半導体装置は、さらに、前記絶縁膜上に島状に形成され、第3能動デバイスが形成されたシリコン層である第3シリコン島領域を有し、前記第3能動デバイスは、前記所定の回路を制御するためのマイコンであってもよい。 The semiconductor device further includes a third silicon island region that is a silicon layer formed in an island shape on the insulating film and on which a third active device is formed, and the third active device includes the predetermined active device. A microcomputer for controlling the circuit may be used.
 これにより、所定の回路を制御する制御回路を実現できる。例えば、制御回路としては、所定の回路の動作モード(例えば、通常モードと消費電力削減モード)を切り替える回路が挙げられる。また、半導体装置に実装される高周波スイッチの接続を切り替える回路や、送受信周波数の切り替える回路が挙げられる。 This makes it possible to realize a control circuit that controls a predetermined circuit. For example, the control circuit includes a circuit that switches an operation mode (for example, a normal mode and a power consumption reduction mode) of a predetermined circuit. Further, a circuit for switching connection of a high-frequency switch mounted on a semiconductor device and a circuit for switching a transmission / reception frequency can be given.
 また、前記第1能動デバイスは、トランジスタであり、前記マイコンは、前記トランジスタのバイアス電圧を制御するバイアス制御回路を有してもよい。 The first active device may be a transistor, and the microcomputer may include a bias control circuit that controls a bias voltage of the transistor.
 また、前記マイコンは、前記半導体装置に接続された外部機器とのインタ-フェース回路を有してもよい。 The microcomputer may have an interface circuit with an external device connected to the semiconductor device.
 また、前記電極は、前記絶縁基板の前記絶縁膜が形成された面と反対の面に形成され、前記半導体装置は、さらに、前記絶縁基板を貫通し、前記配線と前記電極とを接続する貫通電極を備えてもよい。 The electrode is formed on a surface of the insulating substrate opposite to the surface on which the insulating film is formed, and the semiconductor device further penetrates the insulating substrate and connects the wiring and the electrode. An electrode may be provided.
 これにより、一層小型化できる。 This makes it possible to further reduce the size.
 また、前記絶縁基板はサファイア基板であり、前記絶縁膜は二酸化シリコンであり、前記絶縁基板と前記シリコン島領域とは、前記絶縁膜を介して張り合わされていてもよい。 The insulating substrate may be a sapphire substrate, the insulating film may be silicon dioxide, and the insulating substrate and the silicon island region may be bonded to each other via the insulating film.
 これにより、接着剤等を用いることなく、絶縁基板とシリコン島領域とが絶縁膜を介して張り合わされているので、例えば、図11~図13の放熱用部材805のような放熱用部材が不要となり、より一層小型化できる。なお、シリコン島領域からの発熱は効率的に絶縁基板としてのサファイア基板に発散され、従来の半導体装置で必要であった放熱用部材を省略しても、何ら問題とはない。 As a result, since the insulating substrate and the silicon island region are bonded to each other through the insulating film without using an adhesive or the like, for example, a heat dissipating member such as the heat dissipating member 805 in FIGS. 11 to 13 is unnecessary. Thus, the size can be further reduced. The heat generated from the silicon island region is efficiently diffused to the sapphire substrate as the insulating substrate, and there is no problem even if the heat radiating member necessary for the conventional semiconductor device is omitted.
 また、絶縁基板とシリコン島領域とが絶縁膜を介して、密着させることで生ずるファンデルワールス結合や水素結合などを利用して貼り合せられているので、前述したようにその小型化と構成の簡略化が図れると共に、絶縁膜の剥がれなどがなく、半導体装置の量産時の安定性を増すことが可能となる。 In addition, since the insulating substrate and the silicon island region are bonded together by using van der Waals bonds, hydrogen bonds, etc., which are generated by bringing the insulating substrate and the silicon island region into close contact with each other. In addition to simplification, there is no peeling of the insulating film and the stability of the semiconductor device during mass production can be increased.
 本発明によると、所定の回路が構成された小型の半導体装置を実現できる。 According to the present invention, a small semiconductor device having a predetermined circuit can be realized.
図1は、実施の形態1に係る半導体装置の構成の一例を示す平面図である。FIG. 1 is a plan view showing an example of the configuration of the semiconductor device according to the first embodiment. 図2は、図1に示した半導体装置のA-A’線での断面図である。FIG. 2 is a cross-sectional view taken along line A-A ′ of the semiconductor device shown in FIG. 図3は、図1に示した半導体装置の等価回路を示す回路図である。FIG. 3 is a circuit diagram showing an equivalent circuit of the semiconductor device shown in FIG. 図4は、実施の形態2に係る半導体装置の構成の一例を示す平面図である。FIG. 4 is a plan view showing an example of the configuration of the semiconductor device according to the second embodiment. 図5は、図4に示した半導体装置のB-B’線での断面構造図である。FIG. 5 is a sectional structural view taken along line B-B ′ of the semiconductor device shown in FIG. 4. 図6は、実施の形態3に係る半導体装置の構成の一例を示す平面図である。FIG. 6 is a plan view showing an example of the configuration of the semiconductor device according to the third embodiment. 図7は、実施の形態4に係る半導体装置の構成の一例を示す平面図である。FIG. 7 is a plan view showing an example of the configuration of the semiconductor device according to the fourth embodiment. 図8は、実施の形態5に係る半導体装置の構成の一例を示す断面図である。FIG. 8 is a cross-sectional view showing an example of the configuration of the semiconductor device according to the fifth embodiment. 図9は、実施の形態6に係る半導体装置の構成の一例を示す平面図である。FIG. 9 is a plan view showing an example of the configuration of the semiconductor device according to the sixth embodiment. 図10は、図9に示した半導体装置の等価回路を示す回路図である。FIG. 10 is a circuit diagram showing an equivalent circuit of the semiconductor device shown in FIG. 図11は、従来の半導体装置の構造を示す平面図である。FIG. 11 is a plan view showing the structure of a conventional semiconductor device. 図12は、図11に示した従来の半導体装置において、放熱用部材を省略した状態の構成を示す平面図である。FIG. 12 is a plan view showing the configuration of the conventional semiconductor device shown in FIG. 11 with the heat dissipation member omitted. 図13は、図12に示した従来の半導体装置のX-X’線における断面図である。FIG. 13 is a cross-sectional view taken along line X-X ′ of the conventional semiconductor device shown in FIG. 図14は、従来の半導体装置の半導体チップの回路構成を示す回路ブロック図である。FIG. 14 is a circuit block diagram showing a circuit configuration of a semiconductor chip of a conventional semiconductor device.
 以下、本発明の実施形態に係る半導体装置について、図面を参照しながら詳細に説明する。なお、以下の説明において、共通する構成要素については、同一の参照番号又は記号を付して示す。また、図面の層や領域の厚さについては、明細書における説明を明確にするために誇張且つ簡略化されて表示されている。また、構造を分かりやすくするため透視図的に表記した場合もある。 Hereinafter, a semiconductor device according to an embodiment of the present invention will be described in detail with reference to the drawings. In the following description, common components are denoted by the same reference numerals or symbols. The thicknesses of layers and regions in the drawings are exaggerated and simplified for the sake of clarity in the specification. In some cases, the structure is shown in a perspective view for easy understanding.
 (実施の形態1)
 本実施の形態に係る半導体装置は、絶縁基板と、前記絶縁基板上に形成された絶縁膜と、前記絶縁膜上に島状に形成され、第1能動デバイスが形成されたシリコン層である第1シリコン島領域と、前記第1シリコン島領域外に形成された受動回路を有する受動回路領域と、前記第1シリコン島領域外かつ前記受動回路領域外に形成された電極と、前記電極上に搭載された電子部品と、前記第1能動デバイス、前記受動回路及び前記電極を接続するための配線とを備え、前記第1能動デバイス、前記受動回路、前記電子部品及び前記配線は、所定の回路を構成する。
(Embodiment 1)
The semiconductor device according to the present embodiment includes an insulating substrate, an insulating film formed on the insulating substrate, and a silicon layer formed in an island shape on the insulating film and having a first active device formed thereon. A silicon island region; a passive circuit region having a passive circuit formed outside the first silicon island region; an electrode formed outside the first silicon island region and outside the passive circuit region; and on the electrode An electronic component mounted thereon; and a wiring for connecting the first active device, the passive circuit, and the electrode. The first active device, the passive circuit, the electronic component, and the wiring include a predetermined circuit. Configure.
 これにより、所定の回路が構成された小型の半導体装置を実現できる。 Thereby, a small semiconductor device in which a predetermined circuit is configured can be realized.
 以下、本発明の実施の形態1の半導体装置について、図1~図3を参照しながら説明する。 Hereinafter, the semiconductor device according to the first embodiment of the present invention will be described with reference to FIGS.
 図1は、実施の形態1に係る半導体装置の構成の一例を示す平面図であり、図2は図1に示した半導体装置のA-A’線での断面図であり、図3は図1に示した半導体装置の等価回路を示す回路図である。 1 is a plan view showing an example of the configuration of the semiconductor device according to the first embodiment, FIG. 2 is a cross-sectional view of the semiconductor device shown in FIG. 1, taken along the line AA ′, and FIG. 2 is a circuit diagram showing an equivalent circuit of the semiconductor device shown in FIG.
 図1及び図2に示す半導体装置100は、高周波回路が構成され、例えば携帯電話に用いられる受信用の半導体装置であって、絶縁基板101と、絶縁膜102a~102cと、シリコン島領域103と、第1配線層108と、ゲート酸化膜105と、層間絶縁膜107と、第2配線層104と、接合材109と、電極パッドP1~P5、P_G1~P_G3、RFin、P_Vdd、RFout1及びRFout2、SAW(Surface Acoustic Wave)フィルターSAWとを有し、図3に示すような、トランジスタTrと、キャパシターCと、SAWフィルターSAWとを含む高周波回路を実現する。なお、トランジスタTrは本発明の第1能動デバイスであり、キャパシターCは本発明の受動回路であり、SAWフィルターSAWは本発明の電子部品である。また、図1において、SAWフィルターSAWは下に位置する電極構成が見やすくなるように半透視図的に表記されている。 A semiconductor device 100 shown in FIGS. 1 and 2 has a high-frequency circuit and is a receiving semiconductor device used for, for example, a mobile phone. The semiconductor device 100 includes an insulating substrate 101, insulating films 102a to 102c, a silicon island region 103, and the like. First wiring layer 108, gate oxide film 105, interlayer insulating film 107, second wiring layer 104, bonding material 109, electrode pads P1 to P5, P_G1 to P_G3, RFin, P_Vdd, RFout1 and RFout2, A high frequency circuit having a SAW (Surface Acoustic Wave) filter SAW and including a transistor Tr, a capacitor C, and a SAW filter SAW as shown in FIG. 3 is realized. The transistor Tr is the first active device of the present invention, the capacitor C is the passive circuit of the present invention, and the SAW filter SAW is the electronic component of the present invention. In FIG. 1, the SAW filter SAW is shown in a semi-transparent view so that the electrode configuration located below can be easily seen.
 絶縁基板101は、例えば、平面サイズが1×2mm程度のサファイア基板である。 The insulating substrate 101 is, for example, a sapphire substrate having a planar size of about 1 × 2 mm.
 絶縁膜102a~102cのそれぞれは、絶縁基板101上に島状に形成されている。具体的には、絶縁基板101としてのサファイア基板の主面側の所定の位置に形成された、例えば、二酸化シリコン膜である。 Each of the insulating films 102 a to 102 c is formed in an island shape on the insulating substrate 101. Specifically, it is, for example, a silicon dioxide film formed at a predetermined position on the main surface side of the sapphire substrate as the insulating substrate 101.
 シリコン島領域103は、本発明の第1シリコン島領域であって、絶縁膜102a上に形成され、上面側にトランジスタTrが形成されている。つまり、一部の絶縁膜102a~102cの上部にはシリコン島領域103が残され、例えばMOS(Metal-Oxide-Silicon)型のトランジスタTrが形成されている。 The silicon island region 103 is the first silicon island region of the present invention, and is formed on the insulating film 102a, and the transistor Tr is formed on the upper surface side. In other words, the silicon island region 103 is left above the insulating films 102a to 102c, and, for example, a MOS (Metal-Oxide-Silicon) type transistor Tr is formed.
 第1配線層108の一部は、MOS型のトランジスタTrのソース電極Sやドレイン電極Dやゲート電極Gとして用いられ、材料としては低抵抗のポリシリコンなどが用いられる。具体的には、ゲート酸化膜105の上部に配置された第1配線層108は、MOS型のトランジスタTrのゲート電極Gとなる。また、第1配線層108の他の一部は、キャパシターCの一方の電極として用いられる。 A part of the first wiring layer 108 is used as the source electrode S, the drain electrode D, and the gate electrode G of the MOS transistor Tr, and the material is low resistance polysilicon or the like. Specifically, the first wiring layer 108 disposed on the gate oxide film 105 becomes the gate electrode G of the MOS transistor Tr. The other part of the first wiring layer 108 is used as one electrode of the capacitor C.
 ゲート酸化膜105は、例えば二酸化シリコン(SiO)であり、ゲート電極Gとシリコン島領域103との間に介在する。 The gate oxide film 105 is, for example, silicon dioxide (SiO 2 ), and is interposed between the gate electrode G and the silicon island region 103.
 層間絶縁膜107は、例えばSiOであり、絶縁膜102b上の第1配線層108と、絶縁膜102b上方の第2配線層104との間に介在する。これにより、絶縁膜102b上の第1配線層108と、層間絶縁膜107と、絶縁膜102b上方の第2配線層104とにより、キャパシターCが実現される。つまり、このキャパシターCは、MIM(Metal Insulator Metal)キャパシターである。 The interlayer insulating film 107 is, for example, SiO 2 and is interposed between the first wiring layer 108 on the insulating film 102b and the second wiring layer 104 above the insulating film 102b. Thus, the capacitor C is realized by the first wiring layer 108 on the insulating film 102b, the interlayer insulating film 107, and the second wiring layer 104 above the insulating film 102b. That is, the capacitor C is a MIM (Metal Insulator Metal) capacitor.
 第2配線層104は、MOS型のトランジスタTrから外部への引き出し電極やそれぞれの回路要素を相互に接続し、所定の回路を形成するための、例えばアルミニウム材料が用いられる。本発明の実施の形態1において、回路要素とは、前述したMOS型のトランジスタTrとMIM(Metal-Insulator-Metal)キャパシターCと、絶縁基板101の上部に設けられた所定の電極P1~P5に搭載される電子部品であるSAWフィルターSAWとである。つまり、第2配線層104は、本発明の配線であって、トランジスタTrと、キャパシターCと、SAWフィルターSAWとを接続する。また、トランジスタTrと、キャパシターCと、SAWフィルターSAWと、第2配線層104とは、例えば携帯電話の受信回路のような所定の回路を構成する。 The second wiring layer 104 is made of, for example, an aluminum material for connecting a lead-out electrode from the MOS transistor Tr to the outside and each circuit element to form a predetermined circuit. In the first embodiment of the present invention, circuit elements include the above-described MOS transistor Tr, MIM (Metal-Insulator-Metal) capacitor C, and predetermined electrodes P1 to P5 provided on the insulating substrate 101. It is a SAW filter SAW which is an electronic component to be mounted. That is, the second wiring layer 104 is the wiring of the present invention, and connects the transistor Tr, the capacitor C, and the SAW filter SAW. Further, the transistor Tr, the capacitor C, the SAW filter SAW, and the second wiring layer 104 constitute a predetermined circuit such as a receiving circuit of a mobile phone, for example.
 接合材109は、電極パッドP1~P5に、SAWフィルターSAWを電気的及び物理的に接続する、例えば半田である。具体的には、接合材109は、SAWフィルターSAWの部品電極110と電極パッドP1~P5とを接続する。 The bonding material 109 is, for example, solder that electrically and physically connects the SAW filter SAW to the electrode pads P1 to P5. Specifically, the bonding material 109 connects the component electrode 110 of the SAW filter SAW and the electrode pads P1 to P5.
 電極パッドP1~P5は、本発明の電極に相当し、シリコン島領域103外かつ受動回路領域外に形成されている。 The electrode pads P1 to P5 correspond to the electrodes of the present invention and are formed outside the silicon island region 103 and outside the passive circuit region.
 ここで、本実施の形態において、受動回路領域とは、コンデンサCが形成されている領域であり、特定的には、コンデンサCを構成する層間絶縁膜107が形成されている領域である。 Here, in the present embodiment, the passive circuit region is a region where the capacitor C is formed, and specifically, a region where the interlayer insulating film 107 constituting the capacitor C is formed.
 電極パッドP_G1~P_G3、RFin、P_Vdd、RFout1及びRFout2は、半導体装置100の外部接続用の電極パッドである。半導体装置100とパッケージとの組立工程において、これらの電極パッドP_G1~P_G3、RFin、P_Vdd、RFout1及びRFout2にボンディングワイヤーを打ってパッケージなどに接続する。具体的には、電極パッドP_G1~P_G3はグランドに接続されたグランド端子であり、電極パッドP_Vddは電圧Vddが供給される電源端子であり、電極パッドRFinは半導体装置100と接続されたアンテナで受信された受信信号が入力される半導体装置100の入力端子であり、電極パッドRFout1及び電極パッドRFout2は半導体装置100の出力端子である。 The electrode pads P_G1 to P_G3, RFin, P_Vdd, RFout1 and RFout2 are electrode pads for external connection of the semiconductor device 100. In the assembling process of the semiconductor device 100 and the package, bonding wires are formed on these electrode pads P_G1 to P_G3, RFin, P_Vdd, RFout1 and RFout2 to connect to the package or the like. Specifically, the electrode pads P_G1 to P_G3 are ground terminals connected to the ground, the electrode pad P_Vdd is a power supply terminal to which the voltage Vdd is supplied, and the electrode pad RFin is received by an antenna connected to the semiconductor device 100. The received signal is input to the semiconductor device 100, and the electrode pad RFout1 and the electrode pad RFout2 are output terminals of the semiconductor device 100.
 SAWフィルターSAWは、バランス出力型のSAWフィルターであり、電極パッドP1及び接合材109を介して入力される不平衡の高周波信号のノイズを除去し、ノイズが除去された平衡な高周波信号を出力する。このSAWフィルターSAWは、半導体装置100のSAWフィルターSAW以外の各回路要素が構成された後に、マウンターと呼ばれる電子部品高速実装機により実装される。 The SAW filter SAW is a balanced output type SAW filter, which removes noise from an unbalanced high-frequency signal input via the electrode pad P1 and the bonding material 109, and outputs a balanced high-frequency signal from which the noise has been removed. . This SAW filter SAW is mounted by an electronic component high-speed mounting machine called a mounter after each circuit element other than the SAW filter SAW of the semiconductor device 100 is configured.
 以上のように構成された半導体装置100により、図3に示す受信回路が実現される。ここで、図3に示す受信回路について、簡単に説明する。 3 is implemented by the semiconductor device 100 configured as described above. Here, the receiving circuit shown in FIG. 3 will be briefly described.
 トランジスタTrは、ゲートが電極パッドRFinに接続され、ソースが電極パッドP_G1に接続され、ドレインがキャパシターCの一端に接続されている。なお、ドレインは電極パッドVddにも接続されている。つまり、このトランジスタはソース接地の増幅トランジスタであり、例えばLNA(Low Noise Amplifier)である。 The transistor Tr has a gate connected to the electrode pad RFin, a source connected to the electrode pad P_G1, and a drain connected to one end of the capacitor C. The drain is also connected to the electrode pad Vdd. In other words, this transistor is a source-grounded amplification transistor, for example, LNA (LowLNoise Amplifier).
 トランジスタTrで増幅された高周波信号は、キャパシターCで直流成分がカットされ、SAWフィルターSAWに入力される。 The DC component of the high frequency signal amplified by the transistor Tr is cut by the capacitor C and input to the SAW filter SAW.
 ここで、SAWフィルターSAWに入力された高周波信号は不平衡であり、SAWフィルターSAWでノイズが除去され、電極パッドRFout1及びRFout2から平衡な高周波信号となって出力される。つまり、バランス出力される。 Here, the high-frequency signal input to the SAW filter SAW is unbalanced, noise is removed by the SAW filter SAW, and the balanced high-frequency signal is output from the electrode pads RFout1 and RFout2. That is, balanced output is performed.
 このように、半導体装置100により実現される受信回路は、入力された高周波信号の増幅及びノイズ除去及を行い、バランス出力する。 As described above, the receiving circuit realized by the semiconductor device 100 amplifies the input high frequency signal, removes noise, and outputs a balanced output.
 以上のように、本実施の形態に係る半導体装置100は、絶縁基板101と、絶縁基板101上に形成された絶縁膜102a~102cと、絶縁膜102a上に島状に形成され、トランジスタTrが形成されたシリコン層であるシリコン島領域103と、シリコン島領域103外に形成されたキャパシターCを有する受動回路領域と、シリコン島領域103外かつ受動回路領域外に形成された電極パッドP1~P5と、電極パッドP1~P5上に搭載されたSAWフィルターSAWと、トランジスタTr、キャパシターC及び電極パッドP1~P5を接続するための第2配線層104とを備え、トランジスタTr、キャパシターC、SAWフィルターSAW及び第2配線層104は、受信回路を構成する。 As described above, the semiconductor device 100 according to this embodiment includes the insulating substrate 101, the insulating films 102a to 102c formed on the insulating substrate 101, the island shape on the insulating film 102a, and the transistor Tr. A silicon island region 103 which is a formed silicon layer, a passive circuit region having a capacitor C formed outside the silicon island region 103, and electrode pads P1 to P5 formed outside the silicon island region 103 and outside the passive circuit region And a SAW filter SAW mounted on the electrode pads P1 to P5 and a second wiring layer 104 for connecting the transistor Tr, the capacitor C, and the electrode pads P1 to P5, the transistor Tr, the capacitor C, and the SAW filter The SAW and the second wiring layer 104 constitute a receiving circuit.
 これにより、本実施の形態に係る半導体装置100は、受信回路が構成された極めて小型化な半導体装置として実現できる。例えば、半導体装置100の大きさを図1の平面図において1mm×2mm程度とできる。 Thereby, the semiconductor device 100 according to the present embodiment can be realized as an extremely small semiconductor device having a receiving circuit. For example, the size of the semiconductor device 100 can be about 1 mm × 2 mm in the plan view of FIG.
 即ち、絶縁基板101上の所定の場所に位置する絶縁膜102a上にシリコン島領域103があり、またシリコン島領域103外にキャパシターCが形成されている領域である受動回路領域がある。これらのシリコン島領域103及び受動回路領域は、絶縁基板101上に形成された一体物であり、半導体のプロセス技術で加工できるので、極めて小さく数十ミクロンの単位で作りこむことができる。つまり、上述したようにキャパシターCなどを半導体のプロセス技術で製造できるので、従来はプリント基板に搭載していた部品をシリコン島領域及び受動回路領域が形成された絶縁基板101に搭載でき、例えば携帯電話の1つの通信モジュールとして実現できる。 That is, there is a silicon island region 103 on the insulating film 102 a located at a predetermined location on the insulating substrate 101, and there is a passive circuit region where the capacitor C is formed outside the silicon island region 103. The silicon island region 103 and the passive circuit region are an integrated object formed on the insulating substrate 101 and can be processed by a semiconductor process technique, so that the silicon island region 103 and the passive circuit region can be formed in units of several tens of microns. That is, as described above, the capacitor C and the like can be manufactured by a semiconductor process technology, so that components conventionally mounted on a printed circuit board can be mounted on the insulating substrate 101 in which the silicon island region and the passive circuit region are formed. It can be realized as one communication module of a telephone.
 言い換えると、半導体装置100において、SAWフィルターSAWは、従来のプリント基板上ではなく、絶縁基板101上に搭載されている。つまり、半導体装置100は、従来の半導体装置と同程度の大きさで、従来はプリント基板に搭載していた部品を搭載した通信モジュールを実現できる可能性がある。例えば、プリント基板に搭載していた部品とは、SAWフィルターSAW以外に、携帯電話のセットでよく使われるバンドパスフィルターやアンテナ共用器やアイソレーターである。 In other words, in the semiconductor device 100, the SAW filter SAW is mounted on the insulating substrate 101 instead of the conventional printed circuit board. In other words, the semiconductor device 100 has the same size as that of a conventional semiconductor device, and there is a possibility that a communication module on which components conventionally mounted on a printed circuit board are mounted can be realized. For example, components mounted on a printed circuit board include a band pass filter, an antenna duplexer, and an isolator often used in a mobile phone set in addition to the SAW filter SAW.
 また、本実施の形態に係る半導体装置100において、絶縁基板101はサファイア基板であり、絶縁膜102a~102cは二酸化シリコンであり、絶縁基板101とシリコン島領域103とは、絶縁膜102aを介して張り合わされている。 In the semiconductor device 100 according to the present embodiment, the insulating substrate 101 is a sapphire substrate, the insulating films 102a to 102c are silicon dioxide, and the insulating substrate 101 and the silicon island region 103 are interposed via the insulating film 102a. It is stuck together.
 これにより、接着剤等を用いることなく、絶縁基板101とシリコン島領域103とが絶縁膜102aを介して張り合わされているので、例えば、図11~図13の放熱用部材805のような放熱用部材が不要となり、より一層小型化できる。なお、シリコン島領域103からの発熱は効率的に絶縁基板101に発散され、従来の半導体装置で必要であった放熱用部材を省略しても、何ら問題とはない。 Accordingly, since the insulating substrate 101 and the silicon island region 103 are bonded to each other through the insulating film 102a without using an adhesive or the like, for example, a heat radiating member such as the heat radiating member 805 in FIGS. A member becomes unnecessary and it can further reduce in size. Note that the heat generated from the silicon island region 103 is efficiently diffused to the insulating substrate 101, and there is no problem even if the heat radiating member necessary for the conventional semiconductor device is omitted.
 また、本実施の形態に係る半導体装置100において、絶縁膜102aと、絶縁膜102bと、絶縁膜102cとは、互いに離間している。これにより、トランジスタTrとキャパシターCとSAWフィルターSAWとの分離度を高めることができ、半導体装置100の高周波特性が向上する。 In addition, in the semiconductor device 100 according to the present embodiment, the insulating film 102a, the insulating film 102b, and the insulating film 102c are separated from each other. Thereby, the degree of separation between the transistor Tr, the capacitor C, and the SAW filter SAW can be increased, and the high frequency characteristics of the semiconductor device 100 are improved.
 ここで、絶縁基板101とシリコン島領域103とを絶縁膜102aを介して張り合わせる方法について説明する。具体的には、絶縁基板101と、表面が酸化されたことにより表面にSiOを有するシリコン基板とを貼り合せる方法としては、絶縁基板101とシリコン基板とを密着させることで生ずる水素結合やファンデルワールス結合などを利用し結合させ貼り合せる。そして、張り合わせた後に、不要な領域のシリコン材料及び不要な領域のSiOを除去し、所定の回路を構成するのに必要なSiOである絶縁膜102a~102cとシリコン島領域103とを局所的に残す。 Here, a method of bonding the insulating substrate 101 and the silicon island region 103 through the insulating film 102a will be described. Specifically, as a method of bonding the insulating substrate 101 and a silicon substrate having SiO 2 on the surface because the surface is oxidized, hydrogen bonding or a fan generated by bringing the insulating substrate 101 and the silicon substrate into close contact with each other can be used. Bond and bond using Delwars bond. Then, after bonding, the silicon material in the unnecessary region and the SiO 2 in the unnecessary region are removed, and the insulating films 102a to 102c and the silicon island region 103, which are SiO 2 necessary for forming a predetermined circuit, are locally formed. Leave behind.
 以上のような方法により、絶縁基板101とシリコン島領域103とを絶縁膜102aを介して張り合わせることができる。 By the above method, the insulating substrate 101 and the silicon island region 103 can be bonded to each other via the insulating film 102a.
 上述したように、絶縁膜102a~102cを局所的に残す理由は、例えばMOS型のトランジスタTrとMIMのキャパシターCとの分離度を高めて電磁界による相互作用を極めて少なくして誤動作を少なくする為である。電磁界による相互作用が低い、つまり独立した回路要素を、第1配線層108や第2配線層104を用い相互に電気的に接続することで、理想状態に近い状態で高周波回路を動作させることができるようになる。 As described above, the reason why the insulating films 102a to 102c are left locally is that, for example, the degree of isolation between the MOS transistor Tr and the capacitor C of the MIM is increased, the interaction due to the electromagnetic field is extremely reduced, and the malfunction is reduced. Because of that. A high-frequency circuit can be operated in a state close to an ideal state by electrically connecting independent circuit elements having low interaction due to an electromagnetic field, that is, independent circuit elements using the first wiring layer 108 and the second wiring layer 104. Will be able to.
 (実施の形態2)
 実施の形態2に係る半導体装置は、実施の形態1に係る半導体装置100とほぼ同じであるが、絶縁膜が絶縁基板上の全面に形成されている点が異なる。以下、本実施の形態に係る半導体装置について、実施の形態1に係る半導体装置100と異なる点を中心に説明する。
(Embodiment 2)
The semiconductor device according to the second embodiment is substantially the same as the semiconductor device 100 according to the first embodiment, except that an insulating film is formed on the entire surface of the insulating substrate. Hereinafter, the semiconductor device according to the present embodiment will be described focusing on differences from the semiconductor device 100 according to the first embodiment.
 次に、本発明の実施の形態2に係る半導体装置について、図4及び図5を参照しながら説明する。図4は、実施の形態2に係る半導体装置の構成の一例を示す平面図であり、図5は図4に示した半導体装置のB-B’線での断面図である。 Next, a semiconductor device according to the second embodiment of the present invention will be described with reference to FIGS. 4 is a plan view showing an example of the configuration of the semiconductor device according to the second embodiment, and FIG. 5 is a cross-sectional view taken along line B-B ′ of the semiconductor device shown in FIG. 4.
 図4及び図5に示した本実施の形態に係る半導体装置200は、図1~図3に示した実施の形態1に係る半導体装置100とほぼ同じであるが、絶縁膜102a~102cに代わり、絶縁基板101の主面側のほぼ全面に形成された絶縁膜202を有し、この絶縁膜202上にシリコン島領域103が位置している点が異なる。 The semiconductor device 200 according to the present embodiment shown in FIGS. 4 and 5 is substantially the same as the semiconductor device 100 according to the first embodiment shown in FIGS. 1 to 3, but instead of the insulating films 102a to 102c. The difference is that an insulating film 202 is formed on almost the entire main surface of the insulating substrate 101, and the silicon island region 103 is located on the insulating film 202.
 これにより、本実施の形態に係る半導体装置200は、絶縁基板と絶縁膜との密着力を極めて強くすることができるので、絶縁膜の剥がれ等の問題が発生せず、量産時に安定な半導体装置を製造することができる。言い換えると、製造工程の歩留まりが向上する。さらに、この絶縁膜を厚く形成することによって、受動回路を構成する受動部品の高周波性能の1つの目安であるQ値を大きくすることができる。 As a result, the semiconductor device 200 according to the present embodiment can extremely increase the adhesion between the insulating substrate and the insulating film, so that the problem such as peeling of the insulating film does not occur and the semiconductor device is stable during mass production. Can be manufactured. In other words, the yield of the manufacturing process is improved. Furthermore, by forming this insulating film thick, it is possible to increase the Q value, which is one measure of the high-frequency performance of the passive components constituting the passive circuit.
 具体的には、絶縁基板101と、表面が酸化されたことにより表面にSiOを有するシリコン基板とを貼り合せた後に、不要なシリコン材料を除去し、SiOを絶縁基板101のほぼ全面に残すと共にシリコン島領域103を局所的に残す。このように全面に残されたSiOが絶縁膜202となる。 Specifically, after the insulating substrate 101 and a silicon substrate having SiO 2 on the surface due to oxidation of the surface are bonded together, unnecessary silicon material is removed, and SiO 2 is applied to almost the entire surface of the insulating substrate 101. At the same time, the silicon island region 103 is left locally. Thus, the SiO 2 remaining on the entire surface becomes the insulating film 202.
 絶縁膜202を絶縁基板101のほぼ全面に残すことにより、上述した絶縁基板101から絶縁膜202の剥がれを低減できることに加えて、次のような効果がある。第1配線層108及び第2配線層104と絶縁基板101との密着度より、第1配線層108及び第2配線層104と絶縁膜202との密着度の方が強い。よって、半導体プロセス途中での第1配線層108及び第2配線層104の剥がれ現象がなくなる。 In addition to reducing the peeling of the insulating film 202 from the insulating substrate 101 by leaving the insulating film 202 almost on the entire surface of the insulating substrate 101, the following effects can be obtained. The degree of adhesion between the first wiring layer 108 and the second wiring layer 104 and the insulating film 202 is stronger than the degree of adhesion between the first wiring layer 108 and the second wiring layer 104 and the insulating substrate 101. Therefore, the first wiring layer 108 and the second wiring layer 104 are not peeled off during the semiconductor process.
 (実施の形態3)
 本実施の形態に係る半導体装置は、実施の形態1に係る複数の半導体装置100を有し、さらに、絶縁膜上に島状に形成され、第2能動デバイスが形成されたシリコン層である第2シリコン島領域を有し、第2能動デバイスは、半導体装置に接続されたアンテナと、所定の回路との接続及び非接続とを選択的に切り替えるスイッチである。さらに、本実施の形態に係る半導体装置は、絶縁膜上に島状に形成され、第3能動デバイスが形成されたシリコン層である第3シリコン島領域を有し、第3能動デバイスは、所定の回路を制御するためのマイコンである。
(Embodiment 3)
The semiconductor device according to the present embodiment includes a plurality of semiconductor devices 100 according to the first embodiment, and is a silicon layer that is formed in an island shape on the insulating film and has a second active device. The second active device is a switch that selectively switches between connection and disconnection of an antenna connected to the semiconductor device and a predetermined circuit. Furthermore, the semiconductor device according to the present embodiment has a third silicon island region that is a silicon layer formed in an island shape on the insulating film and on which the third active device is formed. This is a microcomputer for controlling the circuit.
 次に、本発明の実施の形態3に係る半導体装置について、図6を参照しながら説明する。 Next, a semiconductor device according to Embodiment 3 of the present invention will be described with reference to FIG.
 図6は、実施の形態3に係る半導体装置の構成の一例を示す平面図である。なお、同図には、半導体装置300に接続されるアンテナANTも示されている。 FIG. 6 is a plan view showing an example of the configuration of the semiconductor device according to the third embodiment. In the figure, an antenna ANT connected to the semiconductor device 300 is also shown.
 図6に示す半導体装置300は、図1に示した本発明の実施の形態1に係る半導体装置100と類似の構成を有する受信回路Rx1~Rx3と、高周波スイッチ機能ブロック313が形成されたシリコン島領域311と、マイコンブロック314が形成されたシリコン島領域312と、絶縁膜302aと、絶縁膜302bとを有する。 A semiconductor device 300 shown in FIG. 6 includes a silicon island in which receiving circuits Rx1 to Rx3 having a configuration similar to that of the semiconductor device 100 according to the first embodiment of the invention shown in FIG. A region 311, a silicon island region 312 in which the microcomputer block 314 is formed, an insulating film 302 a, and an insulating film 302 b are included.
 受信回路Rx1~Rx3は、互いに受信周波数が異なる。即ち、本発明の実施の形態1に係る半導体装置100と類似の3系統の異なる周波数の受信系である。 The reception circuits Rx1 to Rx3 have different reception frequencies. That is, it is a reception system with three different frequencies similar to the semiconductor device 100 according to the first embodiment of the present invention.
 高周波スイッチ機能ブロック313は、本発明の第2能動デバイスであって、アンテナANTと、受信回路Rx1~Rx3のいずれかとを選択的に接続する。つまり、これらの3系統を切り替える。この高周波スイッチ機能ブロック313は、絶縁膜302a上に島状に形成されたシリコン層であるシリコン島領域に形成されている。なお、高周波スイッチ機能ブロック313が形成されたシリコン島領域311は、本発明の第2シリコン島領域に相当する。 The high-frequency switch functional block 313 is a second active device of the present invention, and selectively connects the antenna ANT and any of the receiving circuits Rx1 to Rx3. That is, these three systems are switched. The high-frequency switch functional block 313 is formed in a silicon island region that is a silicon layer formed in an island shape on the insulating film 302a. The silicon island region 311 in which the high frequency switch functional block 313 is formed corresponds to the second silicon island region of the present invention.
 マイコンブロック314は、本発明の第3能動デバイスに相当し、外部とのデーターのやり取りや命令コマンドを受け取り、実行する。具体的には、このマイコンブロック314は、本発明のマイコンに相当し、受信回路Rx1~Rx3を制御する。具体的には、外部とのデーターのやり取りや命令コマンドを受け取る、本発明のインターフェース回路に相当するインターフェース回路機能と、高周波スイッチの切り替えや受信周波数の選択などを行なう機能制御回路機能と、回路の動作モード切り替え(例えば消費電力を抑えるモードや動作電圧の昇降圧や電源のオン/オフなど)を行なう、本発明のバイアス制御回路に相当するバイアス制御回路機能と、コマンドや周波数情報をデーターとして一時的に保存したり呼び出したりできる記憶機能を有している。つまり、マイコンブロック314は、半導体装置300に接続された外部機器とのインターフェース回路と、受信回路Rx1~Rx3のトランジスタTr1~Tr3のバイアス電圧を制御するバイアス制御回路を有する。 The microcomputer block 314 corresponds to the third active device of the present invention, and receives and executes data exchange and command commands with the outside. Specifically, the microcomputer block 314 corresponds to the microcomputer of the present invention and controls the receiving circuits Rx1 to Rx3. Specifically, an interface circuit function corresponding to the interface circuit of the present invention that receives data exchange and command commands from the outside, a function control circuit function that performs switching of a high frequency switch, selection of a reception frequency, and the like, A bias control circuit function corresponding to the bias control circuit of the present invention for switching operation modes (for example, a mode for suppressing power consumption, raising / lowering the operation voltage, turning on / off the power supply, etc.), and temporarily using commands and frequency information as data. It has a memory function that can be saved and recalled automatically. That is, the microcomputer block 314 includes an interface circuit with external devices connected to the semiconductor device 300 and a bias control circuit that controls the bias voltages of the transistors Tr1 to Tr3 of the receiving circuits Rx1 to Rx3.
 このマイコンブロック314からは、アンテナ制御信号線341が引き出されて高周波スイッチ機能ブロック313に接続され、高周波スイッチの切り替えがこのアンテナ制御信号線341を介して行われる。このマイコンブロック314は、絶縁膜302b上に島状に形成されたシリコン層であるシリコン島領域312に形成されている。なお、マイコンブロック314が形成されたシリコン島領域は、本発明の第3シリコン島領域に相当する。 From the microcomputer block 314, an antenna control signal line 341 is drawn out and connected to the high frequency switch function block 313, and the switching of the high frequency switch is performed via the antenna control signal line 341. The microcomputer block 314 is formed in a silicon island region 312 which is a silicon layer formed in an island shape on the insulating film 302b. The silicon island region where the microcomputer block 314 is formed corresponds to the third silicon island region of the present invention.
 次に、本実施の形態に係る半導体装置300の動作について説明する。なお、図6において、アンテナANTは、例えば第1周波数と第2周波数と第3周波数との3つの周波数を同時に受信できる能力を持つと想定している。 Next, the operation of the semiconductor device 300 according to the present embodiment will be described. In FIG. 6, it is assumed that the antenna ANT has a capability of simultaneously receiving three frequencies, for example, a first frequency, a second frequency, and a third frequency.
 アンテナANTで受信された高周波信号は、本実施の形態の半導体装置300のアンテナ端子SWaに入力される。 The high frequency signal received by the antenna ANT is input to the antenna terminal SWa of the semiconductor device 300 of the present embodiment.
 高周波スイッチ機能ブロック313のアンテナ端子SWaは、例えば図6の例では第2周波数のバンドを増幅する受信回路Rx2と接続されている。よって、アンテナ端子SWaに入力された高周波信号は、高周波第2入力信号線352を介して、この場合ソース接地のトランジスタTr2のゲート端子に入力される。 The antenna terminal SWa of the high-frequency switch functional block 313 is connected to the receiving circuit Rx2 that amplifies the second frequency band in the example of FIG. Therefore, the high-frequency signal input to the antenna terminal SWa is input to the gate terminal of the source-grounded transistor Tr2 in this case via the high-frequency second input signal line 352.
 トランジスタTr2のゲート端子に入力された高周波信号は、トランジスタTr2で増幅され、トランジスタTr2のドレイン端子から出力される。トランジスタで増幅された信号はトランジスタのドレイン端子からDC電流を阻止するキャパシターを介して、バランス出力型のSAWフィルターSAW2に入力される。 The high-frequency signal input to the gate terminal of the transistor Tr2 is amplified by the transistor Tr2 and output from the drain terminal of the transistor Tr2. The signal amplified by the transistor is input from a drain terminal of the transistor to a balanced output type SAW filter SAW2 through a capacitor that blocks a DC current.
 SAWフィルターSAW2に入力された高周波信号は所定のバンド幅でフィルタリングされ、第2バランス型出力端子RFout21とRFout22に出力される。 The high-frequency signal input to the SAW filter SAW2 is filtered with a predetermined bandwidth and is output to the second balanced output terminals RFout21 and RFout22.
 なお、端子GND21及びGND22は、バランス出力するときの、受信回路Rx2の共通接地端子である。また、トランジスタTr2のゲート電極には、第2ゲートバイアス線322を介してゲートの直流バイアスが印加される。同様に、トランジスタTr2のドレイン電極にはドレインバイアス線320を介してドレインの直流バイアスが印加される。これらのゲート電極とドレイン電極とに印加されるDCバイアスは、マイコンブロック314で制御される。 Note that the terminals GND21 and GND22 are common ground terminals of the receiving circuit Rx2 when performing balanced output. Further, a DC bias of the gate is applied to the gate electrode of the transistor Tr2 via the second gate bias line 322. Similarly, a DC bias of the drain is applied to the drain electrode of the transistor Tr2 via the drain bias line 320. The DC bias applied to these gate electrode and drain electrode is controlled by the microcomputer block 314.
 アンテナANTと各バンドに対応する受信回路Rx1~Rx3との接続の切り替えは、アンテナ制御信号線341を介して、マイコンブロック314により制御される。 Switching of connection between the antenna ANT and the receiving circuits Rx1 to Rx3 corresponding to each band is controlled by the microcomputer block 314 via the antenna control signal line 341.
 なお、上記では、第2周波数の受信回路Rx2を動作させる場合の半導体装置300の動作について説明したが、第1周波数の受信回路Rx3及び第3周波数の受信回路Rx3を動作させる場合の動作についても、ほぼ同じである。 In the above description, the operation of the semiconductor device 300 when operating the second-frequency receiving circuit Rx2 has been described. However, the operation when operating the first-frequency receiving circuit Rx3 and the third-frequency receiving circuit Rx3 is also performed. Is almost the same.
 具体的には、第1周波数の受信回路Rx1を動作させる場合には、高周波スイッチ機能ブロック313のスイッチを高周波第1入力信号線351に繋がるように切り替え、トランジスタTr1のゲートに高周波信号を入力する。この場合も、第1ゲートバイアス線321とドレインバイアス線320により、トランジスタTr1のバイアス点が設定され増幅動作をする。この場合、SAWフィルターSAW2でフィルタリングされた信号は、第1バランス型出力端子RFout11とRFout12から出力されるのである。端子GND11及びGND12は、バランス出力するときの、受信回路Rx1の共通接地端子である。同様に、第3周波数の受信回路Rx3を動作させる場合には、高周波スイッチ機能ブロック313のスイッチを高周波第3入力信号線353に繋がるように切り替え、トランジスタTr3のゲートに高周波信号を入力する。この場合も、第3ゲートバイアス線323とドレインバイアス線320により、トランジスタTr3のバイアス点が設定され増幅動作をする。この場合、SAWフィルターSAW3でフィルタリングされた信号は、第3バランス型出力端子RFout31とRFout32から出力される。端子GND31及びGND32は、バランス出力するときの、受信回路Rx3の共通接地端子である。 Specifically, when operating the first-frequency receiving circuit Rx1, the switch of the high-frequency switch function block 313 is switched to be connected to the high-frequency first input signal line 351, and a high-frequency signal is input to the gate of the transistor Tr1. . Also in this case, the bias point of the transistor Tr1 is set by the first gate bias line 321 and the drain bias line 320, and an amplification operation is performed. In this case, the signal filtered by the SAW filter SAW2 is output from the first balanced output terminals RFout11 and RFout12. The terminals GND11 and GND12 are common ground terminals of the receiving circuit Rx1 when performing balanced output. Similarly, when operating the third-frequency receiving circuit Rx3, the switch of the high-frequency switch function block 313 is switched so as to be connected to the high-frequency third input signal line 353, and a high-frequency signal is input to the gate of the transistor Tr3. Also in this case, the bias point of the transistor Tr3 is set by the third gate bias line 323 and the drain bias line 320, and an amplification operation is performed. In this case, the signal filtered by the SAW filter SAW3 is output from the third balanced output terminals RFout31 and RFout32. The terminals GND31 and GND32 are common ground terminals of the receiving circuit Rx3 when performing balanced output.
 これらの制御は、第1データー端子D1、第2データー端子D2、第3データー端子D3に送られる半導体装置300が実装されている機器全体を制御するデジタルベースバンドと呼ばれる高機能なマイコンからのデーターとコマンドによって行われる。 These controls are performed by data from a high-performance microcomputer called a digital baseband that controls the entire device on which the semiconductor device 300 that is sent to the first data terminal D1, the second data terminal D2, and the third data terminal D3 is mounted. And is done by command.
 以上のように、本実施の形態に係る半導体装置300は、実施の形態1に係る半導体装置100を3つ有し、さらに、絶縁膜302a上に島状に形成され、高周波スイッチ機能ブロック313が形成されたシリコン層であるシリコン島領域311を有し、高周波スイッチ機能ブロック313は、半導体装置に接続されたアンテナANTと、受信回路Rx1~Rx2との接続及び非接続とを選択的に切り替えるスイッチである。 As described above, the semiconductor device 300 according to the present embodiment has three semiconductor devices 100 according to the first embodiment, and is formed in an island shape on the insulating film 302a. The high-frequency switch functional block 313 has a silicon island region 311 which is a formed silicon layer, and a high-frequency switch functional block 313 selectively switches between connection and disconnection of the antenna ANT connected to the semiconductor device and the receiving circuits Rx1 to Rx2. It is.
 これにより、半導体装置300は、アンテナANTと接続される高周波スイッチ機能ブロック313を含む1つのモジュールとして実現できる。 Thereby, the semiconductor device 300 can be realized as one module including the high-frequency switch functional block 313 connected to the antenna ANT.
 また、本実施の形態に係る半導体装置300は、絶縁膜302b上に島状に形成され、マイコンブロック314が形成されたシリコン層であるシリコン島領域312を有する。このマイコンブロック314は、受信回路Rx1~Rx3を制御するためのマイコンである。 In addition, the semiconductor device 300 according to the present embodiment has a silicon island region 312 which is a silicon layer formed in an island shape on the insulating film 302b and in which the microcomputer block 314 is formed. The microcomputer block 314 is a microcomputer for controlling the receiving circuits Rx1 to Rx3.
 これにより、受信回路Rx1~Rx3を制御する制御回路を実現できる。例えば、制御回路としては、受信回路Rx1~Rx3の動作モード(例えば、通常モードと消費電力削減モード)を切り替える回路が挙げられる。また、半導体装置300に実装される高周波スイッチ機能ブロック313の接続を切り替える回路や、送受信周波数の切り替える回路が挙げられる。 Thus, a control circuit for controlling the receiving circuits Rx1 to Rx3 can be realized. For example, the control circuit includes a circuit that switches the operation mode (for example, the normal mode and the power consumption reduction mode) of the reception circuits Rx1 to Rx3. Further, a circuit for switching the connection of the high-frequency switch function block 313 mounted on the semiconductor device 300 and a circuit for switching a transmission / reception frequency can be given.
 また、本実施の形態において、高周波スイッチ機能ブロック313及びマイコンブロック314は、増幅回路Rx1~Rx3に用いたトランジスタTr1~Tr3と同様のシリコン島領域構造、即ち、絶縁基板101としてのサファイア基板上に絶縁膜302a及び302bを介してシリコン島領域がその上に位置した構造である。つまり、高周波スイッチ機能ブロック313及びマイコンブロック314は、そのシリコン島領域の中に半導体プロセスにより形成された複数のトランジスタを用いて形成された回路ブロックである。受信回路Rx1~Rx3に用いたトランジスタTr1~Tr3のシリコン島領域103と、この高周波スイッチ機能ブロック313のシリコン島領域311及びマイコンブロック314のシリコン島領域312の違いはその能動トランジスタの数だけで、増幅器と高周波スイッチ機能ブロック313とマイコンブロック314は同一の半導体プロセスで作られる。前述したように、本実施の形態においても、絶縁基板101に、表面が酸化されたシリコン基板を貼り合せる方法、いわゆる密着させることで生ずる水素結合やファンデルワールス結合などを利用し結合させた後に、不要なシリコン材料を除去し、受信回路Rx1~Rx3の絶縁膜102及びシリコン島領域103と、絶縁膜302a及び302bと、シリコン島領域311及び312とを、絶縁基板101上の所定の場所に残す。 In the present embodiment, the high frequency switch functional block 313 and the microcomputer block 314 are formed on a silicon island region structure similar to the transistors Tr1 to Tr3 used in the amplifier circuits Rx1 to Rx3, that is, on the sapphire substrate as the insulating substrate 101. This is a structure in which the silicon island region is located above the insulating films 302a and 302b. That is, the high-frequency switch functional block 313 and the microcomputer block 314 are circuit blocks formed using a plurality of transistors formed by a semiconductor process in the silicon island region. The difference between the silicon island region 103 of the transistors Tr1 to Tr3 used in the receiving circuits Rx1 to Rx3, the silicon island region 311 of the high frequency switch functional block 313, and the silicon island region 312 of the microcomputer block 314 is only the number of active transistors. The amplifier, the high-frequency switch function block 313, and the microcomputer block 314 are manufactured by the same semiconductor process. As described above, also in this embodiment, after bonding the insulating substrate 101 to the insulating substrate 101 by using a method of bonding a silicon substrate whose surface is oxidized, so-called hydrogen bonding or van der Waals bonding generated by close adhesion. Then, unnecessary silicon material is removed, and the insulating film 102 and the silicon island region 103, the insulating films 302a and 302b, and the silicon island regions 311 and 312 of the receiving circuits Rx1 to Rx3 are placed at predetermined positions on the insulating substrate 101. leave.
 また、本実施の形態においては、従来の配線基板上ではなく、絶縁基板101としてのサファイア基板にSAWフィルターをこの場合3個搭載している。この場合のSAWフィルターは、同様にバランス出力型のSAWフィルターを実施例3では想定している。これだけの機能の半導体装置を実現しても、本発明によれば従来よりも外形寸法は小さくでき、しかも放熱の対応も不要である。しかも、特性のばらつきが少なく、剥がれなどの量産時の課題も少ないのは、前述した通りである。 In this embodiment, three SAW filters are mounted on the sapphire substrate as the insulating substrate 101 instead of the conventional wiring substrate. The SAW filter in this case similarly assumes a balanced output type SAW filter in the third embodiment. Even if a semiconductor device having such a function is realized, according to the present invention, the external dimensions can be made smaller than that of the prior art, and furthermore, no heat dissipation is required. In addition, as described above, there are few variations in characteristics and there are few problems during mass production such as peeling.
 (実施の形態4)
 実施の形態4に係る半導体装置は、実施の形態3に係る半導体装置300とほぼ同じであるが、絶縁膜が絶縁基板上の全面に形成されている点が異なる。以下、本実施の形態に係る半導体装置について、実施の形態3に係る半導体装置300と異なる点を中心に説明する。
(Embodiment 4)
The semiconductor device according to the fourth embodiment is substantially the same as the semiconductor device 300 according to the third embodiment, except that an insulating film is formed on the entire surface of the insulating substrate. Hereinafter, the semiconductor device according to the present embodiment will be described focusing on differences from the semiconductor device 300 according to the third embodiment.
 実施の形態4に係る半導体装置について、図7を参照しながら説明する。 A semiconductor device according to the fourth embodiment will be described with reference to FIG.
 図7は、実施の形態4に係る半導体装置の構成の一例を示す平面図である。 FIG. 7 is a plan view showing an example of the configuration of the semiconductor device according to the fourth embodiment.
 図7に示した実施の形態4に係る半導体装置400は、図6に示した実施の形態3に係る半導体装置300と比較して、絶縁基板101の主面側のほぼ全面に形成された絶縁膜402を有し、この絶縁膜402上に、受信回路Rx1~Rx3のシリコン島領域103と、高周波スイッチ機能ブロック313が形成されたシリコン島領域311と、マイコンブロック314が形成されたシリコン島領域312とが位置している点が異なる。 The semiconductor device 400 according to the fourth embodiment shown in FIG. 7 has an insulation formed on almost the entire main surface side of the insulating substrate 101 as compared with the semiconductor device 300 according to the third embodiment shown in FIG. The silicon island region 103 of the receiving circuits Rx1 to Rx3, the silicon island region 311 in which the high-frequency switch function block 313 is formed, and the silicon island region in which the microcomputer block 314 is formed on the insulating film 402 312 is different.
 これにより、本実施の形態に係る半導体装置400は、絶縁基板101と絶縁膜402との密着力を極めて強くすることができるので、絶縁膜402の剥がれ等の問題が発生せず、量産時に安定な半導体装置を製造することができる。言い換えると、製造工程の歩留まりが向上する。さらに、この絶縁膜を厚く形成することによって、受動回路を構成する受動部品の高周波性能の1つの目安であるQ値を大きくすることができる。よって、受信回路Rx1~Rx3のキャパシターC1~C3のQ値を大きくすることができる。 As a result, the semiconductor device 400 according to this embodiment can extremely increase the adhesion between the insulating substrate 101 and the insulating film 402, so that problems such as peeling of the insulating film 402 do not occur and the semiconductor device 400 is stable during mass production. A simple semiconductor device can be manufactured. In other words, the yield of the manufacturing process is improved. Furthermore, by forming this insulating film thick, it is possible to increase the Q value, which is one measure of the high-frequency performance of the passive components constituting the passive circuit. Therefore, the Q values of the capacitors C1 to C3 of the receiving circuits Rx1 to Rx3 can be increased.
 具体的には、絶縁基板101と、表面が酸化されたことにより表面にSiOを有するシリコン基板とを貼り合せた後に、不要なシリコン材料を除去し、SiOを絶縁基板101のほぼ全面に残すと共に、受信回路Rx1~Rx3のシリコン島領域103と、シリコン島領域311と、シリコン島領域312とを局所的に残す。このように全面に残されたSiOが絶縁膜402となる。 Specifically, after the insulating substrate 101 and a silicon substrate having SiO 2 on the surface due to oxidation of the surface are bonded together, unnecessary silicon material is removed, and SiO 2 is applied to almost the entire surface of the insulating substrate 101. At the same time, the silicon island region 103, the silicon island region 311 and the silicon island region 312 of the receiving circuits Rx1 to Rx3 are left locally. Thus, the SiO 2 remaining on the entire surface becomes the insulating film 402.
 実施の形態2で述べたように、絶縁膜402を絶縁基板101のほぼ全面に残すことにより、上述した絶縁基板101から絶縁膜202の剥がれを低減できることに加えて、半導体プロセス途中において、受信回路Rx1~Rx3の第1配線層108及び第2配線層104の剥がれ現象がなくなるなどの効果がある。 As described in Embodiment Mode 2, by leaving the insulating film 402 over almost the entire surface of the insulating substrate 101, the peeling of the insulating film 202 from the insulating substrate 101 can be reduced, and in addition, a receiving circuit can be provided during the semiconductor process. There is an effect that the peeling phenomenon of the first wiring layer 108 and the second wiring layer 104 of Rx1 to Rx3 is eliminated.
 (実施の形態5)
 実施の形態5に係る半導体装置は、実施の形態1に係る半導体装置100と比較して、電極が絶縁基板の絶縁膜が形成された面と反対の面に形成され、さらに、絶縁基板を貫通し、配線と電極とを接続する貫通電極を備える。
(Embodiment 5)
In the semiconductor device according to the fifth embodiment, as compared with the semiconductor device 100 according to the first embodiment, the electrode is formed on the surface opposite to the surface on which the insulating film of the insulating substrate is formed, and further penetrates the insulating substrate. And a through electrode for connecting the wiring and the electrode.
 次に、本発明の実施の形態5に係る半導体装置について、図8を参照しながら説明する。 Next, a semiconductor device according to the fifth embodiment of the present invention will be described with reference to FIG.
 図8は、実施の形態5に係る半導体装置の構成の一例を示す断面図である。 FIG. 8 is a cross-sectional view showing an example of the configuration of the semiconductor device according to the fifth embodiment.
 同図に示す半導体装置500は、図2に示した半導体装置100と比較して、SAWフィルターSAWを搭載するための基板裏面側電極513が、絶縁基板101の絶縁膜102a及び102bが形成された面と反対の面に形成され、さらに、絶縁基板101を貫通し、第2配線層104と基板裏面側電極513とを接続する基板貫通電極512を備える。なお、基板裏面側電極513は本発明の電極に相当し、基板貫通電極512は本発明の貫通電極に相当する。 Compared with the semiconductor device 100 shown in FIG. 2, the semiconductor device 500 shown in FIG. 2 has the substrate back surface side electrode 513 for mounting the SAW filter SAW, and the insulating films 102 a and 102 b of the insulating substrate 101 formed thereon. A substrate through electrode 512 that is formed on the surface opposite to the surface and penetrates the insulating substrate 101 and connects the second wiring layer 104 and the substrate back surface side electrode 513 is provided. The substrate back surface side electrode 513 corresponds to the electrode of the present invention, and the substrate through electrode 512 corresponds to the through electrode of the present invention.
 具体的には、SAWフィルターSAWの部品電極110は絶縁基板101としてのサファイア基板の反対主面側に設けられた基板裏面側電極513と接合材109を介し電気的に接続されると共に、物理的にも固定される。この基板裏面側電極513に電気的に接続され、絶縁基板101の所定の場所に設けられた基板貫通電極512が、絶縁基板101の主面側あるトランジスタやキャパシターなどの各種の回路要素と、絶縁基板101の反対主面側にあるSAWフィルターSAWの部品電極110を電気的に相互に接続して、回路を形成する。また、絶縁基板101の主面側には保護樹脂501が設けられていると共に、表面側柱電極502を介して接続用バンプ503につながれている。 Specifically, the component electrode 110 of the SAW filter SAW is electrically connected to the substrate back surface side electrode 513 provided on the opposite main surface side of the sapphire substrate as the insulating substrate 101 through the bonding material 109 and is physically connected. Also fixed to. A substrate through electrode 512 electrically connected to the substrate back surface side electrode 513 and provided at a predetermined position of the insulating substrate 101 is insulated from various circuit elements such as transistors and capacitors on the main surface side of the insulating substrate 101. The component electrodes 110 of the SAW filter SAW on the opposite main surface side of the substrate 101 are electrically connected to each other to form a circuit. A protective resin 501 is provided on the main surface side of the insulating substrate 101 and is connected to the connection bumps 503 through the front side column electrodes 502.
 これにより、本実施の形態に係る半導体装置500は、実施の形態1に係る半導体装置100と比較して、絶縁基板101の反対主面側にもSAWフィルターSAWを搭載することができるようになり、さらに小型化した半導体装置を実現できる。 Thereby, the semiconductor device 500 according to the present embodiment can mount the SAW filter SAW on the opposite main surface side of the insulating substrate 101 as compared with the semiconductor device 100 according to the first embodiment. In addition, a further miniaturized semiconductor device can be realized.
 (実施の形態6)
 実施の形態1~5において、本発明に係る半導体装置を受信用の半導体装置として実現した構成について説明したが、本発明に係る半導体装置は、例えば、例えば携帯電話に用いられる送信用の半導体装置としても実現できる。
(Embodiment 6)
In the first to fifth embodiments, the configuration in which the semiconductor device according to the present invention is realized as a receiving semiconductor device has been described. The semiconductor device according to the present invention is, for example, a transmitting semiconductor device used in a mobile phone. Can also be realized.
 以下、実施の形態6として、本発明に係る半導体装置を送信用の半導体装置として構成する場合について、図9及び図10を参照しながら説明する。図9は、実施の形態6に係る半導体装置の構成の一例を示す平面図、図10は図9に示した半導体装置の等価回路を示す回路図である。 Hereinafter, as a sixth embodiment, a case where a semiconductor device according to the present invention is configured as a semiconductor device for transmission will be described with reference to FIGS. 9 and 10. FIG. FIG. 9 is a plan view showing an example of the configuration of the semiconductor device according to the sixth embodiment, and FIG. 10 is a circuit diagram showing an equivalent circuit of the semiconductor device shown in FIG.
 図9に示すように、半導体装置600は、絶縁基板101と、絶縁基板上に形成された絶縁膜602a~602gと、絶縁膜602a上のシリコン島領域603aに形成されたトランジスタTr1と、絶縁膜602b上に形成されたキャパシターC1と、絶縁膜602c上のシリコン島領域603cに形成されたトランジスタTr2と、絶縁膜602d上のシリコン島領域603dに形成されたトランジスタTr3と、絶縁膜602e上に形成されたキャパシターC2と、絶縁膜602f上に形成されたアイソレーター650とを備える。なお、絶縁膜602gは、交差している配線間を絶縁するために設けられている。 As shown in FIG. 9, a semiconductor device 600 includes an insulating substrate 101, insulating films 602a to 602g formed on the insulating substrate, a transistor Tr1 formed in a silicon island region 603a on the insulating film 602a, and an insulating film. Capacitor C1 formed on 602b, transistor Tr2 formed in silicon island region 603c on insulating film 602c, transistor Tr3 formed in silicon island region 603d on insulating film 602d, and formed on insulating film 602e And the isolator 650 formed on the insulating film 602f. Note that the insulating film 602g is provided to insulate the intersecting wirings.
 図10は、図9に示した半導体装置600の等価回路図である。図9に示した電極パッドPinは入力端子であり、バイアスされた高周波信号Vg1+RFinが入力される。また、電極パッドP_Vdd1は電源端子であり電圧Vdd1が供給される。同様に、電極パッドP_Vdd2は電源端子であり電圧Vdd2が供給される。電極パッドP_Vg2はバイアス端子であり、トランジスタTr2及びTr3のバイアス電圧Vg2が供給される。電極パッドP_G1~P_G3はグランドに接続されたグランド端子である。電極パッドPoutは出力端子であり、出力信号RFoutが出力される。 FIG. 10 is an equivalent circuit diagram of the semiconductor device 600 shown in FIG. The electrode pad Pin shown in FIG. 9 is an input terminal, and a biased high-frequency signal Vg1 + RFin is input. The electrode pad P_Vdd1 is a power supply terminal and is supplied with the voltage Vdd1. Similarly, the electrode pad P_Vdd2 is a power supply terminal and is supplied with the voltage Vdd2. The electrode pad P_Vg2 is a bias terminal and is supplied with the bias voltage Vg2 of the transistors Tr2 and Tr3. The electrode pads P_G1 to P_G3 are ground terminals connected to the ground. The electrode pad Pout is an output terminal, and an output signal RFout is output.
 以上のように、本実施の形態に係る半導体装置600は、絶縁基板101と、絶縁基板101上に形成された絶縁膜602a~602gと、絶縁膜602a上に島状に形成され、トランジスタTr1が形成されたシリコン層であるシリコン島領域603aと、絶縁膜602c上に島状に形成され、トランジスタTr2が形成されたシリコン層であるシリコン島領域603cと、絶縁膜602d上に島状に形成され、トランジスタTr3が形成されたシリコン層であるシリコン島領域603dと、シリコン島領域603a、603c及び603d外に形成されたキャパシターC1及びキャパシターC2を有する受動回路領域と、シリコン島領域603a、603c及び603d外かつ受動回路領域外に形成された電極パッドP61~P63と、電極パッドP61~P63上に搭載されたアイソレーター650と、トランジスタTr1~Tr2とキャパシターC1及びC2と電極パッドP61~P63とを接続するための第2配線層104とを備え、トランジスタTr1~Tr2とキャパシターC1及びC2、アイソレーター650及び第2配線層104は、例えば携帯電話の送信回路を構成する。 As described above, the semiconductor device 600 according to this embodiment includes the insulating substrate 101, the insulating films 602a to 602g formed on the insulating substrate 101, and the island shape on the insulating film 602a. A silicon island region 603a which is a formed silicon layer and an island shape is formed on the insulating film 602c, and an island shape is formed on the silicon island region 603c which is a silicon layer where the transistor Tr2 is formed and an insulating film 602d. , A silicon island region 603d which is a silicon layer in which the transistor Tr3 is formed, a passive circuit region having capacitors C1 and C2 formed outside the silicon island regions 603a, 603c and 603d, and silicon island regions 603a, 603c and 603d. Electrode pads P61 to P63 formed outside and outside the passive circuit region; An isolator 650 mounted on the electrode pads P61 to P63, a transistor Tr1 to Tr2, capacitors C1 and C2, and a second wiring layer 104 for connecting the electrode pads P61 to P63, and the transistors Tr1 to Tr2 and the capacitor C1 and C2, the isolator 650, and the second wiring layer 104 constitute, for example, a transmission circuit of a mobile phone.
 これにより、本実施の形態に係る半導体装置600は、実施の形態1に係る半導体装置100と同様に極めて小型化できる。つまり、送信回路が構成された小型の半導体装置を実現できる。 Thereby, the semiconductor device 600 according to the present embodiment can be extremely miniaturized similarly to the semiconductor device 100 according to the first embodiment. That is, a small semiconductor device having a transmission circuit can be realized.
 以上、本発明に係る半導体装置について各実施の形態に基づき説明したが、本発明は、これら実施の形態に限定されるものではない。本発明の趣旨を逸脱しない限り、各実施の形態の組み合わせたものや、当業者が思いつく各種変形を本実施の形態に施したものも、本発明の範囲内に含まれる。 As described above, the semiconductor device according to the present invention has been described based on each embodiment, but the present invention is not limited to these embodiments. Unless it deviates from the meaning of this invention, what combined each embodiment and what gave this embodiment the various deformation | transformation which those skilled in the art think are also included in the scope of the present invention.
 例えば、上記実施の形態において、受動回路としてキャパシターの構成を示したが、インダクターを有する構成であってもよい。具体的には、高周波回路で用いることの多いスパイラルインダクターも第1配線層108と第2配線層104とを用い半導体プロセスで形成可能であり、小型化が可能となる。 For example, in the above embodiment, the configuration of the capacitor is shown as the passive circuit, but a configuration having an inductor may be used. Specifically, a spiral inductor that is often used in a high-frequency circuit can also be formed by a semiconductor process using the first wiring layer 108 and the second wiring layer 104, and can be miniaturized.
 また、上記した実施の形態では、サファイア基板上に形成されたシリコン島領域、いわゆるSOS構造を有する基板においてシリコン島領域及び絶縁島領域上に、トランジスタや容量、インダクターなどの素子が形成されているが、SOS構造を有する基板上に形成される素子は、その他のものであってもよい。また、電子素子に限らず、光学素子等と組み合わせてもよい。また、例えば、あらかじめ別工程で製造された受動素子、能動素子等をSOS基板上に配置してもよい。 In the above-described embodiment, elements such as transistors, capacitors, and inductors are formed on the silicon island region and the insulating island region in the silicon island region formed on the sapphire substrate, that is, the substrate having a so-called SOS structure. However, other elements may be formed on the substrate having the SOS structure. Moreover, you may combine with not only an electronic element but an optical element. Further, for example, a passive element, an active element or the like manufactured in a separate process in advance may be arranged on the SOS substrate.
 また、上記した実施の形態では、絶縁膜は、シリコンを酸化したSiOにより形成されたが、シリコンを酸化する方法に限らず、別途絶縁膜としてCVD法などの方法により堆積したものであってもよい。また、SiOに限らずその他の絶縁膜であってもよい。 In the above-described embodiment, the insulating film is formed of SiO 2 obtained by oxidizing silicon. However, the insulating film is not limited to a method of oxidizing silicon, and is separately deposited by a method such as a CVD method as an insulating film. Also good. Further, the insulating film is not limited to SiO 2 but may be another insulating film.
 また、上記した実施の形態では、サファイア基板上にシリコン基板を貼り合わせ法により貼り合わせて接合したが、その他の方法により接合してもよい。 In the above-described embodiment, the silicon substrate is bonded and bonded to the sapphire substrate by the bonding method, but may be bonded by other methods.
 また、上記した半導体装置において、シリコン島領域直下を除く他の領域の絶縁膜の膜厚を該直下の膜厚よりも薄く形成してもよい。これにより、シリコン島領域に形成された能動デバイスで発生する熱を効率よく絶縁基板へ逃がすことができ、放熱効率が向上する。 Further, in the semiconductor device described above, the thickness of the insulating film in the other region except for the region immediately below the silicon island region may be formed to be thinner than the thickness immediately below the region. Thereby, the heat generated by the active device formed in the silicon island region can be efficiently released to the insulating substrate, and the heat dissipation efficiency is improved.
 また、シリコン島領域直下を除く他の領域では、絶縁膜をエッチング等により完全に除去してもよい。また、シリコン島領域だけに限らず、配線層直下を除く他の領域の絶縁膜の膜厚を該直下の膜厚よりも薄く形成してもよい。 Also, in other regions except just under the silicon island region, the insulating film may be completely removed by etching or the like. In addition to the silicon island region, the thickness of the insulating film in other regions except just below the wiring layer may be made thinner than the thickness immediately below the insulating layer.
 また、第1の配線層、第2の配線層、電極パッドを構成する材料は、上記した材料に限らず導電性を有する材料であればよく、例えば、Al、Cu、Auであってもよい。 In addition, the material constituting the first wiring layer, the second wiring layer, and the electrode pad is not limited to the above-described material, and may be any material having conductivity, and may be Al, Cu, Au, for example. .
 また、シリコン島領域の形状、大きさは、上記した実施の形態に示した例に限らずどのように変更してもよい。 Further, the shape and size of the silicon island region are not limited to the example shown in the above embodiment, and may be changed in any way.
 また、本発明に係る半導体装置を備えた各種デバイスなども本発明に含まれる。例えば、SOS基板上に形成した能動素子や受動素子、これらの素子を備えた送信用及び受信用の高周波集積回路、これらの素子や高周波集積回路を含む高周波無線通信システムも本発明に含まれる。 Various devices including the semiconductor device according to the present invention are also included in the present invention. For example, active elements and passive elements formed on an SOS substrate, high-frequency integrated circuits for transmission and reception including these elements, and high-frequency wireless communication systems including these elements and high-frequency integrated circuits are also included in the present invention.
 本発明の半導体装置は、携帯電話などの通信機器の受信や送信を行なう、いわゆるフロントエンドのブロック、特にマルチバンド、マルチモードの通信に対応するフロントエンドブロックに適用する半導体装置として有用である。 The semiconductor device of the present invention is useful as a semiconductor device applied to a so-called front-end block for receiving and transmitting communication equipment such as a mobile phone, particularly a front-end block corresponding to multiband and multimode communication.
 100、200、300、400、500、600、801   半導体装置
 101   絶縁基板
 102a~102c、202、302a、302b、402、602a~602g  絶縁膜
 103、311、312、603a、603c、603d   シリコン島領域
 104   第2配線層
 105   ゲート酸化膜
 107   層間絶縁膜
 108   第1配線層
 109   接合材
 313   高周波スイッチ機能ブロック
 314   マイコンブロック
 320   ドレインバイアス線
 321   第1ゲートバイアス線
 322   第2ゲートバイアス線
 323   第3ゲートバイアス線
 341   アンテナ制御信号線
 351   高周波第1入力信号線
 352   高周波第2入力信号線
 353   高周波第3入力信号線
 501   保護樹脂
 502   表面側柱電極
 503   接続用バンプ
 512   基板貫通電極
 513   基板裏面側電極
 650   アイソレーター
 802   配線基板
 802a   配線基板の主面
 802b   配線基板の下面
 803   半導体チップ
 803a   半導体チップの表面
 803d   半導体チップの裏面
 804、804a、804b   受動部品
 805   放熱用部材
 805a   側壁部
 805b   天井部
 805c   放熱用部材の天井部の表面
 805d   放熱用部材との接合部
 806   マーキング
 807   接合材
 808   バンプ電極
 810   ビアホール
 811   絶縁体層
 812a   基板側電極
 812c   基準電位供給用端子
 813a   トランジスタ
 813b   制御回路
 C、C1、C2、C3   キャパシター
 D   ドレイン電極
 D1   第1データー端子
 D2   第2データー端子
 D3   第3データー端子
 G   ゲート電極
 GND11、GND12、GND21、GND22、GND31、GND32 端子
 P1~P5、P_61~P_63、P_G1~P_G3、Pin、Pout、P_Vg2P_Vdd、P_Vdd1、R_Vdd2、RFin、RFout1、RFout2   電極パッド
 RFout11、RFout12   第1バランス型出力端子
 RFout21、RFout22   第2バランス型出力端子
 RFout31、RFout32   第3バランス型出力端子
 Rx1、Rx2、Rx3   受信回路
 S   ソース電極
 SAW、SAW1、SAW2、SAW3   SAWフィルター
 SWa   アンテナ端子
 Tr、Tr1、Tr2、Tr3   トランジスタ
100, 200, 300, 400, 500, 600, 801 Semiconductor device 101 Insulating substrate 102a to 102c, 202, 302a, 302b, 402, 602a to 602g Insulating film 103, 311, 312, 603a, 603c, 603d Silicon island region 104 Second wiring layer 105 Gate oxide film 107 Interlayer insulating film 108 First wiring layer 109 Bonding material 313 High-frequency switch functional block 314 Microcomputer block 320 Drain bias line 321 First gate bias line 322 Second gate bias line 323 Third gate bias line 341 Antenna control signal line 351 High-frequency first input signal line 352 High-frequency second input signal line 353 High-frequency third input signal line 501 Protective resin 502 Front side column electrode 503 Connection van 512 Substrate through electrode 513 Substrate back side electrode 650 Isolator 802 Wiring substrate 802a Wiring substrate main surface 802b Wiring substrate lower surface 803 Semiconductor chip 803a Semiconductor chip surface 803d Semiconductor chip back surface 804, 804a, 804b Passive component 805 Heat radiation member 805a Side wall portion 805b Ceiling portion 805c Surface of ceiling portion of heat radiation member 805d Joint portion with heat radiation member 806 Marking 807 Joint material 808 Bump electrode 810 Via hole 811 Insulator layer 812a Substrate side electrode 812c Reference potential supply terminal 813a Transistor 813b Control Circuit C, C1, C2, C3 Capacitor D Drain electrode D1 First data terminal D2 Second data terminal D3 Third data terminal G Gate electrode GND11, GND12, GND21, GND22, GND31, GND32 Terminals P1 to P5, P_61 to P_63, P_G1 to P_G3, Pin, Pout, P_Vg2 P_Vdd, P_Vdd1, R_Vdd2, RFin, RFout1 RFout, RFout1 RF2 Output terminal RFout21, RFout22 Second balanced output terminal RFout31, RFout32 Third balanced output terminal Rx1, Rx2, Rx3 Receiver circuit S Source electrode SAW, SAW1, SAW2, SAW3 SAW filter SWa Antenna terminal Tr, Tr1, Tr2, Tr3 Transistor

Claims (10)

  1.  絶縁基板と、
     前記絶縁基板上に形成された絶縁膜と、
     前記絶縁膜上に島状に形成され、第1能動デバイスが形成されたシリコン層である第1シリコン島領域と、
     前記第1シリコン島領域外に形成された受動回路を有する受動回路領域と、
     前記第1シリコン島領域外かつ前記受動回路領域外に形成された電極と、
     前記電極上に搭載された電子部品と、
     前記第1能動デバイス、前記受動回路及び前記電極を接続するための配線とを備え、
     前記第1能動デバイス、前記受動回路、前記電子部品及び前記配線は、所定の回路を構成する
     半導体装置。
    An insulating substrate;
    An insulating film formed on the insulating substrate;
    A first silicon island region which is a silicon layer formed in an island shape on the insulating film and having a first active device formed thereon;
    A passive circuit region having a passive circuit formed outside the first silicon island region;
    An electrode formed outside the first silicon island region and outside the passive circuit region;
    An electronic component mounted on the electrode;
    A wiring for connecting the first active device, the passive circuit and the electrode;
    The first active device, the passive circuit, the electronic component, and the wiring constitute a predetermined circuit. Semiconductor device.
  2.  前記所定の回路は高周波回路である
     請求項1記載の半導体装置。
    The semiconductor device according to claim 1, wherein the predetermined circuit is a high-frequency circuit.
  3.  前記第1シリコン島領域の下方の前記絶縁膜と、前記受動回路の下方の前記絶縁膜と、前記電子部品の下方の前記絶縁膜とは、離間している
     請求項1又は2記載の半導体装置。
    3. The semiconductor device according to claim 1, wherein the insulating film below the first silicon island region, the insulating film below the passive circuit, and the insulating film below the electronic component are separated from each other. .
  4.  前記絶縁膜は、前記絶縁基板上の全面に形成されている
     請求項1又は2記載の半導体装置。
    The semiconductor device according to claim 1, wherein the insulating film is formed on the entire surface of the insulating substrate.
  5.  前記半導体装置は、さらに、
     前記絶縁膜上に島状に形成され、第2能動デバイスが形成されたシリコン層である第2シリコン島領域を有し、
     前記第2能動デバイスは、前記半導体装置に接続されたアンテナと、前記所定の回路との接続及び非接続を選択的に切り替えるスイッチである
     請求項1~4のいずれか1項に記載の半導体装置。
    The semiconductor device further includes:
    A second silicon island region that is a silicon layer formed in an island shape on the insulating film and having a second active device formed thereon;
    The semiconductor device according to any one of claims 1 to 4, wherein the second active device is a switch that selectively switches connection and disconnection between an antenna connected to the semiconductor device and the predetermined circuit. .
  6.  前記半導体装置は、さらに、
     前記絶縁膜上に島状に形成され、第3能動デバイスが形成されたシリコン層である第3シリコン島領域を有し、
     前記第3能動デバイスは、前記所定の回路を制御するためのマイコンである
     請求項1~5のいずれか1項に記載の半導体装置。
    The semiconductor device further includes:
    A third silicon island region that is a silicon layer formed in an island shape on the insulating film and having a third active device formed thereon;
    The semiconductor device according to any one of claims 1 to 5, wherein the third active device is a microcomputer for controlling the predetermined circuit.
  7.  前記第1能動デバイスは、トランジスタであり、
     前記マイコンは、前記トランジスタのバイアス電圧を制御するバイアス制御回路を有する
     請求項6記載の半導体装置。
    The first active device is a transistor;
    The semiconductor device according to claim 6, wherein the microcomputer includes a bias control circuit that controls a bias voltage of the transistor.
  8.  前記マイコンは、前記半導体装置に接続された外部機器とのインタ-フェース回路を有する
     請求項6記載の半導体装置。
    The semiconductor device according to claim 6, wherein the microcomputer has an interface circuit with an external device connected to the semiconductor device.
  9.  前記電極は、前記絶縁基板の前記絶縁膜が形成された面と反対の面に形成され、
     前記半導体装置は、さらに、
     前記絶縁基板を貫通し、前記配線と前記電極とを接続する貫通電極を備える
     請求項1~8のいずれか1項に記載の半導体装置。
    The electrode is formed on a surface of the insulating substrate opposite to the surface on which the insulating film is formed,
    The semiconductor device further includes:
    The semiconductor device according to any one of claims 1 to 8, further comprising a through electrode that penetrates through the insulating substrate and connects the wiring and the electrode.
  10.  前記絶縁基板はサファイア基板であり、
     前記絶縁膜は二酸化シリコンであり、
     前記絶縁基板と前記シリコン島領域とは、前記絶縁膜を介して張り合わされている
     請求項1~9のいずれか1項に記載の半導体装置。
    The insulating substrate is a sapphire substrate;
    The insulating film is silicon dioxide;
    The semiconductor device according to any one of claims 1 to 9, wherein the insulating substrate and the silicon island region are bonded to each other via the insulating film.
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CN111164889A (en) * 2017-09-29 2020-05-15 株式会社村田制作所 Hybrid filter device and multi-channel modulator
US11757429B2 (en) * 2017-09-29 2023-09-12 Murata Manufacturing Co., Ltd. Hybrid filter device and multiplexer
CN111164889B (en) * 2017-09-29 2023-11-03 株式会社村田制作所 Hybrid filter device and multiplexer

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