WO2012056600A1 - Oscillateur - Google Patents

Oscillateur Download PDF

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Publication number
WO2012056600A1
WO2012056600A1 PCT/JP2011/000424 JP2011000424W WO2012056600A1 WO 2012056600 A1 WO2012056600 A1 WO 2012056600A1 JP 2011000424 W JP2011000424 W JP 2011000424W WO 2012056600 A1 WO2012056600 A1 WO 2012056600A1
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WO
WIPO (PCT)
Prior art keywords
wiring
negative resistance
parallel
oscillation units
transistors
Prior art date
Application number
PCT/JP2011/000424
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English (en)
Japanese (ja)
Inventor
小森　浩
Original Assignee
パナソニック株式会社
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Filing date
Publication date
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Publication of WO2012056600A1 publication Critical patent/WO2012056600A1/fr

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1206—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification
    • H03B5/1212—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B27/00—Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1228—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device the amplifier comprising one or more field effect transistors

Definitions

  • the present invention relates to an oscillator mounted on a semiconductor integrated circuit, and particularly to an oscillator excellent in low current consumption performance.
  • an oscillator (differential oscillator) requires a large operating current in order to realize high stability of oscillation and reduction of phase noise.
  • FIG. 5 is a circuit diagram showing a schematic configuration of an oscillator having a conventional CMOS configuration.
  • the CMOS oscillator includes a negative resistance generator 41 that generates a negative resistance by connecting the gate terminals and drain terminals of a pair of PMOS transistors 411 and 412 so as to cross each other, and a pair of NMOS transistors.
  • the negative resistance generator 42 that generates a negative resistance by connecting the gate terminals and the drain terminals of the transistors 421 and 422 so as to cross each other, an inductor 431, and a capacitive element 432 are connected in parallel.
  • a resonance circuit (tank circuit) 43 is a resonance circuit (tank circuit) 43.
  • the Q value (Quality Factor) of the tank circuit 43 is practically a finite value, and an alternating current flows to cause the inductor 431 and Loss due to the resistance component of the capacitor 432 occurs. For this reason, in order for oscillation in the tank circuit 43 to be performed stably, a negative resistance sufficient to compensate for the loss due to the resistance component is required. In the oscillator shown in FIG. 5, two negative resistance generators 41 and 42 are intended to generate this negative resistance.
  • drain terminals of a pair of PMOS transistors 411 and 412 and drain terminals of a pair of NMOS transistors 421 and 422 corresponding thereto are respectively connected (having a so-called vertically stacked structure). Since each is connected in series between the power supply and GND, the same current flows as an operating current in the negative resistance generators 41 and 42. In such a configuration having two negative resistance generators 41 and 42, the negative resistance obtained from the same operating current can be made larger than when only one negative resistance generator is used. . In other words, since the negative resistance changes depending on the flowing current, the operating current for obtaining the necessary negative resistance can be reduced by using the two negative resistance generators 41 and 42. Can be said.
  • Patent Document 1 As another example of the conventional differential oscillator, in Patent Document 1, instead of the PMOS negative resistance generator 41, a differential pair circuit including a pair of NMOS transistors connected to each other by connecting their gate and drain. An oscillator in which is inserted is disclosed. Since this differential pair circuit is connected to its own gate and drain, negative resistance does not occur and it functions as a simple load.
  • the two negative resistance generators 41 and 42 have the effect of obtaining a stronger negative resistance than when only one of them is used, but the mutual conductance of the PMOS transistor is NMOS. As compared with the negative resistance of the negative resistance generator 42 alone, it has only a slight effect. For this reason, in order to obtain the negative resistance necessary for the oscillator to operate stably, the configuration of FIG. 5 combined with the negative resistance generator 41 using the PMOS transistor has only a small effect of reducing the operating current. .
  • an object of the present invention is to provide an oscillator that can operate stably by obtaining a necessary negative resistance with a small current.
  • an oscillator includes a first wiring and a second wiring, and a capacitive element and an inductor arranged in parallel with each other between the first wiring and the second wiring.
  • a negative resistance generator having a resonance circuit, and a plurality of transistors arranged so as to generate a negative resistance between the first wiring and the second wiring to cancel a loss generated in the resonance circuit;
  • a first bias terminal connected to the first wiring and the second wiring through the inductor; a second bias terminal connected to the first wiring and the second wiring through the plurality of transistors;
  • Each said first bias The terminals and the second bias terminal are connected in series with each other, and the plurality of transistors in the plurality of oscillation units are configured to have the same conductivity type.
  • the plurality of oscillating units are electrically coupled to each other so that the plurality of negative resistance generators are equivalently connected in parallel and the load resistance is increased. Furthermore, by electrically coupling the plurality of oscillation units, the plurality of resonance circuits are equivalently connected in parallel, and the capacitive elements and inductors of the plurality of resonance circuits are connected in parallel to each other.
  • the combined capacitance increases in proportion to the number of connected capacitive elements, and the combined value of resistance components indicating the loss of the capacitive elements and inductors is inversely proportional to the number of connected capacitive elements and inductors. Then decrease.
  • the Q values of the plurality of resonance circuits as a whole are proportional to the combined value of the capacitive element and the combined value of the resistance component indicating the loss, but the increase in the combined capacitance and the decrease in the combined value of the resistance component indicating the loss are mutually By canceling out, the Q value of the resonance circuit does not change as a result. For this reason, it is possible to obtain a sufficient negative resistance enough to cancel the resistance component generated in the plurality of resonance circuits without negatively operating the current, and a stable oscillation operation can be obtained.
  • the coupling portion includes a first capacitive element provided in a first coupling wiring that connects the first wirings of the plurality of oscillation units and a second coupling that connects the second wirings of the plurality of oscillation units.
  • the first wiring and the second wiring of the plurality of oscillation units are electrically connected to each other via the first capacitive element and the second capacitive element, respectively.
  • the impedance of the first capacitive element and the second capacitive element can be regarded as substantially zero. Therefore, the resonance circuits can be equivalently connected in parallel while preventing the direct current component of the current flowing through the first wiring and the second wiring from flowing directly between the resonance circuits. Therefore, the operating current can be reduced more effectively.
  • the coupling unit includes induction coils provided between the first wiring and the second wiring of the plurality of oscillation units, and the induction coils (coils) corresponding to the plurality of oscillation units are inducted by the induction coil. You may arrange
  • the coupling unit may be configured such that the inductors of the plurality of oscillation units are arranged in parallel so that electromagnetic induction occurs between the inductors.
  • the resonance circuits are equivalently connected in parallel without separately using a configuration in which the first wiring and the second wiring are electrically coupled to each other. Can be made.
  • the plurality of transistors may be N-type MOS transistors.
  • the present invention is configured as described above, and has the effect of being able to operate stably by obtaining the necessary negative resistance with a small current.
  • FIG. 1 is a circuit diagram showing a schematic configuration of the oscillator according to the first embodiment of the present invention.
  • FIG. 2 is a circuit diagram showing a more detailed configuration of the oscillator shown in FIG.
  • FIG. 3 is a circuit diagram showing a schematic configuration of an oscillator according to the second embodiment of the present invention.
  • FIG. 4 is a circuit diagram showing a schematic configuration of the oscillator according to the third embodiment of the present invention.
  • FIG. 5 is a circuit diagram showing a schematic configuration of an oscillator having a conventional CMOS configuration.
  • FIG. 1 is a circuit diagram showing a schematic configuration of the oscillator according to the first embodiment of the present invention.
  • an oscillator 1A in the present embodiment includes a plurality (two in the present embodiment) of oscillation units 10 and 20 (hereinafter also referred to as a first oscillation unit 10 and a second oscillation unit 20).
  • a coupling portion 30A that electrically couples the oscillation portions 10 and 20; These structures are formed on a semiconductor substrate.
  • the first oscillation unit 10 includes a resonance circuit (tank circuit) 13 having a capacitive element and an inductor (described later) disposed between the first wiring 11 and the second wiring 12 in parallel with each other, and a first wiring. 11 and the second wiring 12, a negative resistance generator 14 having a plurality of transistors (described later) disposed so as to generate a negative resistance that cancels the loss of the resonance circuit 13. Operates as a dynamic oscillator.
  • the second oscillation unit 20 includes a resonance circuit 23 and a negative resistance generator 24 between the first wiring 21 and the second wiring 22. In the negative resistance generators 14 and 24, the transistors that generate the negative resistance are all of the same conductivity type.
  • the oscillation units 10 and 20 include first bias terminals 15 and 25 connected to the first wirings 11 and 21 and the second wirings 12 and 22 via inductors of the resonance circuit 13, respectively, and a plurality of transistors. And second bias terminals 16 and 26 connected to the first wirings 11 and 21 and the second wirings 12 and 22.
  • the oscillation units 10 and 20 are connected in series with each other at the first bias terminal and the second bias terminal.
  • the first oscillating unit 10 and the second oscillating unit 20 include a second bias terminal 16 of the negative resistance generator 14 of the first oscillating unit 10 and a first bias terminal 25 of the second oscillating unit 20. Are connected in series with each other.
  • the first bias terminal 15 of the first oscillating unit 10 is connected to the positive voltage source VDD, and the second bias terminal 26 of the second oscillating unit 20 is connected to the ground GND.
  • the second bias terminal 26 of the second oscillation unit 20 may be connected to a voltage source having a voltage lower than the positive voltage source VDD instead of being connected to the ground GND.
  • the coupling unit 30A electrically couples the first wiring 11 of the first oscillating unit 10 and the first wiring 21 of the second oscillating unit 20 and also the second wiring 12 of the first oscillating unit 10 and the second oscillating unit.
  • the 20 second wirings 22 are electrically coupled.
  • the first wirings 11 and 21 and the second wirings 12 and 22 are electrically coupled to each other, whereby the plurality of negative resistance generators 14 and 24 are equivalently connected in parallel. Load resistance increases.
  • the first wirings 11 and 21 and the second wirings 12 and 22 are electrically coupled to each other, whereby the plurality of resonance circuits 13 and 23 are tightly coupled and equivalently connected in parallel.
  • the resonance circuits 13 and 23 oscillate at the same resonance frequency.
  • the overall Q value of the plurality of resonance circuits 13 and 23 does not change (details will be described later). For this reason, it is possible to obtain a sufficient negative resistance enough to cancel the resistance component generated in the plurality of resonance circuits 13 and 23 without increasing the operating current, and to obtain a stable oscillation operation.
  • FIG. 2 is a circuit diagram showing a more detailed configuration of the oscillator shown in FIG.
  • the resonant circuit 13 includes an inductor 133 and a capacitive element connected in parallel between the first terminal 131 connected to the first wiring 11 and the second terminal 132 connected to the second wiring 12. 134.
  • the first bias terminal 15 is connected to the first wiring 11 and the second wiring 12 via the inductor 133.
  • the resonance circuit 23 includes an inductor 233 and a capacitive element 234 connected in parallel with each other between the first terminal 231 and the second terminal 232.
  • the first bias terminal 25 is connected to the first wiring 21 and the second wiring 22 via the inductor 233.
  • FIG. 2 shows a configuration in which the first bias terminals 15 and 25 are connected to the central node of the inductors 133 and 233, but the present invention is not limited to this.
  • a plurality of inductors are connected in series.
  • the first bias terminal may be connected to any location where the inductors are connected.
  • the negative resistance generator 14 has one of main terminals (for example, a drain terminal) connected to a first terminal 141 connected to the first wiring 11 and a second terminal 142 connected to the second wiring 12, respectively.
  • a pair of transistors 143 and 144 are connected to each other (for example, source terminals).
  • each of the pair of transistors 143 and 144 is configured by an NMOS transistor (N-type MOSFET).
  • the control terminal (eg, gate terminal) of the transistor 143 is connected to one of the main terminals (eg, drain terminal) of the transistor 144, and the control terminal (eg, gate terminal) of the transistor 144 is connected to one of the main terminals of the transistor 143 (eg, drain). Terminal).
  • the negative resistance generator 24 includes a pair of transistors 243 and 244 in which one of the main terminals is connected to the first terminal 241 and the second terminal 242 and the other of the main terminals is connected to each other.
  • Each of the pair of transistors 243 and 244 is configured by an NMOS transistor.
  • the control terminal of the transistor 243 is connected to one of the main terminals of the transistor 244, and the control terminal of the transistor 244 is connected to one of the main terminals of the transistor 243.
  • the negative resistance generators 14 and 24 may have any configuration as long as negative resistance is generated by a plurality of transistors. For example, a plurality of pairs of transistors may be provided.
  • the second bias terminals 16 and 26 are connected to the other of the main terminals of the pair of transistors 143 and 144 and 243 and 244 (sides connected to each other) of the negative resistance generators 14 and 24.
  • the first oscillator 10 and the second oscillator 20 are connected in series by being connected to the first bias terminal 25 of one oscillator 20 and the second bias terminal 16 of the other first oscillator 10. Yes.
  • the first bias terminal 15 connected to the inductor 133 of the resonance circuit 13 is connected to the positive voltage source VDD, and the other of the main terminals of the pair of transistors 243 and 244 of the negative resistance generator 24.
  • the second bias terminal 26 connected to (the sides connected to each other) is connected to the ground GND.
  • the oscillating units 10 and 20 have a vertically stacked structure and are connected in series between the positive voltage source VDD and the ground GND, and thus operate with the same bias current.
  • the coupling unit 30A includes a first capacitive element 34 provided in the first coupling wiring 32 that connects the first wirings 11 and 21 of the oscillation units 10 and 20, and the second wirings 12 and 22 of the oscillation units 10 and 20. And a second capacitive element 33 provided in the second coupling wiring 31 for connecting the two.
  • the impedance of the first and second capacitive elements 33 and 34 with respect to the high-frequency signal generated in the resonance circuits 13 and 23 is small and can be regarded as substantially zero. Therefore, the resonance circuits 13 and 23 are equivalently connected in parallel to the high-frequency signal by the coupling unit 30A. Accordingly, the resonance circuits are equivalently connected in parallel while preventing the direct current component of the current flowing through the first wirings 11 and 21 and the second wirings 12 and 22 from flowing directly between the resonance circuits 13 and 23. be able to. Therefore, the operating current can be reduced more effectively.
  • the inductors 133 and 233 and the capacitive elements 134 and 234 of the resonance circuits 13 and 23 have the same inductance L and capacitance value C, respectively. Further, it is ideal that the inductors 133 and 233 and the capacitive elements 134 and 234 have no resistance component, but actually there are resistance components.
  • the resistance component indicating the loss due to these elements can be regarded as equivalent to a resistance element having a resistance value R connected in parallel with these elements.
  • the Q values of the resonance circuits 13 and 23 are represented by ⁇ CR which are respectively proportional to the combined capacitance of the capacitive elements 134 and 234 and the combined value of the resistance components indicating the loss.
  • ⁇ CR the combined capacitance value of the capacitive elements 134 and 234
  • the resistance value indicating the overall loss of the resonance circuits 13 and 23 can be regarded as an equivalent resistance element indicating the loss of each of the resonance circuits 13 and 23 being connected in parallel.
  • the Q values of the plurality of resonance circuits as a whole are such that the increase in the combined capacitance and the decrease in the combined value of the resistance component indicating the loss cancel each other, and as a result, the Q value of the resonance circuit does not change.
  • the plurality of resonance circuits 13 and 23 of the present embodiment can be regarded as one resonance circuit with respect to the Q value indicating the loss.
  • the negative resistance generators 14, 24 have transistors (MOS transistors) 143, 144, 243, 244 having the same conductivity type (N type), respectively, and are connected in parallel to the resonance circuits 13, 23, respectively. Since they are connected, the negative resistance in the entire two oscillation units 10 and 20 is doubled. Moreover, the two oscillating units 10 and 20 are connected in series with each other, and the bias current for operating them does not increase. Therefore, the negative resistance can be increased without increasing the Q value indicating the loss of the entire two oscillation units 10 and 20. Thereby, without increasing the operating current, it is possible to obtain a sufficient negative resistance enough to cancel the resistance component generated in the plurality of resonance circuits 13 and 23, and to obtain a stable oscillation operation.
  • MOS transistors MOS transistors
  • FIG. 3 is a circuit diagram showing a schematic configuration of an oscillator according to the second embodiment of the present invention.
  • the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted.
  • the difference of the oscillator 1B in the present embodiment from the first embodiment is that the coupling portion 30B is an induction coil provided between the first wirings 11 and 21 and the second wirings 12 and 22 of the plurality of oscillation units 10 and 20, respectively. 35, and the induction coils 35 and 36 are arranged in parallel so that electromagnetic induction occurs between the induction coils 35 and 36.
  • a high-frequency signal generated in the resonance circuits 13 and 23 due to electromagnetic induction by the induction coils 35 and 36 provided corresponding to each of the plurality of oscillation units 10 and 20 resonates through the induction coils 35 and 36. Transmission between the circuits 13 and 23 becomes possible. At this time, since the induction coils 35 and 36 are insulated, a direct current does not flow. Therefore, the resonance circuits 13 and 23 are equivalently connected in parallel while preventing the direct current component of the current flowing through the first wirings 11 and 21 and the second wirings 12 and 22 from flowing directly between the resonance circuits 13 and 23. Can be connected to. Therefore, the operating current can be reduced more effectively.
  • the first wirings 11 and 21 and the second wirings 12 and 22 of the plurality of oscillation units 10 and 20 are electrically coupled to each other as the first wirings 11 and 21.
  • the configuration is not limited to the configuration in which the second wirings 12 and 22 are connected to each other, and includes a configuration in which the first wirings 11 and 21 and the second wirings 12 and 22 are connected while being insulated.
  • FIG. 4 is a circuit diagram showing a schematic configuration of the oscillator according to the third embodiment of the present invention.
  • the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted.
  • the difference of the oscillator 1 ⁇ / b> C in the present embodiment from the first embodiment is that the coupling unit 30 ⁇ / b> C is arranged in parallel so that the inductors 133 and 233 of the plurality of oscillation units 10 and 20 generate electromagnetic induction between the inductors 133 and 233. Is configured.
  • FIG. 4 is a circuit diagram showing a schematic configuration of the oscillator according to the third embodiment of the present invention.
  • the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted.
  • the difference of the oscillator 1 ⁇ / b> C in the present embodiment from the first embodiment is that the coupling unit 30 ⁇ / b> C is arranged in parallel so that the induc
  • the coupling portion 30 ⁇ / b> C is shown by a broken line that connects the inductors 133 and 233.
  • the inductor 133 and the inductor 233 can be electromagnetically induced to each other. By being arranged in parallel, electrical coupling between the two is realized.
  • the induction coils 35 and 36 for electrically coupling the resonance circuits 13 and 23 are provided in addition to the inductors 133 and 233.
  • the inductor 133 and the induction coil 35 are connected in parallel. Since the inductor 233 and the induction coil 36 are connected in parallel, each can be equivalently composed of one inductor. That is, if the inductance of the inductor 133 is L1, and the inductance of the induction coil 35 is L2, the equivalent inductance value is L1 ⁇ L2 / (L1 + L2).
  • an inductor having such an inductance is used as the inductor 133 of the resonance circuit 13, and the inductors 133 and 233 of the plurality of resonance circuits 13 and 23 are inductively coupled (arranged so as to be capable of electromagnetic induction). is doing). Accordingly, the plurality of resonance circuits 13 and 23 are electrically coupled in the same manner as in the second embodiment without providing a separate coupling induction coil.
  • the first wirings 11 and 21 and the second wirings 12 and 22 are electrically coupled to each other by causing electromagnetic induction between the inductors 133 and 233 of the plurality of resonance circuits 13 and 23.
  • the resonance circuits 13 and 23 can be equivalently connected in parallel without using them. Thereby, the occupation area on the semiconductor substrate of the oscillator 1C can be reduced.
  • each resonance circuit and each negative resistance generator is not limited to the configuration illustrated in the above embodiment, and various configurations can be suitably applied.
  • an NMOS transistor is exemplified as a transistor constituting the negative resistance generator, but the present invention is not limited to this as long as a plurality of transistors used in the negative resistance generator have the same conductivity type.
  • an NPN transistor or a PNP transistor may be applied.
  • the capacitive element of the resonance circuit an element having a fixed capacitance is used as the capacitive element of the resonance circuit.
  • the present invention is not limited to this, and a variable capacitive element that can vary the capacitance according to the voltage may be used.
  • the oscillator can be configured as a voltage controlled oscillator (VCO) used in a phase locked loop (PLL) or the like.
  • the present invention is useful for operating the oscillator stably by obtaining a necessary negative resistance with a small current.

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  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)

Abstract

L'invention concerne un oscillateur apte à fonctionner de manière fiable par acquisition de la résistance négative nécessaire avec moins de courant. La présente invention comprend : une pluralité d'unités oscillantes (10 et 20) qui sont dotées de circuits résonants (13 et 23) ayant des éléments capacitifs (134 et 234) et des inductances (133 et 233) qui sont montés en parallèle, des générateurs de résistance négative (14 et 24) ayant une pluralité de transistors disposés de sorte que la résistance négative qui contrecarre la perte causée par les circuits résonants (13 et 23) soit produite, des premières bornes de polarisation (15 et 25) et des secondes bornes de polarisation (16 et 26) ; et une unité de couplage (30A) destinée à coupler électriquement la pluralité d'unités oscillantes (10 et 20) de sorte que les circuits résonants (13 et 23) soient couplés en parallèle de manière équivalente. Les différentes unités oscillantes (10 et 20) sont connectées en série entre elles au sein de la première borne de polarisation (25) et de la seconde borne de polarisation (16), respectivement, pour chaque unité oscillante. Une pluralité de transistors (143, 144, 243, 244), au sein des différentes unités oscillantes (10 et 20), est configurée avec des types de conductivité mutuellement identiques.
PCT/JP2011/000424 2010-10-28 2011-01-26 Oscillateur WO2012056600A1 (fr)

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JP2010242604A JP2012095225A (ja) 2010-10-28 2010-10-28 発振器
JP2010-242604 2010-10-28

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014200065A (ja) * 2013-03-12 2014-10-23 キヤノン株式会社 発振素子

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JP2003078349A (ja) * 2001-09-05 2003-03-14 Murata Mfg Co Ltd 平衡型発振回路およびそれを用いた電子装置
US6639481B1 (en) * 2002-08-20 2003-10-28 Intel Corporation Transformer coupled quadrature tuned oscillator
JP2005513826A (ja) * 2001-07-05 2005-05-12 テレフオンアクチーボラゲツト エル エム エリクソン（パブル） 発振器
JP2005198084A (ja) * 2004-01-08 2005-07-21 Matsushita Electric Ind Co Ltd 差動発振回路
JP2007110701A (ja) * 2005-10-11 2007-04-26 Samsung Electro Mech Co Ltd ボディーバイアス調節型電圧制御発振器
JP2009177388A (ja) * 2008-01-23 2009-08-06 Kawasaki Microelectronics Inc Ｌｃ発振器

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005513826A (ja) * 2001-07-05 2005-05-12 テレフオンアクチーボラゲツト エル エム エリクソン（パブル） 発振器
JP2003078349A (ja) * 2001-09-05 2003-03-14 Murata Mfg Co Ltd 平衡型発振回路およびそれを用いた電子装置
US6639481B1 (en) * 2002-08-20 2003-10-28 Intel Corporation Transformer coupled quadrature tuned oscillator
JP2005198084A (ja) * 2004-01-08 2005-07-21 Matsushita Electric Ind Co Ltd 差動発振回路
JP2007110701A (ja) * 2005-10-11 2007-04-26 Samsung Electro Mech Co Ltd ボディーバイアス調節型電圧制御発振器
JP2009177388A (ja) * 2008-01-23 2009-08-06 Kawasaki Microelectronics Inc Ｌｃ発振器

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014200065A (ja) * 2013-03-12 2014-10-23 キヤノン株式会社 発振素子

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