WO2011078171A1 - Procédé d'évaluation d'une cellule solaire et son dispositif d'évaluation - Google Patents

Procédé d'évaluation d'une cellule solaire et son dispositif d'évaluation Download PDF

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Publication number
WO2011078171A1
WO2011078171A1 PCT/JP2010/073012 JP2010073012W WO2011078171A1 WO 2011078171 A1 WO2011078171 A1 WO 2011078171A1 JP 2010073012 W JP2010073012 W JP 2010073012W WO 2011078171 A1 WO2011078171 A1 WO 2011078171A1
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region
evaluation
electrode layer
groove
solar cell
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PCT/JP2010/073012
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English (en)
Japanese (ja)
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和弘 山室
龍馬 金丸
宏一 滝田
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株式会社アルバック
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Priority to JP2011547569A priority Critical patent/JP5165799B2/ja
Publication of WO2011078171A1 publication Critical patent/WO2011078171A1/fr

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02S—GENERATION OF ELECTRIC POWER BY CONVERSION OF INFRARED RADIATION, VISIBLE LIGHT OR ULTRAVIOLET LIGHT, e.g. USING PHOTOVOLTAIC [PV] MODULES
    • H02S50/00—Monitoring or testing of PV systems, e.g. load balancing or fault identification
    • H02S50/10—Testing of PV devices, e.g. of PV modules or single PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the present invention relates to an evaluation method and an evaluation apparatus that can locally evaluate photoelectric conversion efficiency simply and with high accuracy in a desired region of a solar cell.
  • a solar cell using a silicon single crystal is excellent in energy conversion efficiency per unit area.
  • a solar cell using a silicon single crystal uses a silicon wafer obtained by slicing a silicon single crystal ingot, a large amount of energy is consumed for manufacturing the ingot, and the manufacturing cost is high.
  • a solar cell is manufactured using a silicon single crystal, it is considerably expensive at present.
  • solar cells using amorphous (amorphous) silicon thin films that can be manufactured at lower cost are widely used as low-cost solar cells.
  • Amorphous silicon solar cells use a semiconductor film having a layer structure called a pin junction in which an amorphous silicon film (i-type) that generates electrons and holes when receiving light is sandwiched between p-type and n-type silicon films. . Electrodes are formed on both sides of the semiconductor film. Electrons and holes generated by sunlight move actively due to the potential difference between the p-type and n-type semiconductors, and this is continuously repeated, causing a potential difference between the electrodes on both sides.
  • i-type amorphous silicon film
  • a transparent electrode such as TCO (Transparent Conductive Oxide) is formed on a glass substrate as a lower electrode, and a semiconductor film made of amorphous silicon, an upper electrode, A structure in which an Ag thin film or the like is formed is employed.
  • TCO Transparent Conductive Oxide
  • an amorphous silicon solar cell having a photoelectric conversion body composed of such upper and lower electrodes and a semiconductor film there is a problem that a potential difference is small and a resistance value is large only by depositing each layer uniformly over a wide area on a substrate. is there.
  • an amorphous silicon solar cell is configured by forming partition elements in which photoelectric conversion bodies are electrically partitioned for each predetermined size and electrically connecting partition elements adjacent to each other.
  • partition elements in which photoelectric conversion bodies are electrically partitioned for each predetermined size and electrically connecting partition elements adjacent to each other.
  • a plurality of strip-shaped partition elements are obtained by forming grooves called scribe lines with a laser beam or the like in a photoelectric converter uniformly formed over a large area on a substrate.
  • the structure in which the partition elements are electrically connected in series is employed.
  • the thin film solar cell of such a structure it is known that some structural defects will arise in a manufacture stage. For example, when the thin film is formed, particles may be mixed into the thin film solar cell or a pinhole may be generated, so that the upper electrode and the lower electrode are locally short-circuited. Further, after the photoelectric conversion body is formed on the substrate, when the photoelectric conversion body is divided into a plurality of partition elements by the scribe line, the metal film constituting the upper electrode is melted along the scribe line to form the lower electrode. And the upper electrode and the lower electrode may be locally short-circuited by the molten metal.
  • FIGS. 8A to 8F are schematic cross-sectional views for explaining a conventional measurement method for locally measuring the photoelectric conversion efficiency of a part of a solar cell.
  • a first electrode layer 13 (lower electrode) and a semiconductor layer 14 ′ are stacked in this order on a light-transmitting substrate 11 ′.
  • FIG. 8A a first electrode layer 13 (lower electrode) and a semiconductor layer 14 ′ are stacked in this order on a light-transmitting substrate 11 ′.
  • a mask 91 used to form a second electrode layer 15 ′ (upper electrode) having a desired pattern is formed on the semiconductor layer 14 ′ by patterning.
  • a method for forming the mask for example, a known patterning method such as laminating a photoresist on the semiconductor layer 14 ′, performing exposure and development is used.
  • a second electrode layer 15 ′ is stacked on the semiconductor layer 14 ′ on which the mask 91 is patterned.
  • the mask 91 is removed, and the second electrode layer 15 ′ is patterned.
  • FIG. 8E a part of the semiconductor layer 14 ′ exposed by removing the mask 91 is removed to form a removed portion.
  • a conductive layer 92 is provided in a part of the removal portion so as to be in contact with the first electrode layer 13 and the semiconductor layer 14 ′ and not to be in contact with the second electrode layer 15 ′.
  • the substrate 11 ′ and the second electrode layer 15 ′ are electrically connected to produce the minicell 10a.
  • solder can be used as a material of the conductive layer 92.
  • FIG. 9 shows a schematic plan view of a solar cell 10 ′ having such a minicell 10a.
  • FIG. 10 is a schematic cross-sectional view for explaining a conventional method of irradiating light to a minicell.
  • reference numeral 330 denotes a probe such as a current / voltage measuring instrument, and the conductive layer 92 is in contact with the second electrode layer 15 'formed in the minicell 10a.
  • the photoelectric conversion efficiency in a minicell is measured locally using the apparatus which measures a current-voltage characteristic.
  • FIG. 11 is a schematic diagram illustrating an example in which the solar cell 10 ′ is divided into a plurality of small batteries. Furthermore, as shown in FIG.
  • This invention is made
  • the solar cell evaluation method provides a substrate in which at least a first electrode layer and a semiconductor layer are laminated in this order, and a predetermined photoelectric conversion efficiency is evaluated.
  • a first groove is formed by removing the semiconductor layer so as to surround the evaluation region, and a second electrode layer is stacked on the semiconductor layer on which the first groove is formed, thereby Burying the second electrode layer in a groove and removing the semiconductor layer and the second electrode layer in an inner region surrounded by the first groove in a direction parallel to the substrate.
  • the substrate and the first electrode layer are light transmissive, and the substrate is opposite to the surface on which the first electrode layer is formed. It is preferable to form the first groove and the second groove by irradiating the surface with a laser.
  • the solar cell evaluation method provides a substrate in which at least a first electrode layer and a semiconductor layer are laminated in this order, and a second electrode layer is formed on the semiconductor layer.
  • a second removal portion is formed, so as not to contact the second electrode layer and along the evaluation region, Forming a conductive layer for burying the second removal portion, electrically insulating the evaluation region from the peripheral region, irradiating only the evaluation region electrically insulated from the peripheral region, and the evaluation region;
  • a solar cell evaluation apparatus surrounds a first evaluation apparatus and a predetermined evaluation region, in which a first electrode layer and a semiconductor layer are stacked in this order on a substrate.
  • the first removing device for forming the first groove by removing the semiconductor layer as described above, and the second electrode layer on the semiconductor layer in which the first groove is formed, Removing the semiconductor layer and the second electrode layer in an inner region surrounded by the first groove in a direction parallel to the substrate and a second laminating apparatus for burying the second electrode layer in one groove Forming a second groove and electrically irradiating the region including the evaluation region electrically isolated from the peripheral region and a second removing device that electrically isolates the evaluation region from the peripheral region Including a light irradiating part and the evaluation region And a measuring unit for measuring a current-voltage characteristic in the evaluation region when light is irradiated to pass.
  • the first removal device and the second removal device each include a laser light source, the light irradiation unit includes a light source, and the measurement unit includes a current or a voltage. It is preferable that any one or more of the laser light source, the light source, and the probe move independently above the solar cell.
  • a solar cell evaluation apparatus includes a stacking apparatus that stacks a first electrode layer and a semiconductor layer on a substrate in this order, and a second electrode forming unit that forms a second electrode layer on the semiconductor layer. And a first removal device that forms a first removal portion on the second electrode layer so as to be along a predetermined evaluation region, and in the first removal portion, the semiconductor layer along the first removal portion.
  • a second removal device for forming a second removal portion, so as not to contact the second electrode layer, and along the evaluation region, Only a conductive layer forming portion for forming a conductive layer for burying the second removal portion, an insulating portion for electrically insulating the evaluation region from the peripheral region, and only the evaluation region electrically insulated from the peripheral region A light irradiating part for irradiating light to the evaluation area, The evaluation region and in contact probe placement on the conductive layer when that includes a measuring unit for measuring the current-voltage characteristics in the evaluation region.
  • FIG. 1A It is a schematic sectional drawing which illustrates the solar cell evaluated by the evaluation method of 1st Embodiment of this invention. It is an expanded sectional view which shows the part shown by the code
  • FIG. 1A is a schematic cross-sectional view showing a solar cell to which the evaluation method of the first embodiment of the present invention is applied.
  • FIG. 1B is an enlarged cross-sectional view showing a portion indicated by reference numeral A in FIG. 1A.
  • the solar cell 10 includes a photoelectric conversion body 12 in which at least a first electrode layer 13 (lower electrode), a semiconductor layer 14, and a second electrode layer 15 (upper electrode) are stacked in this order on the first surface 11a of the substrate 11. Prepare.
  • the substrate 11 is made of, for example, an insulating material having excellent sunlight permeability and durability such as glass or transparent resin.
  • the solar cell 10 can be made to generate electric power by making sunlight incident on the second surface 11 b of the substrate 11.
  • the first electrode layer 13 is made of a transparent conductive material, for example, a light transmissive metal oxide such as TCO or ITO.
  • the second electrode layer 15 is formed of a conductive metal film such as Ag or Cu.
  • the semiconductor layer 14 has an i-type silicon film 16 sandwiched between a p-type silicon film 17 and an n-type silicon film 18 as shown in FIG. 1B. It has a pin junction structure.
  • sunlight enters the semiconductor layer 14 electrons and holes are generated, and the electrons and holes move actively due to the potential difference between the p-type silicon film 17 and the n-type silicon film 18, and this is repeated continuously.
  • a potential difference is generated between the first electrode layer 13 and the second electrode layer 15 (photoelectric conversion).
  • any material such as an amorphous type or a nanocrystal type is adopted.
  • the photoelectric conversion body 12 is usually divided into a plurality of partition elements whose outer shape is a strip shape, for example, by a scribe line (not shown).
  • the partition elements are electrically partitioned from each other, and are electrically connected in series, for example, between partition elements adjacent to each other.
  • the photoelectric conversion body 12 has a structure in which a large number of partition elements are all electrically connected in series, and can extract a current with a high potential difference.
  • the scribe line is formed, for example, by forming the photoelectric conversion body 12 uniformly on the first surface 11a of the substrate 11 and then forming grooves in the photoelectric conversion body 12 at a predetermined interval by a laser or the like. In the first embodiment, the operation described below is performed in a region where no scribe line is formed.
  • a protective layer made of an insulating resin or the like may be further formed on the second electrode 15 constituting the photoelectric converter 12.
  • a single-type semiconductor layer configured by a single pin junction structure is illustrated, but the present invention is not limited to this structure.
  • a tandem semiconductor layer in which a plurality of pin junction structures such as three are stacked may be employed.
  • the layer (film thickness, type of film material, etc.) on which photoelectric conversion is performed can be adjusted in accordance with the wavelength band of light irradiated on the solar cell.
  • FIGS. 2A to 3D are diagrams for explaining an evaluation method according to the first embodiment of the present invention.
  • FIGS. 2A to 2D are schematic cross-sectional views for explaining a process for manufacturing a minicell
  • FIGS. 3A to 3D are schematic plan views.
  • First groove forming step In the evaluation method of the first embodiment of the present invention, first, the first electrode layer 13 and the semiconductor layer 14 are stacked in this order on the first surface 11a of the substrate 11 as shown in FIGS. 2A and 3A. Thereafter, the semiconductor layer 14 is removed so as to surround the predetermined evaluation region, and a step of forming the first groove 140a (first groove forming step) is performed.
  • the predetermined evaluation area is an area located between the first grooves 140a in FIG. 2A and is an area surrounded by the first grooves 140a in FIG. 3A.
  • a known method is used as a method for forming the first electrode layer 13 and the semiconductor layer 14.
  • the thickness of the 1st electrode layer 13 and the semiconductor layer 14 may be the same as the thickness in the layer structure of the conventional solar cell.
  • the first groove 140a can be formed, for example, by irradiating a laser.
  • the wavelength of the laser is preferably in the range of about 500 to 560 nm, and it is usually preferable to use a green laser of 532 nm.
  • As a laser irradiation method it is preferable to irradiate the laser toward the second surface 11b of the substrate 11 (the surface opposite to the surface on which the first electrode layer 13 is formed).
  • the width of the first groove 140a (the width in the plan view of FIG. 3A) Wa is not limited to a specific width as long as the region Ra surrounded by the first groove 140a is electrically insulated from the peripheral region.
  • the width Wa is preferably about 10 to 200 ⁇ m, and more preferably about 80 to 120 ⁇ m.
  • the present invention is not limited to this structure, and a part of the first groove 140a.
  • the width of the first groove 140a may be different from the width of the other part, or the width of the first groove 140a may be different throughout (the width of the first groove 140a may be entirely changed).
  • a structure in which the width Wa of the first groove 140a is the same throughout is most preferable in that the groove can be easily formed.
  • a structure in which the first electrode layer 13 is not removed is illustrated. However, as long as the effect of the present invention is not hindered, one of the first electrode layers 13 close to the semiconductor layer 14 is illustrated. The part may be removed.
  • the surface area of the region Ra in the direction parallel to the substrate 11 can be arbitrarily set according to the purpose (necessary).
  • the surface area of the evaluation region Rb described later is considered.
  • the surface area of the region Ra is preferably about 36 to 225 mm 2 , and more preferably about 64 to 144 mm 2 .
  • the length of one side is preferably about 6 to 15 mm, and more preferably about 8 to 12 mm.
  • the shape of the region Ra is a substantially square shape in a plan view.
  • a structure in which the three-dimensional shape (the entire shape) of the region Ra is a substantially quadrangular prism shape is illustrated.
  • the present invention is not limited to this structure, and the shape of the region Ra may be another polygonal shape such as a substantially triangular shape or a substantially pentagonal shape, or may be another shape such as a substantially circular shape or a substantially elliptical shape. It may be.
  • the region Ra may be formed in a composite shape in which two or more of the plurality of shapes are combined, and further formed in an indefinite shape that does not belong to any of the plurality of shapes. May be. However, it is most preferable that the region Ra is formed in a polygonal shape, particularly a substantially rectangular shape, in that the region Ra can be easily formed.
  • the second electrode is formed on the surface on the substrate 11 on which the first groove 140a is formed.
  • the layer 15 is laminated, and the second electrode layer 15 is buried in the first groove 140a (second electrode layer forming step).
  • a method for forming the second electrode layer 15 a known method is used.
  • the thickness of the second electrode layer 15 may be the same as the thickness of the conventional solar cell layer structure, except for the thickness of the second electrode layer 15 buried in the first groove 140a.
  • part in which the 2nd electrode layer 15 is embedded should just be formed in the whole depth direction (thickness direction of the semiconductor layer 14) of the 1st groove
  • a gap may exist in a part of the second electrode layer 15, but it is preferable that the volume of the gap is small, and all of the first groove 140 a is buried in the second electrode layer 15. It is particularly preferred that By performing the second electrode layer forming step, the second electrode layer 15 and the first electrode layer 13 can be brought into electrical contact through the portion of the second electrode layer 15 buried in the first groove 140a. It becomes possible.
  • the second groove 140b is formed by removing the semiconductor layer 14 and the second electrode layer 15 (second groove forming step). By this step, an evaluation region that is electrically insulated from the peripheral region is formed.
  • the solar cell 10 in which the minicell 10a including the evaluation region Rb surrounded by the second groove 140b and insulated from the region Ra is formed is obtained.
  • the second groove 140b As a method of forming the second groove 140b, a method similar to the method of forming the first groove 140a may be used. As a method for removing the semiconductor layer 14 and the second electrode layer 15, the method for removing the semiconductor layer 14 may be the same as or different from the method for removing the second electrode layer 15. Further, the semiconductor layer 14 and the second electrode layer 15 may be removed at the same time, or may be removed separately sequentially.
  • the width (the width in the plan view of FIG. 3A) Wb of the second groove 140b is not limited to a specific width as long as the evaluation region Rb is electrically insulated from the peripheral region.
  • the width Wb may be the same as the width Wa of the first groove 140a.
  • a structure in which the width Wb is the same throughout is exemplified as the second groove 140b, but the present invention is not limited to the structure, and a part of the second groove 140b.
  • the width of the second groove 140b may be different from the width of the other portion, or the width of the second groove 140b may be different throughout (the width of the second groove 140b may be entirely changed).
  • the structure in which the width Wb of the second groove 140b is the same throughout is most preferable in that the groove can be easily formed.
  • a structure in which the first electrode layer 13 is not removed is illustrated. However, as long as the effect of the present invention is not hindered, one of the first electrode layers 13 close to the semiconductor layer 14 is illustrated. The part may be removed.
  • the surface area of the evaluation region Rb in the direction parallel to the substrate 11 (the surface area of the evaluation region Rb in the plan view of FIG. 3C) can be arbitrarily set to be smaller than the surface area of the region Ra in the direction parallel to the substrate 11.
  • the surface area of the evaluation region Rb is preferably about 1 to 100 mm 2 , and more preferably about 9 to 49 mm 2 .
  • the length of one side is preferably about 1 to 10 mm, more preferably about 3 to 7 mm. preferable.
  • region Rb is substantially square shape in a top view is illustrated.
  • a structure in which the three-dimensional shape (the overall shape) of the evaluation region Rb is a substantially quadrangular prism shape is illustrated.
  • the present invention is not limited to this structure, and the shape of the evaluation region Rb may be other polygonal shapes such as a substantially triangular shape and a substantially pentagonal shape, or may be other shapes such as a substantially circular shape and a substantially elliptical shape. It may be a shape.
  • the evaluation region Rb may be formed in a composite shape in which two or more types of shapes are combined, and further formed in an indefinite shape that does not belong to any of the plurality of shapes. May be. However, it is most preferable that the evaluation region Rb is formed in a polygonal shape, particularly a substantially rectangular shape, in that the evaluation region Rb can be easily formed.
  • the semiconductor layer 14 and the second electrode layer 15 are removed to remove the third groove 140c. It is preferable to perform a step of forming (third groove forming step). In this step, in the direction parallel to the substrate 11, the outer region of the first groove 140a in which the second electrode layer 15 is buried (the region located outside the inner region surrounded by the first groove 140a). ) Is formed with a third groove 140c. By this step, the region including the entire first groove 140a is electrically insulated from the peripheral region.
  • the region Rc surrounded by the third groove 140c is electrically insulated from the peripheral region, and the photoelectric conversion efficiency in the evaluation region Rb is evaluated with higher accuracy.
  • the region Rc includes a region Ra including the evaluation region Rb.
  • the width Wc of the third groove 140c is not limited to a specific width as long as the region Rc is electrically insulated from the peripheral region.
  • the width Wc may be the same as the width Wb of the second groove 140b.
  • the surface area of the region Rc in the plan view of FIG. 3D can be arbitrarily set to be larger than the surface area of the region Ra in the plan view. For example, it is preferable to set the surface area of the region Rc in consideration of the distance between probes such as a current / voltage measuring instrument used when evaluating photoelectric conversion efficiency.
  • the shape of the region Rc in the plan view may be the same as the shape of the region Ra or the evaluation region Rb.
  • the form (structure) of the third groove 140c may be the same as that of the second groove 140b.
  • the evaluation method of the first embodiment of the present invention the state in which the first electrode layer 13 is not removed is illustrated, but the first electrode close to the semiconductor layer 14 within a range that does not hinder the effects of the present invention. A part of the layer 13 may be removed.
  • the second groove forming step is insulated from the peripheral region.
  • Light is irradiated to a region including the evaluation region (irradiation process).
  • the region irradiated with the light only needs to include the evaluation region Rb, and the outside of the evaluation region Rb.
  • Light may be irradiated to a region located at the position. As shown in FIG. 4A, the light is applied to the substrate 11 of the solar cell 10 and enters the semiconductor layer 14 through the substrate 11.
  • the evaluation region Rb is electrically insulated from the peripheral region, there is no need to limit the region irradiated with light with a light shielding plate or the like when performing the irradiation step, and the irradiation step is simplified. Can be done.
  • the current-voltage characteristics in the evaluation region when the region including the evaluation region is irradiated with light is then measured (measurement step).
  • the measurement process is performed as illustrated in FIGS. 4A and 4B.
  • FIGS. 4A and 4B are diagrams illustrating a method for measuring current-voltage characteristics in the measurement process of the first embodiment, FIG. 4A is a schematic cross-sectional view, and FIG. 4B is a schematic plan view.
  • the arrow shown by FIG. 4A and 4B represents the electric current at the time of a measurement.
  • the first probe 330A current-voltage characteristic measurement unit, measurement unit
  • the second electrode layer 15 formed in the evaluation region Rb The second electrode layer formed outside the second groove 140b in the direction parallel to the substrate 11 (outside the region surrounded by the second groove 140b) and close to the first groove 140a 15, the second probe 330B (current-voltage characteristic measurement unit, measurement unit) is placed in contact.
  • the 2nd electrode layer 15 is formed in the surface located opposite to the surface of the solar cell 10 with which light is irradiated.
  • the current-voltage characteristics can be measured through the second electrode layer 15 that surrounds the evaluation region Rb insulated from the peripheral region and is buried in the first groove 140a. At this time, the evaluation region Rb is reliably insulated from other regions (peripheral regions), and thus is not affected by the other regions.
  • the place where the probe arranged outside the evaluation region Rb is arranged is the first groove in which the second electrode layer 15 is buried. It is close to 140a.
  • the position where the second probe 330B is arranged is the first groove in which the second electrode layer 15 is buried. It is close to 140a.
  • a probe 330B may be arranged. Further, both of the two second probes 330B may be disposed at a position (inner position) between the concave portion 150a and the second groove 140b in a direction parallel to the substrate.
  • both of the two second probes 330B may be disposed at a position (outside position) between the concave portion 150a and the third groove 140c in a direction parallel to the substrate. Further, either one or both of the two second probes 330B may be disposed on the concave portion 150a.
  • the voltage (or resistance) flowing through the minicell 10a may be measured by applying a voltage to the minicell 10a by using the probes 330A and 330B.
  • the current-voltage characteristic is It is possible to detect whether the minicell 10a is defective before measurement. Further, the relationship between the resistance between the electrodes of the minicell 10a and the current-voltage characteristics can also be measured.
  • the evaluation method of the first embodiment of the present invention is significantly superior to the conventional evaluation method in that the photoelectric conversion efficiency in a predetermined region of the solar cell can be evaluated easily and with high accuracy.
  • the solar cell evaluation apparatus of the first embodiment of the present invention is used in the above-described evaluation method.
  • the evaluation apparatus forms a first groove by removing the semiconductor layer so as to surround a predetermined evaluation region, and a first stacking apparatus that stacks a first electrode layer and a semiconductor layer in this order on a substrate.
  • a first removing device and a second laminating device for burying the second electrode layer in the first groove by laminating a second electrode layer on the semiconductor layer in which the first groove is formed A second groove is formed by removing the semiconductor layer and the second electrode layer in an inner region surrounded by the first groove in a direction parallel to the substrate, and the evaluation region is a peripheral region
  • the evaluation region means, for example, an evaluation region Rb that is evaluated by irradiating light to the solar cell 10 after the minicell 10a shown in FIGS. 2A to 3D is formed.
  • the first laminating apparatus and the second laminating apparatus are the same apparatuses as those used when forming an electrode layer, a semiconductor layer, or the like in a conventional solar cell manufacturing apparatus.
  • Examples of the first removal device and the second removal device include a laser irradiation device provided with a laser light source.
  • the laser irradiation apparatus is preferably capable of irradiating a laser having a wavelength of about 500 to 560 nm, usually a green laser of 532 nm.
  • the light irradiation apparatus As a light irradiation part, the light irradiation apparatus provided with the light source can be illustrated.
  • “light source” represents “light source constituting the light irradiation unit” and is distinguished from “laser light source constituting the first removal device or the second removal device”.
  • a structure of the light irradiation device a structure including one light source may be employed, or a structure including two or more light sources may be employed.
  • the plurality of light sources may be the same as each other, one of the plurality of light sources may be different from the other light sources, or all of the plurality of light sources may be different from each other.
  • “the light sources are different” means, for example, that the wavelengths of light emitted from a plurality of light sources are different from each other.
  • a current-voltage measuring device including a plurality of probes can be employed.
  • a structure of the current voltage measuring device a so-called four-terminal structure having two sets of probes each having a voltage probe and a current probe provided separately, the voltage probe and the current probe are integrated.
  • a structure or the like having two probes provided in can be employed.
  • a structure including 2n (n represents an integer of 2 or more) probes can be employed.
  • the evaluation apparatus it is preferable that any one or more of the laser light source, the light source, and the probe can independently move above the solar cell.
  • the evaluation apparatus preferably includes a first fixing unit that moves at least one of the laser light source, the light source, and the probe onto a predetermined region.
  • the device (laser light source, light source, and probe) provided in the first fixed part is movable.
  • a plurality of first fixing parts may be provided in the evaluation device, and the first fixing parts may be provided independently for each of the laser light source, the light source, and the probe.
  • each of the laser light source, the light source, and the probe can be independently moved by the plurality of first fixing portions, stopped at a desired position, and positioning can be performed.
  • fixed part is provided with the 1st control part which consists of a computer etc. which were electrically connected with the 1st fixing
  • the first control unit can automatically control the movement of the first fixing unit.
  • a solar cell to be evaluated is fixed and a second fixing portion is provided that moves the solar cell, stops it at a desired position, and performs positioning. .
  • fixed part is provided with the 2nd control part which consists of a computer etc. which were electrically connected with the 2nd fixing
  • the second control unit can automatically control the movement of the second fixing unit.
  • the first control unit and the second control unit may be configured integrally.
  • “on the solar cell” to which the laser light source or the like moves may be “on the substrate of the solar cell” or “on the photoelectric converter”.
  • the movable device selected from the laser light source, the light source, the probe, the first fixed portion, and the second fixed portion, the combination of the movable devices, and the moving direction are not limited to the above-described embodiments.
  • the movable device, the combination of movable devices, and the moving direction are arbitrarily selected and set according to the purpose.
  • any one of the laser light source, the light source, the probe, the first fixing unit, and the second fixing unit may be movable in a direction parallel to the substrate, or the other device may be in a direction perpendicular to the substrate It may be movable.
  • the above-described embodiment is an example of the present invention, and an embodiment according to the situation is adopted.
  • the evaluation apparatus may be disposed at a position different from the position where the solar cell manufacturing apparatus is disposed, or may be incorporated into the solar cell manufacturing apparatus.
  • a device for laminating an electrode layer or a semiconductor layer in the solar cell manufacturing apparatus for example, a film forming device
  • the first stacking layer is the first stacking layer. It has the function of a device and a second laminating device.
  • the evaluation region can be easily and accurately insulated from the peripheral region.
  • the above-described process evaluation method
  • a large amount of samples (minicells) can be processed (evaluated) in a short time.
  • the evaluation region electrically insulated from the peripheral region is provided, and the region including the region is irradiated with light so that the current in the evaluation region is not affected by the peripheral region.
  • Voltage characteristics can be measured, and photoelectric conversion efficiency can be locally evaluated with high accuracy. For example, if it is found that a plurality of regions where current-voltage characteristics are measured have a region having a photoelectric conversion efficiency greatly different from other regions, it can be determined that a structural defect exists in the region.
  • the evaluation method of the first embodiment of the present invention is not applied, it is difficult to accurately determine whether or not the obtained measurement result is affected by a structural defect.
  • the present invention evaluates the photoelectric conversion efficiency distribution in the direction parallel to the thin film of the solar cell easily and with high accuracy, and if the distribution is generated, specifies the location easily and with high accuracy.
  • FIGS. 5A to 6E are diagrams for explaining an evaluation method according to the second embodiment of the present invention.
  • FIGS. 5A to 5E are schematic cross-sectional views for explaining a process for manufacturing a minicell
  • FIGS. 6A to 6E are schematic plan views.
  • a first removal portion from which the second electrode layer has been removed is formed along the evaluation region.
  • a part of the semiconductor layer and the first electrode layer is further removed along the first removal portion to form a second removal portion.
  • the first electrode layer 23 and the semiconductor layer 24 are stacked in this order on the substrate 11 having light transmittance.
  • a mask 91 used for forming the second electrode layer 25 having a desired pattern is patterned on the semiconductor layer 24.
  • a known patterning method is used such as performing exposure and development after laminating a photoresist on the semiconductor layer 24.
  • the second electrode layer 25 is laminated on the semiconductor layer 24 on which the mask 91 is formed by patterning.
  • the mask 91 is removed, and the second electrode layer 25 is patterned on the semiconductor layer 24.
  • the second electrode layer 25 is removed along the region that becomes the evaluation region Rd in a later step, and the first removal portion 240a in which a part of the semiconductor layer 24 is exposed is formed.
  • the outer shape of the first removal portion 240a in the plan view is a quadrangle.
  • a part of the exposed semiconductor layer 24 and a part of the first electrode layer 23 are removed along the pattern of the first removal portion 240a.
  • the second removal portion 240b having a quadrangular outer shape is formed.
  • the step-like groove 240 including the first removal portion 240a and the second removal portion 240b and the evaluation region Rd are formed.
  • a structure in which the semiconductor layer 24 and a part of the first electrode layer 23 close to the semiconductor layer 24 are removed is illustrated. It may not be removed.
  • the conductive layer 92 is formed along the pattern of the evaluation region Rd so that the formed second removal portion 240b is buried and is not in contact with the second electrode layer 25. Specifically, as shown in FIGS. 5E and 6E, the conductive layer 92 is formed along the evaluation region Rd so as to fill the second removal portion 240b and not to contact the second electrode layer 25. . Thereby, the solar cell 20 in which the minicell 20a in which the conductive layer 92 and the second electrode layer 25 are electrically connected is formed is obtained.
  • the conductive layer 92 is formed along the groove 240, and the shape of the conductive layer 92 is a quadrangle in a plan view.
  • the conductive layer 92 can be formed using, for example, solder.
  • the solar cell 20 shown in FIGS. 5E and 6E has the same structure as the solar cell 10 shown in FIG. 1 except that the minicell 20a is formed.
  • the materials or thicknesses of the substrate 11, the first electrode layer 23, the semiconductor layer 24, and the second electrode layer 25 in FIGS. 5A to 6E are respectively the substrate 11, the first electrode layer 13 and the first electrode layer 13 in FIGS. Similar to the semiconductor layer 14 and the second electrode layer 25.
  • the size or shape of the evaluation region Rd is the same as the size or shape of the evaluation region Rb in FIGS. 2A to 3D.
  • the width or shape of the second removal portion 240b is the same as the width or shape of the first groove 140a in FIGS. 2A to 3D.
  • the width or shape of the first removal portion 240a is appropriately adjusted according to the size or shape of the evaluation region Rd.
  • FIGS. 7A and 7B are diagrams for explaining a method of measuring current-voltage characteristics in the measurement process of the second embodiment, FIG. 7A is a schematic cross-sectional view, and FIG. 7B is a schematic plan view. Moreover, the arrow shown by FIG. 7A and FIG. 7B represents the electric current at the time of a measurement. Specifically, in the solar cell 20 obtained by the steps shown in FIGS.
  • the light shielding plate 93 is placed on the light irradiation surface (first electrode layer) of the substrate 11 as illustrated in FIGS. 7A and 7B. 23, the surface on which the semiconductor layer 24 and the second electrode layer 25 are not formed).
  • the light shielding plate 93 has an opening, and only the light irradiated on the substrate 11 through the opening enters the solar cell 20.
  • the portion of the substrate 11 covered with the light shielding plate 93 and having no opening is not irradiated with light.
  • variety of an opening part corresponds with the width
  • Reference numerals 330A and 330B shown in FIGS. 7A and 7B represent probes (current-voltage characteristic measuring unit, measuring unit) such as a current-voltage measuring device.
  • the first probe 330A is placed in contact with the evaluation region Rd in the minicell 20a.
  • the second probe 330 ⁇ / b> B is disposed in contact with the conductive layer 92. When current flows from the first probe 330A toward the second probe 330B, the current-voltage characteristics of the minicell 20a are locally measured.
  • the solar cell evaluation apparatus includes a stacking apparatus that stacks a first electrode layer and a semiconductor layer in this order on a substrate, and a second electrode formation that forms a second electrode layer on the semiconductor layer.
  • a first removal device that forms a first removal portion on the second electrode layer along a predetermined evaluation region, and the first removal portion, the semiconductor along the first removal portion Removing a part of the layer and the first electrode layer, a second removal device for forming a second removal portion, and so as not to contact the second electrode layer and along the evaluation region
  • a conductive layer forming part for forming a conductive layer for burying the second removal part; an insulating part for electrically insulating the evaluation area from the peripheral area; and the evaluation area electrically insulated from the peripheral area
  • a light irradiating unit that irradiates only the light, and the evaluation region is irradiated with light.
  • the 2nd removal apparatus in 2nd Embodiment of the evaluation apparatus of a solar cell is the same as that of the said 1st removal apparatus and 2nd removal apparatus in 1st Embodiment of the evaluation apparatus of a solar cell.
  • the conductive layer forming part an apparatus for forming a conductive layer such as solder is used.
  • the light irradiation part in 2nd Embodiment of the evaluation apparatus of a solar cell is the same as the light irradiation part in 1st Embodiment of the evaluation apparatus of a solar cell.
  • the measurement part in 2nd Embodiment of the evaluation apparatus of a solar cell is the same as the measurement part in 1st Embodiment of the evaluation apparatus of a solar cell.
  • Such an evaluation apparatus may further include an apparatus for removing the second electrode layer along the evaluation region.
  • an evaluation apparatus may be arrange

Landscapes

  • Photovoltaic Devices (AREA)

Abstract

Le procédé d'évaluation de cellule solaire selon l'invention consiste : à former un premier sillon (140a) en retirant la couche semi-conductrice (14) de manière à entourer la zone d'évaluation (Rb) ; à stratifier une seconde couche d'électrode (15) sur la couche semi-conductrice (14) dans laquelle le premier sillon (140a) a été formé, pour ainsi incorporer la seconde couche d'électrode (15) dans le premier sillon (140a) ; à former un second sillon (140b) dans la zone entourée par le premier sillon (140a) et située à l'intérieur de ce dernier dans la direction parallèle au substrat (11), le second sillon étant formé en retirant la couche semi-conductrice (14) et la seconde couche d'électrode (15), isolant ainsi électriquement la zone d'évaluation (Rb) de la zone qui l'entoure ; à irradier une zone comprenant la zone d'évaluation (Rb) qui a été électriquement isolée de la zone qui l'entoure, avec de la lumière ; et à mesurer les propriétés de courant et de tension dans la zone d'évaluation (Rb) tandis que la zone comprenant la zone d'évaluation (Rb) est irradiée avec de la lumière.
PCT/JP2010/073012 2009-12-22 2010-12-21 Procédé d'évaluation d'une cellule solaire et son dispositif d'évaluation WO2011078171A1 (fr)

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JPS5669870A (en) * 1979-11-13 1981-06-11 Fuji Electric Co Ltd Amorphous semiconductor photoelectric converting device
JP2000252502A (ja) * 1999-03-02 2000-09-14 Kanegafuchi Chem Ind Co Ltd 光電変換装置およびその製造方法
JP2001111085A (ja) * 1999-10-14 2001-04-20 Kanegafuchi Chem Ind Co Ltd 太陽電池モジュールの製造方法
JP2001274447A (ja) * 2000-03-23 2001-10-05 Kanegafuchi Chem Ind Co Ltd 集積型薄膜太陽電池の製造方法
JP2009195968A (ja) * 2008-02-25 2009-09-03 Mitsubishi Electric Corp レーザスクライブ装置

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JPS5920870A (ja) * 1982-07-27 1984-02-02 Sharp Corp 太陽電池アレ−の試験方法
JP2000269526A (ja) * 1999-03-17 2000-09-29 Sanyo Electric Co Ltd 光起電力素子の検査方法及び検査装置
JP4340246B2 (ja) * 2005-03-07 2009-10-07 シャープ株式会社 薄膜太陽電池およびその製造方法
WO2009020073A1 (fr) * 2007-08-06 2009-02-12 Sharp Kabushiki Kaisha Procédé et appareil de fabrication d'un module de conversion photoélectrique en couches minces

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Publication number Priority date Publication date Assignee Title
JPS5669870A (en) * 1979-11-13 1981-06-11 Fuji Electric Co Ltd Amorphous semiconductor photoelectric converting device
JP2000252502A (ja) * 1999-03-02 2000-09-14 Kanegafuchi Chem Ind Co Ltd 光電変換装置およびその製造方法
JP2001111085A (ja) * 1999-10-14 2001-04-20 Kanegafuchi Chem Ind Co Ltd 太陽電池モジュールの製造方法
JP2001274447A (ja) * 2000-03-23 2001-10-05 Kanegafuchi Chem Ind Co Ltd 集積型薄膜太陽電池の製造方法
JP2009195968A (ja) * 2008-02-25 2009-09-03 Mitsubishi Electric Corp レーザスクライブ装置

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