WO2010143283A1 - Procédé de formation de trou de contact, procédé de fabrication de dispositif à semi-conducteur et dispositif à semi-conducteur - Google Patents

Procédé de formation de trou de contact, procédé de fabrication de dispositif à semi-conducteur et dispositif à semi-conducteur Download PDF

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WO2010143283A1
WO2010143283A1 PCT/JP2009/060603 JP2009060603W WO2010143283A1 WO 2010143283 A1 WO2010143283 A1 WO 2010143283A1 JP 2009060603 W JP2009060603 W JP 2009060603W WO 2010143283 A1 WO2010143283 A1 WO 2010143283A1
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film
insulating film
contact hole
forming
organic
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PCT/JP2009/060603
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English (en)
Japanese (ja)
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太郎 直井
悟 大田
隆 中馬
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パイオニア株式会社
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Priority to PCT/JP2009/060603 priority Critical patent/WO2010143283A1/fr
Priority to JP2011518178A priority patent/JP4976590B2/ja
Publication of WO2010143283A1 publication Critical patent/WO2010143283A1/fr

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00—Electroluminescent light sources
    • H05B33/10—Apparatus or processes specially adapted to the manufacture of electroluminescent light sources

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  • the present invention relates to a contact hole forming method, a semiconductor device manufacturing method using the forming method, and a semiconductor device formed by the manufacturing method.
  • semiconductor devices which are electronic devices, are provided with multilayer wiring. More specifically, a technique is known in which wiring patterns arranged above and below an insulating film are electrically connected through a contact hole penetrating a part of the insulating film. Further, when a plurality of semiconductor devices are arranged adjacent to each other, a contact hole forming technique is also used as a method of electrically connecting the semiconductor devices.
  • Patent Documents 1 to 3 disclose a technique for forming a contact hole and a method for manufacturing a semiconductor device using the contact hole.
  • the object of the present invention has been made in view of the above circumstances, and a contact hole forming method capable of forming a contact hole with high accuracy and ease, and cost reduction and manufacturing by using the forming method. It is an object to provide a semiconductor device manufacturing method capable of reducing time and improving reliability, and a low-cost and high-reliability semiconductor device manufactured by the manufacturing method.
  • the contact hole forming method of the present invention excludes the step of forming an organic liquid repellent film having a shape corresponding to the contact hole on the connected layer and the organic liquid repellent film.
  • a contact hole is formed by evaporating the organic liquid repellent film to expose the layer to be connected.
  • a method for manufacturing a semiconductor device includes forming a plurality of gate electrodes on a light transmission substrate and forming an organic liquid repellent film having a desired shape on the gate electrodes.
  • a semiconductor device of the present invention includes a gate electrode formed on a light transmission substrate, a gate insulating film covering the gate electrode, a source electrode formed on the gate insulating film, and A drain electrode, an organic semiconductor part formed on the source electrode and the drain electrode, and a switching transistor and a drive transistor made of an interlayer insulating film formed on the organic semiconductor part, and formed on the light transmission substrate
  • a light emitting unit comprising a light emitting unit anode, an organic EL layer formed on the light emitting unit electrode, and a light emitting unit cathode formed on the organic EL layer, a switching transistor, a drive transistor, and a bank for separating the light emitting unit.
  • the drain electrode of the switching transistor penetrates through the gate insulating film of the drive transistor and serves as the gate electrode. Subsequently, the gate insulating film of the drive transistor has a protrusion protruding in the film thickness direction of the gate insulating film at the periphery of the portion of the gate insulating film of the drive transistor through which the drain electrode of the switching transistor passes. It is characterized by that.
  • the method for forming a contact hole according to the present invention includes a step of forming an organic liquid repellent film having a shape corresponding to a contact hole on a connected layer, and a light conversion film on the connected layer excluding the organic liquid repellent film. And the step of irradiating the organic liquid repellent film and the light conversion film with vacuum ultraviolet light, and the irradiation of the vacuum ultraviolet light converts the light conversion film into an insulating film and the organic liquid repellent film.
  • the contact hole is formed by evaporating and exposing the connected layer.
  • the contact hole forming method of the present invention the formation of the insulating film by the conversion of the light conversion film and the removal of the organic liquid repellent film are completed at the same time, so that the contact hole can be formed accurately and easily. can do.
  • a plurality of gate electrodes are formed on a light transmission substrate, an organic liquid repellent film having a desired shape is formed on the gate electrode, and the plurality of gate electrodes are covered.
  • a light conversion film is formed, and the organic liquid repellent film and the light conversion film are irradiated with vacuum ultraviolet light to convert the light conversion film into a gate insulating film, and the organic liquid repellent film is vaporized to electrically connect with the gate electrode.
  • An organic semiconductor part is formed in the enclosed region, an interlayer insulating film is formed on the organic semiconductor part to form a switching transistor and a drive transistor, and an organic layer is formed on the bank, the interlayer insulating film, and the light emitting part anode. Forming an EL layer, forming a light emitting part cathode on the organic EL layer, and forming a light emitting part.
  • the method for manufacturing a semiconductor device of the present invention uses the contact hole forming method described above, it is possible to easily reduce the cost and the manufacturing time in the manufacturing process of the semiconductor device. A semiconductor device having high reliability can be manufactured.
  • the semiconductor device of the present invention includes a gate electrode formed on a light transmission substrate, a gate insulating film covering the gate electrode, a source electrode and a drain electrode formed on the gate insulating film, a source electrode and a drain electrode.
  • the switching transistor and the drive transistor made of an interlayer insulating film formed on the organic semiconductor part, and the light emitting part anode and the light emitting part electrode formed on the light transmission substrate
  • the drain electrode penetrates through the gate insulating film of the drive transistor and is connected to the gate electrode.
  • Over gate insulating film has a convex portion projecting to the periphery of the portion where the drain electrode of the switching transistor in the gate insulating film of the drive transistor is penetrating in the thickness direction of the gate insulating film.
  • the convex portion formed on the gate insulating film of the drive transistor constituting the semiconductor device of the present invention is manufactured by the above-described method for manufacturing a semiconductor device.
  • the semiconductor device of the present invention can have low cost and high reliability.
  • FIG. 1 is a cross-sectional view showing each step of forming a contact hole.
  • a gate electrode 12 made of nickel / phosphorus (Ni—P) is formed on a glass substrate 11 which is a light transmitting substrate by an electroless nickel plating method (FIG. 1A).
  • an organic liquid repellent film 13 is formed on the surface of the gate electrode 12 and in a portion corresponding to a contact hole formation region described later (FIG. 1B). More specifically, a resist is applied on the surface of the gate electrode 12. Next, patterning is performed so that the applied resist has a desired pattern (that is, a shape of a contact hole described later). An organic liquid repellent material is applied to the opening portion of the patterned resist by a spin coat method. Thereafter, by removing the resist (lift-off method), the organic liquid repellent film 13 is formed only in a portion corresponding to a contact hole formation region described later.
  • the organic liquid repellent film 13 is an amorphous fluoropolymer thin film having a contact angle of 100 ° or more with respect to pure water.
  • the organic liquid repellent film 13 is obtained by cyclopolymerizing perfluoro (4-vinyloxy-1-butene).
  • polysilazane that is, a light conversion material
  • Si—N silicon-nitrogen
  • the edge portion of the polysilazane film 14 that is in contact with the side surface of the organic liquid repellent film 13 is raised. That is, a convex portion 15 protruding in the film thickness direction is formed at the edge portion of the polysilazane film 14.
  • VUV vacuum ultraviolet
  • a 172 nanometer (nm) vacuum ultraviolet light source is used for VUV irradiation.
  • the polysilazane film 14 is converted into the silicon oxide film 16 and the organic liquid repellent film 13 is changed (vaporized) to a gas such as carbon dioxide and fluorine, whereby the gate electrode 12 is partially exposed. That is, the contact hole 17 is formed (FIG. 1E).
  • the conversion of the polysilazane film 14 into the silicon oxide film 16 is represented by the following chemical reaction formulas 1 and 2.
  • the formation of the silicon oxide film 16 that is an insulating film and the contact hole 17 is completed at the same time.
  • the time required to form the contact hole 17 can be reduced as compared with the case where the silicon oxide film 16 and the contact hole 17 are formed in separate steps.
  • the silicon oxide film 16 has a thickness smaller than that of the polysilazane film 14 and is cured. Is formed.
  • the convex portion 15 remains on the edge portion of the silicon oxide film 16 (that is, around the contact hole 17).
  • the wiring pattern 18 is formed by an ink jet method using metal fine particles (FIG. 1 (f)). More specifically, ink (metal particle-containing liquid) in which fine particles of silver (Ag) are mixed with an organic solvent is drawn by an ink jet printing technique, and the wiring pattern 18 is formed.
  • ink metal particle-containing liquid
  • the convex portion 15 is formed at the edge portion of the silicon oxide film 16
  • the metal particle-containing liquid does not flow out onto the silicon oxide film 15. That is, the convex part 15 functions as a barrier for suppressing the outflow of the metal particle-containing liquid.
  • the electrode material can be embedded in the contact hole 15 with high accuracy. In addition, it is possible to prevent contact failure caused by variations in inkjet alignment accuracy and discharge amount.
  • the film thickness of the protrusion 15 is about 10% or more of the film thickness of the flat part of the silicon oxide film 16 (that is, It is preferable that the convex portion 15 is raised by about 10% or more with respect to the flat portion.
  • the method for forming a contact hole according to the present invention includes a step of forming an organic liquid repellent film having a shape corresponding to the contact hole on the connected layer, and a step of forming the connected layer except on the organic liquid repellent film.
  • a step of forming a light conversion film on the surface, and a step of irradiating the organic liquid repellent film and the light conversion film with vacuum ultraviolet light, and the irradiation of the vacuum ultraviolet light converts the light conversion film into an insulating film.
  • the contact hole is formed by evaporating the organic liquid repellent film to expose the connected layer.
  • the formation of the insulating film by the conversion of the polysilazane film and the vaporization (removal) of the organic liquid repellent film are completed at the same time. Can be formed.
  • the cost of the apparatus used for forming the contact hole can be reduced, and the alignment accuracy equivalent to that of the RIE (Reactive Ion Etching) method is provided.
  • the contact hole can be easily formed.
  • the contact hole is formed on the gate electrode 12 .
  • a contact hole may be formed on a connected layer such as a patterned wiring connected using the above-described formation method.
  • a vacuum ultraviolet light source of 142 nm or 146 nm may be used in addition to 172 nm.
  • VUV is irradiated so as to form a silicon oxide film as an insulating film.
  • SiON silicon oxynitride
  • SiNx silicon nitride
  • a film, an inorganic polymer alkoxide, a metal alkoxide, or siloxane may be formed.
  • a cyclopolymerized perfluoro (4-vinyloxy-1-butene) was used for the organic liquid repellent film.
  • SAM self-assembled monolayer
  • a silane coupling material to which fluorine is added or a resin mixed with fluorine may be used for the organic liquid repellent film.
  • another organic film having a property of repelling the organic liquid repellent film may be formed around the organic liquid repellent film.
  • another organic film there is a polymer material in which melamine is mixed with polyvinyl phenol (PVP: Poly (4-vinylphenol)).
  • Example 2 a method for manufacturing a semiconductor device using the contact hole forming method according to Example 1 and a semiconductor device manufactured thereby will be described in detail with reference to FIGS.
  • an organic TFT (ThinThFilm Transistor) array 20 which is a semiconductor device includes a glass substrate 21 which is a light transmission substrate, a switching transistor (selection transistor) 22, a drive transistor (driving transistor) 23, The light-emitting unit 24, the switching transistor 22, the drive transistor 23, and the bank 25 that separates the light-emitting unit 24 are configured.
  • the switching transistor 22 includes a gate electrode 31 (hereinafter referred to as ST gate electrode 31), a first gate insulating film 32 (hereinafter referred to as first ST gate insulating film 32), and a second gate insulating film 33 (hereinafter referred to as ST gate electrode 31).
  • Second ST gate insulating film 33 Source electrode 34 (hereinafter referred to as ST source electrode 34), drain electrode 35 (hereinafter referred to as ST drain electrode 35), organic semiconductor portion 36 (hereinafter referred to as ST organic).
  • an interlayer insulating film 37 hereinafter referred to as an ST interlayer insulating film 37).
  • the ST gate electrode 31 is connected to an external connection wiring (not shown) for applying a voltage to the ST gate electrode 31 from the outside of the organic TFT array 20.
  • the drive transistor 23 includes a gate electrode 41 (hereinafter referred to as a DT gate electrode 41), a first gate insulating film 42 (hereinafter referred to as a first DT gate insulating film 42), a second gate insulating film 43 ( Hereinafter, the second DT gate insulating film 43), the source electrode 44 (hereinafter referred to as DT source electrode 44), the drain electrode 45 (hereinafter referred to as DT drain electrode 45), and the organic semiconductor portion 46 (hereinafter referred to as DT). And an interlayer insulating film 47 (hereinafter referred to as a DT interlayer insulating film 47).
  • the ST drain electrode 35 is connected to the DT gate electrode 41. That is, the ST drain electrode 35 electrically connects the drain region of the ST organic semiconductor portion 36 and the DT gate electrode 41.
  • the light emitting unit 24 includes a light emitting unit anode 51, an organic EL layer 52, and a light emitting unit cathode 53.
  • a DT drain electrode 45 is connected to the light emitting portion anode 51. That is, the DT drain electrode 45 electrically connects the drain region of the DT organic semiconductor portion 46 and the light emitting portion anode 51.
  • a glass substrate 21 is prepared as a substrate that transmits light (FIG. 3A).
  • an ST gate electrode 31 and a DT gate electrode 41 made of nickel / phosphorus (Ni—P) are formed on the glass substrate 21 by electroless nickel plating (FIG. 3B).
  • an organic liquid repellent film 61 is formed on the surface of the DT gate electrode 41 and in a portion corresponding to a contact hole formation region described later (FIG. 3C). More specifically, a resist is applied on the surface of the DT gate electrode 41. Next, patterning is performed so that the applied resist has a desired pattern (that is, a shape of a contact hole described later). An organic liquid repellent material is applied to the opening portion of the patterned resist by a spin coat method. Thereafter, by removing the resist (lift-off method), the organic liquid repellent film 61 is formed only in a portion corresponding to a contact hole formation region described later.
  • the organic liquid repellent film 61 is an amorphous fluoropolymer thin film having a contact angle of 100 ° or more with respect to pure water.
  • the organic liquid repellent film 61 is a film obtained by cyclopolymerizing perfluoro (4-vinyloxy-1-butene).
  • the organic liquid repellent film 61 may also be formed on the surface of the ST gate electrode 31. As a result, a contact hole for external connection wiring used for applying a voltage to the ST gate electrode 31 from the outside of the organic TFT array 20 can be formed.
  • a polymer material in which melamine is mixed with polyvinyl phenol (PVP: Poly (4-vinylphenol)) is applied by spin coating so as to cover the ST gate electrode 31 and the DT gate electrode 41.
  • PVP Poly (4-vinylphenol)
  • the first ST gate insulating film 32 and the first DT gate insulating film 42 are formed (FIG. 3D).
  • polysilazane which is a compound having a silicon-nitrogen (Si—N) bond is applied by spin coating so as to cover the first ST gate insulating film 32 and the first DT gate insulating film 42, A polysilazane film 62, which is a conversion film, is formed (FIG. 3E).
  • FIG. 6 (a) an enlarged view of the broken line region 6a in FIG. 3 (e) is shown in FIG. 6 (a).
  • the first DT gate insulating film 42 and the polysilazane film 62 are not formed on the organic liquid repellent film 61, and the organic liquid repellent film 61 is exposed. Further, the edge portion of the first DT gate insulating film 42 and the polysilazane film 62 that is in contact with the side surface of the organic liquid repellent film 61 is raised.
  • a protrusion 63 protruding in the film thickness direction is formed at the edge portion of the first DT gate insulating film 42, and a protrusion 64 protruding in the film thickness direction is formed at the edge portion of the polysilazane film 62.
  • the reason is that the organic liquid repellent film 13 repels PVP and polysilazane because the organic liquid repellent film 13 has high liquid repellency.
  • VUV is irradiated from the main surface side of the glass substrate 21 (that is, the surface side on which the polysilazane film 62 is formed).
  • a 172 nanometer (nm) vacuum ultraviolet light source is used for VUV irradiation.
  • the polysilazane film 62 is converted into a silicon oxide film, and the second ST gate insulating film 33 and the second DT gate insulating film 43 are formed.
  • the contact hole 71 is formed by changing (vaporizing) the organic liquid repellent film 61 to carbon dioxide, fluorine, or the like by the VUV irradiation (FIG. 4A).
  • the conversion of the polysilazane film 62 into the silicon oxide film is represented by the chemical reaction formulas 1 and 2 as in the conversion of the first embodiment, the description thereof is omitted.
  • the change (vaporization) of the organic liquid repellent film 61 to carbon dioxide, fluorine, or the like is represented by the chemical reaction formula 3 as in the first embodiment, and thus the description thereof is omitted.
  • the formation of the second ST gate insulating film 33 and the second DT gate insulating film 43 and the contact hole 71 are formed.
  • the formation is completed at the same time.
  • the time required from the preparation of the glass substrate 21 to the formation of the contact hole 71 can be reduced as compared with the case where the second DT gate insulating film 43 and the contact hole 71 are formed in separate steps.
  • the formation region of the organic liquid repellent film 61 becomes the formation region of the contact hole 71, the contact hole 71 can be formed with higher accuracy than the contact hole formation method by etching using an opening mask.
  • FIG. 6B shows an enlarged view of the broken line region 6b in FIG. 4A.
  • the second ST that has a thickness smaller than the thickness of the polysilazane film 62 and has been cured by the conversion of the polysilazane film 62.
  • a gate insulating film 33 and a second DT gate insulating film 43 are formed. Even if the film thickness is reduced by the conversion, the protrusions 63 and 64 remain on the edge portions of the first DT gate insulating film 42 and the second DT gate insulating film 43 (that is, around the contact hole 71). Yes.
  • the insulating film covering the ST gate electrode 31 and the DT gate electrode 41 can be made into two layers. As a result, it is possible to easily control the relative dielectric constant and insulating characteristics of the insulating film covering the ST gate electrode 31 and the DT gate electrode 41.
  • the conductivity between the source and drain electrodes can be increased by the first ST gate insulating film 32 and the first DT gate insulating film 42, and the second ST gate insulating film 33 and the second DT gate insulating film Current leakage can be efficiently suppressed by the DT gate insulating film 43.
  • a contact hole is also formed on the ST gate electrode 31. Since such a contact hole is also formed through the above-described steps, it can be formed with high accuracy like the contact hole 71.
  • a transparent electrode material made of indium zinc oxide (IZO) is deposited on the glass substrate 21 by sputtering.
  • a resist is applied on the transparent electrode material, and the resist is patterned.
  • the light-emitting portion anode 51 is formed by patterning the transparent electrode material into a desired shape by wet etching using the patterned resist as a mask.
  • FIG. 4B shows a cross-sectional view of the state where the light emitting unit anode 51 is formed.
  • an ST source electrode 34, an ST drain electrode 35, a DT source electrode 44, and a DT drain electrode 45 are formed by an ink jet method using metal fine particles (FIG. 4C). More specifically, ink (metal particle-containing liquid) in which fine particles of silver (Ag) are mixed with an organic solvent is drawn by an inkjet printing technique, and the ST source electrode 34, the ST drain electrode 35, the DT source electrode 44, and the DT drain. An electrode 45 is formed.
  • the ST drain electrode 35 is filled with a contact hole 71. Thereby, the drain of the switching transistor 22 and the gate electrode 41 of the drive transistor 23 can be electrically connected. Further, the DT drain electrode 45 is connected to the light emitting portion anode 51.
  • a contact hole on the ST gate electrode 31 is filled by an ink jet method using the metal fine particles, and an external connection wiring connected to the ST gate electrode 31 is also formed.
  • the metal particle-containing liquid is contacted. It does not flow out of the hole 71. That is, the convex parts 63 and 64 function as a barrier that suppresses the outflow of the metal particle-containing liquid. As a result, the electrode material can be embedded in the contact hole 71 with high accuracy. In addition, it is possible to prevent contact failure caused by variations in inkjet alignment accuracy and discharge amount.
  • the film thickness of the protrusions 63 and 64 is about 10% or more of the film thickness of the flat part of each insulating film 16 ( That is, it is preferable that the convex portions 63 and 64 are raised by about 10% or more with respect to the flat portion.
  • the convex portions 63 and 64 are raised by about 10% or more with respect to the flat portion.
  • a resin that can be patterned by ultraviolet (UV) irradiation is applied by spin coating.
  • a photomask is placed on the resin, and the resin is patterned by UV irradiation, whereby the bank 25 is formed (FIG. 4D).
  • the ST organic semiconductor part 36 is formed on the ST source electrode 34 and the ST drain electrode 35, and the DT organic semiconductor part 46 is formed on the DT source electrode 44 and the DT drain electrode 45 by an inkjet method using tetrabenzoporphyrin. It is formed (FIG. 5A).
  • an insulator made of an organic material is applied onto the ST organic semiconductor portion 36 and the DT organic semiconductor portion 46 by spin coating to form an ST interlayer insulating film 37 and a DT interlayer insulating film 47 (FIG. 5 ( b)).
  • a light emitting material is applied on the bank 25, the ST interlayer insulating film 37, the DT interlayer insulating film 47, and the light emitting portion anode 51 by an ink jet method or a spin coat method to form an organic EL layer 52 (FIG. 5).
  • C organic EL layer
  • Al aluminum
  • Al is vapor-deposited on the organic EL layer 52 by a vacuum vapor deposition method to form the light emitting portion cathode 53 (FIG. 5D).
  • a plurality of gate electrodes are formed on a light transmitting substrate, an organic liquid repellent film having a desired shape is formed on the gate electrode, and a plurality of gates are formed.
  • Forming a light conversion film covering the electrode, irradiating the organic liquid repellent film and the light conversion film with vacuum ultraviolet light to convert the light conversion film into a gate insulating film and vaporizing the organic liquid repellent film to form a gate electrode A step of forming a contact hole for electrical connection, a light emitting part anode is formed on the light transmitting substrate, the contact hole is filled, and each of the switching transistor and the drive transistor is formed on the gate insulating film.
  • Forming a source electrode and a drain electrode Forming a bank for element isolation on the gate electrode and the drain electrode, and forming a bank on the source electrode and the drain electrode.
  • Forming an organic semiconductor portion in a region surrounded by the step forming an interlayer insulating film on the organic semiconductor portion to form a switching transistor and a drive transistor, and on the bank, the interlayer insulating film, and the light emitting portion anode.
  • the method for manufacturing a semiconductor device according to the present invention uses a contact hole forming method in which the formation of an insulating film by conversion of a polysilazane film and the vaporization (removal) of an organic liquid repellent film are completed simultaneously.
  • the contact hole can be formed accurately and easily, so that it is possible to easily reduce the cost and manufacturing time in the manufacturing process of the semiconductor device, and to manufacture a highly reliable semiconductor device. can do.
  • the gate insulating film covering the gate electrode has a two-layer structure, but a structure having three or more layers may be used.
  • the gate insulating film has two or more layers, it is necessary to apply a polysilazane film as the uppermost layer.
  • VUV is irradiated so as to form a silicon oxide film as an insulating film.
  • SiON silicon oxynitride
  • SiNx silicon nitride
  • a film, an inorganic polymer alkoxide, a metal alkoxide, or siloxane may be formed.
  • each source electrode and each drain electrode are formed by an ink jet method, but a source electrode and a drain electrode made of gold may be formed by a desired plating technique.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
  • Electroluminescent Light Sources (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

L'invention porte sur un procédé de formation de trou de contact qui peut former un trou de contact de façon précise et aisée; sur un procédé de fabrication d'un dispositif à semi-conducteur qui peut réaliser une réduction du coût, un raccourcissement du temps de production et une amélioration de la fiabilité grâce à l'utilisation du procédé de formation de trou de contact; et sur un dispositif à semi-conducteur qui peut être fabriqué à un bas coût par le procédé et avoir une fiabilité élevée. Le procédé de formation de trou de contact comprend des étapes consistant à former un film repoussant les liquides organiques ayant une forme correspondant à un trou de contact sur une couche de connexion, former un film de photoconversion sur la couche de connexion à l'exception de la zone couverte par le film repoussant les liquides organiques, exposer le film repoussant les liquides organiques et le filme de photoconversion à une lumière ultraviolette sous vide, l'exposition à la lumière ultraviolette sous vide provoquant la conversion du film de photoconversion en un film isolant et, en même temps, une vaporisation du film repoussant les liquides organiques afin d'exposer la couche de connexion et de former ainsi un trou de contact.
PCT/JP2009/060603 2009-06-10 2009-06-10 Procédé de formation de trou de contact, procédé de fabrication de dispositif à semi-conducteur et dispositif à semi-conducteur WO2010143283A1 (fr)

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PCT/JP2009/060603 WO2010143283A1 (fr) 2009-06-10 2009-06-10 Procédé de formation de trou de contact, procédé de fabrication de dispositif à semi-conducteur et dispositif à semi-conducteur
JP2011518178A JP4976590B2 (ja) 2009-06-10 2009-06-10 コンタクトホールの形成方法、半導体装置の製造方法及び半導体装置

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012176291A1 (fr) * 2011-06-22 2012-12-27 ＡｚエレクトロニックマテリアルズＩｐ株式会社 Procédé pour former un film d'oxynitrure de silicium, et substrat ayant un film d'oxynitrure de silicium produit en utilisant ce procédé de formation
JP2013197470A (ja) * 2012-03-22 2013-09-30 Fujitsu Ltd 貫通電極の形成方法
US9029071B2 (en) 2010-06-17 2015-05-12 Merck Patent Gmbh Silicon oxynitride film formation method and substrate equipped with silicon oxynitride film formed thereby
JP2022529255A (ja) * 2019-04-16 2022-06-20 アプライド マテリアルズ インコーポレイテッド トレンチに薄膜を堆積する方法
US11629402B2 (en) 2019-04-16 2023-04-18 Applied Materials, Inc. Atomic layer deposition on optical structures

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003243328A (ja) * 2001-12-05 2003-08-29 Seiko Epson Corp 液滴吐出装置、パターン形成装置、配線形成装置、パターン形成媒体、液滴吐出方法、パターン形成方法および配線形成方法
JP2004061728A (ja) * 2002-07-26 2004-02-26 Ricoh Microelectronics Co Ltd レンズアレイ製造方法
JP2005167229A (ja) * 2003-11-14 2005-06-23 Semiconductor Energy Lab Co Ltd 発光装置及びその作製方法
WO2006019157A1 (fr) * 2004-08-20 2006-02-23 National Institute Of Advanced Industrial Science And Technology Élément semi-conducteur et son processus de production
JP2006100757A (ja) * 2004-08-30 2006-04-13 Seiko Epson Corp 半導体装置、半導体装置の製造方法、電気光学装置及び電子デバイス
JP2006253613A (ja) * 2005-03-14 2006-09-21 Ricoh Co Ltd 有機半導体層を有する電界効果型有機薄膜トランジスタ
JP2007324510A (ja) * 2006-06-05 2007-12-13 Sony Corp 半導体装置の製造方法
JP2008122649A (ja) * 2006-11-13 2008-05-29 Seiko Epson Corp 電気光学装置の製造方法、電気光学装置、液晶装置、有機エレクトロルミネッセンス装置、及び電子機器

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003243328A (ja) * 2001-12-05 2003-08-29 Seiko Epson Corp 液滴吐出装置、パターン形成装置、配線形成装置、パターン形成媒体、液滴吐出方法、パターン形成方法および配線形成方法
JP2004061728A (ja) * 2002-07-26 2004-02-26 Ricoh Microelectronics Co Ltd レンズアレイ製造方法
JP2005167229A (ja) * 2003-11-14 2005-06-23 Semiconductor Energy Lab Co Ltd 発光装置及びその作製方法
WO2006019157A1 (fr) * 2004-08-20 2006-02-23 National Institute Of Advanced Industrial Science And Technology Élément semi-conducteur et son processus de production
JP2006100757A (ja) * 2004-08-30 2006-04-13 Seiko Epson Corp 半導体装置、半導体装置の製造方法、電気光学装置及び電子デバイス
JP2006253613A (ja) * 2005-03-14 2006-09-21 Ricoh Co Ltd 有機半導体層を有する電界効果型有機薄膜トランジスタ
JP2007324510A (ja) * 2006-06-05 2007-12-13 Sony Corp 半導体装置の製造方法
JP2008122649A (ja) * 2006-11-13 2008-05-29 Seiko Epson Corp 電気光学装置の製造方法、電気光学装置、液晶装置、有機エレクトロルミネッセンス装置、及び電子機器

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9029071B2 (en) 2010-06-17 2015-05-12 Merck Patent Gmbh Silicon oxynitride film formation method and substrate equipped with silicon oxynitride film formed thereby
WO2012176291A1 (fr) * 2011-06-22 2012-12-27 ＡｚエレクトロニックマテリアルズＩｐ株式会社 Procédé pour former un film d'oxynitrure de silicium, et substrat ayant un film d'oxynitrure de silicium produit en utilisant ce procédé de formation
JP2013197470A (ja) * 2012-03-22 2013-09-30 Fujitsu Ltd 貫通電極の形成方法
JP2022529255A (ja) * 2019-04-16 2022-06-20 アプライド マテリアルズ インコーポレイテッド トレンチに薄膜を堆積する方法
US11629402B2 (en) 2019-04-16 2023-04-18 Applied Materials, Inc. Atomic layer deposition on optical structures
JP7364688B2 (ja) 2019-04-16 2023-10-18 アプライド マテリアルズ インコーポレイテッド トレンチに薄膜を堆積する方法

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