WO2010117201A3 - 금속 촉매를 이용한 폴리 실리콘 마스크의 제조방법 및 이를 이용한 반도체 소자의 제조방법 - Google Patents

금속 촉매를 이용한 폴리 실리콘 마스크의 제조방법 및 이를 이용한 반도체 소자의 제조방법 Download PDF

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WO2010117201A3
WO2010117201A3 PCT/KR2010/002116 KR2010002116W WO2010117201A3 WO 2010117201 A3 WO2010117201 A3 WO 2010117201A3 KR 2010002116 W KR2010002116 W KR 2010002116W WO 2010117201 A3 WO2010117201 A3 WO 2010117201A3
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production method
metal catalyst
polysilicon mask
semiconductor elements
same
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PCT/KR2010/002116
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English (en)
French (fr)
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WO2010117201A2 (ko
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박경완
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주식회사 테라세미콘
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Priority to CN201080015376XA priority Critical patent/CN102365710A/zh
Priority to JP2012504609A priority patent/JP2012523129A/ja
Publication of WO2010117201A2 publication Critical patent/WO2010117201A2/ko
Publication of WO2010117201A3 publication Critical patent/WO2010117201A3/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02672—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using crystallisation enhancing elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0338—Process specially adapted to improve the resolution of the mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
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    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/485—Bit line contacts

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Recrystallisation Techniques (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Photovoltaic Devices (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

본 발명에서는 금속 촉매를 이용한 폴리 실리콘 마스크의 제조방법 및 이를 이용한 반도체 소자의 제조방법이 개시된다. 본 발명에 따른 금속 촉매를 이용한 폴리 실리콘 마스크의 제조방법은, 기판(10)을 제공하는 단계; 기판(10) 상에 소정의 패턴을 갖는 비정질 실리콘층(30)을 형성하는 단계; 비정질 실리콘층(30) 상에 금속 촉매층(40)을 형성하는 단계; 및 비정질 실리콘층(30)을 열처리하여 폴리 실리콘 마스크(31)를 형성하는 단계를 포함하는 것을 특징으로 한다.
PCT/KR2010/002116 2009-04-07 2010-04-07 금속 촉매를 이용한 폴리 실리콘 마스크의 제조방법 및 이를 이용한 반도체 소자의 제조방법 WO2010117201A2 (ko)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201080015376XA CN102365710A (zh) 2009-04-07 2010-04-07 利用金属催化剂制备多晶硅掩膜的方法及利用它制造半导体元件的方法
JP2012504609A JP2012523129A (ja) 2009-04-07 2010-04-07 金属触媒を用いたポリシリコンマスクの製造方法及び該マスクを用いた半導体素子の製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020090029866A KR101088457B1 (ko) 2009-04-07 2009-04-07 금속 촉매를 이용한 폴리 실리콘 마스크의 제조방법 및 이를 이용한 반도체 소자의 제조방법
KR10-2009-0029866 2009-04-07

Publications (2)

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WO2010117201A2 WO2010117201A2 (ko) 2010-10-14
WO2010117201A3 true WO2010117201A3 (ko) 2010-12-23

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PCT/KR2010/002116 WO2010117201A2 (ko) 2009-04-07 2010-04-07 금속 촉매를 이용한 폴리 실리콘 마스크의 제조방법 및 이를 이용한 반도체 소자의 제조방법

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JP (1) JP2012523129A (ko)
KR (1) KR101088457B1 (ko)
CN (1) CN102365710A (ko)
TW (1) TW201044106A (ko)
WO (1) WO2010117201A2 (ko)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101967753B1 (ko) 2012-07-30 2019-04-10 삼성전자주식회사 반도체 장치의 제조 방법
KR101972159B1 (ko) 2012-08-24 2019-08-16 에스케이하이닉스 주식회사 실리콘함유하드마스크를 구비한 반도체장치 및 그 제조 방법
KR102085526B1 (ko) * 2013-10-01 2020-03-06 삼성전자 주식회사 반도체 소자 및 그 제조 방법
KR102330943B1 (ko) * 2017-03-10 2021-11-25 삼성전자주식회사 포토마스크용 펠리클과 이를 포함하는 레티클 및 리소그래피용 노광 장치
KR102542624B1 (ko) 2018-07-17 2023-06-15 삼성전자주식회사 반도체 소자 및 이의 제조 방법
CN109712933A (zh) * 2019-02-19 2019-05-03 合肥鑫晟光电科技有限公司 显示基板的制作方法、显示基板及显示面板

Citations (3)

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KR0171923B1 (ko) * 1993-02-15 1999-02-01 순페이 야마자끼 반도체장치 제작방법
KR20080002539A (ko) * 2006-06-30 2008-01-04 엘지.필립스 엘시디 주식회사 폴리실리콘 박막트랜지스터의 제조방법 및 이를 이용한액정표시소자의 제조방법
KR20080052325A (ko) * 2006-12-04 2008-06-11 한국전자통신연구원 쇼트키 장벽 박막 트랜지스터 제조방법

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JPH053191A (ja) * 1991-06-24 1993-01-08 Sharp Corp 微細パターンの形成方法
JPH10313104A (ja) * 1997-05-13 1998-11-24 Sony Corp 半導体装置の製造方法
JP2005285929A (ja) * 2004-03-29 2005-10-13 Rohm Co Ltd 半導体装置の製造方法
KR100864883B1 (ko) * 2006-12-28 2008-10-22 삼성에스디아이 주식회사 박막트랜지스터, 그의 제조방법 및 이를 구비한유기전계발광표시장치.
KR20080111693A (ko) * 2007-06-19 2008-12-24 삼성모바일디스플레이주식회사 다결정 실리콘층의 제조 방법, 이를 이용하여 형성된박막트랜지스터, 그의 제조방법, 및 이를 포함하는유기전계발광표시장치

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0171923B1 (ko) * 1993-02-15 1999-02-01 순페이 야마자끼 반도체장치 제작방법
KR20080002539A (ko) * 2006-06-30 2008-01-04 엘지.필립스 엘시디 주식회사 폴리실리콘 박막트랜지스터의 제조방법 및 이를 이용한액정표시소자의 제조방법
KR20080052325A (ko) * 2006-12-04 2008-06-11 한국전자통신연구원 쇼트키 장벽 박막 트랜지스터 제조방법

Also Published As

Publication number Publication date
KR20100111433A (ko) 2010-10-15
TW201044106A (en) 2010-12-16
WO2010117201A2 (ko) 2010-10-14
KR101088457B1 (ko) 2011-12-01
CN102365710A (zh) 2012-02-29
JP2012523129A (ja) 2012-09-27

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