WO2010073904A1 - 半導体記憶素子の製造方法、及びスパッタ装置 - Google Patents
半導体記憶素子の製造方法、及びスパッタ装置 Download PDFInfo
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- WO2010073904A1 WO2010073904A1 PCT/JP2009/070547 JP2009070547W WO2010073904A1 WO 2010073904 A1 WO2010073904 A1 WO 2010073904A1 JP 2009070547 W JP2009070547 W JP 2009070547W WO 2010073904 A1 WO2010073904 A1 WO 2010073904A1
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 19
- 239000004065 semiconductor Substances 0.000 title claims abstract description 15
- 238000003860 storage Methods 0.000 title abstract description 3
- 239000007789 gas Substances 0.000 claims abstract description 143
- 150000004770 chalcogenides Chemical class 0.000 claims abstract description 49
- 239000000463 material Substances 0.000 claims abstract description 45
- 238000004544 sputter deposition Methods 0.000 claims abstract description 41
- 239000011261 inert gas Substances 0.000 claims abstract description 30
- 238000000034 method Methods 0.000 claims abstract description 23
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 30
- 239000010936 titanium Substances 0.000 claims description 29
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- 238000012545 processing Methods 0.000 claims description 25
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- 239000002184 metal Substances 0.000 claims description 23
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical group [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 18
- 229910052719 titanium Inorganic materials 0.000 claims description 18
- 239000010410 layer Substances 0.000 description 107
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- 230000008859 change Effects 0.000 description 22
- 238000012360 testing method Methods 0.000 description 18
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- 229910052786 argon Inorganic materials 0.000 description 6
- 238000005121 nitriding Methods 0.000 description 6
- 230000002093 peripheral effect Effects 0.000 description 6
- 229910000618 GeSbTe Inorganic materials 0.000 description 5
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 229910052787 antimony Inorganic materials 0.000 description 4
- 229910052732 germanium Inorganic materials 0.000 description 4
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- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 230000001364 causal effect Effects 0.000 description 1
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- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
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- 230000002441 reversible effect Effects 0.000 description 1
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
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Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/0021—Reactive sputtering or evaporation
- C23C14/0036—Reactive sputtering
- C23C14/0094—Reactive sputtering in transition mode
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/02—Pretreatment of the material to be coated
- C23C14/024—Deposition of sublayers, e.g. to promote adhesion of the coating
- C23C14/025—Metallic sublayers
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/0641—Nitrides
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
- H10N70/026—Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/841—Electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8825—Selenides, e.g. GeSe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8828—Tellurides, e.g. GeSbTe
Definitions
- the present invention relates to a method of manufacturing a semiconductor integrated circuit device such as a phase change memory cell formed using a phase change material such as chalcogenide, and more particularly to a method of manufacturing an electrode for a phase change memory cell and a manufacturing apparatus thereof.
- Phase change memory is attracting attention as a next-generation nonvolatile memory called universal memory.
- a phase change memory uses a “phase change film” as a memory element, stores whether the film is in an amorphous state or a crystalline state, and reads out using a resistance change accompanying the state change. It is an element to perform.
- chalcogenide material a mixture of germanium (Ge), antimony (Sb), and tellurium (Te) generally called GST is used.
- This chalcogenide material and the upper electrode provided on the chalcogenide material are problematic in that they are easily separated from each other.
- Patent Document 1 discloses a method of forming an electrode for a memory material of a phase change memory device.
- the method is a first layer bonded to the top surface of the memory material and includes nitride (ANx), A is one of titanium (Ti) and tungsten (W), and x is 1 Forming a first layer less than 0.0, and a second layer bonded to the first layer, comprising nitride (ANy), wherein y is greater than or equal to 1.0 Forming a layer.
- ANx nitride
- A is one of titanium (Ti) and tungsten (W)
- x is 1 Forming a first layer less than 0.0
- ANy nitride
- An object of the present invention is to provide a method for manufacturing a semiconductor memory element having a chalcogenide material layer and an electrode layer with improved film adhesion and an apparatus for manufacturing the same.
- the present invention provides a method for manufacturing a semiconductor memory device, comprising a first step of forming a chalcogenide material layer, and a reactive gas and an inert gas on the chalcogenide material layer. And a second step of forming an electrode layer by applying a cathode voltage to the target and sputtering using a mixed gas, and the target is a target capable of performing sputtering in a metal mode,
- the reactive gas is introduced at a flow rate ratio of the reactive gas in the mixed gas corresponding to a hysteresis region expressed in a relationship between the cathode voltage and the flow rate ratio of the reactive gas in the mixed gas. It is characterized by that.
- the present invention is also a sputtering apparatus for forming an electrode layer on a chalcogenide layer, wherein the processing chamber, a cathode provided in the processing chamber and for mounting a target, and an inert gas in the processing chamber are provided.
- the control unit when forming the electrode layer, the cathode voltage applied to the cathode, the flow rate ratio of the reactive gas in the mixed gas of the reactive gas and the inert gas
- the inert gas introduction means so as to introduce the reactive gas into the processing chamber at a flow rate ratio of the reactive gas in the mixed gas corresponding to a hysteresis region represented by And controlling the serial reactive gas introducing means.
- the adhesion between the chalcogenide layer and the electrode layer on the chalcogenide layer can be improved to prevent or reduce film peeling in which the electrode layer is peeled off from the chalcogenide layer.
- FIG. 1 is a schematic plan view of a thin film forming apparatus according to an embodiment of the present invention. It is a schematic sectional drawing of the sputtering device which concerns on one Embodiment of this invention. It is a figure which shows the relationship between the cathode voltage of a sputtering device and the flow rate ratio of the reactive gas in mixed gas based on one Embodiment of this invention. It is a figure explaining the film peeling test (Peeling Test) based on one Embodiment of this invention. It is a figure explaining the film peeling test (Peeling Test) based on one Embodiment of this invention. It is a figure explaining the result of the film peeling test (Peeling Test) based on one Embodiment of this invention. It is a figure explaining the phase change memory element concerning one embodiment of the present invention.
- FIG. 1 is a schematic cross-sectional view of a phase change memory cell which is an example of a semiconductor memory element.
- the phase change memory cell includes a substrate 101, a chalcogenide material layer 113, and an upper electrode layer 114 (first electrode layer 114a and second electrode layer 114b) stacked on the substrate 101 in order.
- the first electrode layer 114a such as a Ti layer functions as a buffer layer between the chalcogenide material layer 113 and the second electrode layer 114b
- the provision of the first buffer layer 114a is the second electrode layer 114b. It is preferable because further improvement in the degree of adhesion can be realized.
- the chalcogenide material layer is a storage layer that stores information by causing a reversible phase change between a crystalline phase and an amorphous phase.
- phase change memory Another feature of phase change memory is that the resistance value of the chalcogenide material changes by 2 to 3 digits depending on the crystal state, and since this resistance value is used as a signal, the readout signal is large, the sensing operation is facilitated, and readout Is fast. In addition, such can be rewritten more than 10 4 times, and has the capability of redeeming flash memory.
- the phase change memory is suitable for mobile devices because it can operate at low voltage and low power, and can be easily mixed with a logic circuit.
- silicon oxide SiO 2 is generally used, but is not limited to this.
- a polycarbonate substrate having low heat resistance can also be used.
- the thickness of the substrate is 100 nm in this example, but is not limited to this.
- titanium nitride or tungsten nitride which is a lower layer electrode may be provided below the chalcogenide layer.
- the material of the chalcogenide material layer 113 includes GeSbTe, but is not limited thereto, and a chalcogenide material containing at least two elements selected from Ge, Sb, and Te may be used. Further, a chalcogenide material containing at least one element selected from elements 2b, 1b, 3a to 7a, and 8 of the periodic table, such as using As (arsenic) instead of Ge, may be used. .
- fcc Face Centered Cubic
- a close-packed hexagonal structure (Hexagonal Closed Packing: below) , Abbreviated as hcp). That is, the fcc crystal is a low temperature stable phase, and hcp is a high temperature stable phase.
- the thickness of the chalcogenide material layer 113 is 70 nm in this example although it depends on the specification of the resistance value read as a signal.
- the upper electrode layer 114 has a first electrode layer 114a and a second electrode layer 114b.
- As the material of the first electrode layer 114a titanium Ti is used in this example, but tungsten W may be used.
- the film thickness of the first electrode layer in this example is 1 nm.
- the film thickness of the first electrode layer is defined by the characteristics of the device, but it is desirable to form the first electrode layer thinly so as to fulfill the function as an electrode material. desirable.
- the material of the second electrode layer 114b which is a feature of the present invention, titanium nitride TiN is used in this example, but tungsten nitride WN may be used.
- the film thickness of the second electrode layer 114b in this example is 50 nm.
- FIG. 2 is a schematic plan view of a thin film forming apparatus according to an embodiment of the present invention.
- FIG. 3 is a schematic cross-sectional view of a sputtering apparatus 55 mounted as a chamber of the thin film forming apparatus.
- the thin film forming apparatus shown in FIG. 2 includes a load lock chamber 50 in which the substrate 101 temporarily stays when the substrate 101 is carried in between the atmosphere side and the processing chamber, and a transfer robot 5 for transferring the substrate 101.
- the thin film forming apparatus includes a heat chamber 52 for heating the substrate 101, a pretreatment chamber 53 for removing impurities from the substrate by RF etching, and a sputtering chamber for sputtering the chalcogenide material layer 113. 54 and a reactive sputtering chamber 55 for depositing the upper electrode layer 114. Further, the thin film forming apparatus includes a processing chamber 56, a processing chamber 57, and an unload lock chamber 58 in which the substrate 101 temporarily stays when the substrate 101 is unloaded between the atmosphere side and the processing chamber. I have. Each chamber is hermetically connected via a gate valve.
- reactive sputtering chamber 55 for producing second electrode layer 114b which is one of the chambers included in the thin film forming apparatus and is an important step in the manufacturing process of the phase change memory cell. The configuration will be described.
- the reactive sputtering apparatus 55 includes a processing chamber 300 connected to the exhaust system 303, a cathode 315 for placing a metal target provided in the processing chamber 300, and an inert gas for introducing the inert gas into the processing chamber 300.
- a control unit 310 that controls the introduction unit 305.
- a high frequency power source 320 is connected to the cathode 315 via a DC power source 321 and a matching circuit 317.
- the cathode 315 is connected to a voltmeter 319 for measuring the cathode voltage.
- the control unit 310 can arbitrarily set the flow rate from the outside by a computer, sequencer or the like provided separately from this figure, and the reactive gas introduction means 305 and the inert gas introduction so as to flow the specified flow rate.
- the means 307 is controlled.
- an arbitrarily selected target 313 titanium target or tungsten target is mounted on the cathode 315.
- a target 313 containing titanium and having a non-nitrided surface is installed on the cathode 315.
- the target 313 is not limited to a target whose surface is not nitrided, and the surface may be nitrided as long as sputtering in a metal mode is possible.
- the substrate 101 on which the chalcogenide material layer 113 is deposited is placed on the substrate holder 301 in the processing chamber 300 by the transfer robot 500.
- the processing chamber 300 is evacuated to a predetermined pressure (0.1 to 50 Pa) by the exhaust system 303.
- the control unit 310 drives the inert gas introduction unit 307 to introduce argon gas into the processing chamber 300, sputtering film formation is started.
- a titanium (Ti) layer is formed on the substrate as the first electrode layer 114a.
- the inert gas introduction unit 307 and the reactive gas introduction unit 305 are driven, and the inert gas (argon gas) and the reactive gas (nitrogen gas) are introduced into the processing chamber 300 at a predetermined flow rate ratio. Is done.
- the control unit 310 controls the inert gas introduction unit 307, the reactive gas introduction unit 305, and the exhaust system 303 to control the flow rates of the inert gas and the reactive gas so as to maintain a predetermined flow rate ratio. ing.
- the “predetermined flow rate ratio” is an optimum value that improves the adhesion between the chalcogenide material layer and the electrode layer, as will be described later.
- the high-frequency power source 320 or the DC power source 321 is driven and a predetermined voltage is applied to the cathode, plasma is generated in the processing chamber 300 and sputtering film formation is started.
- Ti target particles scattered from the target 313 containing titanium react with nitrogen, which is a reactive gas, to form titanium nitride (TiN as the second electrode layer 114b) on the substrate on which the first electrode layer 114a is formed. )
- a film is formed.
- the inert gas is not limited to argon gas, and for example, helium (He) gas, krypton (Kr) gas, neon (Ne) gas, or xenon (Xe) gas can be used.
- FIG. 4 is a diagram showing the relationship between the cathode voltage and the flow rate ratio of the reactive gas in the mixed gas.
- an inert gas (argon) and a reactive gas (a target made of a single metal with a purity of 99 wt% or more) without surface nitridation are used.
- the flow rate ratio of the reactive gas (nitrogen gas) in the mixed gas with nitrogen gas) was set to 0%. That is, the controller 310 did not introduce reactive gas (nitrogen gas), but introduced only argon gas to perform sputter deposition.
- the vertical axis in FIG. 4 indicates the cathode voltage ( ⁇ : 380 V) after a predetermined time (for example, 10 seconds) after a constant power (12 kilowatts) is applied to the cathode.
- the symbol ⁇ indicates the case where the flow rate ratio of the reactive gas in the mixed gas of the inert gas and the reactive gas is increased from 0% with respect to the target in which the surface nitriding has not occurred.
- 4 is a plot showing the cathode voltage at each flow rate ratio. In FIG. 4, the symbol ⁇ is referred to as “go”.
- the control unit 310 controlled the flow rate ratio of nitrogen gas in the mixed gas to 10%, and measured the cathode voltage after a predetermined time (for example, 10 seconds). At this time, the cathode voltage was 387 V as shown in FIG. This indicates that since the target surface is nitrided and the resistance value is increased, the current is less likely to flow and the applied power is constant, resulting in an increase in voltage. Similarly, the cathode voltage when the flow rate ratio is changed to 20%, 25%, 30%, 35%, 40%, 45%, 50%, 60%, 70%, 80%, 85% is shown in FIG. Plot ( ⁇ ) as shown. As described above, when the flow rate ratio of nitrogen gas is increased, the surface of the titanium target is nitrided and the electric resistance increases, so that the cathode voltage also increases.
- the flow rate ratio of the nitrogen gas is 85%
- the flow rate ratio of the nitrogen gas in the mixed gas is 85%, 80%, 70%, 60%
- the cathode voltage was measured and plotted (() as shown in FIG.
- the symbol ⁇ indicates each flow rate ratio when the flow rate ratio of the reactive gas in the mixed gas of the inert gas and the reactive gas is reduced with respect to the target whose surface is nitrided. It is a plot which shows a cathode voltage. In FIG. 4, the symbol ⁇ is referred to as “return”.
- the plot ( ⁇ ) and the plot ( ⁇ ) change in the same manner in the A region where the flow rate ratio is relatively small and the C region where the flow rate ratio is relatively large. However, in the B region where the flow rate ratio is 36 to 50%, the hysteresis region 40 is provided.
- the nitridation of the titanium target surface has not progressed or has not progressed so-called metal mode (the target surface hardly reacts with the reactive gas, and the sputtered particles released from the target are in the gas phase.
- Sputtering method for forming a reactive metal by colliding with the reactive gas since the ratio of the reactive gas is small in the flow rate ratio and the reactive gas is in a deficient state, it is considered that the nitriding of the TiN layer formed on the substrate is insufficient.
- the C region it is considered to be a non-metal mode in which nitridation of the titanium target surface is considerably advanced.
- the B region showing hysteresis corresponds to the transition period between the A region and the C region, but the “bound” hysteresis region B1 shows a state in which titanium nitriding (nitriding of the target surface) is not progressing (metal mode). Since the reactive gas is sufficient, the TiN layer (second electrode layer 114b) formed on the substrate is considered to be a high quality film.
- the “return” hysteresis region B2 is considered to be a state where the nitride surface of the titanium target surface is gradually sputtered (non-metal mode). Therefore, the surface nitridation of the target 313 is large and non-metal mode sputtering is performed, so that it is considered difficult to perform good sputtering of target particles (Ti particles) from the target 313.
- the target 313 capable of performing the sputtering in the metal mode is used, and the reaction is performed at the flow rate ratio included in the hysteresis region expressed in the relationship between the cathode voltage and the flow rate ratio of the reactive gas in the mixed gas.
- Supply sex gas is used.
- the “target capable of performing sputtering in the metal mode” is a target having a surface on which the sputtering with respect to the target becomes the metal mode. Therefore, it is preferable to use a target in which the surface of the target does not react with the reactive gas (for example, the surface is not nitrided) because sputtering in the metal mode can be performed. Moreover, even if the surface of the target reacts with the reactive gas (for example, even if a part of the surface is nitrided), the reaction with the reactive gas on the surface of the target is for performing sputtering in the metal mode.
- a target having a surface partially reacted with a reactive gas can be used as a “target capable of performing sputtering in metal mode”.
- the “target capable of performing sputtering in metal mode” means that sputtering in metal mode can be performed regardless of whether the surface reacts with a reactive gas (regardless of whether the surface is nitrided). Points to the target.
- the film peeling test (Peeling Test) of the 2nd electrode layer 114b is demonstrated.
- This film peeling test is a test that measures the degree of adhesion between the chalcogenide layer and the upper electrode layer by examining whether the film is also peeled off at the same time when the tape attached to the film formed on the substrate is peeled off. It is. Specifically, as shown in FIG. 5A, the chalcogenide material layer 113, the first electrode layer (Ti) 114a, and the second electrode layer (TiN) 114b are formed on the substrate 101 as described above. Thereafter, the tape 501 was attached to the central region 503 of the substrate, and then the tape was peeled off.
- the center region 503 is a circular region having a radius of 50 mm from the center of the substrate.
- a film peeling test was performed on the peripheral region 505 of the substrate.
- the peripheral area 505 is a circular area having a radius of 50 mm along the peripheral edge of the substrate.
- Incisions 502 were made in a grid pattern. A film peeling test was performed on the central region 503 and the peripheral region 505 also on the substrate with the cut 502.
- FIG. 6 shows the result of the film peeling test described above. Specifically, on the first electrode layer 114a described above, a pure titanium target that is not nitrided is used to control the gas flow rate ratio (%) of nitrogen gas in the mixed gas to a predetermined value. A film peeling test was performed on the second electrode layer TiN. As shown in FIG. 5, the film peeling test was performed for the center region 503 and the peripheral region 505 of the substrate when the cut was made and when the cut was not made. In FIG. 6, “N / 9 (N: integer of 1 to 9)” indicates that N squares in 9 squares separated by the notch 502 in the central area 503 or the peripheral area 505 are peeled off.
- the second electrode layer 114 b is It is considered that the film is peeled off relatively much and the adhesion of the film is poor.
- the film adhesion of the film was improved even at 38% and 45%, for example.
- the region B hysteresis region
- the hysteresis region B1 has sufficient reactive gas in the state where the titanium nitridation of the surface of the target 313 is not progressing (metal mode). It is considered that a high-quality TiN layer was formed as a result, and as a result, the adhesion of the film was improved.
- a target 313 having a non-nitrided surface is placed on the cathode 315 as “a target capable of performing sputtering in metal mode”.
- the controller 310 corresponds to the hysteresis region corresponding to the cathode voltage applied to the cathode 315 and the hysteresis region expressed in the relationship between the flow rate ratio of the mixed gas of argon gas (inert gas) and nitrogen gas (reactive gas).
- the reactive gas introduction means 305 and the inert gas introduction means 307 are controlled so as to supply nitrogen gas at a flow rate ratio of nitrogen gas in the mixed gas.
- the hysteresis region is a region in which a large amount of nitrogen gas as a reactive gas exists and nitriding of the surface of the target 313 can be suppressed as much as possible. Therefore, by supplying nitrogen gas at a flow rate ratio in this region, the nitridation of the surface of the target 313 by the nitrogen gas supplied to the processing chamber 300 is not progressed as much as possible, and the target of the supplied nitrogen gas is reduced. The reaction with the target particles flying from 313 can be performed satisfactorily.
- nitriding of the surface of the target 313 is hardly progressing (metal mode), but the amount of nitrogen gas that reacts with the target particles sputtered from the target 313 is small. Therefore, the reaction between the target particles and nitrogen gas is not sufficiently performed, and a high-quality TiN film is not formed.
- the surface of the target 313 is nitrided (non-metal mode), and sputtering of target particles (Ti particles) from the target 313 containing Ti is not performed well. . As a result, the target particles used for the reaction with nitrogen gas cannot be secured sufficiently.
- the reactive gas and the target particles can be satisfactorily secured by supplying the reactive gas at a flow rate ratio of the reactive gas that becomes the hysteresis region shown in FIG.
- the electrode layer can be formed, and the degree of adhesion between the chalcogenide layer and the electrode layer formed thereon can be improved.
- a hysteresis region was obtained when the flow rate ratio of nitrogen gas in the mixed gas was between 36% and 50%. However, this depends on the apparatus configuration and gas type, and it is generally considered that the hysteresis region is formed when the reactive gas ratio in the mixed gas is in the range of 20% to 80%. .
- the cathode voltage and the mixed gas in the mixed gas which are determined by the reactive gas, the mixed gas, the target material, etc. to be used. It is important to supply the reactive gas at a flow rate ratio corresponding to the hysteresis region expressed in the relationship with the flow rate ratio of the reactive gas.
- the cathode voltage, the inert gas and the reactive gas can be extracted by the method for generating FIG. 4 described above according to each gas type, target material, and apparatus configuration. What is necessary is just to obtain
- a stacked body of the first electrode layer 114a and the second electrode layer 114b is used as the upper electrode layer 114 formed on the chalcogenide material layer 113.
- the first electrode layer 114a is formed.
- the second electrode layer 114b such as a TiN layer may be provided directly on the chalcogenide material layer 113, for example. That is, in the present embodiment, it is important to improve the adhesion degree of the second electrode layer 114b, and for that purpose, it is essential to supply the reactive gas at a flow rate ratio in the hysteresis region as described above.
- the reactive gas is introduced at the reactive gas flow ratio that falls within the hysteresis region indicating the relationship between the cathode voltage and the flow ratio of the reactive gas in the mixed gas. By doing so, film peeling is suppressed.
- a semiconductor substrate is prepared and a MOS transistor used as a selection transistor is made.
- a MOS transistor used as a selection transistor is made.
- various methods are used, but there is no direct causal relationship with the present invention, and the method can be applied to any method formed by any method.
- tungsten is buried in the interlayer insulating film 501 by CVD, and a tungsten plug 500 is formed by a well-known CMP method.
- a metal material such as a TiN or WN film was formed as the lower layer electrode 503 using a sputtering method.
- a chalcogenide material layer 504 made of GeSbTe having a thickness of 100 nm was deposited by a film forming process using a sputtering method. About this process, the specific conditions in a sputtering device are demonstrated.
- the semiconductor substrate was transferred to a cooling chamber provided in the sputtering apparatus and cooled to 100 ° C. or lower. Subsequently, the semiconductor substrate was transferred to a sputtering chamber, and a GeSbTe film was formed by a sputtering method while controlling the substrate temperature to 100 ° C. or lower. Through these steps, the chalcogenide material layer 504 can be formed in an amorphous state.
- upper electrodes 505 and 506 made of titanium and titanium nitride having a film thickness of 51 nm were deposited by the sputtering method of the present invention. Specifically, a 1 nm thick titanium film as a first electrode layer and a 50 nm titanium nitride film as a second electrode layer were formed. That is, in the step of forming the second electrode layer, a pure Ti target whose surface is not nitrided is used, and the reaction that falls within the hysteresis region indicating the relationship between the cathode voltage and the flow rate ratio of the reactive gas in the mixed gas. The sputter film was formed by controlling the reactive gas to be introduced at a reactive gas flow ratio.
- a silicon oxide film 510 was deposited by a well-known CVD method. Subsequently, the silicon oxide film 510, the upper electrodes 505 and 506, and the chalcogenide material layer 504 were sequentially processed by a known lithography process and dry etching process.
- an interlayer insulating film 507 made of a silicon oxide film was deposited on the entire surface, and the surface unevenness was flattened using a well-known CMP method.
- plug contact holes were opened by a lithography process and a dry etching process.
- tungsten was buried in the plug contact hole, and a tungsten plug 508 was formed by a well-known CMP method.
- aluminum having a thickness of 200 nm was deposited and processed to form a wiring layer 509. Of course, copper having low resistance can be used instead of aluminum.
- the phase change memory element of this embodiment shown in FIG. 7 is substantially completed. Note that since the heat treatment at 400 ° C. or higher is required in the process of forming plugs and wirings (for example, the upper electrode 506 to the wiring layer 509), the chalcogenide material layer 504 formed in an amorphous state depends on the manufacturing process of the phase change memory. Crystallize to hcp.
- the reactive gas at the reactive gas flow ratio that falls within the hysteresis region indicating the relationship between the cathode voltage and the flow ratio of the reactive gas in the mixed gas By introducing, film peeling at the interface between the chalcogenide or the like and the upper electrode layer can be suppressed. More specifically, a so-called metal mode (a sputtering method in which the target surface does not react with the reactive gas, and the sputtered particles emitted from the target collide with the reactive gas in the gas phase to form a reactive metal.
- GeSbTe is used as the chalcogenide material layer.
- the chalcogenide material layer is not limited to this, and a chalcogenide material containing at least two elements selected from Ge, Sb, and Te may be used.
- a chalcogenide material containing at least two elements selected from Ge, Sb, and Te may be used.
- As (arsenic) instead of Ge, from elements 2b, 1b, 3a to 7a, and 8 of the periodic table
- a chalcogenide material containing at least one selected element may be used.
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Abstract
Description
そこで、本発明の目的は、膜の密着性をより向上させたカルコゲナイド材料層と電極層を有する半導体記憶素子の製造方法及びその製造装置を提供することにある。
図1を参照して、本発明に適用可能な半導体記憶素子の構成を説明する。図1は、半導体記憶素子の一例である相変化メモリセルの概略断面図である。
非晶質のGeSbTe膜を熱処理すると、150℃程度で面心立方構造(Face Centered Cubic:以下、fccと略称)に結晶化し、さらに350℃以上の高温で最密六方構造(Hexagonal Closed Packing:以下、hcpと略称)に相転移することが知られている。つまり、fcc結晶は低温安定相であり、hcpは高温安定相である。カルコゲナイド材料層113の膜厚は、信号として読み出す抵抗値の仕様によるが、本例では70nmである。
図2は、本願発明の一実施形態に係る薄膜形成装置の平面概略図である。図3は、薄膜形成装置のチャンバとして搭載されるスパッタ装置55の概略断面図である。
図2に示す薄膜形成装置は、大気側と処理チャンバとの間で基板101の搬入を行う際に基板101が一時的に滞留するロードロックチャンバ50と、基板101を搬送するための搬送ロボット5を備えた搬送チャンバ51とを備えている。また、上記薄膜形成装置は、基板101を加熱するためのヒートチャンバ52と、RFエッチングにより基板の不純物を除去するための前処理チャンバ53と、カルコゲナイド材料層113をスパッタリング成膜するためのスパッタチャンバ54と、上部電極層114を成膜するための反応性スパッタチャンバ55とを備えている。さらに、上記薄膜形成装置は、処理チャンバ56と、処理チャンバ57と、大気側と処理チャンバとの間で基板101の搬出を行う際に基板101が一時的に滞留するアンロードロックチャンバ58とを備えている。なお、各チャンバは、ゲートバルブを介して気密に接続されている。
本実施形態では、カソード315に、チタンを含有するターゲット313であって、表面が窒化されていないターゲット313を設置する。なお、該ターゲット313としては、表面が窒化されていないターゲットに限らず、メタルモードでのスパッタが可能であれば、表面が窒化されていても良い。
次に制御部310が不活性ガス導入手段307を駆動して、処理チャンバ300にアルゴンガスを導入すると、スパッタ成膜が開始される。基板上には第一電極層114aとしてチタン(Ti)層が形成される。
なお、本明細書において、記号■は、表面窒化が起きていないターゲットに対して、不活性ガスと反応性ガスとの混合ガス中の反応性ガスの流量比を0%から増加させた場合の、各流量比におけるカソード電圧を示すプロットである。図4では、記号■を“行き”と称する。
なお、本明細書において、記号▲は、表面が窒化されたターゲットに対して、不活性ガスと反応性ガスとの混合ガス中の反応性ガスの流量比を減らした場合の、各流量比におけるカソード電圧を示すプロットである。図4では、記号▲を“帰り”と称する。
一方、“帰り”のヒステリシス領域B2はチタンターゲット表面の窒化面が徐々にスパッタされている状態(非メタルモード)であると考えられる。従って、ターゲット313における表面窒化は多く、非メタルモードのスパッタになるので、ターゲット313からのターゲット粒子(Ti粒子)の良好なスパッタが困難になると考えられる。
この膜剥がれ試験は、基板に成膜された膜に貼り付けたテープを剥がしたときに、膜も同時に剥がれるか否かを調べることにより、カルコゲナイド層と上部電極層との密着度を測定する試験である。具体的には、図5(A)に示すように基板101に前述したようにカルコゲナイド材料層113と、第1電極層(Ti)114aと、第2電極層(TiN)114bとを成膜した後、テープ501を基板の中心領域503に貼り付け、その後テープを剥がした。なお、ここで使用した基板は直径φ=300mmである。中心領域503は、基板の中心から半径50mmの円領域である。同様にして、基板の周縁領域505についても、膜剥がれ試験を行なった。なお、周縁領域505は、基板の周縁に沿った半径50mmの円領域である。
具体的には、上述した第1電極層114aの上に、窒化されていない純粋なチタンターゲットを用いて、混合ガス中の窒素ガスのガス流量比(%)を所定の値に制御しながら作成した第2電極層TiNに、膜剥がれ試験を実施した。膜剥がれ試験は、図5に示すように基板の中心領域503と周縁領域505について、それぞれ切り込みを入れた場合と切り込みを入れない場合について行なった。
なお、図6において、“N/9(N:1~9の整数)”は、中心領域503または周辺領域505の切り込み502により区切られた9マス中Nマスが剥がれたことを示す。
これによれば、混合ガス中の窒素ガスの流量比が0%、及び20%に制御したとき、すなわち、図4に示すA領域にある場合、膜剥がれ試験の結果、第二電極層114bは、比較的多く剥がれてしまっており、膜の密着度が悪いと考えられる。
図7を参照して、本発明に係る実施例を説明する。この実施例は、第二電極層を作製する工程において、カソード電圧と混合ガス中の反応性ガスの流量比との関係を示すヒステリシス領域内になる該反応性ガス流量比で反応性ガスを導入することにより、膜剥がれを抑制するものである。
Claims (4)
- カルコゲナイド材料層を形成する第1ステップと、
前記カルコゲナイド材料層の上に、反応性ガスと不活性ガスとの混合ガスを用いて、ターゲットにカソード電圧を印加してスパッタリングして、電極層を形成する第2ステップとを含み、
前記ターゲットは、メタルモードでのスパッタを実行可能なターゲットであり、
前記第2ステップにおいて、前記カソード電圧と前記混合ガス中の反応性ガスの流量比との関係に表れるヒステリシス領域に対応する前記混合ガス中の反応性ガスの流量比で、前記反応性ガスを導入することを特徴とする半導体記憶素子の製造方法。 - 前記反応性ガスは窒素ガスであり、
前記ターゲットはチタンであり、
前記窒素ガスは、該窒素ガス流量比が20%以上80%以下で導入されることを特徴とする請求項1に記載の半導体記憶素子の製造方法。 - 前記カルコゲナイド材料層と前記電極層との間に他の電極層がさらに形成され、
前記第2ステップの前に、前記カルコゲナイド材料層の上に、前記他の電極層を形成する第3ステップをさらに含むことを特徴とする請求項1に記載の半導体記憶素子の製造方法。 - カルコゲナイド層上に電極層を形成するスパッタ装置であって、
処理チャンバと、
前記処理チャンバに設けられ、かつターゲットを載置するためのカソードと、
前記処理チャンバに不活性ガスを導入するための不活性ガス導入手段と、
前記処理チャンバに反応性ガスを導入するための反応性ガス導入手段と、
前記不活性ガス導入手段と前記反応性ガス導入手段とを制御する制御部とを具備し、
前記制御部は、前記電極層を形成する際に、前記カソードに印加するカソード電圧と、前記反応性ガスと前記不活性ガスとの混合ガス中の該反応性ガスの流量比との関係に表れるヒステリシス領域に対応する前記混合ガス中の反応性ガスの流量比で、前記反応性ガスを前記処理チャンバに導入するように前記不活性ガス導入手段と前記反応性ガス導入手段とを制御することを特徴とするスパッタ装置。
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JP5238823B2 (ja) | 2013-07-17 |
JPWO2010073904A1 (ja) | 2012-06-14 |
US20110312178A1 (en) | 2011-12-22 |
US8278212B2 (en) | 2012-10-02 |
KR20110086083A (ko) | 2011-07-27 |
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