WO2010070771A1 - Multilayer printed board and method for manufacturing the same - Google Patents

Multilayer printed board and method for manufacturing the same Download PDF

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Publication number
WO2010070771A1
WO2010070771A1 PCT/JP2008/073243 JP2008073243W WO2010070771A1 WO 2010070771 A1 WO2010070771 A1 WO 2010070771A1 JP 2008073243 W JP2008073243 W JP 2008073243W WO 2010070771 A1 WO2010070771 A1 WO 2010070771A1
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WO
WIPO (PCT)
Prior art keywords
conductive
hole
conductor
multilayer printed
resin films
Prior art date
Application number
PCT/JP2008/073243
Other languages
French (fr)
Japanese (ja)
Inventor
悟 座間
賢一 大賀
Original Assignee
古河電気工業株式会社
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Filing date
Publication date
Application filed by 古河電気工業株式会社 filed Critical 古河電気工業株式会社
Priority to KR1020117016658A priority Critical patent/KR101489034B1/en
Priority to CN2008801323987A priority patent/CN102257887B/en
Priority to PCT/JP2008/073243 priority patent/WO2010070771A1/en
Publication of WO2010070771A1 publication Critical patent/WO2010070771A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/462Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar double-sided circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/361Assembling flexible printed circuits with other printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04Assemblies of printed circuits
    • H05K2201/041Stacked PCBs, i.e. having neither an empty space nor mounted components in between
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/05Flexible printed circuits [FPCs]
    • H05K2201/058Direct connection between two or more FPCs or between flexible parts of rigid PCBs
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09109Locally detached layers, e.g. in multilayer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09536Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/096Vertically aligned vias, holes or stacked vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10666Plated through-hole for surface mounting on PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/0455PTH for surface mount device [SMD], e.g. wherein solder flows through the PTH during mounting
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/281Applying non-metallic protective coatings by means of a preformed insulating foil
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards

Definitions

  • the present invention relates to a multilayer printed circuit board and a method for manufacturing the same.
  • Patent Document 1 Conventionally, as a method for producing a multilayer printed board, for example, there are methods for producing a multilayer board disclosed in Patent Document 1, Patent Document 2, and the like.
  • Patent Document 1 a plurality of double-sided substrates with interlayer connection are manufactured, and the plurality of double-sided substrates are stacked via a film-like insulator that has been processed to allow interlayer connection, thereby having electrodes on both sides of the substrate.
  • a method of manufacturing a multilayer substrate is disclosed.
  • Patent Document 2 a single-sided conductor pattern film in which a conductor pattern is formed only on one side of a resin film is laminated, and the multilayer film having electrodes on both sides is manufactured by removing the resin film so that the electrodes are exposed.
  • a method is disclosed. Further, in Patent Document 2, except for a single-sided conductor pattern film forming the surface of a multilayer substrate, a bottomed via hole having a conductive pattern as a bottom surface is formed in the single-sided conductor pattern film, and a conductive paste is placed in the bottomed via hole. The technique of making the conductor pattern of adjacent single-sided conductor pattern films conductive through this conductive paste by filling is disclosed. According to this, each conductive pattern layer of the multilayer substrate can be made conductive by the conductive paste in the via hole. JP 2000-38464 A (Patent No. 3355142) JP 2003-86948 A (Patent No. 3407737)
  • the present invention has been made in view of such conventional problems, and an object of the present invention is to reduce the number of parts to reduce the manufacturing cost, and to provide a multilayer printed board having high interlayer connection reliability and the manufacturing thereof. It is to provide a method.
  • a multilayer printed board according to the invention described in claim 1 is formed integrally with the conductor pattern on a through hole, a conductor pattern formed on one side, and an inner wall of the through hole.
  • a plurality of resin films each having a conductive through hole are stacked in the same vertical direction, and the conductive pattern and the conductive through hole facing each other between two adjacent resin films of the plurality of resin films.
  • Each of the conductors provided between the two land portions is bonded to the metal.
  • a plurality of resin films having a conductor pattern and a conductive through hole formed on one side are overlapped in the same vertical direction, and between two adjacent resin films among the plurality of resin films.
  • the conductor is metal-to-metal coupled with the opposing conductor pattern and conductive through hole.
  • the opposing conductor pattern and the conductive through hole are electrically connected by the conductor and mechanically coupled.
  • the interlayer connection between the conductive patterns of each resin film can be integrated with the conductive pattern without interposing another resin film between two adjacent resin films. This is done through a through hole and a conductor. Therefore, the number of parts can be reduced to reduce the manufacturing cost, and the interlayer connection reliability is high.
  • the conductive pattern and the conductive through-hole have a two-layer structure having a base metal layer and a conductive layer, the adhesiveness between the conductive layer and the resin film is improved. Further improve.
  • the base metal layer is formed of a Ni—P alloy having a P of 2 to 6% and a thickness of 0.05 microns, and the conductor layer is made of Cu. It is formed.
  • the multilayer printed board according to the invention described in claim 4 is characterized in that the conductor is a metal containing Sn.
  • the multilayer printed board according to the invention described in claim 5 is characterized in that the resin film is a thermoplastic resin having a glass transition point and a melting point of 150 ° C. or higher and 350 ° C. or lower.
  • the multilayer printed circuit board according to the invention of claim 6 is characterized in that the resin film is a film in which crystals have optical anisotropy.
  • the multilayer printed circuit board according to the invention of claim 7 is characterized in that the resin film is made of a polyaryl ketone resin and an amorphous polyetherimide.
  • a method for manufacturing a multilayer printed board includes a through hole, a conductor pattern formed on one side, and the conductor pattern integrally formed on an inner wall of the through hole.
  • the plating layers containing Sn are interposed between the conductive pattern and the conductive through-holes, which are arranged in the same vertical direction and face each other between the two adjacent resin films.
  • a plurality of resin films having a conductor pattern and a conductive through hole formed on one side are overlapped in the same vertical direction, and between two adjacent resin films among the plurality of resin films.
  • a conductor formed by melting a plating layer containing Sn by a heat fusion press is metal-to-metal bonded to the opposing conductor pattern and the land portion of the conductive through hole.
  • the opposing conductor pattern and the land portion of the conductive through hole are electrically connected by the conductor and mechanically coupled.
  • a manufacturing method of a multilayer printed circuit board according to an invention described in claim 9 includes a through hole, a conductor pattern formed on one side, and an integral part of the conductor pattern on an inner wall of the through hole.
  • a step of producing resin films each having a formed conductive through hole; and a plurality of the resin films having the same vertical direction, and the conductive pattern facing the two adjacent resin films and the conductive pattern And stacking the conductive paste or metal powder with the conductive paste or the metal powder interposed between the land portions of the conductive through-holes, and stacking a plurality of stacked layers of the resin films by a heat fusion press.
  • a plurality of resin films having a conductor pattern and a conductive through hole formed on one side are overlapped in the same vertical direction, and between two adjacent resin films among the plurality of resin films.
  • the conductor formed by curing the conductive paste metalizes the opposing conductor pattern and conductive through hole.
  • the opposing conductor pattern and the conductive through hole are electrically connected by the conductor and mechanically coupled.
  • the interlayer connection between the conductive patterns of each resin film can be integrated with the conductive pattern without interposing another resin film between two adjacent resin films. This is done through a through hole and a conductor. Therefore, the number of parts can be reduced to reduce the manufacturing cost, and the interlayer connection reliability is high.
  • a base metal layer is formed by electroless plating on one side of the resin film and the inner wall of the through hole, A conductive layer is formed on the underlying metal layer by electroplating, and then the conductive pattern is formed on the conductive layer.
  • the conductor of the conductor pattern and the conductive through hole have a two-layer structure having the base metal layer and the conductor layer, thereby improving the adhesion of the conductor layer.
  • the interlayer connection reliability is further improved.
  • the base metal layer is formed by electroless plating, the conductor thickness of the conductor pattern and the conductive through hole can be reduced. Thereby, a fine conductor pattern can be formed.
  • the conductor pattern is formed after the copper foil is fusion-pressed to the film, so the thickness of the copper foil is limited, and the fine processing Not suitable.
  • the connection reliability is high and the conductor thickness of the conductive pattern and the conductive through hole is uniform.
  • the method for manufacturing a multilayer printed board according to the invention of claim 11 is characterized in that the conductive paste is made of metal powder containing at least Sn, Cu, and Ag.
  • the present invention it is possible to reduce the number of components and reduce the manufacturing cost, and it is possible to obtain a multilayer printed board having high interlayer connection reliability.
  • FIG. 3 is a cross-sectional view illustrating a schematic configuration of a part of the multilayer printed board according to the first embodiment.
  • or (D) is process drawing which shows the preparation procedures of a resin film.
  • or (D) is process drawing which shows the preparation procedures of a resin film.
  • FIG. 1 is a cross-sectional view showing a schematic configuration of a part of the multilayer printed board according to the first embodiment
  • FIG. 2 is an enlarged partial cross-sectional view of a part of FIG.
  • the multilayer printed board 10 shown in FIG. 1 is formed as a three-layer multilayer printed board as an example.
  • the multilayer printed board 10 includes resin films 15A and 15B each having a through hole 11, a conductor pattern 12 formed on one side, and a conductive through hole 14 formed integrally with the conductor pattern 12 on the inner wall of the through hole 11. , 15C are stacked in the same vertical direction.
  • three resin films 15A, 15B, and 15C having the same shape are overlapped. These three resin films 15A, 15B, and 15C are overlaid so that the centers of the conductive through holes 14 coincide.
  • the conductive through holes 14 of the resin films 15A, 15B, and 15C are bent from the inner wall of the through hole 11 to the surface opposite to the surface on which the conductor pattern 12 is formed.
  • Each has an extended land 14a (see FIG. 3D).
  • the opposing conductor pattern 12 and the conductive through Conductors 23 that are metal-to-metal bonded to the land portions 14a of the holes 14 are provided.
  • the conductor 23 is plated with Sn (Sn plating) on the land portion 14a of the conductive through-hole 14 to form a Sn plating layer 23A (see FIG. 3E).
  • Sn plating Sn plating
  • the Sn plating layer 23A is melted after pressing.
  • the conductive pattern 12 and the land portion 14a of the conductive through hole 14 facing each other between the two adjacent resin films 15A and 15B and between the resin films 15B and 15C are electrically connected via the conductor 23. Mechanically coupled.
  • the multilayer printed board 10 includes a resist film 41 that covers the entire conductor pattern 12 of one of the resin films 15A and 15C (resin film 15C) on both sides thereof, and a land of the conductive through hole 14 on the other side (resin film 15A). And a resist film 42 covering the whole 14a.
  • the resist film 41 is formed with a through hole 41a for exposing a part of the conductor pattern 12 (a portion serving as an electrode).
  • a through hole 42 a for exposing the land 14 a of the conductive through hole 14 is formed in the resist film 42.
  • each resin film 15A, 15B, 15C are formed in one conductor 13.
  • the conductor 13 has a base metal layer 13a and a conductor layer 13b formed on the base metal layer 13a.
  • the conductor pattern 12 is formed on the conductor layer 13b on one side of each resin film 15A, 15B, 15C.
  • the resin films 15A, 15B, 15C and the resist films 41, 42 are made of, for example, the same film base material.
  • a general glass cloth base epoxy resin or BT resin may be used, but it is more convenient to use a thermoplastic resin for the film base from the viewpoint of joining a plurality of sheets by a fusion press. It is.
  • the thermoplastic film include a liquid crystal polymer film, PEEK (Polyetheretherketone), PES (Polyethersulfone), PPE (Polyphenyeneether), PTFE (Polytetrafluoroethylene) and the like.
  • Thermoplastic polyimide may also be used.
  • the multilayer printed circuit board 10 having the above configuration is integrated by a heat fusion press in a state where the resin films 15A, 15B, and 15C and the resist films 41 and 42 are stacked as shown in FIG.
  • Sn in the Sn plating layer 23A is melted to form the conductor 23 which is metal-to-metal bonded to the conductor pattern 12 and the land 14a of the conductive through hole 14.
  • another conductive film is not interposed between two adjacent resin films of the resin films 15A, 15B, and 15C, and the conductive patterns 12 of the respective resin films are interposed.
  • the interlayer connection is made through the conductive through hole 14 and the conductor 23 integral with the conductor pattern 12.
  • FIG. 3 is a process diagram showing the production procedure of the resin film
  • FIG. 4 is an explanatory diagram showing the arrangement order of the respective constituent members before the heat fusion press.
  • resin films 15 ⁇ / b> A, 15 ⁇ / b> B, 15 ⁇ / b> C each having a through hole 11, a conductive pattern 12 formed on one side, and a conductive through hole 14 formed integrally with the conductive pattern 12 on the inner wall of the through hole 11.
  • the process of producing is implemented. Since these resin films 15A, 15B, and 15C have the same configuration, here, a process of manufacturing the resin film 15A will be described.
  • a through hole 11 is formed in the resin film 15A shown in FIG. 3A by drilling (see FIG. 3B).
  • a conductor 13 (having a base metal layer 13a and a conductor layer 13b formed on the base metal layer 13a on both surfaces of the resin film 15A and the inner wall of the through-hole 11). 2).
  • the base metal layer 13a is formed by electroless plating.
  • the conductor layer 13b is formed by electroplating.
  • the conductor pattern 12 is formed by photoetching or the like on the conductor layer 13b (see FIG. 2) of the conductor 13 on one side of the resin film 15A among the conductors 13 (see FIG. 3D). Further, the conductor on the surface opposite to the conductor pattern 12 of the resin film 15A is removed by etching or the like leaving the land 14a of the conductive through hole 14.
  • Sn plating (Sn electroplating) is performed on the conductive through holes 14 and the land portions 14a of the resin films 15B and 15C to form the Sn plating layer 23A. (See FIG. 3E).
  • Sn electroplating solution 1st tin sulfate 40g / L Sulfuric acid 100mL / L Additive Lonastan EC-J Temperature 20 ° C Current density 2A / dm 2
  • Sn—Cu alloy plating plating bath: Top Freed BR manufactured by Okuno Pharmaceutical Co., Ltd.
  • Sn-Ag alloy plating may be used.
  • the Sn plating method is not limited to electroplating, and displacement plating may be used.
  • the conductive patterns on both sides were removed by etching, and then immersed in the following plating solution (any of three types) to replace the copper surface to form Sn with a thickness of 2 microns.
  • the resin films 15A, 15B, and 15C are stacked in the same vertical direction as shown in FIG. 4, and the resist film 41 is placed on the resin film 15C, and the resist film 42 is placed under the resin film 15A.
  • a process of stacking the stacked layers and stacking the stacked layers by a heat fusion press is performed.
  • the conductive paste 23A provided between each conductor pattern 12 and both end portions 25a of the conductive through hole 25 is cured, and the conductive pattern 12 and the end portions 14a of the conductive through hole 14 are connected to the metal.
  • the multilayer printed circuit board 10 shown in FIG. 1 is completed.
  • the Sn plating layer 23A provided between each conductor pattern 12 and the land portion 14a of the conductive through hole 14 is melted by the heat fusion press, and is bonded to the conductor pattern 12 and the land portion 14a of the conductive through hole between the metals.
  • the conductor (metal containing Sn) 23 is formed.
  • heat may be applied again to the Sn melting point or higher to melt the Sn to form a metal-bonded conductor.
  • the conductive through holes 14 of the resin films 15A, 15B, and 15C are coaxial.
  • the conductive through holes 14 do not necessarily have to be coaxial.
  • the conductor pattern 12 and the land portion 25a of the conductive through hole 25 of the resin film 22 may be bonded to each other by the conductor 23 between two adjacent resin films.
  • a resin film 15A, 15B, 15C (a plurality of resin films) having a conductor pattern 12 and a conductive through hole 14 formed on one side is overlapped with each other in two adjacent resin films.
  • the conductor 23 is metal-to-metal bonded to the opposing conductor pattern 12 and the land portion 14a of the conductive through hole 14.
  • the conductor 23 is obtained by melting Sn of the Sn plating layer 23A at the time of heat fusion pressing or after pressing. Thereby, between the two adjacent resin films, the opposing conductor pattern 12 and the conductive through hole 14 are electrically connected by the conductor 23 and mechanically coupled.
  • the interlayer connection between the conductive patterns of each resin film is integrated with the conductive pattern 12 without interposing another resin film between two adjacent resin films.
  • the conductive through hole 14 and the conductor 23 are used. Accordingly, it is possible to reduce the number of parts and reduce the manufacturing cost, and it is possible to obtain a multilayer printed board having high interlayer connection reliability.
  • Adhesiveness between the conductor layer 13b and the resin film is improved by forming a single conductor 13 in which the conductor pattern 12 and the conductive through hole 14 are formed into a two-layer structure having a base metal layer 13a and a conductor layer 13b. Therefore, the interlayer connection reliability is further improved.
  • the base metal layer 13a is formed by electroless plating, the conductor thickness of the conductor pattern 12 and the conductive through hole 14 can be reduced. Thereby, the fine conductor pattern 12 can be formed.
  • the conductor 23 that is metal-to-metal bonded to the conductor pattern 12 and the conductive through hole 14 is obtained by melting Sn of the Sn plating layer 23A.
  • the conductor 33 (see FIG. 5) bonded to the conductor pattern 12 and the conductive through-hole 14 between the metals is electrically conductive paste 33A (FIG. 6E). ) And FIG. 7) are cured. Thereby, the conductive pattern 12 and the conductive through hole 14 facing each other between two adjacent resin films, that is, between the resin films 15A and 15B and between the resin films 15B and 15C are electrically connected via the conductor 33. And mechanically coupled.
  • this multilayer printed circuit board 10A the conductive through hole 14 formed in the inner wall of the conductive through hole 11 in the resin film 15 (15A, 15B, 15C) and the conductive through hole 25 in the conductor 33 and the resin film 22 are formed. Used for interlayer connection.
  • the other configuration of the multilayer printed board 10A is the same as that of the multilayer printed board 10 of the first embodiment.
  • FIG. 6 is a process diagram showing the procedure for producing the resin film
  • FIG. 7 is an explanatory diagram showing the arrangement order of the constituent members before the heat fusion press.
  • the conductive paste 33A is interposed between the conductor pattern 12 and both land portions 25a of the second conductive through hole 25 (see FIG. 7E).
  • the conductive paste 33 ⁇ / b> A is applied on both land portions 25 a of the second conductive through holes 25.
  • the resist film 42, the first resin film 15, the second resin film 22, and the resist film 41 are stacked in the order shown in FIG. Thereby, the multilayer printed circuit board 10A shown in FIG. 1 is completed.
  • the conductive paste 33A provided between each conductor pattern 12 and both land portions 25a of the second conductive through hole 25 is cured by the heat fusion press, and both the conductive pattern 12 and the second conductive through hole 25 are cured.
  • the land portion 25a and the conductor 33 are metal-bonded.
  • Example 1 Method for Manufacturing Multilayer Printed Circuit Board 10 or 10A> Sn plating was performed on the land portion 14 a and the inner wall of the conductive through hole 14. In the Sn plating, an Sn plating layer 23A having a thickness of 1 micron was formed.
  • the pressing temperature was in the range of 150 to 350 ° C., and the pressing pressure was in the range of 0.5 to 10 MPa.
  • Example 1 shown in Table 1 below Sn plated on the land portion 14a is melted by a 1 MPa press at 280 ° C., and the conductive through hole is bonded between the conductor pattern and the metal to establish electrical connection. It was.
  • Example 2 a liquid crystal polymer film (BIAC (registered trademark) BC manufactured by Japan Gore-Tex Co., Ltd.) having a thickness of 50 ⁇ m was used as the film substrate.
  • BIAC registered trademark
  • Example 3 PEEK / PEI (IBUKI (registered trademark) manufactured by Mitsubishi Plastics, Inc.) having a thickness of 50 ⁇ m was used as a film substrate.
  • the press pressure and the press temperature were heat-sealed under the conditions shown in Table 1.
  • Examples 4 to 6 multilayer substrates were produced using the resin films and press conditions shown in Table 1.
  • Ag paste was used for the connection between the conductive through hole of the second film and the conductor pattern of the first resin film.
  • the conductive paste 33A is applied by screen printing, and the conductive paste 33A is cured by a heat fusion press, and the conductor 33 (see FIG. 6) in which each conductive paste 33A is cured becomes a conductive pattern and a second conductive through. Bonded between hole and metal.
  • As the conductive paste 33A Dotite XA-824 made by Fujikura Kasei was used as the Ag paste.
  • the pressing conditions are shown in Table 1.
  • Examples 7 to 9 multilayer substrates were produced using the resin films and press conditions shown in Table 1.
  • An AgSn paste was used for connection between the conductive through hole of the second film and the conductor pattern of the first resin film.
  • the one described in paragraph 0075 of Japanese Patent No. 3473601 was used.
  • a multilayer substrate was produced in the same manner as in Examples 4-6.
  • a through hole 11 was formed by a carbon dioxide laser.
  • the through-hole 11 may be not only a carbon dioxide laser but also a UV-YAG laser or an excimer laser with a small diameter. Moreover, you may process the through hole 11 with a mechanical drill.
  • Film roughening / desmear The drilled first resin film 15 was immersed in a strong alkali to dissolve the surface and roughen it.
  • the surface was dipped in a 10 N potassium hydroxide solution at 80 ° C. for 15 to 30 minutes to form irregularities on the surface.
  • the resin smear generated during the formation of the through hole 11 was dissolved and removed, and the inner wall surface of the through hole 11 was also roughened.
  • the surface of the resin film 15 was plated with Ni—P as a base plating (base metal layer 13a) by electroless plating.
  • a film metal-clad laminate was manufactured by sequentially performing a conditioner treatment, a nickel-phosphorous alloy electroless plating treatment, a heat treatment, and a copper electroplating treatment.
  • Electroless plating In the conditioner treatment, the surface of the polymer film was washed with an OPC-350 conditioner manufactured by Okuno Pharmaceutical Co., Ltd.
  • an OPC-80 catalyst manufactured by Okuno Pharmaceutical Co., Ltd. was used as a catalyst-providing liquid containing palladium, and an OPC-500 accelerator was used as an activator.
  • nickel (P) -phosphorus (P) plating was performed on both surfaces of the first resin film 15.
  • a commercially available nickel-phosphorous plating solution was selected as one having a phosphorus concentration of 5% or less.
  • a nickel nickel thickness of 0.2 microns was formed using chemical nickel EXC manufactured by Okuno Pharmaceutical Co., Ltd.
  • the plating solution is not limited to this, and Enplate Ni-426 of Meldex Co., Ltd., Top Nicolon LPH-LF of Okuno Pharmaceutical Co., Ltd., etc. may be used.
  • heat treatment may be performed. Heating was performed at a temperature of 230 to 250 ° C. for 30 seconds to 30 minutes. In this example, heating was performed at 240 ° C. for 3 minutes.
  • Copper electroplating Further, copper electroplating was performed to form a conductor layer 13b of the conductor 13 with a thickness of 1 to 10 microns. In the electroplating process of copper (Cu), copper was formed so that the conductor thickness of the conductor layer 13b was 5 microns. The following copper electroplating solution was used. As an additive, Cubelite TH-RIII manufactured by Sugawara Eugleite Co., Ltd. was used.
  • conductor pattern 12 formed a circuit on both surfaces (the conductor layer 13b of the conductor 13) of the first resin film 15 by a subtractive method. A photosensitive resist was applied, exposed to ultraviolet light, and developed. Next, after performing an etching process to form a conductor pattern, the resist was peeled off.
  • a semi-additive method may be used in which the electrolytic copper plating thickness (conductor thickness) is set to 2 to 3 microns, the plating resist is formed, and then the copper pattern is plated on the conductor pattern portion. I do not care.
  • a conductive paste 33A was applied to both lands 25a of each second conductive through hole 25 by screen printing.
  • the resist film 42, the first resin film 15, the second resin film 22, and the resist film 41 were stacked in the order shown in FIG.
  • the pressing temperature was in the range of 150 to 350 ° C., and the pressing pressure was in the range of 0.5 to 10 MPa.
  • the conductor 33 and the conductor pattern 12 of the resin film 15 were electrically connected.
  • the conductive paste 33A Dotite XA-824 made by Fujikura Kasei was used as the Ag paste.
  • the conductive paste 33A was an AgSn paste. For the details of the paste, the one described in paragraph 0075 of Japanese Patent No. 3473601 was used.
  • Example 2 a liquid crystal polymer film (Vecstar (registered trademark) CT-50N manufactured by Kuraray Co., Ltd.) having a thickness of 50 ⁇ m was used as a film substrate.
  • Vecstar registered trademark
  • CT-50N manufactured by Kuraray Co., Ltd.
  • Example 3 PEEK / PEI (IBUKI (registered trademark) manufactured by Mitsubishi Plastics, Inc.) having a thickness of 50 ⁇ m was used as a film substrate.
  • IBUKI registered trademark manufactured by Mitsubishi Plastics, Inc.
  • Example 4 In Examples 4, 5, 7 and 8, the same film substrate as in Example 2 was used. In Examples 6 and 9, the same film substrate as in Example 3 was used.
  • Example 2 the multilayer substrate was produced in the same manner as in Example 1, and the press pressure and temperature were the conditions according to Table 1.
  • Comparative example As Comparative Examples 1 to 6, a single-area layer plate and a double-sided laminated plate in which a copper foil and a film were bonded together were used, and for the interlayer connection, a blind via hole formed in a film was filled with a conductive paste by heat fusion pressing. A multilayer substrate was prepared. The conditions are shown in Table 2 below.
  • a method for producing the multilayer substrates of Comparative Examples 1 to 6 is shown below.
  • a conductor pattern was formed by etching using a copper clad laminate in which a copper foil and a film were heat-sealed. Via holes were formed with a laser.
  • the conductive paste was applied to the via hole of the film by a screen printing method.
  • a plurality of films fused with conductive paste embedded were superposed and batch heat fusion press was performed.
  • the pressing temperature was in the range of 230 to 350 ° C. and the pressing pressure in the range of 0.5 to 10 MPa. In this press, the films were fused together, the conductive paste filled in the via holes of the film was cured, and the conductive paste and the conductive pattern of the film were electrically connected.
  • connection reliability comparison A six-layer substrate having a conductor pattern according to L in Fig. 2.1 of JIS C 5012 was produced. However, the hole diameter of the interlayer connection portion was 100 microns, the land diameter was 0.5 mm, the wiring width was 0.3 mm, and the interval between the through holes was 7.62 mm. In the comparative example, a via hole having a diameter of 100 microns was formed at the same position of the through hole as in the present invention and filled with a conductive paste. In the present invention, a temperature cycle test corresponding to 9.1.3 description condition 1 of JIS C 5012 was performed, and the interlayer connection reliability was investigated. When the resistance value increased by 20% or more with respect to the initial resistance, it was regarded as a connection failure.
  • the deformation amount of the press thickness after the fusion press is small. Through hole connection reliability is high.
  • this invention can also be changed and embodied as follows.
  • the number of resin films stacked is not limited to “3”, and the present invention can be widely applied to a multilayer printed circuit board in which a plurality of resin films are stacked.
  • metal powder may be used instead of the conductive paste 33A.

Abstract

In a multilayer printed board (10), a plurality of resin films (15) overlap each other by having their vertical directions accord with each other. Each resin film is provided with a through hole (11), a conductor pattern (12) formed on one surface, and a conductive through hole (14) integrally formed with the conductor pattern (12) on an inner wall of the through hole. Conductive bodies (23), each of which is intermetallically bonded to the facing conductor pattern (12) and the conductive through hole (14), are arranged between two adjacent resin films among the resin films (15). Interlayer connection between the conductor patterns (12) of resin films is performed through the conductive through hole (14) integrated with the conductor pattern (12), and the conductive body (23), without having another resin film between the two adjacent resin films.

Description

多層プリント基板およびその製造方法Multilayer printed circuit board and manufacturing method thereof
 本発明は、多層プリント基板およびその製造方法に関する。 The present invention relates to a multilayer printed circuit board and a method for manufacturing the same.
 従来、多層プリント基板の製造方法として、例えば特許文献1、特許文献2等に開示された多層基板の製造方法がある。 Conventionally, as a method for producing a multilayer printed board, for example, there are methods for producing a multilayer board disclosed in Patent Document 1, Patent Document 2, and the like.
 特許文献1には、層間接続をした複数の両面基板を製造し、この複数の両面基板を層間接続可能な処理をしたフィルム状絶縁体を介して積層することで、基板の両面に電極を有する多層基板を製造する方法が開示されている。 In Patent Document 1, a plurality of double-sided substrates with interlayer connection are manufactured, and the plurality of double-sided substrates are stacked via a film-like insulator that has been processed to allow interlayer connection, thereby having electrodes on both sides of the substrate. A method of manufacturing a multilayer substrate is disclosed.
 特許文献2には、樹脂フィルムの片面にのみ導体パターンが形成された片面導体パターンフィルムを積層し、電極が露出するように樹脂フィルムを除去することで、両面に電極を有する多層基板を製造する方法が開示されている。また、特許文献2には、多層基板表面をなす片面導体パターンフィルムを除いて、片面導体パターンフィルムには、導体パターンを底面とする有底ビアホールが形成され、その有底ビアホール内に導電ペーストを充填することにより、この導電ペーストを介して隣接する片面導体パターンフィルム同士の導体パターンを導通させる技術が開示されている。これによると、多層基板の各導体パターン層間をビアホール内の導電ペーストにより導通させることができる。
特開2000-38464号公報(特許第3355142号公報) 特開2003-86948号公報(特許第3407737号公報)
In Patent Document 2, a single-sided conductor pattern film in which a conductor pattern is formed only on one side of a resin film is laminated, and the multilayer film having electrodes on both sides is manufactured by removing the resin film so that the electrodes are exposed. A method is disclosed. Further, in Patent Document 2, except for a single-sided conductor pattern film forming the surface of a multilayer substrate, a bottomed via hole having a conductive pattern as a bottom surface is formed in the single-sided conductor pattern film, and a conductive paste is placed in the bottomed via hole. The technique of making the conductor pattern of adjacent single-sided conductor pattern films conductive through this conductive paste by filling is disclosed. According to this, each conductive pattern layer of the multilayer substrate can be made conductive by the conductive paste in the via hole.
JP 2000-38464 A (Patent No. 3355142) JP 2003-86948 A (Patent No. 3407737)
 ところで、上記特許文献1に開示された従来技術では、片面に導体パターンが形成された複数の樹脂フィルムの隣接する2つの樹脂フィルム間に別の樹脂フィルムが介在している構成である。また、上記特許文献2に開示された従来技術でも、両面に導体パターンが形成された複数の樹脂フィルムの隣接する2つの樹脂フィルム間に別の樹脂フィルムが介在している構成である。このため、部品点数が多く、製造コストが高くなる。 By the way, in the prior art disclosed in Patent Document 1, another resin film is interposed between two adjacent resin films of a plurality of resin films having a conductor pattern formed on one side. Further, even the conventional technique disclosed in Patent Document 2 has a configuration in which another resin film is interposed between two adjacent resin films of a plurality of resin films having conductor patterns formed on both surfaces. For this reason, the number of parts is large and the manufacturing cost becomes high.
 また、融着プレス時に、隣接する2つの樹脂フィルム間に別の樹脂フィルムが変形しやすく、電気的に全ての層間接続をとるのが難しく、層間接続信頼性が低い。特に樹脂フィルムに熱可塑性樹脂を用いると、融着プレス時にフィルムが変形しやすく、多層基板としての厚さにバラツキが発生する不具合が顕著であった。 Also, at the time of fusion press, another resin film is easily deformed between two adjacent resin films, it is difficult to electrically connect all the interlayers, and the interlayer connection reliability is low. In particular, when a thermoplastic resin is used for the resin film, the film is likely to be deformed at the time of fusion press, and there is a remarkable problem that the thickness of the multilayer substrate varies.
 本発明は、このような従来の問題点に鑑みて為されたもので、その目的は、部品点数を少なくして製造コストの低減を図れると共に、層間接続信頼性が高い多層プリント基板およびその製造方法を提供することにある。 The present invention has been made in view of such conventional problems, and an object of the present invention is to reduce the number of parts to reduce the manufacturing cost, and to provide a multilayer printed board having high interlayer connection reliability and the manufacturing thereof. It is to provide a method.
 上記課題を解決するために、請求項1に記載の発明に係る多層プリント基板は、スルーホールと、片面に形成された導体パターンと、前記スルーホールの内壁に前記導体パターンと一体に形成された導電スルーホールとをそれぞれ有する樹脂フィルムが、上下方向を同じにして複数枚重ね合わされており、前記複数の樹脂フィルムのうちの隣接する2つの樹脂フィルム間で対向する前記導体パターンと前記導電スルーホールのランド部との間にそれぞれ設けた導電体が金属間結合していることを特徴とする。 In order to solve the above problems, a multilayer printed board according to the invention described in claim 1 is formed integrally with the conductor pattern on a through hole, a conductor pattern formed on one side, and an inner wall of the through hole. A plurality of resin films each having a conductive through hole are stacked in the same vertical direction, and the conductive pattern and the conductive through hole facing each other between two adjacent resin films of the plurality of resin films. Each of the conductors provided between the two land portions is bonded to the metal.
 この構成によれば、片面に形成された導体パターンと導電スルーホールとを有する樹脂フィルムが上下方向を同じにして複数枚重ね合わされ、これら複数枚の樹脂フィルムのうちの隣接する2つの樹脂フィルム間において、導電体が、対向する導体パターンおよび導電スルーホールと金属間結合している。これにより、隣接する2つの樹脂フィルム間において、対向する導体パターンおよび導電スルーホールが、導電体により電気的に接続されると共に、機械的に結合される。このようにして一体化された多層プリント基板では、隣接する2つの樹脂フィルム間に別の樹脂フィルムを介在させずに、各樹脂フィルムの導体パターン間での層間接続が、導体パターンと一体の導電スルーホールおよび導電体を介してなされる。従って、部品点数を少なくして製造コストの低減を図れると共に、層間接続信頼性が高い。 According to this configuration, a plurality of resin films having a conductor pattern and a conductive through hole formed on one side are overlapped in the same vertical direction, and between two adjacent resin films among the plurality of resin films. , The conductor is metal-to-metal coupled with the opposing conductor pattern and conductive through hole. Thereby, between two adjacent resin films, the opposing conductor pattern and the conductive through hole are electrically connected by the conductor and mechanically coupled. In the multilayer printed circuit board integrated in this way, the interlayer connection between the conductive patterns of each resin film can be integrated with the conductive pattern without interposing another resin film between two adjacent resin films. This is done through a through hole and a conductor. Therefore, the number of parts can be reduced to reduce the manufacturing cost, and the interlayer connection reliability is high.
 請求項2に記載の発明に係る多層プリント基板は、前記導体パターンと前記導電スルーホールは、下地金属層と、該下地金属層上に形成された導体層とを有し、前記導体パターンが前記導体層に形成されていることを特徴とする。 The multilayer printed circuit board according to the invention of claim 2, wherein the conductor pattern and the conductive through hole have a base metal layer and a conductor layer formed on the base metal layer, and the conductor pattern It is formed in a conductor layer.
 この構成によれば、導体パターンと導電スルーホールとを、下地金属層と導体層を有する2層構造にすることで、導体層の樹脂フィルムとの密着性が良くなるので、層間接続信頼性がさらに向上する。 According to this configuration, since the conductive pattern and the conductive through-hole have a two-layer structure having a base metal layer and a conductive layer, the adhesiveness between the conductive layer and the resin film is improved. Further improve.
 請求項3に記載の発明に係る多層プリント基板は、前記下地金属層は、Pが2~6%で厚さが0.05ミクロンのNi-P合金で形成され、前記導体層は、Cuで形成されていることを特徴とする。 According to a third aspect of the present invention, in the multilayer printed circuit board, the base metal layer is formed of a Ni—P alloy having a P of 2 to 6% and a thickness of 0.05 microns, and the conductor layer is made of Cu. It is formed.
 請求項4に記載の発明に係る多層プリント基板は、前記導電体がSnを含む金属であることを特徴とする。 The multilayer printed board according to the invention described in claim 4 is characterized in that the conductor is a metal containing Sn.
 請求項5に記載の発明に係る多層プリント基板は、前記樹脂フィルムは、ガラス転移点および融点が150℃以上350℃以下である熱可塑性樹脂であることを特徴とする。 The multilayer printed board according to the invention described in claim 5 is characterized in that the resin film is a thermoplastic resin having a glass transition point and a melting point of 150 ° C. or higher and 350 ° C. or lower.
 請求項6に記載の発明に係る多層プリント基板は、前記樹脂フィルムは、結晶が光学的異方性を有するフィルムであることを特徴とする。 The multilayer printed circuit board according to the invention of claim 6 is characterized in that the resin film is a film in which crystals have optical anisotropy.
 請求項7に記載の発明に係る多層プリント基板は、前記樹脂フィルムは、ポリアリールケトン樹脂と非晶質ポリエーテルイミドからなることを特徴とする。 The multilayer printed circuit board according to the invention of claim 7 is characterized in that the resin film is made of a polyaryl ketone resin and an amorphous polyetherimide.
 上記課題を解決するために、請求項8に記載の発明に係る多層プリント基板の製造方法は、スルーホールと、片面に形成された導体パターンと、前記スルーホールの内壁に前記導体パターンと一体に形成された導電スルーホールとをそれぞれ有する樹脂フィルムを作製する工程と、前記樹脂フィルムの前記導体パターンと前記導電スルーホールのランド部との少なくとも一方に、Snを含むめっき層を形成する工程と、複数の前記樹脂フィルムを、上下方向を同じにして、かつ、隣接する2つの前記樹脂フィルム間で対向する前記導体パターンと前記導電スルーホールとの間に、前記Snを含むめっき層がそれぞれ介在するように積み重ねると共に、前記樹脂フィルムを複数枚積み重ねた積層体を熱融着プレスにより重ね合わせる工程と、を備えることを特徴とする。 In order to solve the above problems, a method for manufacturing a multilayer printed board according to an eighth aspect of the invention includes a through hole, a conductor pattern formed on one side, and the conductor pattern integrally formed on an inner wall of the through hole. Forming a resin film each having a formed conductive through hole; forming a plating layer containing Sn on at least one of the conductor pattern of the resin film and a land portion of the conductive through hole; The plating layers containing Sn are interposed between the conductive pattern and the conductive through-holes, which are arranged in the same vertical direction and face each other between the two adjacent resin films. And stacking a plurality of the laminates of the resin films by a heat fusion press, Characterized in that it comprises.
 この構成によれば、片面に形成された導体パターンと導電スルーホールとを有する樹脂フィルムが上下方向を同じにして複数枚重ね合わされ、これら複数枚の樹脂フィルムのうちの隣接する2つの樹脂フィルム間において、Snを含むめっき層が熱融着プレスにより溶融して形成された導電体が、対向する導体パターンおよび導電スルーホールのランド部と金属間結合する。これにより、隣接する2つの樹脂フィルム間において、対向する導体パターンおよび導電スルーホールのランド部が、導電体により電気的に接続されると共に、機械的に結合される。このようにして一体化された多層プリント基板では、隣接する2つの樹脂フィルム間に別の樹脂フィルムを介在させずに、各樹脂フィルムの導体パターン間での層間接続が、導体パターンと一体の導電スルーホールおよび導電体を介してなされる。従って、部品点数を少なくして製造コストの低減を図れると共に、層間接続信頼性が高い。 According to this configuration, a plurality of resin films having a conductor pattern and a conductive through hole formed on one side are overlapped in the same vertical direction, and between two adjacent resin films among the plurality of resin films. , A conductor formed by melting a plating layer containing Sn by a heat fusion press is metal-to-metal bonded to the opposing conductor pattern and the land portion of the conductive through hole. Thereby, between two adjacent resin films, the opposing conductor pattern and the land portion of the conductive through hole are electrically connected by the conductor and mechanically coupled. In the multilayer printed circuit board integrated in this way, the interlayer connection between the conductive patterns of each resin film can be integrated with the conductive pattern without interposing another resin film between two adjacent resin films. This is done through a through hole and a conductor. Therefore, the number of parts can be reduced to reduce the manufacturing cost, and the interlayer connection reliability is high.
 上記課題を解決するために、請求項9に記載の発明に係る多層プリント基板の製造方法は、スルーホールと、片面に形成された導体パターンと、前記スルーホールの内壁に前記導体パターンと一体に形成された導電スルーホールとをそれぞれ有する樹脂フィルムを作製する工程と、複数の前記樹脂フィルムを、上下方向を同じにして、かつ、隣接する2つの前記樹脂フィルム間で対向する前記導体パターンと前記導電スルーホールのランド部との間に、導電ペースト或いは金属粉をそれぞれ介在させて積み重ねると共に、前記樹脂フィルムを複数枚積み重ねた積層体を熱融着プレスにより重ね合わせる工程と、を備えることを特徴とする。 In order to solve the above-mentioned problem, a manufacturing method of a multilayer printed circuit board according to an invention described in claim 9 includes a through hole, a conductor pattern formed on one side, and an integral part of the conductor pattern on an inner wall of the through hole. A step of producing resin films each having a formed conductive through hole; and a plurality of the resin films having the same vertical direction, and the conductive pattern facing the two adjacent resin films and the conductive pattern And stacking the conductive paste or metal powder with the conductive paste or the metal powder interposed between the land portions of the conductive through-holes, and stacking a plurality of stacked layers of the resin films by a heat fusion press. And
 この構成によれば、片面に形成された導体パターンと導電スルーホールとを有する樹脂フィルムが上下方向を同じにして複数枚重ね合わされ、これら複数枚の樹脂フィルムのうちの隣接する2つの樹脂フィルム間において、導電ペーストが硬化して形成された導電体が、対向する導体パターンおよび導電スルーホールと金属する。これにより、隣接する2つの樹脂フィルム間において、対向する導体パターンおよび導電スルーホールが、導電体により電気的に接続されると共に、機械的に結合される。このようにして一体化された多層プリント基板では、隣接する2つの樹脂フィルム間に別の樹脂フィルムを介在させずに、各樹脂フィルムの導体パターン間での層間接続が、導体パターンと一体の導電スルーホールおよび導電体を介してなされる。従って、部品点数を少なくして製造コストの低減を図れると共に、層間接続信頼性が高い。 According to this configuration, a plurality of resin films having a conductor pattern and a conductive through hole formed on one side are overlapped in the same vertical direction, and between two adjacent resin films among the plurality of resin films. , The conductor formed by curing the conductive paste metalizes the opposing conductor pattern and conductive through hole. Thereby, between two adjacent resin films, the opposing conductor pattern and the conductive through hole are electrically connected by the conductor and mechanically coupled. In the multilayer printed circuit board integrated in this way, the interlayer connection between the conductive patterns of each resin film can be integrated with the conductive pattern without interposing another resin film between two adjacent resin films. This is done through a through hole and a conductor. Therefore, the number of parts can be reduced to reduce the manufacturing cost, and the interlayer connection reliability is high.
 請求項10に記載の発明に係る多層プリント基板の製造方法は、前記樹脂フィルムを作製する工程において、前記樹脂フィルムの片面および前記スルーホールの内壁に無電解めっきによって下地金属層を形成し、該下地金属層上に電気めっきによって導体層を形成した後、該導体層に前記導体パターンを形成することを特徴とする。 In the method for producing a multilayer printed board according to the invention of claim 10, in the step of producing the resin film, a base metal layer is formed by electroless plating on one side of the resin film and the inner wall of the through hole, A conductive layer is formed on the underlying metal layer by electroplating, and then the conductive pattern is formed on the conductive layer.
 この構成によれば、導体パターンの導体と導電スルーホールとを、下地金属層と導体層を有する2層構造にすることで、導体層の密着性が良くなる。これにより、層間接続信頼性がさらに向上する。また、下地金属層は無電解めっきにより形成するので、導体パターンと導電スルーホールの導体厚を薄くすることができる。これにより、微細な導体パターンを形成することができる。これに対して、上記特許文献1,2に開示された従来技術では、銅箔をフィルムに融着プレスしてから導体パターンを形成するため、銅箔の厚さに制限があり、微細加工に向かない。さらに、導体パターンと導電スルーホールは同時に形成するため、接続信頼性が高く、かつ、導体パターンと導電スルーホールの導体厚が均一になる。 According to this configuration, the conductor of the conductor pattern and the conductive through hole have a two-layer structure having the base metal layer and the conductor layer, thereby improving the adhesion of the conductor layer. Thereby, the interlayer connection reliability is further improved. Further, since the base metal layer is formed by electroless plating, the conductor thickness of the conductor pattern and the conductive through hole can be reduced. Thereby, a fine conductor pattern can be formed. On the other hand, in the prior art disclosed in Patent Documents 1 and 2 above, the conductor pattern is formed after the copper foil is fusion-pressed to the film, so the thickness of the copper foil is limited, and the fine processing Not suitable. Furthermore, since the conductor pattern and the conductive through hole are formed at the same time, the connection reliability is high and the conductor thickness of the conductive pattern and the conductive through hole is uniform.
 請求項11に記載の発明に係る多層プリント基板の製造方法は、前記導電ペーストが少なくともSn,Cu,Agを含む金属粉からなることを特徴とする。 The method for manufacturing a multilayer printed board according to the invention of claim 11 is characterized in that the conductive paste is made of metal powder containing at least Sn, Cu, and Ag.
 本発明によれば、部品点数を少なくして製造コストの低減を図れると共に、層間接続信頼性が高い多層プリント基板を得ることができる。 According to the present invention, it is possible to reduce the number of components and reduce the manufacturing cost, and it is possible to obtain a multilayer printed board having high interlayer connection reliability.
第1実施形態に係る多層プリント基板の一部の概略構成を示す断面図。FIG. 3 is a cross-sectional view illustrating a schematic configuration of a part of the multilayer printed board according to the first embodiment. 図1の一部を拡大して示した部分断面図。The fragmentary sectional view which expanded and showed a part of FIG. (A)乃至(D)は樹脂フィルムの作製手順を示す工程図。(A) thru | or (D) is process drawing which shows the preparation procedures of a resin film. 熱融着プレスの実施前における各構成部材の配置順を示す説明図。Explanatory drawing which shows the arrangement | positioning order of each structural member before implementation of a heat-fusion press. 第2実施形態に係る多層プリント基板の一部の概略構成を示す断面図。Sectional drawing which shows the one part schematic structure of the multilayer printed circuit board concerning 2nd Embodiment. (A)乃至(D)は樹脂フィルムの作製手順を示す工程図。(A) thru | or (D) is process drawing which shows the preparation procedures of a resin film. 熱融着プレスの実施前における各構成部材の配置順を示す説明図。Explanatory drawing which shows the arrangement | positioning order of each structural member before implementation of a heat-fusion press.
符号の説明Explanation of symbols
10,10A:多層プリント基板
11:スルーホール
12:導体パターン
13:導体
13a:下地金属層
13b:導体層
14:導電スルーホール
15,15A,15B,15C:樹脂フィルム
23,33:導電体
23A:Snを含むめっき層
33A:導電ペースト
10, 10A: Multilayer printed circuit board 11: Through hole 12: Conductor pattern 13: Conductor 13a: Underlying metal layer 13b: Conductor layer 14: Conductive through holes 15, 15A, 15B, 15C: Resin films 23, 33: Conductor 23A: Plating layer 33A containing Sn: conductive paste
 次に、本発明を具体化した各実施形態を図面に基づいて説明する。なお、各実施形態の説明において同様の部位には同一の符号を付して重複した説明を省略する。 Next, embodiments embodying the present invention will be described with reference to the drawings. In the description of each embodiment, the same parts are denoted by the same reference numerals, and redundant description is omitted.
 (第1実施形態)
 第1実施形態に係る多層プリント基板を図1乃至図4に基づいて説明する。
(First embodiment)
A multilayer printed circuit board according to the first embodiment will be described with reference to FIGS.
 図1は第1実施形態に係る多層プリント基板の一部の概略構成を示す断面図、図2は図1の一部を拡大した部分断面図である。 FIG. 1 is a cross-sectional view showing a schematic configuration of a part of the multilayer printed board according to the first embodiment, and FIG. 2 is an enlarged partial cross-sectional view of a part of FIG.
 図1に示す多層プリント基板10は、一例として3層の多層プリント基板に形成されている。この多層プリント基板10は、スルーホール11と、片面に形成された導体パターン12と、スルーホール11の内壁に導体パターン12と一体に形成された導電スルーホール14とをそれぞれ有する樹脂フィルム15A,15B,15Cが、上下方向を同じにして複数枚重ね合わされている。 The multilayer printed board 10 shown in FIG. 1 is formed as a three-layer multilayer printed board as an example. The multilayer printed board 10 includes resin films 15A and 15B each having a through hole 11, a conductor pattern 12 formed on one side, and a conductive through hole 14 formed integrally with the conductor pattern 12 on the inner wall of the through hole 11. , 15C are stacked in the same vertical direction.
 本実施形態では、一例として、同じ形状をそれぞれ有する3つの樹脂フィルム15A,15B,15Cが重ね合わされている。これら3つの樹脂フィルム15A,15B,15Cは、導電スルーホール14の中心が一致するよう重ね合わされている。 In this embodiment, as an example, three resin films 15A, 15B, and 15C having the same shape are overlapped. These three resin films 15A, 15B, and 15C are overlaid so that the centers of the conductive through holes 14 coincide.
 また、多層プリント基板10では、樹脂フィルム15A,15B,15Cの各導電スルーホール14は、スルーホール11の内壁から、導体パターン12が形成されている面とは反対側の面上に屈曲して延びたランド14a(図3(D)参照)をそれぞれ有している。 In the multilayer printed circuit board 10, the conductive through holes 14 of the resin films 15A, 15B, and 15C are bent from the inner wall of the through hole 11 to the surface opposite to the surface on which the conductor pattern 12 is formed. Each has an extended land 14a (see FIG. 3D).
 この多層プリント基板10では、樹脂フィルム15A,15B,15Cのうちの隣接する2つの樹脂フィルム間、すなわち、樹脂フィルム15A,15B間および樹脂フィルム15B,15C間に、対向する導体パターン12および導電スルーホール14のランド部14aと金属間結合した導電体23がそれぞれ設けられている。この導電体23は、導電スルーホール14のランド部14aにSnを含むめっき(Snめっき)をおこなってSnめっき層23A(図3(E)参照)を形成し、熱融着プレス時、もしくは、プレス後にSnめっき層23AのSnを溶融させたものである。これにより、隣接する2つの樹脂フィルム15A,15B間および樹脂フィルム15B,15C間でそれぞれ対向する導体パターン12と導電スルーホール14のランド部14aが導電体23を介して電気的に接続されると共に機械的に結合されている。 In this multilayer printed circuit board 10, between the two adjacent resin films of the resin films 15A, 15B, and 15C, that is, between the resin films 15A and 15B and between the resin films 15B and 15C, the opposing conductor pattern 12 and the conductive through Conductors 23 that are metal-to-metal bonded to the land portions 14a of the holes 14 are provided. The conductor 23 is plated with Sn (Sn plating) on the land portion 14a of the conductive through-hole 14 to form a Sn plating layer 23A (see FIG. 3E). The Sn plating layer 23A is melted after pressing. As a result, the conductive pattern 12 and the land portion 14a of the conductive through hole 14 facing each other between the two adjacent resin films 15A and 15B and between the resin films 15B and 15C are electrically connected via the conductor 23. Mechanically coupled.
 さらに、多層プリント基板10は、その両側にある樹脂フィルム15A,15Cの一方(樹脂フィルム15C)の導体パターン12全体を覆うレジスト膜41と、その他方(樹脂フィルム15A)の導電スルーホール14のランド14a全体を覆うレジスト膜42とを備えている。レジスト膜41には、導体パターン12の一部(電極となる箇所)を露出させるための貫通孔41aが形成されている。一方、レジスト膜42には、導電スルーホール14のランド14aを露出させるための貫通孔42aが形成されている。 Further, the multilayer printed board 10 includes a resist film 41 that covers the entire conductor pattern 12 of one of the resin films 15A and 15C (resin film 15C) on both sides thereof, and a land of the conductive through hole 14 on the other side (resin film 15A). And a resist film 42 covering the whole 14a. The resist film 41 is formed with a through hole 41a for exposing a part of the conductor pattern 12 (a portion serving as an electrode). On the other hand, a through hole 42 a for exposing the land 14 a of the conductive through hole 14 is formed in the resist film 42.
 また、各樹脂フィルム15A,15B,15Cの導体パターン12と導電スルーホール14は、一つの導体13に形成されている。この導体13は、図2に示すように、下地金属層13aと、下地金属層13a上に形成された導体層13bとを有する。導体パターン12は、各樹脂フィルム15A,15B,15Cの片面にある導体層13bに形成されている。 Further, the conductor pattern 12 and the conductive through hole 14 of each resin film 15A, 15B, 15C are formed in one conductor 13. As shown in FIG. 2, the conductor 13 has a base metal layer 13a and a conductor layer 13b formed on the base metal layer 13a. The conductor pattern 12 is formed on the conductor layer 13b on one side of each resin film 15A, 15B, 15C.
 樹脂フィルム15A,15B,15Cおよびレジスト膜41,42は、例えば同じフィルム基材で構成されている。フィルム基材は、一般的なガラス布基材エポキシ樹脂やBTレジンなどを用いてもよいが、融着プレスで複数枚接合させる観点からは、フィルム基材に熱可塑性樹脂を用いた方が好都合である。熱可塑性フィルムのなかでは、液晶ポリマーフィルム,PEEK(Polyetheretherketone),PES(Polyethersulfone),PPE(Polyphenyeneether),PTFE(Polytetrafluoroethylene)などがあげられる。また、熱可塑
性ポリイミドを用いてもよい。
The resin films 15A, 15B, 15C and the resist films 41, 42 are made of, for example, the same film base material. As the film base, a general glass cloth base epoxy resin or BT resin may be used, but it is more convenient to use a thermoplastic resin for the film base from the viewpoint of joining a plurality of sheets by a fusion press. It is. Examples of the thermoplastic film include a liquid crystal polymer film, PEEK (Polyetheretherketone), PES (Polyethersulfone), PPE (Polyphenyeneether), PTFE (Polytetrafluoroethylene) and the like. Thermoplastic polyimide may also be used.
 以上の構成を有する多層プリント基板10は、樹脂フィルム15A,15B,15Cおよびレジスト膜41,42を図1に示すように積み重ねた状態で、熱融着プレスにより一体化される。この熱融着プレスにより、Snめっき層23AのSnが溶融して導体パターン12および導電スルーホール14のランド14aと金属間結合した導電体23ができる。このようにして一体化された多層プリント基板10では、樹脂フィルム15A,15B,15Cのうちの隣接する2つの樹脂フィルム間に別の樹脂フィルムを介在させずに、各樹脂フィルムの導体パターン12間での層間接続が、導体パターン12と一体の導電スルーホール14および導電体23を介してなされる。 The multilayer printed circuit board 10 having the above configuration is integrated by a heat fusion press in a state where the resin films 15A, 15B, and 15C and the resist films 41 and 42 are stacked as shown in FIG. By this heat fusion press, Sn in the Sn plating layer 23A is melted to form the conductor 23 which is metal-to-metal bonded to the conductor pattern 12 and the land 14a of the conductive through hole 14. In the multilayer printed circuit board 10 integrated in this way, another conductive film is not interposed between two adjacent resin films of the resin films 15A, 15B, and 15C, and the conductive patterns 12 of the respective resin films are interposed. The interlayer connection is made through the conductive through hole 14 and the conductor 23 integral with the conductor pattern 12.
 次に、上記構成を有する多層プリント基板10の製造方法を、図3および図4に基づいて説明する。図3は樹脂フィルムの作製手順を示す工程図、図4は熱融着プレスの実施前における各構成部材の配置順を示す説明図である。 Next, a method for manufacturing the multilayer printed circuit board 10 having the above configuration will be described with reference to FIGS. FIG. 3 is a process diagram showing the production procedure of the resin film, and FIG. 4 is an explanatory diagram showing the arrangement order of the respective constituent members before the heat fusion press.
 (1)まず、スルーホール11と、片面に形成された導体パターン12と、スルーホール11の内壁に導体パターン12と一体に形成された導電スルーホール14とをそれぞれ有する樹脂フィルム15A,15B,15Cを作製する工程を実施する。これらの樹脂フィルム15A,15B,15Cは同じ構成を有するので、ここでは、樹脂フィルム15Aを作製する工程について説明する。 (1) First, resin films 15 </ b> A, 15 </ b> B, 15 </ b> C each having a through hole 11, a conductive pattern 12 formed on one side, and a conductive through hole 14 formed integrally with the conductive pattern 12 on the inner wall of the through hole 11. The process of producing is implemented. Since these resin films 15A, 15B, and 15C have the same configuration, here, a process of manufacturing the resin film 15A will be described.
 この工程では、まず、図3(A)に示す樹脂フィルム15Aに、スルーホール11を穴あけ加工により形成する(図3(B)参照)。 In this step, first, a through hole 11 is formed in the resin film 15A shown in FIG. 3A by drilling (see FIG. 3B).
 次に、図3(C)に示すように、樹脂フィルム15Aの両面およびスルーホール11の内壁に、下地金属層13aとこの下地金属層13a上に形成された導体層13bとを有する導体13(図2参照)を形成する。下地金属層13aは無電解めっき処理により形成する。また、導体層13bは電気めっき処理により形成する。 Next, as shown in FIG. 3C, a conductor 13 (having a base metal layer 13a and a conductor layer 13b formed on the base metal layer 13a on both surfaces of the resin film 15A and the inner wall of the through-hole 11). 2). The base metal layer 13a is formed by electroless plating. The conductor layer 13b is formed by electroplating.
 次に、導体13のうち、樹脂フィルム15Aの片面にある導体13の導体層13b(図2参照)に、導体パターン12を、フォトエッチングなどにより形成する(図3(D)参照)。また、樹脂フィルム15Aの導体パターン12とは反対側の面にある導体を、導電スルーホール14のランド14aを残してエッチングなどにより除去する。 Next, the conductor pattern 12 is formed by photoetching or the like on the conductor layer 13b (see FIG. 2) of the conductor 13 on one side of the resin film 15A among the conductors 13 (see FIG. 3D). Further, the conductor on the surface opposite to the conductor pattern 12 of the resin film 15A is removed by etching or the like leaving the land 14a of the conductive through hole 14.
 (2)次に、樹脂フィルム15B,15Cの導電スルーホール14およびランド部14aにSnめっき(Sn電気めっき)をおこなってSnめっき層23Aを形成する。(図3(E)参照)。 (2) Next, Sn plating (Sn electroplating) is performed on the conductive through holes 14 and the land portions 14a of the resin films 15B and 15C to form the Sn plating layer 23A. (See FIG. 3E).
 Sn電気めっきは、メルテックス製ロナスタンEC-Jを添加剤に用いた。 For Sn electroplating, Meltex Ronastan EC-J was used as an additive.
  Sn電気めっき液
     硫酸第一すず 40g/L
     硫酸   100mL/L
     添加剤  ロナスタンEC-J
     温度  20℃
    電流密度 2A/dm2
 また、Snのみに限らず、Sn-Cu合金めっき(めっき浴:奥野製薬工業株式会社製トップフリードBRなど)でも構わない。Sn-Ag合金めっきでも構わない。
Sn electroplating solution 1st tin sulfate 40g / L
Sulfuric acid 100mL / L
Additive Lonastan EC-J
Temperature 20 ° C
Current density 2A / dm 2
Further, not only Sn but Sn—Cu alloy plating (plating bath: Top Freed BR manufactured by Okuno Pharmaceutical Co., Ltd.) may be used. Sn-Ag alloy plating may be used.
 また、Snめっきの方法は電気めっきに限らず、置換めっきでも構わない。その場合、両面の導体パターンをエッチング除去した後、下記のめっき液(3種類のいずれでも可)に浸し、銅表面を置換してSnを2ミクロン形成した。
置換めっき:
 塩化第一すず  18.8g/L
 シアン化ナトリウム 188 g/L
 水酸化ナトリウム 22.5g/L
 温度 常温

 すず酸ナトリウム 60g/L
 シアン化ナトリウム 120g/L
 水酸化ナトリウム  7.5g/L
 温度 21~65℃

 塩化第一すず  6g/L
 チオ尿素 55g/L
 酒石酸 39g/L
 温度 12~14℃
Further, the Sn plating method is not limited to electroplating, and displacement plating may be used. In that case, the conductive patterns on both sides were removed by etching, and then immersed in the following plating solution (any of three types) to replace the copper surface to form Sn with a thickness of 2 microns.
Displacement plating:
1st tin chloride 18.8g / L
Sodium cyanide 188 g / L
Sodium hydroxide 22.5g / L
Temperature

Sodium stannate 60g / L
Sodium cyanide 120g / L
Sodium hydroxide 7.5g / L
Temperature 21 ~ 65 ℃

1 st tin chloride 6g / L
Thiourea 55g / L
Tartaric acid 39g / L
Temperature 12-14 ° C
 (3)次に、樹脂フィルム15A,15B,15Cを図4に示すように上下方向を同じにして積み重ねる共に、樹脂フィルム15Cの上にレジスト膜41を、樹脂フィルム15Aの下にレジスト膜42をそれぞれ積み重ね、積み重ねた積層体を熱融着プレスにより重ね合わせる工程を実施する。 (3) Next, the resin films 15A, 15B, and 15C are stacked in the same vertical direction as shown in FIG. 4, and the resist film 41 is placed on the resin film 15C, and the resist film 42 is placed under the resin film 15A. A process of stacking the stacked layers and stacking the stacked layers by a heat fusion press is performed.
 上記熱融着プレスにより、各導体パターン12と導電スルーホール25の両端部25aとの間にそれぞれ設けた導電ペースト23Aが硬化し、導体パターン12および導電スルーホール14の端部14aと金属間結合した導電体23となり、図1に示す多層プリント基板10が完成する。これにより、図1に示す多層プリント基板10が完成する。熱融着プレスにより、各導体パターン12と導電スルーホール14のランド部14aとの間にそれぞれ設けたSnめっき層23Aが溶融し、導体パターン12および導電スルーホールのランド部14aと金属間結合した導電体(Snを含む金属)23となる。 By the heat sealing press, the conductive paste 23A provided between each conductor pattern 12 and both end portions 25a of the conductive through hole 25 is cured, and the conductive pattern 12 and the end portions 14a of the conductive through hole 14 are connected to the metal. Thus, the multilayer printed circuit board 10 shown in FIG. 1 is completed. Thereby, the multilayer printed circuit board 10 shown in FIG. 1 is completed. The Sn plating layer 23A provided between each conductor pattern 12 and the land portion 14a of the conductive through hole 14 is melted by the heat fusion press, and is bonded to the conductor pattern 12 and the land portion 14a of the conductive through hole between the metals. The conductor (metal containing Sn) 23 is formed.
 なお、Sn融点より低い温度で熱融着プレスをおこなった後、再度Sn融点以上に熱をかけてSnを溶融させ、金属間結合した導体を形成してもよい。 In addition, after performing the heat fusion press at a temperature lower than the Sn melting point, heat may be applied again to the Sn melting point or higher to melt the Sn to form a metal-bonded conductor.
 また、前述の工程では、樹脂フィルム15A,15B,15Cの各導電スルーホール14が同軸上になる場合の例を示したが、必ずしも各導電スルーホール14が同軸上にある必要はない。隣接する2つの樹脂フィルム間で、導体パターン12と樹脂フィルム22の導電スルーホール25のランド部25aが任意の場所で導電体23によって金属間結合すれば良い。 In the above-described process, an example in which the conductive through holes 14 of the resin films 15A, 15B, and 15C are coaxial is shown. However, the conductive through holes 14 do not necessarily have to be coaxial. The conductor pattern 12 and the land portion 25a of the conductive through hole 25 of the resin film 22 may be bonded to each other by the conductor 23 between two adjacent resin films.
 以上のように構成された第1実施形態によれば、以下の作用効果を奏する。
 ○片面に形成された導体パターン12と導電スルーホール14とを有する樹脂フィルム15A,15B,15C(複数枚の樹脂フィルム)が上下方向を同じにして重ね合わされた樹脂フィルムのうちの隣接する2つの樹脂フィルム間において、導電体23が、対向する導体パターン12および導電スルーホール14のランド部14aと金属間結合している。この導電体23は、熱融着プレス時、もしくは、プレス後にSnめっき層23AのSnを溶融させたものである。これにより、隣接する2つの樹脂フィルム間において、対向する導体パターン12および導電スルーホール14が、導電体23により電気的に接続されると共に、機械的に結合される。このようにして一体化された多層プリント基板10では、隣接する2つの樹脂フィルム間に別の樹脂フィルムを介在させずに、各樹脂フィルムの導体パターン間での層間接続が、導体パターン12と一体の導電スルーホール14および導電体23を介してなされる。従って、部品点数を少なくして製造コストの低減を図れると共に、層間接続信頼性が高い多層プリント基板を得ることができる。
According to 1st Embodiment comprised as mentioned above, there exist the following effects.
A resin film 15A, 15B, 15C (a plurality of resin films) having a conductor pattern 12 and a conductive through hole 14 formed on one side is overlapped with each other in two adjacent resin films. Between the resin films, the conductor 23 is metal-to-metal bonded to the opposing conductor pattern 12 and the land portion 14a of the conductive through hole 14. The conductor 23 is obtained by melting Sn of the Sn plating layer 23A at the time of heat fusion pressing or after pressing. Thereby, between the two adjacent resin films, the opposing conductor pattern 12 and the conductive through hole 14 are electrically connected by the conductor 23 and mechanically coupled. In the multilayer printed circuit board 10 integrated in this way, the interlayer connection between the conductive patterns of each resin film is integrated with the conductive pattern 12 without interposing another resin film between two adjacent resin films. The conductive through hole 14 and the conductor 23 are used. Accordingly, it is possible to reduce the number of parts and reduce the manufacturing cost, and it is possible to obtain a multilayer printed board having high interlayer connection reliability.
 ○導体パターン12と導電スルーホール14とが形成される一つの導体13を、下地金属層13aと導体層13bを有する2層構造にすることで、導体層13bの樹脂フィルムとの密着性が良くなるので、層間接続信頼性がさらに向上する。 ○ Adhesiveness between the conductor layer 13b and the resin film is improved by forming a single conductor 13 in which the conductor pattern 12 and the conductive through hole 14 are formed into a two-layer structure having a base metal layer 13a and a conductor layer 13b. Therefore, the interlayer connection reliability is further improved.
 ○下地金属層13aは無電解めっきにより形成するので、導体パターン12と導電スルーホール14の導体厚を薄くすることができる。これにより、微細な導体パターン12を形成することができる。 Since the base metal layer 13a is formed by electroless plating, the conductor thickness of the conductor pattern 12 and the conductive through hole 14 can be reduced. Thereby, the fine conductor pattern 12 can be formed.
 ○導体パターン12と導電スルーホール14は同時に形成するため、接続信頼性が高く、かつ、導体パターン12と導電スルーホール14の導体厚が均一になる。 ○ Since the conductor pattern 12 and the conductive through hole 14 are formed simultaneously, the connection reliability is high and the conductor thickness of the conductive pattern 12 and the conductive through hole 14 is uniform.
 (第2実施形態)
 第2実施形態に係る多層プリント基板10Aを図5乃至図7に基づいて説明する。
(Second Embodiment)
A multilayer printed circuit board 10A according to the second embodiment will be described with reference to FIGS.
 次に、本発明の第2実施形態に係る多層プリント基板10Aを図5乃至図7に基づいて説明する。 Next, a multilayer printed board 10A according to a second embodiment of the present invention will be described with reference to FIGS.
 上記第1実施形態の多層プリント基板10では、導体パターン12および導電スルーホール14と金属間結合している導電体23は、Snめっき層23AのSnを溶融させたものである。 In the multilayer printed circuit board 10 of the first embodiment, the conductor 23 that is metal-to-metal bonded to the conductor pattern 12 and the conductive through hole 14 is obtained by melting Sn of the Sn plating layer 23A.
 これに対して、第2実施形態に係る多層プリント基板10Aでは、導体パターン12および導電スルーホール14と金属間結合している導電体33(図5参照)は、導電ペースト33A(図6(E),図7参照)が硬化されたものである。これにより、隣接する2つの樹脂フィルム間、すなわち、樹脂フィルム15A,15B間および樹脂フィルム15B,15C間で対向する導体パターン12と導電スルーホール14が、導電体33を介して電気的に接続されると共に機械的に結合されている。つまり、この多層プリント基板10Aでは、樹脂フィルム15(15A,15B,15C)における導電スルーホール11の内壁に形成された導電スルーホール14と、導電体33および樹脂フィルム22における導電スルーホール25とを、層間接続に用いている。多層プリント基板10Aのその他の構成は、第1実施形態の多層プリント基板10と同様である。 On the other hand, in the multilayer printed circuit board 10A according to the second embodiment, the conductor 33 (see FIG. 5) bonded to the conductor pattern 12 and the conductive through-hole 14 between the metals is electrically conductive paste 33A (FIG. 6E). ) And FIG. 7) are cured. Thereby, the conductive pattern 12 and the conductive through hole 14 facing each other between two adjacent resin films, that is, between the resin films 15A and 15B and between the resin films 15B and 15C are electrically connected via the conductor 33. And mechanically coupled. That is, in this multilayer printed circuit board 10A, the conductive through hole 14 formed in the inner wall of the conductive through hole 11 in the resin film 15 (15A, 15B, 15C) and the conductive through hole 25 in the conductor 33 and the resin film 22 are formed. Used for interlayer connection. The other configuration of the multilayer printed board 10A is the same as that of the multilayer printed board 10 of the first embodiment.
 次に、上記構成を有する多層プリント基板10Aの製造方法を、図6および図7に基づいて説明する。図6は樹脂フィルムの作製手順を示す工程図、図7は熱融着プレスの実施前における各構成部材の配置順を示す説明図である。 Next, a method for manufacturing the multilayer printed circuit board 10A having the above configuration will be described with reference to FIGS. FIG. 6 is a process diagram showing the procedure for producing the resin film, and FIG. 7 is an explanatory diagram showing the arrangement order of the constituent members before the heat fusion press.
 この場合の工程は、上記(1)の工程を実施した後(図6(A)乃至(D)参照)、上記(2),(3)の工程を以下の工程(2A),(3A)で置き換えたものとなる。 In this case, after the step (1) is performed (see FIGS. 6A to 6D), the steps (2) and (3) are changed to the following steps (2A) and (3A). Will be replaced with
 (3A)導電ペースト33Aを、導体パターン12と第2の導電スルーホール25の両ランド部25aとの間にそれぞれ介在させる(図7(E)参照)。本例では、各第2の導電スルーホール25の両ランド部25a上に導電ペースト33Aを塗布させる。 (3A) The conductive paste 33A is interposed between the conductor pattern 12 and both land portions 25a of the second conductive through hole 25 (see FIG. 7E). In this example, the conductive paste 33 </ b> A is applied on both land portions 25 a of the second conductive through holes 25.
 (4A)次に、第1の樹脂フィルム15と第2の樹脂フィルム22とを交互に積み重ねる工程を実施する。 (4A) Next, a step of alternately stacking the first resin film 15 and the second resin film 22 is performed.
 この工程では、レジスト膜42、第1の樹脂フィルム15、第2の樹脂フィルム22、およびレジスト膜41を、図8に示す順番に積み重ね、これらの積層体を熱融着プレスにより重ね合わせる。これにより、図1に示す多層プリント基板10Aが完成する。熱融着プレスにより、各導体パターン12と第2の導電スルーホール25の両ランド部25aとの間にそれぞれ設けた導電ペースト33Aが硬化し、導体パターン12および第2の導電スルーホール25の両ランド部25aと金属間結合した導電体33となる。 In this step, the resist film 42, the first resin film 15, the second resin film 22, and the resist film 41 are stacked in the order shown in FIG. Thereby, the multilayer printed circuit board 10A shown in FIG. 1 is completed. The conductive paste 33A provided between each conductor pattern 12 and both land portions 25a of the second conductive through hole 25 is cured by the heat fusion press, and both the conductive pattern 12 and the second conductive through hole 25 are cured. The land portion 25a and the conductor 33 are metal-bonded.
 このようにして作製された多層プリント基板10Aによれば、隣接する2つの第1の樹脂フィルム15,15間で対向する導体パターン12と導電スルーホール14が、導電体33を介して電気的に接続されると共に機械的に結合されているので、上記第1実施形態と同様の作用効果を奏する。
(実施例1)
<多層プリント基板10或いは10Aの製造方法>
 導電スルーホール14のランド部14a上と内壁にSnめっきをおこなった。Snめっきは1ミクロン厚のSnめっき層23Aを形成した。
According to the multilayer printed circuit board 10A thus manufactured, the conductive pattern 12 and the conductive through hole 14 facing each other between the two adjacent first resin films 15 and 15 are electrically connected via the conductor 33. Since it is connected and mechanically coupled, the same effects as those of the first embodiment can be obtained.
Example 1
<Method for Manufacturing Multilayer Printed Circuit Board 10 or 10A>
Sn plating was performed on the land portion 14 a and the inner wall of the conductive through hole 14. In the Sn plating, an Sn plating layer 23A having a thickness of 1 micron was formed.
 次に、レジスト膜42、複数の樹脂フィルム、およびレジスト膜41を、図7に示す順番に積み重ね、一括熱融着プレスを行った。 Next, the resist film 42, the plurality of resin films, and the resist film 41 were stacked in the order shown in FIG.
 プレス温度は150~350℃の範囲、プレス圧力0.5~10MPaの範囲で行った。下記の表1に示す実施例1では280℃にて1MPaのプレスにより、ランド部14a上にめっきされたSnを溶融させ、導電スルーホールを導体パターンと金属間結合させ、電気的な接続をとった。 The pressing temperature was in the range of 150 to 350 ° C., and the pressing pressure was in the range of 0.5 to 10 MPa. In Example 1 shown in Table 1 below, Sn plated on the land portion 14a is melted by a 1 MPa press at 280 ° C., and the conductive through hole is bonded between the conductor pattern and the metal to establish electrical connection. It was.
Figure JPOXMLDOC01-appb-T000001
 実施例2では、フィルム基材として、厚さ50μmの液晶ポリマーフィルム(ジャパンゴアテックス株式会社製のBIAC(登録商標) BC)を用いた。
Figure JPOXMLDOC01-appb-T000001
In Example 2, a liquid crystal polymer film (BIAC (registered trademark) BC manufactured by Japan Gore-Tex Co., Ltd.) having a thickness of 50 μm was used as the film substrate.
 実施例3では、フィルム基材として、厚さ50μmのPEEK/PEI(三菱樹脂株式会社製IBUKI(登録商標))を用いた。プレス圧力、プレス温度は表1に示す条件で熱融着をおこなった。 In Example 3, PEEK / PEI (IBUKI (registered trademark) manufactured by Mitsubishi Plastics, Inc.) having a thickness of 50 μm was used as a film substrate. The press pressure and the press temperature were heat-sealed under the conditions shown in Table 1.
 実施例4~6は、表1に示す樹脂フィルム、プレス条件で多層基板を作製した。第2のフィルムの導電スルーホールと第1の樹脂フィルムの導体パターンとの接続には、Agペーストを用いた。導電ペースト33Aを、スクリーン印刷にて塗布し、熱融着プレスにより、導電ペースト33Aを硬化させ、各導電ペースト33Aが硬化した導電体33(図6参照)が、導体パターンおよび第2の導電スルーホールと金属間結合させた。導電ペースト33AはAgペーストとして、藤倉化成のドータイトXA-824を用いた。プレス条件は表1に示す。 In Examples 4 to 6, multilayer substrates were produced using the resin films and press conditions shown in Table 1. Ag paste was used for the connection between the conductive through hole of the second film and the conductor pattern of the first resin film. The conductive paste 33A is applied by screen printing, and the conductive paste 33A is cured by a heat fusion press, and the conductor 33 (see FIG. 6) in which each conductive paste 33A is cured becomes a conductive pattern and a second conductive through. Bonded between hole and metal. As the conductive paste 33A, Dotite XA-824 made by Fujikura Kasei was used as the Ag paste. The pressing conditions are shown in Table 1.
 実施例で7~9は、表1に示す樹脂フィルム、プレス条件で多層基板を作製した。第2のフィルムの導電スルーホールと第1の樹脂フィルムの導体パターンとの接続には、AgSnペーストを用いた。ペーストの詳細は、特許第3473601号公報の段落0075に記載のものを用いた。実施例4~6と同様にして多層基板を作製した。 In Examples 7 to 9, multilayer substrates were produced using the resin films and press conditions shown in Table 1. An AgSn paste was used for connection between the conductive through hole of the second film and the conductor pattern of the first resin film. For the details of the paste, the one described in paragraph 0075 of Japanese Patent No. 3473601 was used. A multilayer substrate was produced in the same manner as in Examples 4-6.
 炭酸ガスレーザによりスルーホール11を形成した。 A through hole 11 was formed by a carbon dioxide laser.
 スルーホール11は、炭酸ガスレーザだけでなく、小径ではUV-YAGレーザを用いてもよく、エキシマレーザを用いても良い。また、機械ドリルでスルーホール11を加工してもよい。
フィルム粗面化・デスミア:
 穴あけ加工した第1の樹脂フィルム15を強アルカリに浸して表面を溶解し粗面化した。
The through-hole 11 may be not only a carbon dioxide laser but also a UV-YAG laser or an excimer laser with a small diameter. Moreover, you may process the through hole 11 with a mechanical drill.
Film roughening / desmear:
The drilled first resin film 15 was immersed in a strong alkali to dissolve the surface and roughen it.
 10規定の水酸化カリウム溶液に80℃で15~30分間浸して、表面に凹凸を形成した。同時に、スルーホール11形成時に発生した樹脂スミアを溶解除去し、スルーホール11内壁表面も粗面化した。 The surface was dipped in a 10 N potassium hydroxide solution at 80 ° C. for 15 to 30 minutes to form irregularities on the surface. At the same time, the resin smear generated during the formation of the through hole 11 was dissolved and removed, and the inner wall surface of the through hole 11 was also roughened.
 無電解めっきにより、樹脂フィルム15表面に下地めっき(下地金属層13a)としてNi-Pをめっきした。 The surface of the resin film 15 was plated with Ni—P as a base plating (base metal layer 13a) by electroless plating.
 コンディショナー処理、ニッケルリン合金の無電解めっき処理、熱処理、銅の電気めっき処理の各処理を順に施してフィルム金属張積層体を製造した。
無電解めっき:
 コンディショナー処理は、奥野製薬工業株式会社製のOPC-350コンディショナーにより、高分子フィルムの表面を洗浄した。ここで、パラジウムを含む触媒付与液として奥野製薬工業株式会社製のOPC-80キャタリスト、活性化剤としてOPC-500アクセラレーターを用いた。
A film metal-clad laminate was manufactured by sequentially performing a conditioner treatment, a nickel-phosphorous alloy electroless plating treatment, a heat treatment, and a copper electroplating treatment.
Electroless plating:
In the conditioner treatment, the surface of the polymer film was washed with an OPC-350 conditioner manufactured by Okuno Pharmaceutical Co., Ltd. Here, an OPC-80 catalyst manufactured by Okuno Pharmaceutical Co., Ltd. was used as a catalyst-providing liquid containing palladium, and an OPC-500 accelerator was used as an activator.
 ニッケル合金の無電解めっき処理は、第1の樹脂フィルム15両面にニッケル(P)-リン(P)めっきを行った。リン濃度5%以下のものとして、市販のニッケル-リンめっき液から選定した。奥野製薬工業株式会社の化学ニッケルEXCを用い、Niめっき厚を0.2ミクロン厚形成した。 In the electroless plating treatment of the nickel alloy, nickel (P) -phosphorus (P) plating was performed on both surfaces of the first resin film 15. A commercially available nickel-phosphorous plating solution was selected as one having a phosphorus concentration of 5% or less. A nickel nickel thickness of 0.2 microns was formed using chemical nickel EXC manufactured by Okuno Pharmaceutical Co., Ltd.
 めっき液はこれに限定するものではなく、株式会社メルデックスのエンプレートNi-426、奥野製薬工業株式会社のトップニコロンLPH-LFなどを用いても良い。 The plating solution is not limited to this, and Enplate Ni-426 of Meldex Co., Ltd., Top Nicolon LPH-LF of Okuno Pharmaceutical Co., Ltd., etc. may be used.
 銅めっき前に密着性を向上させるため、熱処理を行っても良い。230~250℃の温度にて、30秒~30分の加熱を行った。本実施例では、240℃、3分の加熱を施した。
銅電気めっき:
 さらに銅電気めっきを行い、導体13の導体層13bを1~10ミクロン厚に形成した。銅(Cu)の電気めっき処理は、導体層13bの導体厚が5ミクロンになるように銅を形成した。銅電気めっき液は下記を用いた。尚、添加剤として、荏原ユージライト株式会社製のキューブライトTH-RIIIを使用した。
硫酸銅 120 g/L
硫酸  150 g/L
濃塩酸 0.125mL/L(塩素イオンとして)
導体パターン12の作製:
 導体パターン12は、サブトラクティブ法で第1の樹脂フィルム15の両面(導体13の導体層13b)に回路を形成した。感光レジストを塗布し、紫外線にて露光し、現像を行った。次に、エッチング工程を行い、導体パターンを形成した後、レジストを剥離した。なお、さらに微細な回路形成には、電気銅めっき厚(導体厚)を2~3ミクロン厚にして、めっきレジストを形成してから導体パターン部に電気銅めっきを行うセミアディティブ法を用いても構わない。
In order to improve adhesion before copper plating, heat treatment may be performed. Heating was performed at a temperature of 230 to 250 ° C. for 30 seconds to 30 minutes. In this example, heating was performed at 240 ° C. for 3 minutes.
Copper electroplating:
Further, copper electroplating was performed to form a conductor layer 13b of the conductor 13 with a thickness of 1 to 10 microns. In the electroplating process of copper (Cu), copper was formed so that the conductor thickness of the conductor layer 13b was 5 microns. The following copper electroplating solution was used. As an additive, Cubelite TH-RIII manufactured by Sugawara Eugleite Co., Ltd. was used.
Copper sulfate 120 g / L
Sulfuric acid 150 g / L
Concentrated hydrochloric acid 0.125mL / L (as chloride ion)
Production of conductor pattern 12:
The conductor pattern 12 formed a circuit on both surfaces (the conductor layer 13b of the conductor 13) of the first resin film 15 by a subtractive method. A photosensitive resist was applied, exposed to ultraviolet light, and developed. Next, after performing an etching process to form a conductor pattern, the resist was peeled off. For further fine circuit formation, a semi-additive method may be used in which the electrolytic copper plating thickness (conductor thickness) is set to 2 to 3 microns, the plating resist is formed, and then the copper pattern is plated on the conductor pattern portion. I do not care.
<多層プリント基板10Aの製造方法>
 各第2の導電スルーホール25の両ランド部25a上に導電ペースト33Aを、スクリーン印刷にて塗布した。
<Method for Manufacturing Multilayer Printed Circuit Board 10A>
A conductive paste 33A was applied to both lands 25a of each second conductive through hole 25 by screen printing.
 次に、レジスト膜42、第1の樹脂フィルム15、第2の樹脂フィルム22、およびレジスト膜41を、図5に示す順番に積み重ね、一括熱融着プレスを行った。 Next, the resist film 42, the first resin film 15, the second resin film 22, and the resist film 41 were stacked in the order shown in FIG.
 プレス温度は150~350℃の範囲、プレス圧力0.5~10MPaの範囲で行った。このプレスにより、各導電ペースト33Aを硬化させ、各導電ペースト33Aが硬化した導電体33が、導体パターンおよび第2の導電スルーホールと金属間結合している。 The pressing temperature was in the range of 150 to 350 ° C., and the pressing pressure was in the range of 0.5 to 10 MPa. By this pressing, the respective conductive pastes 33A are cured, and the conductors 33 in which the respective conductive pastes 33A are cured are bonded to the conductor pattern and the second conductive through holes between the metals.
 この導電体33と樹脂フィルム15の導体パターン12とを電気的に接続させた。導電ペースト33AはAgペーストとして、藤倉化成のドータイトXA-824を用いた。また、導電ペースト33AはAgSnペーストを用いた。ペーストの詳細は、特許第3473601号公報の段落0075に記載のものを用いた。 The conductor 33 and the conductor pattern 12 of the resin film 15 were electrically connected. As the conductive paste 33A, Dotite XA-824 made by Fujikura Kasei was used as the Ag paste. The conductive paste 33A was an AgSn paste. For the details of the paste, the one described in paragraph 0075 of Japanese Patent No. 3473601 was used.
 実施例2では、フィルム基材として、厚さ50μmの液晶ポリマーフィルム(株式会社クラレ製のVecstar(登録商標)CT-50N)を用いた。 In Example 2, a liquid crystal polymer film (Vecstar (registered trademark) CT-50N manufactured by Kuraray Co., Ltd.) having a thickness of 50 μm was used as a film substrate.
 実施例3では、フィルム基材として、厚さ50μmのPEEK/PEI(三菱樹脂株式会社製IBUKI(登録商標))を用いた。 In Example 3, PEEK / PEI (IBUKI (registered trademark) manufactured by Mitsubishi Plastics, Inc.) having a thickness of 50 μm was used as a film substrate.
 実施例4,5,7および8では、実施例2と同様のフィルム基材を用いた。
 実施例6,9では、実施例3と同様のフィルム基材を用いた。
In Examples 4, 5, 7 and 8, the same film substrate as in Example 2 was used.
In Examples 6 and 9, the same film substrate as in Example 3 was used.
 なお、実施例2~9では、多層基板は実施例1と同様にして作製し、プレス圧力、温度は表1による条件でおこなった。 In Examples 2 to 9, the multilayer substrate was produced in the same manner as in Example 1, and the press pressure and temperature were the conditions according to Table 1.
(比較例)
 比較例1~6として、銅箔とフィルムを張り合わせた片面積層板、および、両面積層板を用い、層間接続には、フィルムに形成したブラインドビアホールに導電ペーストを充填したものを熱融着プレスして多層基板を作製した。条件を下記の表2に示す。
(Comparative example)
As Comparative Examples 1 to 6, a single-area layer plate and a double-sided laminated plate in which a copper foil and a film were bonded together were used, and for the interlayer connection, a blind via hole formed in a film was filled with a conductive paste by heat fusion pressing. A multilayer substrate was prepared. The conditions are shown in Table 2 below.
Figure JPOXMLDOC01-appb-T000002
Figure JPOXMLDOC01-appb-T000002
 比較例1~6の多層基板の作成方法を以下に示す。
銅箔とフィルムを熱融着した銅張積層板を用い、エッチングにより導体パターンを形成した。レーザでビアホールを形成した。
導電ペーストをフィルムのビアホールにスクリーン印刷法にて塗布した。
導電ペーストを埋め込んだフィルムを融着したものを複数枚重ね合わせ、一括熱融着プレスをおこなった。プレス温度は230~350℃の範囲、プレス圧力0.5~10MPaの範囲でおこなった。このプレスにおいて、フィルム同士を融着することと、フィルムのビアホールに充填した導電ペーストを硬化させ、導電ペーストとフィルムの導体パターンとを電気的に接続させた。導電ペーストはAgペーストとして、藤倉化成のドータイトXA-824を用いた。また、導電ペーストはAgSnペーストを用いた。ペーストの詳細は、特許3473601号公報の段落0075に記載のものを用いた。
A method for producing the multilayer substrates of Comparative Examples 1 to 6 is shown below.
A conductor pattern was formed by etching using a copper clad laminate in which a copper foil and a film were heat-sealed. Via holes were formed with a laser.
The conductive paste was applied to the via hole of the film by a screen printing method.
A plurality of films fused with conductive paste embedded were superposed and batch heat fusion press was performed. The pressing temperature was in the range of 230 to 350 ° C. and the pressing pressure in the range of 0.5 to 10 MPa. In this press, the films were fused together, the conductive paste filled in the via holes of the film was cured, and the conductive paste and the conductive pattern of the film were electrically connected. As the conductive paste, Dotite XA-824 from Fujikura Kasei was used as the Ag paste. Moreover, AgSn paste was used as the conductive paste. For the details of the paste, the one described in paragraph 0075 of Japanese Patent No. 3473601 was used.
接続信頼性の比較:
JIS C 5012の付図2.1のLに準じる導体パターンの6層基板を作製した。ただし層間接続部の穴径100ミクロンとし、ランド径は0.5mm、配線幅は0.3mmとし、スルーホールの間隔は7.62mmとした。比較例では、本発明と同じスルーホールの位置に100ミクロン径のビアホールを作製し導電ペーストを充填した。本発明では、JIS C 5012の9.1.3記載条件1に該当する温度サイクル試験を実施し、層間接続信頼性について調査した。初期抵抗に対し20%以上抵抗値が増加した時点で接続不良とみなした。
Connection reliability comparison:
A six-layer substrate having a conductor pattern according to L in Fig. 2.1 of JIS C 5012 was produced. However, the hole diameter of the interlayer connection portion was 100 microns, the land diameter was 0.5 mm, the wiring width was 0.3 mm, and the interval between the through holes was 7.62 mm. In the comparative example, a via hole having a diameter of 100 microns was formed at the same position of the through hole as in the present invention and filled with a conductive paste. In the present invention, a temperature cycle test corresponding to 9.1.3 description condition 1 of JIS C 5012 was performed, and the interlayer connection reliability was investigated. When the resistance value increased by 20% or more with respect to the initial resistance, it was regarded as a connection failure.
 上記各実施例によれば、次のような効果が得られた。
 融着プレス後のプレス厚さ変形量が小さい。
 スルーホールの接続信頼性が高い。
According to each of the above embodiments, the following effects were obtained.
The deformation amount of the press thickness after the fusion press is small.
Through hole connection reliability is high.
 なお、この発明は以下のように変更して具体化することもできる。
 ・上記各実施形態において、樹脂フィルムの積層数は「3」に限らず、本発明は、樹脂フィルムを複数枚重ね合わせた多層プリント基板に広く適用可能である。
 ・上記第2実施形態において、導電ペースト33Aに代えて、金属粉を用いてもよい。
In addition, this invention can also be changed and embodied as follows.
In each of the above embodiments, the number of resin films stacked is not limited to “3”, and the present invention can be widely applied to a multilayer printed circuit board in which a plurality of resin films are stacked.
In the second embodiment, metal powder may be used instead of the conductive paste 33A.

Claims (11)

  1.  スルーホールと、片面に形成された導体パターンと、前記スルーホールの内壁に前記導体パターンと一体に形成された導電スルーホールとをそれぞれ有する樹脂フィルムが、上下方向を同じにして複数枚重ね合わされており、
     前記複数の樹脂フィルムのうちの隣接する2つの樹脂フィルム間で対向する前記導体パターンと前記導電スルーホールのランド部との間にそれぞれ設けた導電体が金属間結合していることを特徴とする多層プリント基板。
    A plurality of resin films each having a through hole, a conductive pattern formed on one side, and a conductive through hole formed integrally with the conductive pattern on the inner wall of the through hole are stacked in the same vertical direction. And
    Conductors provided between the conductive patterns facing each other between two adjacent resin films of the plurality of resin films and the land portions of the conductive through holes are metal-to-metal bonded. Multilayer printed circuit board.
  2.  前記導体パターンと前記導電スルーホールは、下地金属層と、該下地金属層上に形成された導体層とを有し、前記導体パターンが前記導体層に形成されていることを特徴とする請求項1に記載の多層プリント基板。 The conductive pattern and the conductive through-hole have a base metal layer and a conductor layer formed on the base metal layer, and the conductor pattern is formed in the conductor layer. 2. The multilayer printed circuit board according to 1.
  3.  前記下地金属層は、Pが2~6%で厚さが0.05ミクロンのNi-P合金で形成され、前記導体層は、Cuで形成されていることを特徴とする請求項2に記載の多層プリント基板。 The base metal layer is formed of a Ni-P alloy having a P content of 2 to 6% and a thickness of 0.05 microns, and the conductor layer is formed of Cu. Multilayer printed circuit board.
  4.  前記導電体がSnを含む金属であることを特徴とする請求項1乃至3のいずれか一つに記載の多層プリント基板。 The multilayer printed circuit board according to any one of claims 1 to 3, wherein the conductor is a metal containing Sn.
  5.  前記樹脂フィルムは、ガラス転移点および融点が150℃以上350℃以下である熱可塑性樹脂であることを特徴とする請求項1乃至4のいずれか一つに記載の多層プリント基板。 The multilayer printed circuit board according to any one of claims 1 to 4, wherein the resin film is a thermoplastic resin having a glass transition point and a melting point of 150 ° C or higher and 350 ° C or lower.
  6.  前記樹脂フィルムは、結晶が光学的異方性を有するフィルムであることを特徴とする請求項1乃至4のいずれか一つに記載の多層プリント基板。 The multilayer printed circuit board according to any one of claims 1 to 4, wherein the resin film is a film in which crystals have optical anisotropy.
  7.  前記樹脂フィルムは、ポリアリールケトン樹脂と非晶質ポリエーテルイミドからなることを特徴とする請求項1乃至4のいずれか一つに記載の多層プリント基板。 The multilayer printed circuit board according to any one of claims 1 to 4, wherein the resin film is made of a polyaryl ketone resin and an amorphous polyetherimide.
  8.  スルーホールと、片面に形成された導体パターンと、前記スルーホールの内壁に前記導体パターンと一体に形成された導電スルーホールとをそれぞれ有する樹脂フィルムを作製する工程と、
     前記樹脂フィルムの前記導体パターンと前記導電スルーホールのランド部との少なくとも一方に、Snを含むめっき層を形成する工程と、
     複数の前記樹脂フィルムを、上下方向を同じにして、かつ、隣接する2つの前記樹脂フィルム間で対向する前記導体パターンと前記導電スルーホールとの間に、前記Snを含むめっき層がそれぞれ介在するように積み重ねると共に、前記樹脂フィルムを複数枚積み重ねた積層体を熱融着プレスにより重ね合わせる工程と、
    を備えることを特徴とする多層プリント基板の製造方法。
    Producing a resin film each having a through hole, a conductive pattern formed on one side, and a conductive through hole formed integrally with the conductive pattern on the inner wall of the through hole;
    Forming a plating layer containing Sn on at least one of the conductor pattern of the resin film and the land portion of the conductive through hole;
    The plating layers containing Sn are interposed between the conductive pattern and the conductive through-holes, which are arranged in the same vertical direction and face each other between the two adjacent resin films. And stacking a plurality of the laminates of the resin films by a heat fusion press,
    A method for producing a multilayer printed circuit board, comprising:
  9.  スルーホールと、片面に形成された導体パターンと、前記スルーホールの内壁に前記導体パターンと一体に形成された導電スルーホールとをそれぞれ有する樹脂フィルムを作製する工程と、
     複数の前記樹脂フィルムを、上下方向を同じにして、かつ、隣接する2つの前記樹脂フィルム間で対向する前記導体パターンと前記導電スルーホールのランド部との間に、導電ペースト或いは金属粉をそれぞれ介在させて積み重ねると共に、前記樹脂フィルムを複数枚積み重ねた積層体を熱融着プレスにより重ね合わせる工程と、
    を備えることを特徴とする多層プリント基板の製造方法。
    Producing a resin film each having a through hole, a conductive pattern formed on one side, and a conductive through hole formed integrally with the conductive pattern on the inner wall of the through hole;
    Conductive paste or metal powder is placed between the conductive pattern and the land portion of the conductive through-hole, the plurality of the resin films having the same vertical direction and facing each other between the two adjacent resin films. A step of stacking a plurality of the resin films stacked with a heat fusion press, and interposing and stacking;
    A method for producing a multilayer printed circuit board, comprising:
  10.  前記樹脂フィルムを作製する工程において、前記樹脂フィルムの片面および前記スルーホールの内壁に無電解めっきによって下地金属層を形成し、該下地金属層上に電気めっきによって導体層を形成した後、該導体層に前記導体パターンを形成することを特徴とする請求項8又は9に記載の多層プリント基板の製造方法。 In the step of producing the resin film, after forming a base metal layer by electroless plating on one surface of the resin film and the inner wall of the through hole, and forming a conductor layer on the base metal layer by electroplating, the conductor The method for producing a multilayer printed board according to claim 8 or 9, wherein the conductor pattern is formed on a layer.
  11. 前記導電ペーストが少なくともSn,Cu,Agを含む金属粉からなることを特徴とする請求項9に記載の多層プリント基板の製造方法。 The method for manufacturing a multilayer printed board according to claim 9, wherein the conductive paste is made of a metal powder containing at least Sn, Cu, and Ag.
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EP3478037A1 (en) * 2017-10-20 2019-05-01 Toyota Jidosha Kabushiki Kaisha Method of manufacturing multilayer substrate
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