WO2010058567A1 - Dispositif de réduction de papillotement, circuit intégré et procédé de réduction de papillotement - Google Patents

Dispositif de réduction de papillotement, circuit intégré et procédé de réduction de papillotement Download PDF

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Publication number
WO2010058567A1
WO2010058567A1 PCT/JP2009/006194 JP2009006194W WO2010058567A1 WO 2010058567 A1 WO2010058567 A1 WO 2010058567A1 JP 2009006194 W JP2009006194 W JP 2009006194W WO 2010058567 A1 WO2010058567 A1 WO 2010058567A1
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Prior art keywords
flicker
unit
line
screen
integral value
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PCT/JP2009/006194
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English (en)
Japanese (ja)
Inventor
渕上郁雄
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パナソニック株式会社
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Priority to US13/126,561 priority Critical patent/US8451345B2/en
Priority to JP2010539144A priority patent/JP5628684B2/ja
Publication of WO2010058567A1 publication Critical patent/WO2010058567A1/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/70—Circuitry for compensating brightness variation in the scene
    • H04N23/745—Detection of flicker frequency or suppression of flicker wherein the flicker is caused by illumination, e.g. due to fluorescent tube illumination or pulsed LED illumination
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/70—Circuitry for compensating brightness variation in the scene
    • H04N23/76—Circuitry for compensating brightness variation in the scene by influencing the image signals

Definitions

  • the present invention relates to a technique for reducing a flicker component generated as light and dark in a captured image due to flickering of illumination from an image signal related to the captured image.
  • Patent Document 1 As an imaging device having a conventional flicker reduction means, for example, there is one described in Patent Document 1.
  • line integral values obtained by integrating pixel values for each horizontal line are stored as many as the number of frames corresponding to the greatest common divisor of the flicker period and the frame period.
  • the average value of the line integral values of the corresponding horizontal lines over the number of frames is determined, and this is taken as the line integral value from which the flicker has been removed.
  • the flicker component is analyzed from the line integral value normalized by the above average value.
  • FIG. 8 is a block diagram showing the main configuration of a conventional general imaging device having flicker reduction means, which is also common to the imaging device described in Patent Document 1 described above.
  • an imaging optical system component 1001 includes a lens, an aperture, and the like.
  • An imaging element 1002 is an area image sensor, and converts light imaged on an imaging surface into an electrical signal.
  • the imaging optical system component 1001 has a role of adjusting the light quantity of the light from the subject by using a diaphragm and forming an image of the subject on the imaging surface of the imaging element 1002.
  • the system controller 1003 includes a microprocessor or the like and controls the entire imaging apparatus 1000.
  • the optical system driver 1004 adjusts the zoom, focus, aperture, and the like of the imaging optical system component 1001 according to an instruction from the system controller 1003.
  • the imaging device control unit (IS control unit) 1005 controls the imaging device 1002 according to an instruction of the system controller 1003.
  • an analog front end unit (AFE unit) 1006 performs analog signal processing on the analog image signal from the imaging device 1002, and outputs a digital image signal converted into a digital signal.
  • the digital signal processing unit 1007 performs digital signal processing on the digital image signal from the AFE unit 1006, and generates and outputs an output image signal to be an output of the imaging device 1000.
  • the digital signal processing unit 1007 includes a flicker reduction unit 1021 that performs flicker reduction, a signal processing unit 1022 that performs white balance adjustment of digital image signals, gamma correction, and image format conversion in accordance with an output image format.
  • FIG. 9 is a block diagram showing the configuration of the flicker reduction unit 1021 of FIG.
  • the line integration unit 1031 obtains, for each horizontal line, integration of the digital image signal for one horizontal line from the digital image signal from the AFE unit 1006.
  • the memory 1032 stores line integration values generated for each horizontal line by the line integration unit 1031 for several frames or several fields. Here, it demonstrates using a flame
  • the difference calculation unit 1033 obtains the difference between the first line integral value from the line integration unit 1031 and the second line integral value read from the memory 1032, and outputs the obtained difference value to the normalization unit 1035.
  • the second line integral value is a line integral value located at the same position on the frame as the first line integral value in the previous frame stored in the memory 1032, that is, the same vertical coordinate. is there.
  • the average value calculation unit 1034 obtains an average value of line integration values from the first line integration value from the line integration unit 1031 and the plurality of second line integration values read from the memory 1032.
  • the normalization unit 1035 obtains a normalized difference value by dividing the difference value from the difference calculation unit 1033 by the average value from the average value calculation unit 1034.
  • a DFT (Discrete Fourier Transform) unit 1036 performs discrete Fourier transform on the normalized difference value from the normalization unit 1035.
  • the flicker coefficient calculation unit 1037 identifies the amplitude and phase of each order of the flicker component from the Fourier coefficient from the DFT unit 1036, and generates a flicker coefficient corresponding to the current input pixel value of the flicker reduction unit 1021 from them.
  • the correction operation unit 1038 performs flicker correction operation on the input image of the flicker reduction unit 1021 based on the flicker coefficient from the flicker coefficient calculation unit 1037. Specifically, the correction operation unit 1038 obtains the correction value with reduced flicker by dividing the input pixel value by the value obtained by adding 1 to the flicker coefficient.
  • the line integration value obtained by the line integration unit 1031 is stored in the memory 1032 over the number of frames smaller than the number of frames required for the average value calculation by the average value calculation unit 1034.
  • the number of frames necessary for calculating the average value is the period of the frequency that is the greatest common divisor of the flicker frequency of the illumination and the frame rate so that the calculated average value becomes a line integral value excluding the influence of flicker. It corresponds to the period. For example, in the case of a flicker frequency of 100 Hz and a frame rate of 60 fps (frames per second), the maximum common divisor is 20 Hz, and the above period is equivalent to three frames.
  • the difference calculation unit 1033 calculates the difference between the line integration value from the line integration unit 1031 and the line integration value corresponding to the same vertical position one frame before read from the memory 1032, and obtains the difference between the line integration values between the frames. .
  • the normalization unit 1035 divides the difference between the line integral values between frames by the average value which is the line integral value excluding the influence of the flicker determined by the average value calculation unit 1034. Normalize differences in line integrals. As a result, a normalized flicker component having a constant amplitude, which is separated from the signal strength of the photographed image, is determined, and the analysis of the flicker component becomes easy.
  • the difference between the normalized line integral values calculated by the normalization unit 1035 is discrete Fourier transformed by the DFT unit 1036 with respect to the number of lines in one period section of the flicker. For example, when the flicker frequency is 100 Hz, the frame rate is 60 fps, and the number of lines per frame is N, the number of lines in one cycle period of flicker is N ⁇ 60/100 lines.
  • the obtained Fourier coefficient gives the amplitude and the phase in each order of the flicker component
  • the flicker coefficient calculating unit 1037 obtains the flicker coefficient for the input pixel value based on the information.
  • the correction operation unit 1038 performs flicker correction operation on the input pixel value of the flicker reduction unit 1021 using the flicker coefficient from the flicker coefficient calculation unit 1037.
  • the flicker reduction unit 1021 of the imaging apparatus 1000 described above has the following problems.
  • the average value calculation unit 1034 needs to perform averaging processing so as to obtain the line integral value from which the influence of the flicker is removed, and the average of the number of frames in which the phase of the flicker component and the frame rate match is obtained. There must be.
  • the number of frames is the number of frames based on the frequency which is the greatest common divisor of the flicker frequency and the frame rate. For example, when the frequency of the flicker component is 100 Hz and the frame rate is 60 fps, the frequency to be the greatest common divisor is 20 Hz, and the number of frames at this time is three.
  • An object of the present invention is to provide a flicker reduction device, an integrated circuit, and a flicker reduction method capable of effectively reducing a flicker component contained in an image signal with a memory having a small capacity.
  • the flicker reduction device of the present invention is a flicker reduction device that is included in an image signal captured by an imaging device and reduces a flicker component caused by illumination from the image signal, and forms a screen for each screen.
  • An acquisition unit that acquires a line integral value of a sample based on the image signal for a part of horizontal lines; and a memory that stores line integral values of the sample acquired by the acquisition unit for a plurality of screens;
  • a flicker extraction unit, a flicker coefficient calculation unit that calculates a flicker coefficient for the image signal based on the information of the flicker component, and a
  • the integrated circuit of the present invention is an integrated circuit which is included in an image signal captured by an imaging device and reduces a flicker component due to illumination from the image signal, and forms a screen for each screen.
  • An acquisition unit that acquires a line integral value of a sample based on the image signal for a part of horizontal lines; and a memory that stores line integral values of the sample acquired by the acquisition unit for a plurality of screens;
  • Flicker extraction for extracting flicker component information based on the inter-screen discrete Fourier transform unit performing discrete Fourier transform on an integral value sequence and the discrete Fourier transform result by the inter-screen discrete Fourier transform unit
  • a flicker coefficient calculating unit that calculates a flicker coefficient for the image signal based on the information of the flicker component; and a correction operation unit that performs a flicker component reduction operation
  • the flicker reduction method of the present invention is a flicker reduction method that is included in an image signal captured by an imaging device and reduces a flicker component caused by illumination from the image signal, and a screen is displayed for each screen.
  • An acquisition step of acquiring a line integral value of a sample based on the image signal and a line integral value of the sample acquired in the acquisition step is stored in a memory for a plurality of screens for a part of horizontal lines to be configured Storage step, line integral values of the sample of one screen most recently acquired in the acquisition step, and line integral values of samples of a plurality of screens prior to the one screen stored in the memory , Discrete Fourier transform step of performing discrete Fourier transform on a sample line integral value sequence consisting of, and discrete Fourier transform step in the discrete Fourier transform step of the screen
  • the memory capacity does not have to have a size for storing the line integral value of the sample for all horizontal lines constituting the screen. It suffices to store the line integral value of the sample for a part of horizontal lines constituting the screen. Therefore, it is possible to effectively reduce the flicker component contained in the image signal with a small capacity memory.
  • the acquisition unit integrates, for each screen, all of one horizontal line or a part of image signals satisfying a predetermined condition with respect to a plurality of horizontal lines constituting the screen, and
  • the line integration unit that uses the value obtained by normalizing the integral value as the first line integral value, and the horizontal portion of the first line integral values of the plurality of horizontal lines constituting the screen for each screen
  • a sampling unit for sampling a first line integral value of a line as the line integral value of the sample, wherein the flicker reduction device is configured to display the same screen in a period based on the frequency of the flicker component included in the information of the flicker component.
  • An inter-line discrete Fourier transform unit performing discrete Fourier transform on a first line integral value sequence consisting of the above first line integral values; and the inter-line discrete Fourier transform unit And a first flicker extraction unit for extracting first information of the flicker component based on the result of the scatter Fourier transform, wherein the flicker coefficient calculation unit calculates the flicker coefficient for the image signal by the first flicker extraction unit. It may be performed based on 1 information.
  • the inter-line discrete Fourier transform unit and the first flicker extraction unit further analyze the flicker component between horizontal lines using the frequency of the flicker component extracted by the flicker extraction unit. For this reason, more detailed first information of the flicker component is obtained, and the flicker component can be reduced more appropriately.
  • the sampling unit determines that the first line integral value of the horizontal line is the predetermined range. It may be changed to another horizontal line inside.
  • the processing of the inter-screen discrete Fourier transform unit and the flicker extraction unit is performed using the horizontal line in which the first line integral value is within the predetermined range. Therefore, it is possible to avoid mixing an error into the image signal in the process of reducing the flicker component from the image signal, and it is possible to reduce the flicker component with higher accuracy.
  • the sampling unit may determine the horizontal line of the sample target based on the motion vector between the screens of the image block.
  • the inter-screen discrete Fourier transform unit estimates a candidate frequency in which a flicker component appears based on the frequency of a commercial power supply and a frame rate related to the image signal, and the estimated flicker component appears
  • a discrete Fourier transform may be performed on the sample line integral value series based on the frequency of.
  • the inter-screen discrete Fourier transform unit determines the position corresponding to the nearby frequency including the estimated frequency. Only the Fourier coefficients need to be obtained, and the amount of operation of discrete Fourier transform by the inter-screen discrete Fourier transform unit can be reduced.
  • FIG. 1 is a block diagram showing an example of the configuration of an imaging device including a flicker reduction unit according to a first embodiment.
  • FIG. 2 is a block diagram showing an example of configuration of a flicker reduction unit of FIG. 1;
  • FIG. 3 is an operation schematic diagram showing the operation of the sampling unit of FIG. 2;
  • 7 is a flowchart showing a processing flow of flicker reduction processing by the flicker reduction unit of FIG. 2;
  • FIG. 8 is a block diagram showing an example of the configuration of a flicker reduction unit according to a second embodiment.
  • FIG. 6 is a flowchart showing a processing flow of flicker reduction processing by the flicker reduction unit of FIG. 5;
  • FIG. 13 is a block diagram showing an example of the configuration of a digital signal processing unit according to a third embodiment
  • FIG. 1 is a block diagram showing the configuration of a conventional imaging device.
  • FIG. 8 is a block diagram showing a configuration of a flicker reduction unit in a conventional imaging device.
  • each flicker reduction unit described below is described as performing processing based on a frame, but processing is performed based on a field May be
  • FIG. 1 is a block diagram showing a configuration example of an imaging device 10 including a flicker reduction unit 21 according to the first embodiment.
  • the photographing device 10 picks up an image of a subject by an area image sensor, performs digital signal processing on the picked-up image, and outputs or records the image.
  • the photographing device 10 is, for example, a digital video camera or digital still camera.
  • the imaging device 10 includes an imaging optical system component 11, an imaging device 12, a system controller 13, an optical system driver 14, an imaging device control unit (IS control unit) 15, and an analog front end.
  • the imaging optical system component 11 is configured of a lens, an aperture, and the like.
  • the imaging element 12 is an area image sensor, converts the light focused on the imaging surface into an electrical signal, and outputs an analog image signal to the AFE unit 16.
  • the imaging device is assumed to be an imaging device that performs imaging by line exposure, such as a complementary metal oxide semiconductor (CMOS) image sensor. Line exposure is also referred to as a rolling shutter.
  • CMOS complementary metal oxide semiconductor
  • Line exposure is also referred to as a rolling shutter.
  • the imaging optical system component 11 has a role of adjusting the light quantity of the light from the subject by using a diaphragm and forming an image of the subject on the imaging surface of the imaging device 12.
  • the system controller 13 is configured by a microprocessor or the like and controls the entire imaging device 10.
  • the optical system driver 14 adjusts the zoom, focus, aperture, and the like of the imaging optical system component 11 according to an instruction of the system controller 13.
  • the IS control unit 15 controls the imaging device 12 according to an instruction of the system controller 13.
  • the AFE unit 16 subjects the analog image signal from the imaging device 12 to analog signal processing, and outputs a digital image signal converted into a digital signal.
  • the AFE unit 16 includes a sample and hold circuit, an automatic gain control amplifier (AGC), and an analog to digital converter (ADC).
  • the sample hold circuit samples the analog image signal under the control of the system controller 13 and holds it for a predetermined time.
  • the automatic gain control amplifier performs gain adjustment of the analog image signal from the sample and hold circuit under the control of the system controller 13.
  • the analog-to-digital converter converts the gain-adjusted analog image signal from the automatic gain control amplifier into a digital signal and outputs a digital image signal.
  • the digital signal processing unit 17 performs digital signal processing on the digital image signal from the AFE 16 unit, and generates an output image signal to be an output of the imaging device 10.
  • the digital signal processing unit 17 includes a flicker reduction unit 21, a signal processing unit 22, and a compression encoding unit 23.
  • the flicker reduction unit 21 is included in the digital image signal from the AFE unit 16 that occurs as light and dark in the photographed image due to the flickering of the light when photographing is performed under illumination having flickering by alternating current lighting such as fluorescent light.
  • the flicker component is to be reduced from the digital image signal, and the details will be described later.
  • the signal processing unit 22 performs white balance adjustment, gamma correction, image format conversion according to an output image format, and the like of the digital image signal from which the flicker component from the flicker reduction unit 21 has been reduced.
  • the compression encoding unit 23 encodes the digital image signal subjected to the above processing from the signal processing unit 22 according to an image compression encoding standard such as JPEG (Joint Photographic Experts Group) or MPEG (Moving Picture Experts Group). Do.
  • the imaging optical system component 11 focuses light from a subject on the imaging surface of the imaging element 12 in accordance with the role of each block described above, and the imaging element 12 forms an image
  • the subject image is photoelectrically converted to generate an analog image signal.
  • the AFE unit 16 subjects the analog image signal from the imaging device 12 to analog signal processing to generate a digital image signal.
  • the digital signal processing unit 17 subjects the digital image signal from the AFE unit 16 to digital signal processing such as flicker reduction processing, white balance adjustment, gamma correction, image format conversion, compression encoding and the like.
  • a signal subjected to digital signal processing by the digital signal processing unit 17 is output as an output image signal of the imaging device 10.
  • the output image signal output from the digital signal processing unit 17 is stored, for example, in the memory 18.
  • FIG. 2 is a block diagram showing one configuration example of the flicker reduction unit 21 of FIG.
  • the flicker reduction unit 21 includes an acquisition unit 30 including a line integration unit 31 and a sampling unit 32, a memory 33, an inter-screen DFT (Discrete Fourier Transform) unit 34, and a flicker extraction unit 35.
  • a flicker coefficient calculation unit 36 and a correction operation unit 37 are provided.
  • the line integration unit 31 receives a digital image signal (denoted as “input image I i ” in FIG. 2 and here) output from the AFE unit 16.
  • the line integration unit 31 calculates integration of all digital image signals of one horizontal line for each frame, that is, for each of all horizontal lines constituting the frame, that is, for each of a plurality of horizontal lines.
  • a value (hereinafter, referred to as “line integral value”) is output to the sampling unit 32 as a first line integral value.
  • the sampling unit 32 generates, for each frame, a plurality of first line integral values of a plurality of horizontal lines of a part of the plurality of horizontal lines input from the line integration unit 31 and indicates a plurality of horizontal lines to be sampled.
  • the second line integral value (which corresponds to the line integral value of the sample) is acquired according to the selected line number (vertical coordinate) of the second line, and the acquired second line integral value is output to the inter-screen DFT unit 34 , Stored in the memory 33.
  • the memory 33 stores the second line integral value sampled by the sampling unit 32 for a plurality of frames.
  • the memory 33 stores the second line integral value acquired by the sampling unit 32 for a plurality of fields.
  • the inter-screen DFT unit 34 selects one horizontal line with the best condition from among the plurality of horizontal lines for which the sampling unit 32 has acquired the second line integral value. Then, in the selected horizontal line, the inter-screen DFT unit 34 selects the second line integral value of the nearest frame acquired by the sampling unit 32 and the same selected line number as the second line integral value (the same A second line integral value sequence (this corresponds to a sample line integral value sequence) which is read from the memory 33 and which belongs to the vertical coordinate) and which is composed of the second line integral values for a plurality of frames before the nearest frame. Apply discrete Fourier transform to The second line integral value sequence here is obtained by arranging the second line integral values in time series.
  • the flicker extraction unit 35 extracts flicker component information (frequency, phase, amplitude ratio) from the Fourier coefficients obtained as a result of discrete Fourier transform by the inter-screen DFT unit 34, and extracts the extracted flicker component information (frequency, phase, The amplitude ratio is output to the flicker coefficient calculating unit 36.
  • Flicker coefficient calculation unit 36 information of the flicker component from the flicker extracting unit 35 (frequency, phase, amplitude ratio) based on the flicker coefficient corresponding to the input image I i which is input to the current flicker reduction section 21 Ask.
  • Correction calculation unit 37 based on the flicker coefficient from flicker coefficient calculation unit 36, reduces the flicker component from the input image I i by performing the reduction operation of the flicker component for the input image I i from the AFE section 16 Then, the digital image signal (indicated as “output image I FR ” in FIG. 2) obtained as a result is output to the signal processing unit 22. Specifically, the correction calculation unit 37, by dividing the value obtained by adding 1 to the flicker coefficient input image I i, reducing the flicker component from the input image I i.
  • FIG. 3 is a schematic operation diagram showing the operation of the sampling unit 32 of FIG.
  • F (1), F (2), F (3),..., F (N) indicate frames, respectively.
  • n of F (n) represents a frame number.
  • L (n, 1), L (n, 2) The S horizontal lines of sample object which the sampling part 32 extract
  • n of L (n, s) represents a frame number
  • s represents a selected line number of a horizontal line to be sampled.
  • S indicating the number of horizontal lines to be sampled is a value smaller than the total number of horizontal lines constituting the frame.
  • Horizontal lines having the same selected line number, for example, L (1,1), L (2,1), L (3,1),..., L (N, 1) have the same vertical lines on the frame. It shows a horizontal line located at the coordinates.
  • inter-screen DFT unit 34 performs discrete Fourier transform on the N second line integral values, and the sampling unit 32 and the screen when the frame F (N) is input to the flicker reduction unit 21. The operation of the DFT unit 34 will be described.
  • the memory 33 stores selected line numbers 0, 1, 2, ... for each of the frames F (1) to F (N-1). , S corresponding to the second line integral value of the horizontal line is stored.
  • the sampling unit 32 selects one of the horizontal lines corresponding to the selected line number 1, 2, 3,..., S out of the plurality of horizontal lines input from the line integration unit 31 with respect to the frame F (N).
  • a line integral value of 1 is taken as a second line integral value.
  • the inter-screen DFT unit 34 selects one horizontal line with the best condition from among the plurality of horizontal lines for which the sampling unit 32 has acquired the second line integral value. Then, in the selected horizontal line, the inter-frame DFT unit 34 generates the second line integral value sampled by the sampling unit 32 for the frame F (N), and the frames F (1) to F (stored in the memory 33). A discrete Fourier transform is performed on the second line integral value sequence consisting of the second line integral values of N-1). However, as the most satisfactory horizontal line, for example, the largest horizontal line among the ones in which the second line integral value is within a predetermined range (for example, the range below the upper limit value) can be considered. The best horizontal line is not limited to this.
  • the sampling unit 32 stores, in the memory 33, the second line integral value of the horizontal line corresponding to the acquired selected line numbers 1, 2, 3,..., S with respect to the frame F (N).
  • the number of frames of the second line integral stored in the memory 33 is determined from the capacity of the memory 33 and the predetermined number of stored frames is determined, and is deleted from the second line integral of the oldest frame. ing.
  • the number S of horizontal lines to be sampled is described.
  • the sampling unit 32 obtains second line integral values for a plurality of horizontal lines on the frame, and the inter-screen DFT unit 34 performs a discrete Fourier transform by selecting a horizontal line with better conditions.
  • the sampling unit 32 extracts, for example, a first line integral value of one predetermined horizontal line on the frame as a second line integral value
  • the inter-DFT unit 34 may perform discrete Fourier transform on a second line integral value sequence consisting of second line integral values for several frames of the horizontal line.
  • the frequency 100 Hz of the flicker component is equal to or less than half the frame rate, that is, within the Nyquist frequency.
  • a peak due to the flicker component is detected in the magnitude of the Fourier coefficient at the position corresponding to the frequency of 100 Hz, which is obtained as a result of the discrete Fourier transform by the inter-screen DFT unit 34.
  • the Fourier coefficients appearing at DC are due to the original image component.
  • the detection of the peak can be performed by determining the presence or absence of the peak by comparing the magnitude with the Fourier coefficient of the position corresponding to DC by the original image component. Specifically, a predetermined ratio is determined based on the ratio of the flicker component at which flicker starts to be recognized with respect to the intensity of the original image component.
  • the flicker extraction unit 35 determines, based on the Fourier coefficient from the inter-screen DFT unit 34, the Fourier coefficient of the position corresponding to DC among the Fourier coefficients of the position corresponding to the frequency at which the flicker component may exist. If one is found, it is determined that a flicker component is present at that frequency.
  • the inter-screen DFT unit 34 performs discrete Fourier transform on each of a plurality of horizontal lines in which the second line integral value falls within a predetermined range (avoid overexposure and underexposure portions of the image), and flicker is generated.
  • the extraction unit 35 may preferentially adopt the Fourier coefficient of the horizontal line where the peak of the DC position is sharp in order to extract the flicker component. In this way, even when there is a change in the image due to the movement of the subject or the blurring of the imaging device, the flicker component can be extracted more stably.
  • the flicker extraction unit 35 specifies the frequency at which the flicker component exists by performing the above processing. Subsequently, the flicker extraction unit 35 calculates the amplitude and the phase of the flicker component from the magnitude and the declination of the Fourier coefficient, which is a complex number, at the position corresponding to the frequency specified as the flicker component exists. The amplitude ratio of the calculated amplitude of the flicker component with respect to the amplitude of the Fourier coefficient of the position to be determined is determined. Then, the flicker extraction unit 35 outputs the information (frequency, phase, amplitude ratio) of the flicker component to the flicker coefficient calculation unit 36.
  • the flicker coefficient calculation unit 36 calculates the frequency, phase, and amplitude ratio of the flicker component from the flicker extraction unit 35 with respect to the frequency f of Aexp ⁇ j (2 ⁇ ft + ⁇ ) ⁇ , the phase ⁇ , and the amplitude A as a wave equation. It sets, calculates the value of the wave at present, and makes this a flicker factor.
  • the flicker coefficient represents the rate of increase or decrease of the digital image signal due to the flicker component with respect to the original digital image signal.
  • t represents the time when the target line was photographed
  • j represents an imaginary number.
  • the frequency 100 Hz of the flicker component is larger than half the frame rate and exceeds the Nyquist frequency, unlike the case where the frame rate is 240 fps.
  • the flicker extraction unit 35 analyzes the frequency of 100 Hz or more.
  • the present embodiment is substantially the same as the case where the frequency of the commercial power supply is 50 Hz and the frame rate is 240 fps (frame per second).
  • FIG. 4 is a flowchart showing a processing flow of the flicker reduction processing by the flicker reduction unit 21 of FIG.
  • the line integration unit 31 calculates a first line integral value for each of all the horizontal lines (a plurality of horizontal lines) of the frame in which the digital image signal is input to the flicker reduction unit 21 (see FIG. Step S11).
  • the sampling unit 32 extracts a second line integral value from the first line integral value input from the line integration unit 31 (step S12).
  • the inter-screen DFT unit 34 determines whether a predetermined number of frames necessary for the inter-screen DFT unit 34 to perform discrete Fourier transform have been input to the flicker reduction unit 21 (step S13). If a negative determination is made in step S13 (S13: NO), the inter-screen DFT unit 34 does not perform discrete Fourier transform, and the sampling unit 32 stores the second line integral value acquired in step S12 in the memory 33. (Step S14).
  • step S13 the inter-screen DFT unit 34 selects the same second line integral value acquired in step S12 and the second line integral value.
  • a discrete Fourier transform is performed on a second line integral value sequence consisting of a plurality of frames of second line integral values read from the memory 33 and belonging to the line number (vertical coordinate) (step S15).
  • the sampling unit 32 stores the second line integral value acquired in step S12 in the memory 33 (step S16).
  • the flicker extraction unit 35 extracts information (frequency, phase, amplitude ratio) of the flicker component from the Fourier coefficients obtained as a result of the discrete Fourier transform by the inter-screen DFT unit 34 (step S17).
  • the flicker coefficient calculation unit 36 calculates a flicker coefficient corresponding to the digital image signal of the frame currently input to the flicker reduction unit 21 based on the information (frequency, phase, amplitude ratio) of the flicker component from the flicker extraction unit 35. It asks for (Step S18).
  • the correction operation unit 37 executes a flicker component reduction operation on the digital image signal based on the flicker coefficient obtained in step S18 (step S19).
  • the flicker reduction unit 21 in the imaging device 10 of the first embodiment for example, in a situation where a line integral value between a large number of frames is required as in the case of high frame rate imaging. Also, since it is not necessary to store the second line integral value in the memory 33 for all horizontal lines on the frame, the capacity of the memory 33 can be reduced. Therefore, the flicker reduction unit 21 can reduce the flicker component with appropriate accuracy even with the memory 33 with a relatively small capacity.
  • the flicker reduction unit 21a of the second embodiment analyzes the flicker component at a sampling frequency higher than that of the flicker reduction unit 21 of the first embodiment.
  • the imaging apparatus of the present embodiment is substantially the same as the corresponding components of the imaging apparatus 10 of the first embodiment, except for the flicker reduction unit 21a.
  • the flicker reduction unit 21a will be described.
  • the same reference numerals are given to constituent elements substantially the same as the constituent elements of the first embodiment, and the description thereof can be applied, so the description thereof is omitted in the present embodiment, or Keep it simple.
  • FIG. 5 is a block diagram showing a configuration example of the flicker reduction unit 21a of the present embodiment.
  • the flicker reduction unit 21 a includes an acquisition unit 30 including a line integration unit 31 and a sampling unit 32, a memory 33, an inter-screen DFT unit 34, a flicker extraction unit 35, an inter-line DFT unit 51, and a flicker extraction unit 52. , Flicker coefficient calculation unit 36, and correction operation unit 37.
  • the line integration unit 31 outputs the first line integral value to the sampling unit 32 and also outputs it to the inter-line DFT unit 51.
  • the flicker extraction unit 35 outputs information of the flicker component (frequency, phase, amplitude ratio) to the inter-line DFT unit 51 and the flicker extraction unit 52 instead of outputting to the flicker coefficient calculation unit 36.
  • the inter-line DFT unit 51 receives information (frequency, phase, amplitude ratio) of the flicker component from the flicker extraction unit 35.
  • the inter-line DFT unit 51 relates to a cycle based on the frequency of the received flicker component, and for a period of at least one cycle, a first line integration value sequence consisting of the first line integration values on the same frame from the line integration unit 31.
  • the first line integral value sequence here is obtained by arranging the first line integral values in time series.
  • the inter-line DFT unit 51 performs the discrete Fourier transform by being shorter than the time interval between the first line integral values and the inter-screen DFT unit 34 is shorter than the time interval between the second line integral values by which the discrete Fourier transform is performed. It has become.
  • the flicker extraction unit 52 extracts more accurate first information (frequency, phase, amplitude ratio) of the flicker component from the Fourier coefficients obtained as a result of the discrete Fourier transform by the inter-line DFT unit 51, and One information (frequency, phase, amplitude ratio) is output to the flicker coefficient calculator 36.
  • One information frequency, phase, amplitude ratio
  • the flicker extraction unit 52 can not detect the flicker component from the Fourier coefficients obtained as a result of the discrete Fourier transform by the inter-line DFT unit 51
  • information on the flicker component input from the flicker extraction unit 35 are output to the flicker coefficient calculating unit 36 as the first information (frequency, phase, and amplitude ratio) of the flicker component.
  • the flicker extraction unit 52 is substantially the same as the flicker extraction process performed by the flicker extraction unit 35 except that the inter-line DFT unit 51 uses the Fourier coefficients instead of the inter-screen DFT unit 34. Extraction processing is performed to extract first information (frequency, phase, amplitude ratio) of the flicker component from the Fourier coefficient from the inter-line DFT unit 51.
  • the flicker coefficient calculating unit 36 calculates the flicker coefficient using the information (frequency, phase, and amplitude ratio) of the flicker component from the flicker extracting unit 35.
  • the flicker coefficient calculating unit 36 calculates the flicker coefficient using the first information (frequency, phase, amplitude ratio) of the flicker component from the flicker extracting unit 52.
  • the frequency 100 Hz of the flicker component is equal to or less than half the frame rate, that is, within the Nyquist frequency.
  • a peak due to the flicker component is detected in the magnitude of the Fourier coefficient at the position corresponding to the frequency of 100 Hz, which is obtained as a result of the discrete Fourier transform by the inter-screen DFT unit 34.
  • the Fourier coefficients appearing at DC are due to the original image component.
  • the flicker extraction unit 35 obtains information (frequency, phase, amplitude ratio) of flicker components from Fourier coefficients obtained as a result of discrete Fourier transform by the inter-screen DFT unit 34. Extract.
  • a peak at a frequency of 100 Hz is also assumed to have a flicker component of 140 Hz in consideration of aliasing.
  • the line-to-line DFT unit 51 plays a role of performing line-by-line waveform analysis for analysis at a higher sampling frequency to identify this point.
  • the inter-line DFT unit 51 performs discrete Fourier transform on a first line integral value sequence consisting of first line integral values on the same frame in a period based on the frequency of the flicker component extracted by the flicker extraction unit 35. Apply.
  • the inter-line DFT unit 51 is based on the information of the flicker component extracted by the flicker extraction unit 35, and the adjacent frequency including the assumed frequency of the flicker component. Calculate only the Fourier coefficients corresponding to As a result, the interline DFT unit 51 does not have to obtain Fourier coefficients for all frequencies, so the amount of computation in the interline DFT unit 51 can be reduced, thereby reducing power consumption.
  • the flicker extraction unit 52 performs flicker extraction processing using the Fourier coefficients obtained as a result of the discrete Fourier transform of the inter-line DFT unit 51, and obtains the first information (frequency, phase, amplitude ratio) of the final flicker component. It is output to the flicker coefficient calculator 36. Specifically, a predetermined ratio is determined based on the ratio of the flicker component at which flicker starts to be recognized with respect to the intensity of the original image component.
  • the flicker extraction unit 52 searches the Fourier coefficients from the inter-line DFT unit 51 for a coefficient exceeding the predetermined ratio with respect to the Fourier coefficient at the position corresponding to DC, and if it is found, a flicker component is present at that frequency. It will be determined.
  • the flicker extraction unit 52 thus specifies the frequency at which the flicker component exists. Subsequently, the flicker extraction unit 52 calculates the amplitude and the phase of the flicker component from the magnitude and the declination of the Fourier coefficient, which is a complex number, at the position corresponding to the frequency specified as the flicker component exists. The amplitude ratio of the calculated amplitude of the flicker component with respect to the amplitude of the Fourier coefficient of the position to be determined is determined. Then, the flicker extraction unit 52 outputs the first information (frequency, phase, amplitude ratio) of the flicker component to the flicker coefficient calculation unit 36.
  • FIG. 6 is a flowchart showing a processing flow of the flicker reduction processing by the flicker reduction unit 21a of FIG.
  • the line integration unit 31, the sampling unit 32, the inter-screen DFT unit 34, and the flicker extraction unit 35 perform the processing from step 11 to step S17 described in the first embodiment.
  • the inter-line DFT unit 51 relates to a cycle based on the frequency of the flicker component extracted by the flicker extraction unit 35, and for a period of at least one cycle, a first line integration including the first line integral value from the line integration unit 31.
  • a discrete Fourier transform is performed on the value sequence (step S31).
  • the flicker extraction unit 52 extracts more accurate first information (frequency, phase, amplitude ratio) of the flicker component from the Fourier coefficients obtained as a result of the discrete Fourier transform by the inter-line DFT unit 51 (step S32).
  • the flicker coefficient calculation unit 36 corresponds to the flicker corresponding to the digital image signal of the frame currently input to the flicker reduction unit 21a.
  • a coefficient is determined (step S18A).
  • the correction operation unit 37 executes a flicker component reduction operation on the digital image signal based on the flicker coefficient obtained in step S18A (step S19).
  • flicker is provided by providing the inter-line DFT unit 51 and the flicker extraction unit 52 in addition to the effects of the flicker reduction unit 21 of the first embodiment.
  • the frequency, phase and amplitude ratio of components can be determined more accurately, and flicker components can be more accurately reduced from digital image signals.
  • the third embodiment flicker reduction unit 21b uses the result of motion detection in the motion detection unit (MV unit) 71 in the compression encoding unit 22b to the flicker reduction unit 21a of the second embodiment. Then, a function is added to the sampling unit 32b to determine the horizontal line from which the second line integral value is to be acquired.
  • MV unit motion detection unit
  • a function is added to the sampling unit 32b to determine the horizontal line from which the second line integral value is to be acquired.
  • the imaging apparatus of the present embodiment is substantially the same as the corresponding components of the imaging apparatus of the first or second embodiment, except for the digital signal processing unit 17b.
  • the digital signal processor 17b will be described in the form of FIG.
  • substantially the same components as those of the first or second embodiment are denoted by the same reference numerals, and the description thereof can be applied, so the description thereof is omitted in the present embodiment. Or just a brief statement.
  • FIG. 7 is a block diagram showing one configuration example of the digital signal processing unit 17b of the present embodiment.
  • a motion detection unit (MV that performs inter-frame prediction inside the compression encoding unit 23b in the digital signal processing unit 17b when performing compression encoding of a moving image, and detects motion between frames of an image block Part) 71 is provided.
  • the motion detection unit 71 in the compression coding unit 23b detects the motion between frames of the image block, and outputs a motion vector based on the detection result to the sampling unit 32b in the flicker reduction unit 21b.
  • the compression encoding unit 23 b is obtained by adding a portion for outputting a motion vector to the sampling unit 32 b in the external flicker reduction unit 21 b to the configuration of a general compression encoding unit.
  • the flicker reduction unit 21b includes an acquisition unit 30b including a line integration unit 31 and a sampling unit 32b, a memory 33, an inter-screen DFT unit 34, a flicker extraction unit 35, an inter-line DFT unit 51, and a flicker extraction unit 52. , Flicker coefficient calculation unit 36, and correction operation unit 37.
  • the sampling unit 32b receives the motion vector from the MV unit 71 in the compression coding unit 23b, determines the horizontal line to be sampled based on the received motion vector, and determines the first line integral value of the determined horizontal line. Collect as a second line integral value.
  • the sampling unit 32 b predicts by using the motion vector from the MV unit 71 which horizontal line on the current frame corresponds to the horizontal line to be sampled on the previous frame. Then, the sampling unit 32b determines a corresponding horizontal line on the current frame as a horizontal line to be sampled, and extracts a first line integral value of the horizontal line determined to be a sample target as a second line integral value.
  • the sampling unit 32b is, for example, a horizontal line corresponding to the number of horizontal lines corresponding to the received motion vector, or a horizontal corresponding to a plurality of past frames, with respect to the horizontal line serving as the sample target of the previous frame.
  • Predict the corresponding horizontal line on the current frame by adding or subtracting the number of horizontal lines estimated by estimating the number of horizontal lines corresponding to the motion from the previous frame to the current frame by connecting the number of lines by an approximate curve .
  • the prediction method of the corresponding horizontal line on the current frame using the motion vector is not limited to this.
  • the inter-screen DFT unit 34 does not necessarily use the second line integral value of the horizontal line of the same vertical coordinate in discrete Fourier transform. . Therefore, for example, the sampling unit 32 b may be configured to select the second horizontal integral value of the corresponding horizontal line so that the inter-screen DFT unit 34 can identify the second line integral value that constitutes the second line integral value sequence to be subjected to discrete Fourier transform The same identification information is added to the line integral value and output.
  • the inter-screen DFT unit 34 reads from the memory 33 related to the second line integral value of the nearest frame acquired by the sampling unit 32 b and the horizontal line of the second line integral value.
  • the discrete Fourier transform is applied to the second line integral value series consisting of the second line integral values for a plurality of frames prior to the frame of.
  • the sampling unit 21b performs sampling based on the motion vector from the MV unit 71.
  • the present invention is not limited to the contents described in the above embodiment, but can be practiced in any form for achieving the object of the present invention and the objects related to or associated with it, for example, the following may be possible. .
  • the device having the flicker reduction unit is the imaging device
  • the present invention is not limited to this, and the device having the flicker reduction portion is, for example, a device such as a recorder. May be
  • the acquisition unit 30 is configured by the line integration unit 31 and the sampling unit 32.
  • the acquisition unit is, for example, as follows. May be The acquisition unit selects a part of horizontal lines from all horizontal lines constituting one frame, that is, from a plurality of horizontal lines, and digitizes one horizontal line only for the selected part of horizontal lines. The integration of the image signal may be performed, and the integration value may be output as a second line integration value. By doing so, the amount of calculation in the acquisition unit can be reduced, and the power consumption by the acquisition unit can be suppressed.
  • the line integration unit 31 outputs the line integration value as it is as the first line integration value.
  • the present invention is not limited to this.
  • the line integration unit 31 may output a value obtained by normalizing the line integral value by dividing the line integral value by, for example, the number of pixels in one horizontal line as a first line integral value.
  • the line integration unit 31 obtains integration of all digital image signals of one horizontal line, and outputs the obtained line integration value as a first line integration value.
  • the line integration unit 31 obtains integration of a part of digital image signals that satisfy a predetermined condition of one horizontal line, and divides the obtained line integration value by the number of integrated digital image signals, thereby normalizing the line integration value.
  • the normalized line integral value may be output as a first line integral value.
  • the predetermined condition is a digital image signal of a plurality of predetermined pixels in one horizontal line.
  • the line integration unit 31 may output the line integration value as it is as the first line integration value.
  • the predetermined condition is a digital image signal in which the value of the digital image signal in one horizontal line is within a predetermined range (for example, a predetermined lower limit value or more and a predetermined upper limit value or less).
  • a digital image signal which may have a poor signal-to-noise ratio (S / N ratio) by eliminating the lower limit value is removed, and a digital image signal which may be saturated by eliminating the upper limit value is removed.
  • S / N ratio signal-to-noise ratio
  • the first line integral value is in a predetermined range (a predetermined lower limit value or more; If it is out of the upper limit value of), it is judged as an inappropriate horizontal line, for example, a horizontal line in which the first line integral value is within the predetermined range, or the first line integral value is in the predetermined range A function of changing to the horizontal line having the largest first line integral value may be added. This can be expected to further enhance the reliability of flicker component extraction.
  • a predetermined range a predetermined lower limit value or more; If it is out of the upper limit value of), it is judged as an inappropriate horizontal line, for example, a horizontal line in which the first line integral value is within the predetermined range, or the first line integral value is in the predetermined range
  • a function of changing to the horizontal line having the largest first line integral value may be added. This can be expected to further enhance the reliability of flicker component extraction.
  • the inter-screen DFT unit 34 selects one horizontal line with the best condition from the plurality of horizontal lines for which the sampling unit 32 has taken the second line integral value, and performs discrete Fourier transform.
  • the conversion is performed, the present invention is not limited to this, and may be, for example, as follows.
  • the inter-screen DFT unit 34 selects one of the horizontal lines of the sample object whose second line integral value is within a predetermined range (more than a predetermined lower limit value and less than a predetermined upper limit value), and performs discrete Fourier transform May be performed.
  • the inter-screen DFT unit 34 performs discrete Fourier transform on each of two or more small horizontal lines, evaluates the correlation of Fourier coefficients between each horizontal line, and adopts a Fourier coefficient having high positive correlation. In this case, higher extraction accuracy of the flicker component can be expected.
  • the flicker component in the correction operation unit 37 A function to stop the reduction operation of may be added. Further, when the amplitude or amplitude ratio of the flicker component extracted by the flicker extraction unit 52 is equal to or less than a predetermined value, the flicker reduction units 21a and 21b according to the second to third embodiments described above, the correction calculation unit 37.
  • a function may be added to stop the reduction operation of the flicker component in By doing this, since the arithmetic processing including the division to be processed for each pixel is not performed, the effect of reducing the power consumption in the correction arithmetic unit 37 can be obtained.
  • the flicker extraction unit 35 extracts the frequency, phase and amplitude ratio of the flicker component from the Fourier coefficients from the inter-screen DFT unit 34, but the present invention is limited thereto.
  • only the frequency of the flicker component may be extracted from the Fourier coefficient from the inter-screen DFT unit 34 and may be output to the inter-line DFT unit 51, for example.
  • the flicker extraction unit 52 can not extract the first information of the flicker component from the Fourier coefficient from the inter-line DFT unit 51, the flicker component can not be reduced from the digital image signal.
  • the processing load in the extraction unit 35 is reduced, leading to low power consumption.
  • the sampling unit 32b uses the motion vector from the MV unit 71, and the horizontal line selected on the previous frame corresponds to which horizontal line on the current frame.
  • the first line integral value of the corresponding horizontal line on the current frame is taken as the second line integral value.
  • the present invention is not limited to this. For example, Good.
  • the sampling unit 32b evaluates the variance of the motion vector at the same vertical position on the frame, and determines the horizontal line at the vertical position with small variance as the horizontal line to be sampled. By doing this, it is possible to extract flicker components for horizontal lines with few image changes, so it is possible to more accurately reduce flicker components from digital image signals.
  • the average of the horizontal components of the motion vector be close to zero, the variance be small, and the variance of the vertical components be small. That is, it shows the condition in which the image is moving at the same speed in the vertical direction. Furthermore, if the condition that the average of the vertical components is close to 0 is added, the stationary condition is obtained, and if the sampling unit 32b does not perform the process of following the movement, a line conforming to the stationary condition is selected.
  • the inter-screen DFT unit 34 performs discrete Fourier transform on the second line integral value sequence without considering the frequency and frame rate of the commercial power supply.
  • the discrete Fourier transform may be performed on the second line integral value sequence in consideration of the frequency and the frame rate of the commercial power supply.
  • the flicker of the fluorescent lamp at 100 Hz and 60 Hz will be 100 Hz and 120 Hz, respectively.
  • the imaging frame rate is determined, it can be known at which frequency position after discrete Fourier transform a peak of the magnitude of the Fourier coefficient due to the flicker component appears.
  • the inter-screen DFT unit 34 estimates the candidate frequency at which the flicker component appears from the frequency of the commercial power supply and the frame rate, and the Fourier of the position corresponding to the adjacent frequency including the candidate frequency at which the estimated flicker component appears. Find the coefficient.
  • the inter-screen DFT unit 34 only needs to calculate the Fourier coefficients of the positions corresponding to the adjacent frequencies including the candidate frequency in which the flicker component appears, and calculates the Fourier coefficients of the positions corresponding to all the frequencies. The need for this is eliminated, and the amount of computation of the inter-screen DFT unit 34 can be significantly reduced.
  • aliasing causes a 100 Hz flip to appear at the 80 Hz position, and a 120 Hz flicker to exhibit a peak due to the flicker component at the 60 Hz position. Therefore, Fourier coefficients at one to several locations located in the vicinity of this 80 Hz and 60 Hz may be determined, and their magnitudes may be evaluated.
  • the frequency of the commercial power source is 50 Hz and 60 Hz in the above description, the frequency is not limited to this, and the frequency of the commercial power source may be replaced with the frequency of the commercial power source which may be appropriately used.
  • the frame rate is 180 fps in the above description, it may be replaced with a frame rate value used appropriately.
  • the imaging device may be realized as an LSI, which is an integrated circuit, for example. These may be individually made into one chip, or may be made into one chip so as to include all or a part. Although an LSI is used here, it may be called an IC, a system LSI, a super LSI, or an ultra LSI depending on the degree of integration. Further, the method of circuit integration is not limited to LSI's, and implementation using dedicated circuitry or general purpose processors is also possible.
  • a programmable field programmable gate array may be used, or a reconfigurable processor that can reconfigure connection and setting of circuit cells in the LSI may be used.
  • FPGA field programmable gate array
  • a reconfigurable processor that can reconfigure connection and setting of circuit cells in the LSI may be used.
  • a part of the configuration of the flicker reduction unit described in each of the above embodiments is realized by an apparatus or an integrated circuit, and the procedure of the operation performed by the configuration excluding the part is described in a program.
  • the processing unit may be realized by reading and executing the program stored in the memory.
  • the present invention is useful as a means for reducing a flicker component generated as light and dark in a captured image due to flickering of illumination from an image signal of the captured image.
  • Imaging device 11 Imaging optical system components 12 Imaging device 13 System controller 14 Optical system driver 15 Imaging device control part (IS control part) 16 Analog Front End (AFE) 17, 17b Digital signal processing unit 21, 21b, 21c Flicker reduction unit 22 Signal processing unit 23, 23b Compression encoding unit 30 Acquisition unit 31 Line integration unit 32, 32b Sampling unit 33 Memory 34 Inter-screen DFT unit 35 Flicker extraction unit 36 Flicker coefficient calculation unit 37 Correction operation unit 51 Inter-line DFT unit 52 Flicker extraction unit 71 Motion detection unit (MV unit)

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Abstract

L'invention porte sur un dispositif de réduction de papillotement comprenant : une unité d'intégration de ligne (31) qui intègre un signal d'image numérique d'une ligne horizontale ; une unité d'échantillonnage (32) qui acquiert, en tant que seconde valeur d'intégration de ligne, une première valeur d'intégration de ligne de certaines des lignes horizontales constituant une image ; une mémoire (33), qui stocke la seconde valeur d'intégration de ligne acquise pour une pluralité d'images ; une unité de transformée de Fourier discrète (DFT) inter-écran (34), qui exécute la transformée de Fourier discrète sur la chaîne de secondes valeurs d'intégration de ligne formée par la seconde valeur d'intégration de ligne acquise directement par l'unité d'échantillonnage (32b) et la pluralité de secondes valeurs d'intégration de ligne stockées dans la mémoire (33) ; une unité d'extraction de papillotement (35), qui extrait des informations apparentées à la composante de papillotement conformément au résultat de la transformée de Fourier discrète ; une unité de calcul de coefficient de papillotement (36) qui calcule un coefficient de papillotement selon les informations apparentées à la composante de papillotement ; et une unité de calcul de correction (37), qui exécute un calcul pour réduire la composante de papillotement pour un signal d'image conformément au coefficient de papillotement calculé.
PCT/JP2009/006194 2008-11-20 2009-11-18 Dispositif de réduction de papillotement, circuit intégré et procédé de réduction de papillotement WO2010058567A1 (fr)

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KR101919479B1 (ko) * 2012-05-02 2018-11-19 삼성전자주식회사 카메라 모듈에서 플리커를 검출하는 장치 및 방법
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JPWO2014167865A1 (ja) * 2013-04-12 2017-02-16 パナソニック インテレクチュアル プロパティ コーポレーション オブ アメリカＰａｎａｓｏｎｉｃ Ｉｎｔｅｌｌｅｃｔｕａｌ Ｐｒｏｐｅｒｔｙ Ｃｏｒｐｏｒａｔｉｏｎ ｏｆ Ａｍｅｒｉｃａ フリッカ低減装置、撮像装置およびフリッカ低減方法
US9264628B2 (en) 2013-06-20 2016-02-16 JVC Kenwood Corporation Imaging apparatus and flicker reduction method
JP2015192345A (ja) * 2014-03-28 2015-11-02 日本放送協会 フリッカ低減装置およびそのプログラム、ならびに、フリッカ低減システム
JP2016058838A (ja) * 2014-09-08 2016-04-21 日本放送協会 フリッカー低減装置

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