WO2010052989A1 - 通信装置及びそれを内蔵する電池パック - Google Patents
通信装置及びそれを内蔵する電池パック Download PDFInfo
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- WO2010052989A1 WO2010052989A1 PCT/JP2009/067491 JP2009067491W WO2010052989A1 WO 2010052989 A1 WO2010052989 A1 WO 2010052989A1 JP 2009067491 W JP2009067491 W JP 2009067491W WO 2010052989 A1 WO2010052989 A1 WO 2010052989A1
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- voltage
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- power supply
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/30—Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
- G06F1/305—Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations in the event of power-supply fluctuations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
Definitions
- the present invention relates to a communication device and a battery pack incorporating the communication device. More specifically, a communication device including an inverter composed of a CMOS that transmits a signal transmitted and received between a control unit that monitors a state of a secondary battery that supplies power to the electronic device and the electronic device, and the communication device
- the present invention relates to a battery pack having a built-in battery.
- Patent Documents 1 and 2 are known as devices that perform communication between a main body and a detachable power supply that supplies power to the main body.
- FIG. 1 is a configuration diagram of a CMOS inverter.
- the CMOS inverter includes a P-channel MOS transistor and an N-channel MOS transistor, and the input VIN is configured as a common gate and the output VOUT is configured as a common drain.
- the source of the N channel MOS transistor is connected to the ground line VSS, and the source of the P channel MOS transistor is connected to the power supply voltage line VDD.
- the N channel MOS transistor when an H level voltage is input to VIN, the N channel MOS transistor is turned on and outputs an L level, and when an L level voltage is input to VIN, the P channel MOS transistor Becomes conductive and outputs an H level.
- CMOS inverter when communication is performed between the main unit and the power supply unit, if the power supply voltage between P plus and P minus varies, a signal transmitted to and received from the main unit may not pass through the CMOS inverter. In order to pass this communication signal, a half voltage of the voltage between P plus and P minus is required as the amplitude of the communication signal, but the amplitude voltage of the communication signal from the main body is a voltage between P plus and P minus. If it becomes less than half of the above, a malfunction occurs in that a correct communication signal is not transmitted.
- an embodiment of the present invention includes a control unit that can communicate with an electronic device that uses a secondary battery as a power source, and a CMOS inverter that transmits a signal transmitted and received between the electronic device and the electronic device.
- a regulator that generates a regulated voltage obtained by stepping down a power supply voltage of the electronic device, wherein the regulator has a drain connected to a high potential side of the power supply voltage, and the gate and the source are connected to each other.
- a depletion type NMOS transistor connected, and a capacitive element having one electrode connected to the source side and the other electrode connected to the low potential side of the power supply voltage, and the voltage of the capacitive element is Provided is a communication device characterized by being supplied to both ends of an inverter.
- an embodiment of the present invention provides a battery pack that incorporates the communication device and the secondary battery.
- CMOS inverter 1 is an overall configuration diagram of a battery pack 100 according to an embodiment of the present invention. It is a block diagram of battery protection IC90. It is a block diagram of regulator RG2 which is another Example of regulator RG1 built in battery protection IC90. It is a block diagram of regulator RG3 which is another Example of regulator RG1 incorporated in battery protection IC90.
- FIG. 2 is an overall configuration diagram of the battery pack 100 according to the embodiment of the present invention.
- the battery pack 100 is a module component that incorporates a battery protection device including the switching elements 1 and 2, the battery protection IC 90, and the control unit 50 together with the secondary battery 200.
- the switching elements 1 and 2 switch conduction / interruption of the charging / discharging path 9 (9a, 9b) between the input / output terminals 5 and 6 and the bipolar terminals 3 and 4 of the secondary battery 200.
- the input / output terminals 5 and 6 are discharged to a portable device 300 powered by a secondary battery 200 such as a lithium ion battery, a nickel hydride battery, or an electric double layer capacitor, and charged by a charger (not shown) of the secondary battery 200.
- a secondary battery 200 such as a lithium ion battery, a nickel hydride battery, or an electric double layer capacitor
- the battery protection IC 90 controls the switching operation of the switching elements 1 and 2.
- the control unit 50 monitors battery information such as a battery state regarding the secondary battery 200.
- the control unit 50 may be built in the battery protection IC 90, or the control unit 50 built in the battery protection IC 90 may control the switching operation of the switching elements 1 and 2.
- the battery pack 100 is built in or externally attached to the mobile device 300.
- the portable device 300 is an electronic device that can be carried by a person, for example, a device having a wireless communication function such as a cellular phone, an information terminal device such as a PDA or a mobile personal computer, a camera, a game machine, a player such as music or video Etc.
- the battery pack 100 is detachably connected to the portable device 300 via the input / output terminals (the positive input / output terminal 5 and the negative input / output terminal 6) and the communication terminal 7.
- the positive input / output terminal 5 connected to the positive terminal on the portable device 300 side is electrically connected to the positive electrode 3 of the secondary battery 200 through the charge / discharge path 9a.
- the negative input / output terminal 6 connected to the negative terminal on the portable device 300 side is electrically connected to the negative electrode 4 of the secondary battery 200 via the charge / discharge path 9b.
- the communication terminal 3 connected to the communication terminal on the portable device 300 side is connected to the terminal 90d of the battery protection IC.
- the switching elements 1 and 2 are semiconductor elements such as MOSFETs and IGBTs having parasitic diodes, for example.
- the switching element 1 is disposed between the negative electrode 4 and the negative electrode input / output terminal 6 in such a direction that the forward direction of the parasitic diode 1 a becomes the discharge direction of the secondary battery 200.
- the switching element 2 is arranged between the negative electrode 4 and the negative electrode input / output terminal 6 in such a direction that the forward direction of the parasitic diode 2a becomes the charging direction of the secondary battery 200.
- the switching elements 1 and 2 may be bipolar transistors, and diodes may be formed between the collector and emitter in the illustrated direction.
- Control unit 50 communicates with portable device 300 via battery protection IC 90.
- the control unit 50 transmits battery information such as a battery state regarding the secondary battery 200 to the mobile device 300 and receives a signal such as a command signal from the mobile device 300.
- the control unit 50 includes, for example, a temperature detection unit, a voltage detection unit, an AD converter, an arithmetic processing unit, and a memory.
- the temperature detection unit detects the temperature of the secondary battery 200.
- the voltage detection unit detects the voltage of the secondary battery 200.
- the AD converter converts the analog voltage value output from the current detection unit that detects the charging / discharging current of the secondary battery 200 and each detection unit indicating the detection result into a digital value.
- the arithmetic processing unit performs a calculation process such as a remaining capacity of the secondary battery 200 and a determination process such as a deterioration determination of the secondary battery 200.
- the arithmetic processing unit may be configured by, for example, a logic circuit or a microcomputer.
- the memory stores characteristic data for specifying characteristics of each component of the secondary battery 200 and the battery pack 100 used for the arithmetic processing and unique information of the battery pack 100.
- the memory may be a storage device such as an EEPROM or a flash memory.
- the battery protection IC 90 includes a communication interface circuit that transmits a signal from the control unit 50 to the portable device 300 and transmits a signal from the portable device 300 to the control unit 50.
- FIG. 3 is a configuration diagram of the battery protection IC 90.
- Battery protection IC 90 includes a CMOS inverter IV and a regulator RG1.
- the CMOS inverter IV transmits a signal transmitted and received between the control unit 50 and the portable device 300.
- the regulator RG1 generates the power supply voltage of the inverter IV by stepping down the VDD-VSS voltage between the power supply line VDD and the ground line VSS.
- the VDD-VSS voltage corresponds to a power supply voltage applied to the portable device 300 by the secondary battery 200. 2 and 3, the power supply line VDD is at the same potential as the positive input / output terminal 5 via the terminal 90a, and the ground line VSS is connected to the negative input / output terminal via the terminal 90e. 6, the VDD-VSS voltage corresponds to the inter-terminal voltage between the input / output terminals 5 and 6.
- the regulator RG1 is configured by a series circuit of a depletion type NMOS transistor M1 and a capacitor C1 which is a capacitive element.
- the gate, the source, and the back gate are connected to each other, and the drain is connected to the power supply line VDD. With this connection, a constant current I1 flows between the drain and source of the transistor M1.
- the capacitor C1 has one electrode connected to the source of the transistor M1, and the other electrode connected to the ground line VSS.
- the source of the transistor M2 is connected to the power supply line VR connected to one electrode of the capacitor C1, and the back gate of the transistor M2 is connected to the power supply line VDD.
- the back gate of the transistor M2 may be connected to the power supply line VR.
- the source and back gate of the transistor M3 are connected to the ground line VSS.
- the VDD-VSS voltage for example, 4V
- the VR-VSS voltage for example, 3.3V
- a constant voltage can be generated.
- Charge Q of the capacitor C1, the voltage across the capacitor C1 V C1, and the capacitance of the capacitor C1 and C 1, can be calculated by the following equation (1).
- the charge amount Q C 1 ⁇ V C1 > (i2 ⁇ i3) ⁇ t (2) That is, the charge amount Q is sufficiently large with respect to the alternating current generated by the communication signal (H level / L level) input from the portable device 300, so that a necessary voltage can be secured as an operating voltage of the inverter IV and other logic circuits. to, it may be designed to capacitance C 1 and transistors M1 of the capacitor C1.
- Capacitance C 1 is, for example, 10 pF. Thereby, the load currents i3 and i2 can be covered by the charge amount Q of the capacitor C1.
- FIG. 4 is a configuration diagram of a regulator RG2 which is another embodiment of the regulator RG1 built in the battery protection IC 90.
- a diode D1 having an anode on the source side of the transistor M1 is inserted between the transistor M1 and the capacitor C1.
- the constant output voltage value generated by the regulator RG2 can be adjusted by using the forward voltage VF of the diode D1 according to the VDD-VSS voltage and the number of inserted diodes D1.
- FIG. 5 is a configuration diagram of a regulator RG3 which is another embodiment of the regulator RG1 built in the battery protection IC 90.
- a P-channel MOS transistor M4 whose source is the source side of the transistor M1 is inserted between the transistor M1 and the capacitor C1 as a cutoff means that cuts off current from the transistor M1 to the capacitor C1.
- the back gate of the transistor M4 may be connected to the power supply line VDD.
- a constant power supply voltage of the inverter can be generated by the regulator RG3 during the energization period in which the transistor M4 is on. Further, in the non-energization period in which the transistor M4 is off, current consumption due to current flowing from the transistor M1 can be reduced.
- an N-channel MOS transistor M5 that can short-circuit both ends of the capacitor C1 during the cutoff period of the transistor M4 may be provided.
- the source of the transistor M5 is connected to the ground line VSS, and the drain of the transistor M5 is connected to a connection path between the capacitor C1 and the transistor M4.
- the transistor M5 When the transistor M5 is turned on, the capacitor C1 can be discharged.
- the output of the regulated voltage is output by short-circuiting both ends of the capacitor C1 during the shut-off period when the transistor M4 is off and non-short-circuiting both ends of the capacitor C1 during the conduction period when the transistor M4 is on. Can be switched.
- the transistor M4 When the on / off signal is at the H level, the transistor M4 is turned off and the transistor M5 is turned on, so that the voltage across the capacitor C1 is substantially zero.
- the transistor M4 When the on / off signal is at the L level, the transistor M4 is turned on and the transistor M5 is turned off, so that a constant voltage is output from the capacitor C1. Further, by configuring the transistors M4 and M5 as shown in the figure, it is possible to switch the presence or absence of the output voltage of the regulator RG3 with one on / off signal.
- a stable voltage can be supplied to the CMOS inverter. Therefore, even if the inter-terminal voltage of the input / output terminals 5 and 6 changes greatly due to the temporary fluctuation of the load current of the portable device 300, the simple configuration of two elements of the transistor M1 and the capacitor C1 can be used. It is possible to prevent the malfunction of the inverter that the input signal is not correctly transmitted to the control unit 50. In addition, since no current is passed in a direct current by using the capacitor C1, current consumption can be greatly reduced. Furthermore, since the number of elements is small, the chip area can be reduced, and the size and cost of the protection IC can be easily reduced. Further, it is possible to reduce the man-hours such as circuit verification at the design stage by reducing the circuit scale.
- the present invention is applicable to a communication device and a battery pack incorporating the communication device.
- Control unit 90 Battery protection IC 100 battery pack 200 secondary battery 300 portable device M1 depletion type NMOS transistor M2 to M5 MOS transistor C1 capacitor RG1, RG2, RG3 regulator IV inverter
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- Power Engineering (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
Description
この電荷量Qが、インバータIVに流れる電流をi2、インバータIV以外の他のCMOSインバータ等の論理回路に流れる電流をi3、電流i2とi3が流れている時間をtとした場合、以下の式(2)を満たすように、コンデンサC1の容量C1やトランジスタM1を設計すればよい。
即ち、電荷量Qが、携帯機器300から入力される通信信号(Hレベル/Lレベル)による交流電流に対して十分大きく、インバータIVや他の論理回路の動作電圧として必要な電圧を確保できるように、コンデンサC1の容量C1やトランジスタM1を設計すればよい。
90 電池保護IC
100 電池パック
200 二次電池
300 携帯機器
M1 ディプリーション型NMOSトランジスタ
M2~M5 MOSトランジスタ
C1 コンデンサ
RG1,RG2,RG3 レギュレータ
IV インバータ
Claims (5)
- 二次電池を電源とする電子機器と通信可能な制御部と前記電子機器との間で送受される信号を伝送するCMOS型のインバータと、
前記電子機器の電源電圧を降圧したレギュレート電圧を生成するレギュレータと、を含み、
前記レギュレータは、
前記電源電圧の高電位側にドレインが接続され且つゲートとソースとが互いに接続されたディプリーション型NMOSトランジスタと、
前記ソース側に一方の電極が接続され且つ前記電源電圧の低電位側に他方の電極が接続された容量素子と、を含み、
前記容量素子の電圧を前記インバータの両端に供給することを特徴とする、通信装置。 - 請求項1に記載の通信装置であって、
前記インバータのPチャンネルMOSトランジスタのバックゲートが前記電源電圧の高電位側に接続されることを特徴とする通信装置。 - 請求項1に記載の通信装置であって、
前記ディプリーション型NMOSトランジスタから前記容量素子への通電を遮断する遮断手段を更に備えることを特徴とする通信装置。 - 請求項3に記載の通信装置であって、
前記遮断手段によって前記通電が遮断されている期間に前記容量素子の両端を短絡する短絡手段を更に備えることを特徴とする通信装置。 - 請求項1乃至4いずれか一項に記載の通信装置と前記二次電池とを内蔵することを特徴とする電池パック。
Priority Applications (2)
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CN2009801440716A CN102204061B (zh) | 2008-11-05 | 2009-10-07 | 通信装置及内置该通信装置的电池组 |
US13/122,577 US8867246B2 (en) | 2008-11-05 | 2009-10-07 | Communication device and battery pack in which the communication device is provided |
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JP2008-284765 | 2008-11-05 | ||
JP2008284765A JP5412797B2 (ja) | 2008-11-05 | 2008-11-05 | Ic及びそれを内蔵する電池パック |
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US (1) | US8867246B2 (ja) |
JP (1) | JP5412797B2 (ja) |
KR (1) | KR101604632B1 (ja) |
CN (1) | CN102204061B (ja) |
WO (1) | WO2010052989A1 (ja) |
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KR102184369B1 (ko) | 2016-12-09 | 2020-11-30 | 삼성에스디아이 주식회사 | 배터리 팩의 통신 시스템 및 이를 포함하는 배터리 팩 |
Citations (3)
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JP2006164547A (ja) * | 2004-12-02 | 2006-06-22 | Sony Corp | 電池パック、充電制御方法およびアプリケーション機器 |
JP2006344611A (ja) * | 2001-11-22 | 2006-12-21 | Hitachi Koki Co Ltd | 電池パック |
JP2007215251A (ja) * | 2006-02-07 | 2007-08-23 | Lenovo Singapore Pte Ltd | 蓄電池の充電システムおよび充電方法 |
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JP3221929B2 (ja) * | 1992-09-17 | 2001-10-22 | 富士通株式会社 | 半導体装置 |
JPH06152671A (ja) * | 1992-10-30 | 1994-05-31 | Hitachi Ltd | 半導体集積回路装置 |
JP3247219B2 (ja) | 1993-10-26 | 2002-01-15 | 松下電工株式会社 | 電池駆動機器 |
JPH11214617A (ja) * | 1998-01-21 | 1999-08-06 | Hitachi Ltd | 半導体集積回路装置 |
US6501248B2 (en) * | 2000-09-28 | 2002-12-31 | Ricoh Company, Ltd. | Charge/discharge protection apparatus having a charge-state overcurrent detector, and battery pack including the same |
DE10065421B4 (de) * | 2000-12-27 | 2004-01-29 | Siemens Ag | Tiefsetzsteller |
JP3718767B2 (ja) * | 2001-09-19 | 2005-11-24 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 電気機器、コンピュータ装置、予備充電状態表示方法、およびユーティリティプログラム |
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FR2873243A1 (fr) * | 2004-07-13 | 2006-01-20 | St Microelectronics Sa | Circuit d'alimentation adaptable |
JP4500121B2 (ja) * | 2004-07-14 | 2010-07-14 | 株式会社ルネサステクノロジ | 電池電圧監視システム |
JP3768224B1 (ja) * | 2004-12-02 | 2006-04-19 | ソニー株式会社 | 電池パック、充電制御方法およびアプリケーション機器 |
JP4893241B2 (ja) * | 2006-11-02 | 2012-03-07 | ミツミ電機株式会社 | リセット装置 |
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- 2009-10-07 CN CN2009801440716A patent/CN102204061B/zh active Active
- 2009-10-07 US US13/122,577 patent/US8867246B2/en active Active
- 2009-10-07 WO PCT/JP2009/067491 patent/WO2010052989A1/ja active Application Filing
- 2009-10-07 KR KR1020117006174A patent/KR101604632B1/ko active IP Right Grant
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JP2006344611A (ja) * | 2001-11-22 | 2006-12-21 | Hitachi Koki Co Ltd | 電池パック |
JP2006164547A (ja) * | 2004-12-02 | 2006-06-22 | Sony Corp | 電池パック、充電制御方法およびアプリケーション機器 |
JP2007215251A (ja) * | 2006-02-07 | 2007-08-23 | Lenovo Singapore Pte Ltd | 蓄電池の充電システムおよび充電方法 |
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JP2010114991A (ja) | 2010-05-20 |
JP5412797B2 (ja) | 2014-02-12 |
US8867246B2 (en) | 2014-10-21 |
US20110187343A1 (en) | 2011-08-04 |
CN102204061B (zh) | 2013-04-10 |
KR101604632B1 (ko) | 2016-03-18 |
CN102204061A (zh) | 2011-09-28 |
KR20110081949A (ko) | 2011-07-15 |
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