Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L5/00—Arrangements affording multiple use of the transmission path
  • H04L5/14—Two-way operation using the same type of signal, i.e. duplex
  • H04L5/1469—Two-way operation using the same type of signal, i.e. duplex using time-sharing
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04J—MULTIPLEX COMMUNICATION
  • H04J3/00—Time-division multiplex systems
  • H04J3/02—Details
  • H04J3/06—Synchronising arrangements
  • H04J3/0602—Systems characterised by the synchronising information used
  • H04J3/0605—Special codes used as synchronising signal
  • H04J3/0608—Detectors therefor, e.g. correlators, state machines
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L27/00—Modulated-carrier systems
  • H04L27/26—Systems using multi-frequency codes
  • H04L27/2601—Multicarrier modulation systems
  • H04L27/2647—Arrangements specific to the receiver only
  • H04L27/2655—Synchronisation arrangements
  • H04L27/2656—Frame synchronisation, e.g. packet synchronisation, time division duplex [TDD] switching point detection or subframe synchronisation
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04W—WIRELESS COMMUNICATION NETWORKS
  • H04W56/00—Synchronisation arrangements
  • H04W56/0055—Synchronisation arrangements determining timing error of reception due to propagation delay
  • H04W56/0065—Synchronisation arrangements determining timing error of reception due to propagation delay using measurement of signal travel time
  • H04W56/007—Open loop measurement
  • H04W56/0075—Open loop measurement based on arrival time vs. expected arrival time
  • H04W56/008—Open loop measurement based on arrival time vs. expected arrival time detecting arrival of signal based on received raw signal

Definitions

• a method of determining a boundary of a subframe in a time division duplexing (TDD) system detects a power level of a signal on at least one radio frequency, the signal comprising at least one subframe.
• a time-domain correlation is done on the detected signal with a first reference signal, wherein the first reference signal represents at least one subframe.
• the location in time of a boundary of the at least one subframe of the detected signal is determined based on the correlation of the detected signal and the first reference signal.
• FIG. 1 is a block diagram of one embodiment of a communication system for switching between uplink and downlink transmissions
• FIG. 4 is a flow chart illustrating one embodiment of a method of switching between uplink and downlink transmissions.
• base station 102 is an IEEE 802.16 compliant base station.
• base station 102 may also meet the requirements of WiMax, WiBro, LTE, or other consortium.
• base station 102 comprises multiple functionalities including managing communications between both a PSTN and an IP-based network.
• DAS 103 comprises a hub 106 communicatively coupled to base station 102, and three remote antenna units 108-111 located remotely from and communicatively coupled to hub 106.
• Each remote antenna unit 108-111 includes one or more antennas 104 which are used to communicate wirelessly with wireless terminals 112.
• hub 106 is optically coupled to base station 102, although in other embodiments, hub 106 and base station 102 are communicatively coupled by coaxial cables, wireless antennas, or other communication medium.
• hub 106 is optically coupled to each remote antenna unit 108-111, although in other embodiments, hub 106 and remote antenna units 108-111 are communicatively coupled by coaxial cables, wireless antennas, or other communication medium.
• Base station 102 uses DAS 103 to communicate with wireless terminals 112 via antennas 104. Bidirectional communication between base station 102 and the plurality of wireless terminals 112 is accomplished through use of a multiple access scheme.
• base station 102 and wireless terminals 112 communicate using a code-division multiple access (CDMA) scheme.
• base station 102 and wireless terminals 112 communicate using an orthogonal frequency division multiple access (OFDMA) scheme.
• CDMA code-division multiple access
• OFDMA orthogonal frequency division multiple access
• other multiple access schemes are used (e.g. TDMA, FDMA), or more than one multiple access scheme is used including, for example, CDMA for voice communications and OFDMA for data communications.
• some or all communications between base station 102 and wireless terminals 112 use a time division duplex (TDD) communication scheme.
• TDD schemes enable bi-directional communication between two devices by having uplink transmissions (from wireless terminal 112 toward base station 102) and downlink transmissions (from base station 102 toward wireless terminal 112) occur at different times.
• both uplink and downlink communications share the same frequencies.
• System 100 enables communication between wireless terminals 112 and one or more other devices which are communicatively coupled to base station via, for example, a PSTN or internet based network.
• Wireless terminals 112 transmit/receive signals to/from remote antenna units 108-111 via remote antennas 104.
• wireless terminals 112 each communicate with one remote antenna unit 108-111 at a time, except for during certain situations, for example during handoffs. For example, information which is outgoing from a wireless terminal 112 is transmitted by the wireless terminal 112 and received at, for example, remote antenna unit 108 which is communicating with the transmitting wireless terminal 112.
• Remote antenna unit 108 reproduces the signal received from wireless terminal 112 and sends the signal along with other signals received from other wireless terminals 112 transmitting to remote antenna unit 104 to hub 106.
• Hub 106 receives information from remote antenna unit 108 (and other remote antenna units 109-111, some through expansion unit 114) reproduces the signals received and sends the signals to base station 102.
• Base station 102 processes the information and transmits the information toward its destination. Incoming information from another network is received by base station 102.
• Base station 102 determines which of wireless terminals 112 is the destination of the information, generates, modulates, and transmits a signal containing the information to hub 106.
• TDD frame 200 may have a variable duration, and/or multiple uplink or downlink subframes may be included within each frame 200. Additionally, other embodiments may have an uplink subframe first which is followed by a downlink subframe, or a variation across frames between uplink and downlink subframes starting each frame.
• base station 102 is transmitting to one or more of wireless terminals 112.
• uplink subframe 204 one or more of wireless terminals 112 are transmitting to base station 102.
• TTG 206 between downlink subframe 202 and uplink subframe 204 allows time for base station 102 to switch from transmit to receive mode and for each wireless terminal 112 to switch from receive to transmit mode.
• RTG 208 allows time for base station 102 to switch from receive to transmit mode and wireless terminals 112 to switch from transmit to receive mode.
• TTG 206 and RTG 208 also allow time margin for such things as base station/mobile synchronization and propagation delay determination/adjustment.
• the total number of uplink and downlink symbols remains at 47. Thus, if there are fewer symbols in a downlink subframe 202, there will be more symbols in the corresponding uplink subframe 204.
• the time periods for TTG 206 and RTG 208 have a fixed duration.
• the communication structure used by system 100 is a frame which comprises two subframes as illustrated in Figure 2, it should be understood that the scope of the present disclose is intended to include other frame/subframe structures and other communication structures as known to those skilled in the art.
• Wireless terminals 112 obtain the timing of downlink subframe 202 and uplink subframe 204 from communications sent by base station 102. In one embodiment, these communications occur on a separate control channel and wireless terminals 112 listen to the control channel to obtain the frame and subframe timing. In another embodiment, wireless terminals 112 obtain the frame and subframe timing from messages sent by base station 102 within frame 200 or by listening to current transmissions on the payload channel and ascertaining the timing directly from the transmissions. In any case, wireless terminals 112 determine at what time of each frame 200 begins, when downlink subframe 202 will end, when to switch from receiving mode to transmitting mode, and at what point to start transmitting uplink subframe 204.
• Figure 3 illustrates one embodiment of a circuit 300 for determining the location in time of a boundary of a transmission structure in communications network 100.
• circuit 300 determines a timing of a subframe boundary (subframe timing) based on the power level of signals that are transmitted within network 100. Based on the determined subframe timing, circuit 300 determines when to switch between downlink and uplink transmission. For example, in this embodiment, circuit 300 determines the location in time of the starting boundary for downlink subframe 202. In this embodiment, determining the starting time of downlink subframe 202 also determines the start time of frame 200, because the start of downlink subframe 202 coincides with the start of frame 200. Circuit 300 then determines when to switch from uplink transmission to downlink transmission based on the determined starting boundary of downlink subframe 202.
• circuit 300 is set to downlink mode to relay downlink transmissions from base station 102 to wireless terminals 112 in accordance with the frame and subframe timing of network 100.
• the apparatuses and methods described herein can be used to determine the frame and/or subframe timing of a system as desired.
• the frame duty cycle is variable, and the start of uplink subframe 204, varies across frames based on the duty cycle of each particular frame.
• frame timing is determined as described above, and the start of downlink subframe 202 is thus known because the start of downlink subframe 202 coincides with the start of frame 200.
• the start of uplink subframe 202 is determined by detecting the falling edge of downlink subframe 202 in real-time and switching from downlink mode to uplink mode based on the detected falling edge. More detail regarding real-time switching based on a falling edge of a subframe is provided in co- pending application no. 12/144,977 titled “METHOD AND APPARATUS FOR SWITCHING IN A TDD SYSTEM" (attorney docket no. 100.916US01) which is herby incorporated herein by reference.
• both hub 106 and remote antenna units 108-111 comprise circuits such as circuit 300 to determine when to switch between uplink and downlink transmission modes.
• circuit 300 is included only within hub 106.
• hub 106 determines the switching times for itself, as well as remote antenna units 108-111, and forwards control signals indicating the time for switching to remote antenna units 108-111 as described in co-pending application no. 12/144,939, entitled "SYSTEM AND METHOD FOR SYNCHRONIZED TIME- DIVISION DUPLEX SIGNAL SWITCHING" Attorney Docket No. 100.924US01" which is hereby incorporated herein by reference.
• circuit 300 processes the signals of two frequency bands.
• Circuit 301 processes signals of a first frequency band and circuit 302 processes signals of a second frequency band.
• circuit 301 and 302 are similar, with the exception of minor differences to enable each circuit 301, 302 to support its respective frequencies. Thus, only circuit 301 is described in detail. In other embodiments, only one frequency band is supported. In still other embodiments, more than two frequency bands are supported.
• a switch 312 switches circuit 300 between uplink transmission (uplink mode) and downlink transmission (downlink mode) by coupling RF duplex port 303 to either downlink port 304 or uplink port 306.
• switch 312 is a single pole, double throw switch having one common connection (coupled to duplex port 303) and two switched connections (coupled to downlink port 304 and uplink port 306 respectively).
• port 303 comprises two simplex ports which operate as a duplex port. More detail regarding the configuration of circuit 300 and port 303 as simplex or duplex is provided in co-pending application no. 12/144,913, entitled "SYSTEM AND METHOD FOR CONFIGURABLE TIME- DIVISION DUPLEX INTERFACE" Attorney Docket No. 100.925US01, which is hereby incorporated herein by reference.
• Method 400 begins at block 402 where the power level of a downlink signal is detected.
• the detected signal is correlated with a reference signal and, at block 406, the location in time of a boundary of a subframe in the detected downlink signal is determined from the correlation.
• the start time of subsequent downlink subframes are predicted based on the determined start time of the detected downlink subframe.
• switch 312 is set to downlink mode in time for the start of an upcoming downlink subframe.
• Coupler 315 couples the downlink signal to an RF detector 316.
• coupler
• RF detector 315 is located upstream of switch 312. Additionally, in this embodiment, RF detector
• RF detector 316 is a root-mean-squared (RMS) detector. Prior to the downlink signal reaching RF detector 316, the signal is attenuated by attenuator 324 if necessary. More detail regarding attenuator 324 is provided below.
• RF detector 316 measures the power of the downlink signal, and an analog to digital (A/D) converter 320 reads the power level measured by RF detector 316.
• A/D converter 320 converts the power level from RF detector 316 into digitized samples ("snapshot samples") for microprocessor 314.
• Microprocessor 314 records the time in which each sample was collected and collects samples for a period of time such that an entire downlink subframe 202 is detected.
• the samples are collected for a minimum of slightly more than one frame period based on the number of samples in the reference signal, hi one embodiment, to reduce the chance of an uplink subframe being coupled into RF detector 316, switch 312 remains in the downlink position throughout the detection by RF detector 316.
• microprocessor 314 correlates the detected samples with a reference signal.
• the reference signal is a representation of a valid downlink subframe 202.
• the reference signal is a representation of a detected downlink subframe 202 comprising a number of symbols that is a valid subframe length.
• microprocessor 314 determines the start of downlink subframe 202 based on the results of the correlation between the detected samples and the reference signal.
• the correlation is a time-domain correlation that compares the reference signal to the detected samples by overlapping the detected samples and the reference signal, multiplying each detected sample by the value that is overlapped in the reference signal.
• the correlation result for this first point in time is then computed by summing all the products of the multiplication together.
• the reference signal is then time shifted relative to the received samples, and the multiplication and summation is repeated to obtain a correlation result for this second point in time. This process is repeated to obtain time varied correlations between the reference signal and the detected samples.
• microprocessor 314 determines the frame timing from the correlation results. For example, in one embodiment where system 100 uses a fixed duty cycle frame, the correlation at block 404 between the reference signal and the detected samples results in a correlation peak at a single point in time. The correlation peak occurs where the reference signal and the received samples align in time. A single correlation peak occurs because the subframe length of the detected subframe is the same as the subframe length of the reference signal. Since the subframe length in a fixed duty cycle system is fixed and known, the reference signal is made to represent a subframe having the same length as the subframes used by the system. Thus, there is one point in time at which the reference signal and the detected signal align. At block 406, microprocessor 314 determines the start time of the received downlink subframe based on the knowledge of the time in which the samples were detected, and the determination of the point in time at which the detected samples were aligned with the reference signal.
• the detected samples are correlated with both the maximum subframe length and the minimum subframe length, by performing two correlations.
• One correlation is with a first reference signal having the longest subframe length and a second correlation is with a second reference signal having the shortest subframe length.
• the start of the downlink subframe in the first reference signal is aligned with the start of downlink subframe in the second reference signal and then the first and second reference signals are correlated with the detected signal.
• the correlation is a time-domain correlation where the detected signal is correlated against a reference signal at a first point in time and then time shifted and re-correlated at the second point in time, as so on.
• microprocessor 314 determines the start of the downlink subframe based on the composite correlation results.
• a single correlation is performed which includes both the maximum expected subframe length and the minimum expected subframe length.
• a single composite reference signal is created by adding the first reference signal and the second reference signal together and the detected signal is correlated with the composite reference signal. Then, at block 406, microprocessor 314 determines the start time of the received downlink subframe based on the correlation.
• correlation is performed over a plurality of downlink subframes 202.
• a plurality of downlink subframes 202 are detected by RF detector 316, sampled by A/D converter 320, and sent to microprocessor 314.
• Microprocessor 314 performs correlation of each downlink subframe with the reference signal(s) as described above, or correlates the downlink subframes with a lengthened reference signal comprising the number of downlink subframes detected. Since multiple subframes are correlated, multiple correlation peaks result (one peak per downlink subframe).
• the time value is extracted from each peak, and the peak time values for each frame are sorted.
• the median peak time value is selected as the start of downlink subframe.
• the correlation results for each frame are added coherently, to produce composite correlation results having a single peak and a length of one frame.
• coherent summation means that point 1 of frame 1 is added to point 1 of frame 2 and point 2 of frame 1 is added to point 2 of frame 2, and so on.
• the time value is then extracted from the single composite peak.
• an initial estimate of the peak location is made prior to coherently summing the correlation results for the frames, and the peak of each frame is moved to the center of the frame prior to summation.
• the initial estimate of the peak location is made by extracting the time value from each peak, sorting the peak time values, and choosing the median value of the sorted values as describer in the previous paragraph.
• a window is used to narrow the range of time over which the correlation is performed.
• the timing information is estimated and subsequent correlations are performed over smaller window of time. This can reduce the processing power required to perform the correlation.
• correlation is initially performed for a window of one frame length. After three correlations are performed, the timing information relating to the peak from the previous correlations is used to estimate the peak location of subsequent frames. Correlations performed on the subsequent frames are performed over a window having a length of 5% of the frame length.
• the reduced window size is determined based on the amount of drift experienced to reduce the likelihood of missing the peak of the frame being sampled with the reduced window. In one embodiment, when the window length is decreased the sample rate is increased to increase resolution for the window samples. In one embodiment, the window size and sample rate are variable and are dynamically updated based on system parameters (for example, the current drift calculation) as correlations are performed over time. More detail regarding the determination of drift is provided below.
• circuit 300 determines the end of uplink subframe 204 by detecting uplink signals and correlating the detected signals with an uplink reference signal.
• Time drift occurs, for example, because of differences between the frequency of clock 328 and the frequency of the received signal.
• measurements of the frame/subframe timing are made and adjustments to circuit 300 are made if necessary.
• time drift is measured by re-determining the frame timing after the counter for microprocessor 314 is initially set for the frame timing as discussed with respect to method 400.
• the re- determined frame timing is then used to determine a difference between the re- determined frame timing and the counter predicted frame timing. This difference along with the amount of time since the counter was set is used to adjust the counter to account for time drift.
• the counter is adjusted such that the value stored in counter is one count higher than normal every twenty frames to account for the Vi tick error in the counter.
• the phase of clock 328 is adjusted in a similar manner to account for time drift.
• the frequency of clock 328 is adjusted based on the measured time drift, such that the frequency of clock 328 is closer to the frequency of the received signals.
• the time drift is measured periodically during the operation of circuit 300, and the counter or clock 328 are updated as needed to account for changes in the time drift.
• the duration between time drift measurements is set based on the accuracy of the frequency of clock 328 to the signal frequency. Thus, the larger the frequency difference between clock and the transmitted signals, the shorter the duration is between time drift measurements.
• the time drift is measured from the same set of samples as the initial frame timing determination of method 400.
• blocks 508, 510, and 512 are performed after blocks 402, 404, 406 and 408 and either before, after, or with block 410.
• only one adjustment is made to the counter or clock 328 such that block 512 and 410 are included as the same step.
• samples are taken across multiple frames. The samples are split into two sections. The first section is used as a reference for determining the initial frame timing as discussed with respect to method 400. Then, the time drift is calculated using the second section as discussed with respect to method 500. In one embodiment, if the counter is not updated immediately after the initial frame timing determination, the amount of time that has elapsed during the second section and the time at which the counter is actually updated is also factored in to the counter setting.
• Attenuator 324 reduces the dynamic range required of A/D converter 320 by attenuating the power level of high powered signals, prior to the signals reaching A/D converter 320.
• Microprocessor 314 controls attenuator 324 based on the power level of signals read by RF detector 316 and A/D converter 320. For example, in this embodiment, the signal range requirements at downlink port 304 are 25 dB. Since RF detection occurs before switch 312, the signal range seen at coupler 315 is an additional 20 dB.
• the signal range seen at coupler 315 is approximately 45 dB.
• Attenuator 324 has an attenuation of 20 dB when enabled and 0 dB when disabled.
• microprocessor 314 enables attenuator 324 to reduce the signal levels at RF detector 316 and A/D converter 320 by 20 dB.
• microprocessor 314 determines whether to enable attenuator 324 prior to analyzing the downlink signal to determine the frame/subframe timing as described in methods 400 and 500. To protect RF detector 316 and A/D convert 320, microprocessor 314 initially enables attenuator 324 prior to coupler 315 coupling any signals to attenuator 324, RF detector 316, or A/D converter 320. Microprocessor 314 then determines whether to disable attenuator 324 based on the power level of the signals received. Once attenuator 324 is enabled, A/D converter 320 samples the downlink signal over a number of frames.
• Microprocessor 314 then receives the power level from A/D converter 320 and compares the power level to an attenuator threshold. If the average power level is below the attenuator threshold, microprocessor 314 disables attenuator 324. If the average power level is equal to or above the attenuator threshold, attenuator 324 remains enabled.
• microprocessor 314 sums the power level of all samples within a fixed number of frames to determine whether to enable/disable the attenuator.
• the summation value is compared to the threshold which corresponds to an input signal level of between 0 and -5 dBm at RF detector 316. Since microprocessor 314 sums the power level of all the samples, the frame duty cycle factors in to how large the summation value is. In other words, a -25 dBm signal, for example, has two different summation values depending on the duty cycle of the frame.
• the summation value is normalized by the length of the downlink subframe.
• the length of the downlink subframe is not known or varies over the frames, thus in one embodiment, the threshold power level is normalized by both the longest expected downlink subframe and the shortest expected downlink subframe.
• microprocessor 314 determines the power level of the received signal by correlating the received signal with a reference signal as discussed above and calculating the average signal level from the correlation peaks. For example, for static duty cycle frames, after the correlation is performed across multiple frames, the average signal level is calculated with the equation:
• N s mDLMax Number of OFDM symbols (maximum DL subframe length)
• N SmDLMm Number of OFDM symbols (minimum DL subframe length).
• the threshold is chosen as the average expected power level of a sampled downlink subframe with each sample in the frame summed together. The average is the expected power level between the maximum and minimum downlink subframe lengths.
• Attenuator 324 When attenuator 324 is disabled, attenuator 324 is re-enabled when the power level of signals rises to a threshold.
• the threshold for re-enabling attenuator 324 is the same as the threshold for disabling as discussed above.
• the threshold for re-enabling attenuator 324 is slightly higher than the threshold for disabling attenuator 324 in order to have hysterisis. In one embodiment, there is a 9 dB separation between the two thresholds to ensure hysterisis and compensate for the error in the measured power level for variable duty cycle frames.

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• Engineering & Computer Science (AREA)
• Signal Processing (AREA)
• Computer Networks & Wireless Communication (AREA)
• Mobile Radio Communication Systems (AREA)
• Time-Division Multiplex Systems (AREA)

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• 2008
  • 2008-06-24 US US12/144,961 patent/US8385373B2/en not_active Expired - Fee Related
• 2009
  • 2009-06-22 WO PCT/US2009/048149 patent/WO2010008796A2/en not_active Ceased
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