WO2009105923A1 - 一种发光二极管器件的制造方法 - Google Patents

一种发光二极管器件的制造方法 Download PDF

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Publication number
WO2009105923A1
WO2009105923A1 PCT/CN2008/001024 CN2008001024W WO2009105923A1 WO 2009105923 A1 WO2009105923 A1 WO 2009105923A1 CN 2008001024 W CN2008001024 W CN 2008001024W WO 2009105923 A1 WO2009105923 A1 WO 2009105923A1
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WIPO (PCT)
Prior art keywords
emitting diode
light emitting
layer
phosphor
diode device
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Application number
PCT/CN2008/001024
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English (en)
French (fr)
Inventor
樊邦弘
翁新川
Original Assignee
鹤山丽得电子实业有限公司
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Application filed by 鹤山丽得电子实业有限公司 filed Critical 鹤山丽得电子实业有限公司
Priority to EP08757355A priority Critical patent/EP2249403A4/en
Priority to JP2010547023A priority patent/JP2011513946A/ja
Publication of WO2009105923A1 publication Critical patent/WO2009105923A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50—Wavelength conversion elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12036—PN diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0041—Processes relating to semiconductor body packages relating to wavelength conversion elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination

Definitions

  • This invention relates to a method of fabricating a light emitting diode device, and more particularly to a method of fabricating a light emitting diode device in which a light emitting surface is separated from other regions such as a bonding wire region by a spacer to coat only phosphor on the light emitting surface.
  • LEDs Light-emitting diodes
  • the luminescence mechanism is that when a forward current is injected at both ends of the PN junction, the injected unbalanced carriers (electron-hole pairs) recombine in the diffusion process, and the emission process mainly corresponds to the spontaneous emission process of the light.
  • the material for fabricating the semiconductor light-emitting diode is heavily doped, and the N region in the thermal equilibrium state has many electrons with high mobility, and the P region has more holes with lower mobility. Due to the limitation of the PN junction barrier layer, under normal conditions, the two cannot naturally recombine.
  • the electrons in the conduction band of the trench region can escape the barrier of the PN junction and enter the side of the P region. Then, in the vicinity of the PN junction slightly to the side of the P region, when the electrons in the high energy state meet the holes, a luminescent composite is generated. The light emitted by this luminescent composite is spontaneous radiation.
  • a conventional light emitting diode is fabricated by epitaxially growing a stacked structure including a layer of an n-type semiconductor material, a layer of a light-emitting layer, and a layer of a P-type semiconductor material on a substrate.
  • the materials and structures used for the light emitting diode are also different.
  • sapphire is usually used as the substrate, and gallium indium nitride epitaxial structure is used as the stacked structure.
  • the cathode and the anode of the light emitting diode are both disposed on the front side.
  • an n-type gallium nitride layer 5, a light-emitting layer 4, a p-type gallium nitride layer 3, and a transparent electrode 2 are sequentially formed on the sapphire substrate 6.
  • the anode 1 and the cathode 7 are formed on the transparent electrode 2 and the n-type gallium nitride layer 5, respectively.
  • the conventional light emitting diode can only be manufactured to a small area and low power, for example, 0.3 mm ⁇ 0.3 mm and 20 mA. The current used.
  • flip-chip LED devices Due to the ever-increasing requirements for the luminous efficiency and brightness of light-emitting diodes, flip-chip LED devices have gradually replaced the conventional types of light-emitting diode devices described above as high-power LED devices.
  • the back surface of the flip chip 8 is used as a light emitting surface, and the electrode on the front surface of the chip 8 is bonded to the heat sink region of the silicon substrate 9 as a heat conductive structure. Therefore, the heat sinking regions of the flip chip 8 and the substrate 9 are close to each other, and the heat dissipation effect is increased.
  • the area of the device can be increased to 1 sec X I mm and the current can be used up to 300 or 500 mA with a power of 1 W.
  • High-power LED devices are mainly used for white light illumination.
  • the manufacturing process of white light emitting diode devices is usually required
  • a method of fabricating a light emitting diode device which separates a light emitting surface of a light emitting diode from other regions such as a squall line region by using a partitioning baffle, thereby only illuminating the phosphor in a process step of coating the phosphor Coating on the light emitting surface makes it possible to omit the phosphor packaging process in the packaging process.
  • the light emitting diode device is a high power white light emitting diode device.
  • the present invention can be applied to a light emitting diode device of a flip chip structure or a vertical structure.
  • a method of fabricating a light emitting diode device wherein the light emitting diode device is a flip chip structure, the method comprising: attaching at least one flip chip to a front surface of the substrate, and separating the baffle Provided on the ⁇ line region such that the wire bonding region is separated from the back surface of the transparent substrate of the chip as the light emitting surface, the bonding wire region is disposed on the front surface of the substrate and located at the periphery of the chip; Directly coated on the light-emitting surface by a coating method; curing the phosphor by heating the solvent in the slurry containing the phosphor; removing the separation barrier; and dividing the substrate to form a separate flip-chip structure light-emitting diode Device.
  • a method of fabricating a light emitting diode device wherein the light emitting diode device is a vertical structure
  • the method comprising: attaching at least one vertical structure chip structure on a front surface of the substrate, the chip structure including a n-side electrode, an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, and a transparent electrode layer, which are sequentially disposed as a light-emitting surface of the chip structure, and a wire bonding region is disposed on a portion of the transparent electrode layer; a baffle is disposed on the wire bonding region to separate the ⁇ line region from the exposed transparent electrode layer as the chip structure; the phosphor-containing slurry is directly coated on the transparent electrode layer by a coating method; Evaporating the solvent in the phosphor-containing slurry to cure the phosphor, thereby forming a phosphor layer; removing the separation barrier; and cutting the substrate to form a separate vertical structure light
  • a method of fabricating a light emitting diode device comprising: bonding at least one flip chip structure to a front side of the substrate through a metal bonding layer And a portion of the metal bonding layer is disposed under the peripheral portion of the chip structure, and the partitioning baffle is used such that the metal bonding layer of the portion is separated from the n-type semiconductor layer formed on the back surface of the chip structure;
  • the slurry of the powder is directly coated on the n-type semiconductor layer of the chip structure by a coating method; the phosphor is cured by heating the solvent in the slurry containing the phosphor; the separation baffle is removed; and the substrate is cut A separate flip-chip structure light emitting diode device is formed.
  • the above manufacturing method further comprises providing a surface roughening layer between the phosphor layer and the flip chip or the vertically structured chip, thereby increasing the adhesion of the phosphor
  • a white light emitting diode device can be directly fabricated without requiring a phosphor packaging process in a packaging process, thereby simplifying the manufacturing process of the white light emitting diode device.
  • FIG. 1 is a schematic structural view of a conventional light emitting diode emitting blue light and green light;
  • FIG. 2 is a schematic structural view of a light emitting diode device using a flip chip structure
  • FIG. 3 is a plan view showing a partitioning baffle used in a process for manufacturing a flip-chip structure of a light emitting diode device
  • FIG. 4 is a schematic cross-sectional view showing a light emitting diode device using the partitioning baffle shown in FIG. 3 to manufacture a flip chip structure
  • 5 is a plan view showing a partitioning baffle used in a process of manufacturing another flip-chip structure light emitting diode
  • FIG. 6 is a view showing another flip chip structure light emitting diode manufactured using the partitioning baffle shown in FIG. BRIEF DESCRIPTION OF THE DRAWINGS Fig.
  • FIG. 7 is a plan view showing a partitioning shutter used in a process for manufacturing a light emitting diode of a vertical structure
  • Fig. 8 is a schematic cross-sectional view showing a light emitting diode of a vertical structure using the partitioning shutter shown in Fig. 7.
  • the light-emitting surface of the light-emitting diode device is separated from other regions such as the squall line region by the partitioning baffle, thereby applying only the phosphor powder to the light-emitting surface in the process step of coating the phosphor, thereby improving the phosphor coating Uniformity of the cloth, and the phosphor packaging process steps in the packaging process can be omitted.
  • the present invention can be applied to a light emitting diode device of a flip chip structure or a vertical structure.
  • Fig. 3 is a plan view showing a partitioning baffle used in the process of manufacturing a light emitting diode device of a flip chip structure.
  • 4 is a schematic cross-sectional view showing a light emitting diode device in which a flip chip structure is fabricated using the spacer plate shown in FIG.
  • a flip chip structure is fabricated using the spacer plate shown in FIG.
  • at least one chip structure having a transparent substrate 8 made of, for example, sapphire is attached in the form of a flip chip to a material such as silicon, aluminum nitride, copper, gallium nitride or zinc oxide.
  • a transparent electrode layer 10 is provided on the back surface of the transparent substrate 8 as a light-emitting surface of the chip structure.
  • the surface roughening layer 14 may be provided on the transparent electrode layer 10. Of course, the surface roughening layer 14 may not be provided as needed.
  • the twist line region 13 is disposed at the periphery of the chip structure.
  • the partitioning baffle 12 is disposed on the twist line region 13 such that the wire bonding region is spaced apart from the transparent electrode layer 10 as a light exiting surface.
  • Fig. 3 is a plan view showing a partitioning baffle used when a plurality of chip structures in the form of flip chip are formed on the substrate 9. The size of the opening of the partitioning baffle corresponds to the size of the chip structure.
  • the phosphor-containing slurry is directly applied onto the surface roughened layer 14 by a coating method such as dripping or spin coating.
  • the phosphor is cured by evaporating the solvent in the slurry containing the phosphor to form the phosphor layer 11.
  • the partitioning baffle 12 is removed.
  • the phosphor can be uniformly coated and cured on the light emitting surface of the chip structure, so that the packaging process using the phosphor in the packaging process can be avoided.
  • the substrate 9 is cut to obtain a separate flip-chip structure light emitting diode device.
  • Fig. 5 is a plan view showing a partitioning baffle used in the process of manufacturing another flip-chip structure light emitting diode device.
  • Fig. 6 is a schematic cross-sectional view showing another flip-chip structure light-emitting diode device fabricated using the partitioning shutter shown in Fig. 5.
  • at least one chip structure having no transparent substrate is bonded to the front surface of the substrate 20 made of a material such as silicon, aluminum nitride, copper, gallium nitride or zinc oxide through the bonding metal layer 21.
  • the chip structure includes a reflective metal layer 22 disposed opposite the bonding metal layer 21 and a light emitting laminate disposed in sequence.
  • the light-emitting stack includes a p-type semiconductor 23 such as P-type gallium nitride, a quantum well light-emitting layer 24, and an n-type semiconductor layer 25 such as n-type gallium nitride.
  • the chip structure shown in Fig. 6 is different from the chip structure shown in Fig. 4 in that the chip structure of Fig. 6 has been peeled off from a transparent substrate such as sapphire.
  • a surface roughening layer 28 may be provided on the ri type semiconductor layer 25. Of course, the surface roughening layer 28 may not be provided as needed.
  • the partitioning shutter 27 is disposed on the bonding metal layer 21 provided on the periphery of the light emitting structure such that the bonding metal layer 21 of the portion is spaced apart from the n-type semiconductor layer 25 as a light emitting surface.
  • the size of the opening of the partitioning baffle 27 corresponds to the planar size of the n-type semiconductor layer 25.
  • the phosphor-containing slurry is directly applied onto the surface roughened layer 28 by a coating method such as dripping, spin coating or the like.
  • the phosphor layer 26 is formed by heating the solvent in the slurry containing the phosphor to evaporate the phosphor. After that, the partition baffle 27 is removed.
  • the silicon substrate 20 is cut to obtain a separate flip-chip structure light emitting diode device.
  • the phosphor can be uniformly coated and cured on the light-emitting surface of the chip, so that the packaging process using the phosphor in the packaging process can be avoided.
  • Fig. 7 is a plan view showing a partitioning baffle used in the process of manufacturing a vertically structured light emitting diode.
  • Figure 8 is a cross-sectional view showing a light emitting diode device in which a vertical structure is fabricated using the partitioning shutter shown in Figure 7.
  • the chip structure includes an n-side electrode 33, an n-type semiconductor layer 34, a light-emitting layer 41, a p-type semiconductor layer 35, and a transparent electrode layer 36 which are sequentially disposed above the substrate 32.
  • the transparent electrode layer 36 serves as a light emitting surface.
  • the surface roughening layer 40 may be provided on the transparent electrode layer 36.
  • Fig. 7 is a plan view showing the partitioning shutter 38 employed when a plurality of vertically structured chip structures are formed on the substrate 32, unlike the partitioning shutters 12 and 27 shown in Figs. 3 and 5, which are shown in Fig. 7.
  • the dividing baffle 38 also has a partial turn that separates the twisted line region 39.
  • the shape and size of the opening of the partitioning baffle 38 and the shape of the light emitting surface as the chip structure The shape and size correspond.
  • the phosphor-containing slurry is directly applied onto the light-emitting surface by a coating method such as dripping or spin coating.
  • the phosphor is cured by heating the solvent in the slurry containing the phosphor to form the phosphor layer 37. Thereafter, the partition baffle 38 is removed.
  • the phosphor can be uniformly coated and cured on the light emitting surface of the chip, so that the packaging process of using the phosphor in the packaging process can be avoided.
  • the substrate 32 is cut to obtain a separate vertical structure light emitting diode device.
  • the present invention is also applicable to other structure light emitting diode devices, and particularly to a high power white light diode device having a phosphor layer.
  • the light-emitting surface of the light-emitting diode is separated from the wire-bonding region by the partitioning baffle, so that only the phosphor powder is applied to the light-emitting surface of the light-emitting diode in the process of coating the phosphor, thereby improving the phosphor coating.
  • Uniformity For white light emitting diode devices, it is also possible to thereby control the uniformity of color temperature and color coordinates of white light. Therefore, the white light emitting diode device can be directly fabricated without using a phosphor packaging process in the packaging process, thereby simplifying the manufacturing process of the white light emitting diode device.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Description

一种发光二极管器件的制造方法 技术领域
本发明涉及一种发光二极管器件的制造方法，尤其涉及一种采用分隔挡板将发光面与 例如焊线区域的其他区域分隔从而仅将荧光粉涂布在发光面的发光二极管器件的制造方 法。 背景技术
发光二极管（LED)是用半导体材料制作的正向偏置的 PN结二极管。 其发光机理是当 在 PN结两端注入正向电流时， 注入的非平衡载流子 （电子一空穴对） 在扩散过程中复合 发光， 这种发射过程主要对应光的自发发射过程。制作半导体发光二极管的材料是重掺杂 的， 热平衡状态下的 N区有很多迁移率很高的电子， P区有较多的迁移率较低的空穴。 由 于 PN结阻挡层的限制，在常态下，二者不能发生自然复合。而当给 PN结加以正向电压时， 沟区导带中的电子则可逃过 PN结的势垒进入到 P区一侧。于是在 PN结附近稍偏于 P区一 边的地方， 处于高能态的电子与空穴相遇时， 便产生发光复合。这种发光复合所发出的光 属于自发辐射。
一般而言， 传统的发光二极管 （LED) 的制造方法是在衬底上外延生长包括 n型半导 体材料层、发光层和 P型半导体材料层的层叠结构。随着发光二极管发射的光的波长不同， 发光二极管所采用的材料和结构也不同。例如， 对于发射蓝光和绿光二极管， 通常采用蓝 宝石作为衬底， 而采用氮化镓铟外延结构作为层叠结构。 由于蓝宝石衬底为绝缘衬底， 所 以发光二极管的阴极和阳极均设置在正面。例如， 如图 1所示， 在蓝宝石衬底 6上依次形 成了 n型氮化镓层 5、 发光层 4、 p型氮化镓层 3、 透明电极 2。 阳极 1和阴极 7分别形成 于透明电极 2和 n型氮化镓层 5上。 由于蓝宝石衬底 6的散热性较差， 且发光层与导热结 构的距离大， 所以传统的发光二极管只能制造为小面积和低功率， 例如 0. 3 mmX 0. 3 mm 的尺寸和 20 mA的使用电流。
由于对于发光二极管的发光效率和亮度的要求的不断提高，倒装片的发光二极管器件 逐渐取代了上述的传统类型的发光二极管器件， 以作为大功率发光二极管器件。如图 2所 示， 倒装片芯片 8的背面作为发光面， 并且芯片 8正面的电极与作为导热结构的硅基板 9 的热沉区贴合。 因此倒装片 8和基板 9的热沉区接近， 散热效果增加。 因此， 器件的面积 可以被增加到 1 隱 X I mm, 使用电流也可以达到 300或 500 mA, 而功率达到 1 W。
大功率发光二极管器件主要用于白光照明。而白光发光二极管器件的制造工艺通常需
- 1- 确认本 要封装荧光粉的封装工艺。但是在白光发光二极管的封装工艺过程中， 荧光粉的涂布难于 控制， 导致白光颜色不均的现象， 影响了发射的白光的色温和颜色坐标， 从而导致良率降 低。 上述问题对于大功率的白光发光二极管器件尤为明显。 发明内容
根据本发明， 提供了一种发光二极管器件的制造方法， 其利用分隔挡板将发光二极管 的发光面与例如悍线区的其他区域分隔，从而在涂布荧光粉的工艺步骤中仅将荧光粉涂布 于发光表面， 使得可以省略封装制程中的荧光粉封装工艺。
优选地， 所述发光二极管器件为高功率白光发光二极管器件。
优选地， 本发明可以应用于倒装片结构或垂直结构的发光二极管器件。
根据本发明， 提供了一种发光二极管器件的制造方法， 所述发光二极管器件为倒装片 结构， 所述方法包括： 将至少一个倒装的芯片贴合在基板的正面上， 将分隔挡板设置于悍 线区上， 使得焊线区与作为发光面的芯片的透明基板的背面分隔开， 所述焊线区设置于基 板的正面上并位于芯片的周边； 将含有荧光粉的浆料通过涂布方法直接涂布在发光面上； 通过加热蒸发含有荧光粉的桨料中的溶剂而使得荧光粉固化； 移除分隔挡板； 以及分割基 板以形成单独的倒装片结构的发光二极管器件。
根据本发明， 还提供了一种发光二极管器件的制造方法，所述发光二极管器件为垂直 结构， 所述方法包括： 将至少一个垂直结构的芯片结构贴附在基板的正面上， 该芯片结构 包括依次设置的 n侧电极、 n型半导体层、 发光层、 p型半导体层和透明电极层， 该透明 电极层作为该芯片结构的发光面，焊线区设置于部分的透明电极层上； 将分隔挡板设置于 焊线区上，将悍线区与作为该芯片结构的暴露的透明电极层分隔开； 将含有荧光粉的浆料 通过涂布方法直接涂布在透明电极层上；通过加热蒸发含有荧光粉的浆料中的溶剂而使得 荧光粉固化， 从而形成荧光粉层； 移除分隔挡板； 以及切割基板以形成单独的垂直结构的 发光二极管器件。
根据本发明， 还提供了一种发光二极管器件的制造方法， 所述发光二极管器件为倒装 片结构，所述方法包括：将至少一个倒装的芯片结构通过金属接合层贴合在基板的正面上， 部分的该金属接合层设置于该芯片结构的周边部分下， 使用分隔挡板， 使得该部分的金属 接合层与形成于该芯片结构的背面的 n型半导体层分隔开；将含有荧光粉的浆料通过涂布 方法直接涂布在该芯片结构的 n型半导体层上；通过加热蒸发含有荧光粉的浆料中的溶剂 而使得荧光粉固化； 移除分隔挡板； 以及切割基板以形成单独的倒装片结构的发光二极管 器件。 优选地，上述制造方法还包括在荧光粉层和倒装或垂直结构的芯片之间设置表面粗化 层， 从而增加荧光粉层在发光面上的粘接力。
根据本发明，可以直接制造白光发光二极管器件而不需要封装制程中的荧光粉封装工 艺， 从而简化了白光发光二极管器件的制造工艺。 附图说明
图 1为传统的发射蓝光和绿光的发光二极管的结构示意图；
图 2为采用倒装片结构的发光二极管器件的结构示意图；
图 3为制造倒装片结构的发光二极管器件的工艺中所使用的分隔挡板的平面示意图； 图 4为采用图 3所示的分隔挡板制造倒装片结构的发光二极管器件的剖面示意图； 图 5为制造另一倒装片结构的发光二极管的工艺中所使用的分隔挡板的平面示意图； 图 6为采用图 5所示的分隔挡板制造的另一倒装片结构的发光二极管的剖面示意图； 图 7为制造垂直结构的发光二极管的工艺中所使用的分隔挡板的平面示意图； 以及 图 8为采用图 7所示的分隔挡板制造垂直结构的发光二极管的剖面示意图。
具体实施方式
以下结合附图和实施例对本发明作进一步的说明。
根据本发明， 利用分隔挡板将发光二极管器件的发光面与例如悍线区的其他区域分 隔， 从而在涂布荧光粉的工艺步骤中仅将荧光粉涂布于发光表面， 提高了荧光粉涂布的均 匀性， 并可以省略封装制程中的荧光粉封装工艺步骤。本发明可以应用于倒装片结构或垂 直结构的发光二极管器件。
图 3 显示了制造倒装片结构的发光二极管器件的工艺中所使用的分隔挡板的平面示 意图。 图 4为采用图 3所示的分隔挡板制造倒装片结构的发光二极管器件的剖面示意图。 如图 4所示，将至少一个具有由比如蓝宝石制成的透明基板 8的芯片结构以倒装片的形式 贴合在例如硅、 氮化铝、 铜、 氮化镓或氧化锌等材料制成的基板 9的正面上。 该透明基板 8的背面上设置透明电极层 10以作为该芯片结构的发光面。 为了增加在后续的工艺中涂 布在上述芯片结构上的荧光粉的粘接力， 还可以在透明电极层 10上设置表面粗化层 14。 当然根据需要， 也可以不设置表面粗化层 14。 悍线区 13设置于该芯片结构的周边。 分隔 挡板 12被设置于悍线区 13上， 使得焊线区与作为出光面的透明电极层 10分隔开。 图 3 显示了当基板 9上形成有多个倒装片形式的芯片结构时所采用的分隔挡板的平面示意图。 分隔挡板的开口的大小与芯片结构的尺寸相应。接着， 将含有荧光粉的浆料通过滴注、 旋 涂等的涂布方法直接涂布在表面粗化层 14上。 通过加热蒸发含有荧光粉的浆料中的溶剂 而使得荧光粉固化， 从而形成荧光粉层 11。 之后， 移除分隔挡板 12。 通过上述方法， 可 以使得荧光粉均匀地涂布并固化在该芯片结构的发光表面上，从而可以避免再在封装制程 中采用荧光粉的封装工艺。随后，将基板 9切割以获得单独的倒装片结构的发光二极管器 件。
图 5 显示了制造另一倒装片结构的发光二极管器件的工艺中所使用的分隔挡板的平 面示意图。图 6为采用图 5所示的分隔挡板制造的另一倒装片结构的发光二极管器件的剖 面示意图。 如图 6所示， 将不具有透明基板的至少一芯片结构通过接合金属层 21接合在 例如硅、 氮化铝、 铜、 氮化镓或氧化锌等材料制成的基板 20的正面上。 该芯片结构包括 设置与接合金属层 21相对的反射金属层 22以及依次设置的发光叠层。所述发光叠层包括 例如 P型氮化镓的 p型半导体 23、量子阱发光层 24和例如 n型氮化镓的 n型半导体层 25。 图 6所示的芯片结构与图 4所示的芯片结构的一个不同之处在于图 6的芯片结构已经剥离 了例如蓝宝石的透明基板。为了增加在后续的工艺中涂布在上述芯片结构上的荧光粉的粘 接力， 还可以在 ri型半导体层 25上设置表面粗化层 28。 当然根据需要， 也可以不设置表 面粗化层 28。 分隔挡板 27布置在设置于所述发光结构周边的接合金属层 21上， 使得该 部分的接合金属层 21与作为发光面的 n型半导体层 25分隔开。 分隔挡板 27的开口的大 小与 n型半导体层 25的平面尺寸相应。 接着， 将含有荧光粉的浆料通过滴注、 旋涂等的 涂布方法直接涂布在表面粗化层 28上。 通过加热蒸发含有荧光粉的浆料中的溶剂而使得 荧光粉固化， 从而形成荧光粉层 26。 之后， 移除分隔挡板 27。 随后， 将硅基板 20切割以 获得单独的倒装片结构的发光二极管器件。通过上述方法， 可以使得荧光粉均匀地涂布并 固化在芯片的发光表面上， 从而可以避免再在封装制程中采用荧光粉的封装工艺。
图 7显示了制造垂直结构的发光二极管的工艺中所使用的分隔挡板的平面示意图。图 8为采用图 7所示的分隔挡板制造垂直结构的发光二极管器件的剖面示意图。如图 8所示， 该芯片结构包括依次设置在基板 32上方的 n侧电极 33、 η型半导体层 34、 发光层 41、 ρ 型半导体层 35和透明电极层 36。 透明电极层 36作为发光表面。 为了增加在后续的工艺 中涂布在上述芯片结构上的荧光粉的粘接力， 还可以在透明电极层 36上设置表面粗化层 40。 当然根据需要， 也可以不设置表面粗化层 40。 悍线区 39位于部分的表面粗化层 40 上。图 7显示了当基板 32上形成有多个垂直结构的芯片结构时所采用的分隔挡板 38的平 面示意图， 与图 3和图 5所示的分隔挡板 12和 27不同， 图 7所示的分隔挡板 38还具有 分隔悍线区 39的部分 Α。 分隔挡板 38的开口的形状和大小与作为芯片结构的发光面的形 状和大小相应。接着， 将含有荧光粉的浆料通过滴注、 旋涂等的涂布方法直接涂布在发光 面上。 通过加热蒸发含有荧光粉的浆料中的溶剂而使得荧光粉固化， 形成荧光粉层 37。 之后， 移除分隔挡板 38。 通过上述方法， 可以使得荧光粉均匀地涂布并固化在芯片的发 光表面上， 从而可以避免在封装制程中再采用荧光粉的封装工艺。 随后， 将基板 32切割 以获得单独的垂直结构的发光二极管器件。
本发明也可以应用于其他结构的发光二极管器件，尤其可以应用于具有荧光粉层的大 功率白光二极管器件。
根据本发明， 利用分隔挡板将发光二极管的发光面与焊线区分隔， 从而在涂布荧光粉 的工艺步骤中仅将荧光粉涂布于发光二极管的发光表面， 提高了荧光粉涂布的均匀性。对 于白光发光二极管器件而言， 还可以由此控制白光的色温与颜色坐标的均匀度。因此可以 直接制造白光发光二极管器件而不需要在封装制程中再采用荧光粉的封装工艺，从而简化 了白光发光二极管器件的制造工艺。

Claims

权 利 要 求
1、 一种发光二极管器件的制造方法， 利用分隔挡板将发光二极管芯片的发光面与焊 线区分隔， 从而在涂布荧光粉的工艺步骤中仅将荧光粉涂布于发光二极管芯片的发光表 面。
2、 根据权利要求 1所述的方法， 其中所述发光二极管器件为高功率白光发光二极管 器件。
3、 根据权利要求 1或 2所述的方法， 其中所述发光二极管器件为倒装片结构或垂直 结构。
4、 一种发光二极管器件的制造方法， 所述发光二极管器件为倒装片结构， 所述方法 包括：
将至少一个倒装的芯片结构贴合在基板 （9) 的正面上， 该芯片结构包透明基板 （8 ) 和设置于透明基板 （8 ) 的背面上的透明电极层 （10) ， 该透明电极层 （10) 作为该芯片 结构的发光面， 焊线区 （13) 设置于基板 （9) 的正面上并位于所述至少一个芯片结构的 周边；
将含有荧光粉的浆料通过涂布方法直接涂布在透明电极层 （10) 上；
通过加热蒸发含有荧光粉的桨料中的溶剂而使得荧光粉固化， 从而形成荧光粉层 ( 11 ) ；
移除分隔挡板 （12) ； 以及
切割基板 （9) 以形成单独的倒装片结构的发光二极管器件。
5、 根据权利要求 4所述的方法， 所述方法还包括在所述透明电极层 （10) 和荧光粉 层 （11 ) 之间设置表面粗化层 （14) 。
6、 根据权利要求 4或 5所述的方法， 其中所述发光二极管器件为高功率白光发光二 极管器件。
7、 一种发光二极管器件的制造方法， 所述发光二极管器件为倒装片结构， 所述方法 包括：
将至少一个倒装的芯片结构通过设置于该芯片结构和基板 （20 ) 之间的金属接合层 ( 21 ) 贴合在基板（20) 的正面上， 该芯片结构包括设置与接合金属层 （21 )相对的反射 金属层 （22) 和作为发光面的 n性半导体层 （25) ， 且接合金属层 （21 ) 的一部分设置于 该芯片结构的周边；
分隔挡板（27 )布置在设置于所述芯片结构周边的接合金属层 （21 )上， 使得该部分 的金属接合层 （21) 与 n型半导体层 （25) 分隔开；
将含有荧光粉的浆料通过涂布方法直接涂布在该芯片结构的 n型半导体层 （25) 上； 通过加热蒸发含有荧光粉的浆料中的溶剂而使得荧光粉固化， 从而形成荧光粉层 (26) ；
移除分隔挡板 （27) ； 以及
切割基板 （20) 以形成单独的倒装片结构的发光二极管器件。
8、 根据权利要求 7所述的方法， 所述方法还包括在所述 n型半导体层 （25) 和荧光 粉层 （26) 之间设置表面粗化层 （28) 。
9、 根据权利要求 7或 8所述的方法， 其中所述发光二极管器件为高功率白光发光二 极管器件。
10、 一种发光二极管器件的制造方法， 所述发光二极管器件为垂直结构， 所述方法包 括：
将至少一个垂直结构的芯片结构贴附在基板（32)正面上， 该芯片结构包括依次设置 的 n侧电极 （33) 、 η型半导体层 （34) 、 发光层 （41) 、 ρ型半导体层 （35) 和透明电 极层 （36) ， 该透明电极层 （36)作为该芯片结构的发光面， 焊线区 （39) 设置于部分的 透明电极层 （36) 上；
将分隔挡板 （38) 设置于焊线区 （39)上， 将焊线区 （39) 与作为该芯片结构的暴露 的透明电极层 （36) 分隔开；
将含有荧光粉的浆料通过涂布方法直接涂布在透明电极层 （36) 上；
通过加热蒸发含有荧光粉的浆料中的溶剂而使得荧光粉固化， 从而形成荧光粉层 (37) ；
移除分隔挡板 （38) ； 以及
切割基板 （32) 以形成单独的垂直结构的发光二极管器件。
11、 根据权利要求 10所述的方法， 所述方法还包括在所述透明电极层 （36) 和荧光 粉层 （37) 之间设置表面粗化层 （40) 。
12、根据权利要求 10或 11所述的方法， 其中所述发光二极管器件为高功率白光发光 二极管器件。
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CN100483762C (zh) 2009-04-29
CN101237015A (zh) 2008-08-06
HK1122650A1 (en) 2009-05-22
US20100055814A1 (en) 2010-03-04
US20100216265A1 (en) 2010-08-26
US7875472B2 (en) 2011-01-25
EP2249403A4 (en) 2013-03-06
US20100047940A1 (en) 2010-02-25
US20090215210A1 (en) 2009-08-27

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