WO2009104531A1 - 成膜方法 - Google Patents
成膜方法 Download PDFInfo
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- WO2009104531A1 WO2009104531A1 PCT/JP2009/052482 JP2009052482W WO2009104531A1 WO 2009104531 A1 WO2009104531 A1 WO 2009104531A1 JP 2009052482 W JP2009052482 W JP 2009052482W WO 2009104531 A1 WO2009104531 A1 WO 2009104531A1
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- Prior art keywords
- insulating film
- silicon
- frequency power
- film
- based insulating
- Prior art date
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- 238000000034 method Methods 0.000 title claims abstract description 32
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 63
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 62
- 239000010703 silicon Substances 0.000 claims abstract description 62
- 239000000758 substrate Substances 0.000 claims abstract description 52
- -1 silane compound Chemical class 0.000 claims abstract description 16
- 230000001590 oxidative effect Effects 0.000 claims abstract description 13
- 239000000203 mixture Substances 0.000 claims abstract 4
- 230000015572 biosynthetic process Effects 0.000 claims description 12
- 230000008569 process Effects 0.000 claims description 6
- 230000008021 deposition Effects 0.000 claims 1
- 230000006866 deterioration Effects 0.000 abstract description 6
- 229910000077 silane Inorganic materials 0.000 abstract description 5
- 239000010408 film Substances 0.000 description 129
- 239000007789 gas Substances 0.000 description 43
- 238000005755 formation reaction Methods 0.000 description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 229910052814 silicon oxide Inorganic materials 0.000 description 8
- 238000005224 laser annealing Methods 0.000 description 6
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 5
- 239000012535 impurity Substances 0.000 description 5
- 150000002500 ions Chemical class 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 229910021417 amorphous silicon Inorganic materials 0.000 description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 3
- MWUXSHHQAYIFBG-UHFFFAOYSA-N Nitric oxide Chemical compound O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 description 3
- 229910052799 carbon Inorganic materials 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000002425 crystallisation Methods 0.000 description 2
- 230000008025 crystallization Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 239000001307 helium Substances 0.000 description 2
- 229910052734 helium Inorganic materials 0.000 description 2
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 2
- 239000011261 inert gas Substances 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 150000003377 silicon compounds Chemical class 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 230000002776 aggregation Effects 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 238000010849 ion bombardment Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- PQDJYEQOELDLCP-UHFFFAOYSA-N trimethylsilane Chemical compound C[SiH](C)C PQDJYEQOELDLCP-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/401—Oxides containing silicon
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
- C23C16/515—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using pulsed discharges
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
Definitions
- the present invention relates to a film forming method.
- a pixel switching element provided in a large display has a low temperature polysilicon (hereinafter simply referred to as low temperature p-Si) having high electron mobility in an active layer of a thin film transistor (TFT: Thin Film Transistor). Is used.)
- TFT Thin Film Transistor
- PECVD Pullasma Enhanced Chemical Vapor Deposition
- TEOS tetraethoxysilane
- the PECVD method uses a vacuum chamber in which a gas supply system and an exhaust system are connected, and supplies a mixed gas containing an organosilane compound and an oxidizing gas from the gas supply system into the vacuum chamber. Then, the substrate is placed on one electrode provided in the vacuum chamber, high-frequency power is supplied to the other electrode, and plasma is generated between the electrodes, thereby forming an insulating film on the substrate. According to this, since the organosilane compound is activated in plasma, a uniform insulating film can be formed on the surface of a large substrate even when the substrate is at a relatively low temperature.
- Patent Document 2 includes a high frequency power source and a pulse power source, and repeatedly stops the high frequency power applied to the electrodes for a predetermined period.
- the lifetime of radicals is several milliseconds to several tens of milliseconds
- the lifetime of ions is several microseconds to several tens of microseconds. Disappears and grows an insulating film under high radical concentration.
- Patent document 2 reduces damage to an insulating film caused by plasma by alternately providing a period in which an ion bombardment is applied to the insulating film and a period in which the insulating film grows without being bombarded with ions. , Improve the electrical characteristics of the insulating film.
- JP-A-8-279505 Japanese Patent Laid-Open No. 2001-110798
- a low temperature p-Si film forming technique generally uses a laser annealing method in which an excimer laser is irradiated onto amorphous silicon (hereinafter simply referred to as a-Si).
- a-Si amorphous silicon
- crystal growth of low-temperature p-Si is promoted along the surface direction of the substrate to produce p-Si with a large grain size.
- the intensity of a laser is spatially modulated along the surface direction of the substrate, or the laser is scanned along the surface direction of the substrate to move from a low-intensity place to a high place. That is, a p-Si crystal is grown along the surface direction of the substrate.
- the present invention provides a film forming method that enables the gate insulating film to be thinned by suppressing deterioration of electrical characteristics in the gate insulating film and improving the surface coverage.
- a film forming method for forming a silicon-based insulating film on a substrate disposed in a vacuum chamber supplies a mixed gas containing an organosilane compound and an oxidizing gas to the vacuum chamber.
- Forming the pulsed high-frequency power, and generating the pulsed high-frequency power at a maximum duty ratio among duty ratios that satisfy a target value of the surface coverage of the silicon-based insulating film including.
- a film forming method for forming a silicon-based insulating film on a substrate disposed in a vacuum chamber supplies a mixed gas containing an organosilane compound and an oxidizing gas to the vacuum chamber.
- generating the pulsed high-frequency power includes setting a flat band voltage of the silicon-based insulating film to a predetermined voltage out of a duty ratio that satisfies a target value of the surface coverage of the silicon-based insulating film. Generating the pulsed high frequency power at a duty ratio maintained within a range.
- Sectional drawing which shows a film-forming apparatus typically. Sectional drawing which shows a pseudo pattern.
- (A), (b) is a figure which shows the dependence of the duty ratio with respect to a flat band voltage, respectively, and the dependence of the duty ratio with respect to a surface coverage.
- T1 ON period
- T2 OFF period
- 10 film forming apparatus
- 11 vacuum chamber
- 14 power supply
- 15 high frequency power supply
- 16 pulse power supply.
- FIG. 1 is a cross-sectional view schematically showing a film forming apparatus 10 used in the film forming method of the present invention.
- the broken line in FIG. 1 shows the electrical connection between members.
- the vacuum chamber 11 of the film forming apparatus 10 is connected to an exhaust system 12 and is decompressed to a predetermined pressure when the exhaust system 12 is driven.
- the upper surface wall of the vacuum chamber 11 is mounted with a plate-like upper electrode 13 that is electrically insulated from the vacuum chamber 11, and is connected to the power supply unit 14 via the upper electrode 13.
- the power supply unit 14 includes a high-frequency power supply 15 and a switching power supply 16.
- the switching power supply 16 modulates high-frequency power of a predetermined frequency (for example, 27.12 MHz) generated by the high-frequency power supply 15 into a predetermined pulse wave. Power is supplied during the on period.
- the upper electrode 13 receives the pulsed high frequency power from the power supply unit 14 when the power supply unit 14 is driven, and generates plasma inside the vacuum chamber 11.
- the upper electrode 13 has a gas supply chamber 13 a extending inside, and the gas supply chamber 13 a is connected to a gas supply system 17.
- the gas supply system 17 is connected to a gas cylinder 17a filled with an organosilane compound and a gas cylinder 17b filled with an oxidizing gas, and selectively supplies the gas filled in the gas cylinders 17a and 17b to the gas supply chamber 13a.
- the gas supply chamber 13 a is connected to a plurality of supply holes 13 b communicating with the inside of the vacuum chamber 11, and supplies the gas from the gas supply system 17 to the inside of the vacuum chamber 11 when the gas supply system 17 is driven.
- organic silane compound examples include tetraethoxysilane (TEOS) and trimethylsilane, and an inert gas such as argon, helium, or nitrogen may be added to these gases.
- TEOS tetraethoxysilane
- oxidizing gas examples include oxygen and nitrogen oxide, and an inert gas such as argon, helium, or nitrogen may be added to these gases.
- the gas supply system 17 may add hydrogen in addition to the organosilane compound and the oxidizing gas.
- a substrate stage 18 for mounting the substrate S is mounted inside the vacuum chamber 11, and the substrate stage 18 holds the substrate S with the upper electrode 13 and the surface of the substrate S facing each other.
- the substrate stage 18 includes a heater 18a for heating the substrate S, and raises the temperature of the substrate S to a predetermined temperature.
- the substrate stage 18 is electrically grounded, and plasma is generated between the substrate stage 18 and the upper electrode 13 when high frequency power is applied to the upper electrode 13.
- the substrate S held on the substrate stage 18 receives a film-forming species generated in the plasma space, and grows a silicon-based insulating film, for example, a silicon oxide film on the surface thereof.
- a low-temperature p-Si film subjected to laser annealing is formed on the surface of the substrate S, and the height of the low-temperature p-Si film is about several tens due to the crystallization of the low-temperature p-Si.
- a plurality of projections of nm are formed.
- the film forming apparatus 10 includes a control device 20 for performing a film forming process.
- the control device 20 is connected to the gas supply system 17 and generates a control signal corresponding to the gas supply system 17.
- the gas supply system 17 is driven according to a control signal from the control device 20, and when supplying the organic silane compound and the oxidizing gas to the vacuum chamber 11, the flow rate of the oxidizing gas with respect to the flow rate of the organic silane compound is 10 times to Adjust to a range of 100 times.
- the film forming apparatus 10 oxidizes most of the carbon elements contained in the organosilane compound in the plasma space and exhausts them.
- the control device 20 is connected to the exhaust system 12 and generates a control signal corresponding to the exhaust system 12.
- the exhaust system 12 is driven according to a control signal from the control device 20, and adjusts the pressure inside the vacuum chamber 11 to 80 Pa to 300 Pa when the gas supply system 17 supplies the mixed gas.
- the film forming apparatus 10 reduces collision between radical components, suppresses excessive aggregation of the radical components, and densifies the film quality of the silicon-based insulating film.
- the control device 20 is connected to the heater 18a and generates a control signal corresponding to the heater 18a.
- the heater 18a is driven according to a control signal from the control device 20, and adjusts the temperature of the substrate S to a range of 250 ° C. to 430 ° C. when the substrate S is placed on the substrate stage 18.
- the film forming apparatus 10 can reduce the defect concentration in the film and improve the film characteristics of the silicon-based insulating film.
- the control device 20 is connected to the power supply unit 14 and generates a control signal corresponding to the power supply unit 14.
- Power supply unit 14 is driven according to a control signal from the control unit 20 applies a pulsed high-frequency power to the upper electrode 13 at a power density of 0.1W / cm 2 ⁇ 1.0W / cm 2. At this time, the power supply unit 14 generates pulsed high-frequency power having a frequency of 5 kHz to 50 kHz with a predetermined duty ratio.
- the duty ratio of the pulsed high-frequency power output from the power supply unit 14 during actual film formation is referred to as a target duty ratio.
- the duty ratio in the present embodiment is a value defined by T1 / (T1 + T2) ⁇ 100 using an on-period T1 of high-frequency power and an off-period T2 of high-frequency power.
- the control device 20 drives the power supply unit 14 to apply a high frequency power having a target duty ratio to the upper electrode 13, thereby forming a desired silicon-based insulating film on the surface of the low temperature p-Si film.
- the surface coverage of the silicon-based insulating film is such that the silicon-based insulating film substantially uniformly covers each protrusion on the surface of the low-temperature p-Si film, and the silicon-based insulating film has a desired design rule.
- the surface coverage when functioning as a gate insulating film is referred to as a target coverage.
- the silicon-based insulating film as the gate insulating film must have a uniform film thickness over the entire surface of the low-temperature p-Si film in order to reduce variations in threshold voltage and leakage current.
- the concentration of impurity elements such as carbon, hydrogen, and oxygen contained in the film must be lowered in order to suppress fluctuations in threshold voltage.
- the target duty ratio of the present embodiment is set to the maximum value among the duty ratios at which the surface coverage of the silicon-based insulating film satisfies the target coverage.
- various ions and various radicals are generated in the plasma space in the vacuum chamber 11. Since the lifetime of radicals is several milliseconds to several tens of milliseconds, whereas the lifetime of ions is several microseconds to several tens of microseconds, the ions disappear during the high-frequency power off period T2, or , Drastically reduced and the film formation by radicals becomes dominant.
- a high-fluidity film-forming species such as an oligomer of an organic silicon compound grows as a silicon-based insulating film, and the convex portion of the substrate surface has a low surface coverage.
- a silicon-based insulating film grows.
- a film-forming species under a high plasma density grows as a silicon-based insulating film, and a silicon-based insulating film with few impurities and an electrically high-quality silicon-based insulating film is formed on the convex portion of the substrate surface. grow up.
- the off period T2 becomes longer, so that the surface coverage of the silicon-based insulating film is improved, while the content of impurity elements such as carbon and hydrogen contained in the organic silicon compound Tends to increase. If the duty ratio of the high frequency power is simply reduced in order to improve the surface coverage of the silicon insulating film, the flat band voltage of the silicon insulating film is greatly shifted.
- the target duty ratio in the film forming apparatus 10 is the shortest off period T2 of the high-frequency power in the range where the surface coverage of the silicon-based insulating film satisfies the target coverage.
- the target duty ratio in the film forming apparatus 10 is the one that makes the on-period T1 of the high-frequency power the longest under the film forming conditions of the silicon-based insulating film that satisfies the target coverage. Therefore, the film forming apparatus 10 can maximize the amount of power supplied to the reaction system while sufficiently covering each protrusion on the surface of the low-temperature p-Si film with the silicon-based insulating film. As a result, the film forming apparatus 10 can improve the surface coverage while suppressing deterioration of electrical characteristics in the silicon-based insulating film.
- the control device 20 drives the exhaust system 12 to depressurize the inside of the vacuum chamber 11 to a predetermined pressure, and then carries the substrate S from the outside of the film forming device 10 into the vacuum chamber 11. It is placed on the substrate stage 18.
- the controller 20 drives the heater 18a to raise the temperature of the substrate S to a predetermined temperature.
- the control device 20 drives the gas supply system 17 to supply the mixed gas composed of the organosilane compound and the oxidizing gas from the gas supply chamber 13a to the inside of the vacuum chamber 11, and the vacuum The inside of the tank 11 is adjusted to a predetermined pressure (80 Pa to 300 Pa).
- the control device 20 drives the power supply unit 14 to apply pulsed high frequency power to the upper electrode 13.
- the control device 20 drives the high-frequency power supply 15 to generate high-frequency power of 27.12 MHz, for example, and drives the switching power supply 16 to generate high-frequency power from the high-frequency power supply 15 of 5 kHz to 50 kHz, for example. Pulse to meet target duty ratio at frequency. Then, the control device 20 applies pulsed high frequency power having a target duty ratio from the power supply unit 14 to the upper electrode 13.
- the upper electrode 13 When pulsed high-frequency power is applied to the upper electrode 13, the upper electrode 13 functions as a cathode, the substrate stage 18 functions as an anode, and an organosilane compound and a substrate are interposed between the upper electrode 13 and the substrate S. Plasma using a mixed gas containing an oxidizing gas is generated.
- a highly fluid film-forming species grows as a silicon-based insulating film, and a silicon-based insulating film grows on the convex portion on the surface of the substrate S under a high surface coverage.
- a film formation reaction proceeds under a high plasma density, and an electrically high-quality silicon-based insulating film grows on the convex portion on the surface of the substrate S with less impurities. .
- the film forming method of the present embodiment first, a plurality of substrates S having convex portions on the surface are used, and a film forming process with a different duty ratio is preliminarily performed on each of the plurality of substrates S. Applied. Next, the surface coverage of the silicon-based insulating film is measured for each of the plurality of substrates S, and a duty ratio range that satisfies the target coverage is obtained. The largest duty ratio within the range of the duty ratio that satisfies the target coverage is set as the target duty ratio at the time of actual film formation.
- the on period T1 of the high-frequency power can be made the longest among the film forming conditions capable of forming the silicon-based insulating film satisfying the target coverage.
- the amount of electric power supplied to the reaction system can be maximized while obtaining a target coverage ratio that sufficiently covers each protrusion on the surface of the low-temperature p-Si film with the silicon-based insulating film.
- the deterioration of the electrical property in a silicon type insulating film can be suppressed, and the surface coverage can be improved.
- the pseudo pattern P includes a line pattern having a width W ⁇ height H of 0.4 ⁇ m ⁇ 0.6 ⁇ m and extending in one direction (a direction perpendicular to the paper surface of FIG. 2).
- the flat band voltage and the surface coverage in the examples are shown in FIGS. 3A and 3B and Table 1, respectively.
- Table 1 a circle mark indicates that the flat band voltage (for example, absolute value) is equal to or lower than the target voltage, or that the surface coverage satisfies the target coverage.
- the crosses in Table 1 indicate that the flat band voltage exceeds the target voltage or that the surface coverage is less than the target coverage.
- Power density 0.5 W / cm 2
- Film pressure 190Pa -Film formation temperature: 340 ° C TEOS flow rate / O 2 flow rate: 1/50
- the flat band voltage when the duty ratio is 30%, the flat band voltage is as large as about ⁇ 18V, and when the duty ratio is 50%, 70%, and 100%, the flat band voltage is about It is as small as -2V. That is, according to the film formation conditions in the example, it can be understood that a high-quality silicon oxide film with few impurities and defects can be obtained as the duty ratio increases (as the on-period T1 becomes longer).
- the surface coverage is as low as 60% or less, and when the duty ratio is 30% and 50%, the surface coverage is 70%. %.
- the target coverage is 70%
- the range of the duty ratio that satisfies the target coverage is 30% to 50%. In this case, the maximum value in the range is 50%.
- the target duty ratio is set to 50%, that is, when the on period T1 and the off period T2 are each set to 50 microseconds, a silicon oxide film that satisfies the target coverage and has a flat band voltage close to 0 V is obtained. can get.
- the film forming method of one embodiment has the following advantages. (1) A range of the duty ratio in which the surface coverage of the silicon-based insulating film satisfies the target coverage is obtained in advance, and the maximum value within the range is set as the target duty ratio of the pulse wave.
- the high frequency power off period T2 can be set to the shortest time, and the high frequency power on period T1 can be set to the longest time.
- the amount of power to the reaction system can be maximized by the on period T1 of the high frequency power while realizing the surface coverage that satisfies the target coverage by the off period T2 of the high frequency power. Therefore, deterioration of electrical characteristics (increase in flat band shift) in the silicon-based insulating film can be suppressed, and the surface coverage can be improved.
- the gate insulating film can be thinned, and the electrical characteristics of the TFT can be improved.
- the frequency of the high frequency power is 27.12 MHz, and the on period T1 and the off period T2 are each 50 microseconds. Further, preferably, a pressure of 80 Pa ⁇ 300 Pa of vacuum chamber 11 at the time of film formation, the power density of the upper electrode 13 is 0.1W / cm 2 ⁇ 1.0W / cm 2.
- the dependency of the duty ratio on the surface coverage and the dependency of the duty ratio on the flat band voltage can be more reliably uniformed. That is, by reducing the duty ratio of the high-frequency power, the surface coverage of the silicon-based insulating film can be improved more reliably. By increasing the duty ratio of the high-frequency power, the flat-band voltage of the silicon-based insulating film Can be brought closer to 0V more reliably. Therefore, deterioration of electrical characteristics in the silicon-based insulating film can be suppressed, and the surface coverage can be reliably improved.
- the duty ratio of the pulsed high-frequency power is not limited to the maximum duty ratio that satisfies the target coverage of the silicon-based insulating film.
- the duty ratio range that satisfies the target coverage of the silicon-based insulating film is 30% to 50%, and the flat band voltage of the silicon-based insulating film is maintained within a predetermined voltage range (for example, ⁇ 2 V to 0 V).
- the duty ratio range is 40% to 50%
- the duty ratio of the pulsed high frequency power may be set within the range of 40% to 50%.
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Abstract
Description
成膜装置10がシリコン系絶縁膜を成膜するとき、真空槽11内のプラズマ空間には、各種のイオンと各種のラジカルとが生成される。ラジカルの寿命が数ミリ秒~数十ミリ秒であるのに対し、イオンの寿命が数マイクロ秒~数十マイクロ秒であることから、高周波電力のオフ期間T2には、イオンが消滅し、あるいは、大幅に減少し、ラジカルによる成膜が支配的になる。そのため、高周波電力のオフ期間には、ラジカルによる流動性の高い成膜種、例えば、有機シリコン化合物のオリゴマーがシリコン系絶縁膜として成長し、基板表面の凸部には、高い表面被覆率の下でシリコン系絶縁膜が成長する。一方、高周波電力のオン期間T1には、高いプラズマ密度下における成膜種がシリコン系絶縁膜として成長し、基板表面の凸部には、不純物が少なく、電気的に良質なシリコン系絶縁膜が成長する。
(実施例)
次に、目標デューティー比の設定方法を実施例に基づいて以下に説明する。まず、以下の成膜条件から得られるシリコン酸化膜をゲート絶縁膜として用いてMOS構造のダイオードを作成し、該ダイオードのCVカーブを計測することによって、実施例におけるフラットバンド電圧を得た。また、同じ成膜条件から得られるシリコン酸化膜を擬似パターンPの上に成膜し、擬似パターンPの側壁に成膜されるシリコン酸化膜の膜厚を側膜厚Tsとし、擬似パターンPの上面壁に成膜されるシリコン酸化膜Fの膜厚を上膜厚Ttとして、各シリコン酸化膜の表面被覆率((側膜厚Ts/上膜厚Tt)×100%)を得た。なお、擬似パターンPには、図2に示すように、幅W×高さHが0.4μm×0.6μmであって、一方向(図2の紙面に垂直な方向)に延びるラインパターンを用いた。
・高周波周波数:27.12MHz
・オン期間T1+オフ期間T2:100マイクロ秒
・デューティー比:30%、50%、70%、100%
・電力密度:0.5W/cm2
・成膜圧力:190Pa
・成膜温度:340℃
・TEOS流量/O2流量:1/50
(1)シリコン系絶縁膜の表面被覆率が目標被覆率を満たすデューティー比の範囲を予め求め、その範囲内における最大値を、パルス波の目標デューティー比として設定する。
Claims (5)
- 真空槽内に配置された基板上にシリコン系絶縁膜を成膜する成膜方法であって、
有機シラン化合物と酸化ガスとを含む混合ガスを前記真空槽に供給すること、
高周波電力を間欠的に供給するためのパルス状高周波電力を生成すること、
前記パルス状高周波電力を用いて前記混合ガスをプラズマ化することにより、前記基板上に前記シリコン系絶縁膜を成膜すること、
を備え、前記パルス状高周波電力を生成することは、前記シリコン系絶縁膜の表面被覆率の目標値を満たすデューティー比のうち最大のデューティー比で前記パルス状高周波電力を生成することを含む、ことを特徴とする成膜方法。 - 真空槽内に配置された基板上にシリコン系絶縁膜を成膜する成膜方法であって、
有機シラン化合物と酸化ガスとを含む混合ガスを前記真空槽に供給すること、
高周波電力を間欠的に供給するためのパルス状高周波電力を生成すること、
前記パルス状高周波電力を用いて前記混合ガスをプラズマ化することにより、前記基板上に前記シリコン系絶縁膜を成膜すること、
を備え、前記パルス状高周波電力を生成することは、前記シリコン系絶縁膜の表面被覆率の目標値を満たすデューティー比のうち、前記シリコン系絶縁膜のフラットバンド電圧を所定の電圧範囲内に維持するデューティー比で前記パルス状高周波電力を生成することを含む、ことを特徴とする成膜方法。 - 請求項1又は2に記載の成膜方法は更に、
前記シリコン系絶縁膜の実成膜に先立って、複数の基板に前記シリコン系絶縁膜の成膜処理を予備的に施すことを備え、
前記シリコン系絶縁膜の成膜処理を予備的に施すことは、異なるデューティー比を有するパルス状高周波電力を用いて前記複数の基板の各々に前記シリコン系絶縁膜を形成し、各基板上に形成された前記シリコン系絶縁膜の表面被覆率から、前記表面被覆率の目標値を満たすデューティー比の範囲を判定することを含む、ことを特徴とする成膜方法。 - 請求項1又は2に記載の成膜方法において、
前記高周波電力の周波数が27.12MHzであり、
前記パルス状高周波電力の1サイクル内においてオン期間とオフ期間とがそれぞれ50マイクロ秒であることを特徴とする成膜方法。 - 請求項4に記載の成膜方法において、
前記シリコン系絶縁膜の成膜時における前記真空槽の圧力が80Pa~300Paであり、
前記パルス状高周波電力の電力密度が0.1W/cm2~1.0W/cm2であることを特徴とする成膜方法。
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JPH08279505A (ja) * | 1995-04-07 | 1996-10-22 | Ulvac Japan Ltd | 絶縁膜の形成方法 |
JP2002198364A (ja) * | 2000-12-25 | 2002-07-12 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
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