WO2009060627A1 - 符号化方法および送信装置 - Google Patents

符号化方法および送信装置 Download PDF

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Publication number
WO2009060627A1
WO2009060627A1 PCT/JP2008/003240 JP2008003240W WO2009060627A1 WO 2009060627 A1 WO2009060627 A1 WO 2009060627A1 JP 2008003240 W JP2008003240 W JP 2008003240W WO 2009060627 A1 WO2009060627 A1 WO 2009060627A1
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WO
WIPO (PCT)
Prior art keywords
encoding method
bidiagonal
column
matrix
inspection
Prior art date
Application number
PCT/JP2008/003240
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English (en)
French (fr)
Inventor
Chao Chen
Hao Jiang
Ming Xu
Kenichi Kuri
Akihiko Nishio
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Priority to US12/741,752 priority Critical patent/US20100251062A1/en
Priority to JP2009539970A priority patent/JPWO2009060627A1/ja
Publication of WO2009060627A1 publication Critical patent/WO2009060627A1/ja

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148Structural properties of the code parity-check or generator matrix
    • H03M13/116Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148Structural properties of the code parity-check or generator matrix
    • H03M13/118Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H03M13/1188Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63Joint error correction and other techniques
    • H03M13/635Error control coding in combination with rate matching
    • H03M13/6362Error control coding in combination with rate matching by puncturing
    • H03M13/6368Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
    • H03M13/6393Rate compatible low-density parity check [LDPC] codes

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  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)

Abstract

 本発明は、LDPC符号の検査行列において設定した拡散符号の符号化率1/k(ただし、k=3,4,5,…,k0であり、1/k0は前記拡散符号の最小符号化率である)に基づいて、m行n列の基本行列の双対角線を双対角線の方向に伸長して、双対角線構造の拡張行列を構成する工程と、(i*m+1)行目のパリティビット部分の1つ目の非ゼロ要素を当該行に沿って(n-m+1)列目(ただし、i=1,2,…,k0-2)まで左方向に移動する工程と、第1の検査関係を起動因子として(n-m+1)列目のパリティビットを計算する工程と、(n-m+1)列目まで左方向に移動した検査関係を利用して、再帰的符号化方式により、複数グループのパリティビットを同時に計算する工程と、を含む符号化方法を提供する。
PCT/JP2008/003240 2007-11-09 2008-11-07 符号化方法および送信装置 WO2009060627A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US12/741,752 US20100251062A1 (en) 2007-11-09 2008-11-07 Encoding method and transmission device
JP2009539970A JPWO2009060627A1 (ja) 2007-11-09 2008-11-07 符号化方法および送信装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN200710186026.X 2007-11-09
CNA200710186026XA CN101431337A (zh) 2007-11-09 2007-11-09 提高编码并行度实现降低编码时延的方法

Publications (1)

Publication Number Publication Date
WO2009060627A1 true WO2009060627A1 (ja) 2009-05-14

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US (1) US20100251062A1 (ja)
JP (1) JPWO2009060627A1 (ja)
CN (1) CN101431337A (ja)
WO (1) WO2009060627A1 (ja)

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WO2015120719A1 (zh) * 2014-02-12 2015-08-20 中兴通讯股份有限公司 信息处理方法及装置
CN107733440A (zh) * 2016-08-12 2018-02-23 中兴通讯股份有限公司 多边类型结构化ldpc处理方法及装置
JP2019517209A (ja) * 2016-05-13 2019-06-20 中興通訊股▲ふん▼有限公司Zte Corporation 構造的ldpcの符号化、復号化方法および装置
JP2019537378A (ja) * 2016-11-30 2019-12-19 華為技術有限公司Huawei Technologies Co.,Ltd. 符号化および変調方法ならびに通信装置
CN114268326A (zh) * 2021-12-06 2022-04-01 西安空间无线电技术研究所 一种自适应qc-ldpc码的确定性构造方法

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US8539304B1 (en) 2010-04-27 2013-09-17 Marvell International Ltd. Parallel encoder for low-density parity-check (LDPC) codes
WO2013032156A1 (en) * 2011-08-30 2013-03-07 Samsung Electronics Co., Ltd. Method and apparatus for transmitting and receiving information in a broadcasting/communication system
CN102386933B (zh) * 2011-11-11 2013-04-24 中国科学院上海微系统与信息技术研究所 一种准循环ldpc码校验矩阵的构造方法
WO2013097174A1 (zh) 2011-12-30 2013-07-04 华为技术有限公司 前向纠错编、解码方法、装置及系统
CN102843151A (zh) * 2012-09-27 2012-12-26 苏州威士达信息科技有限公司 一种低延时的cmmb中ldpc并行编码器和编码方法
CN102843146A (zh) * 2012-09-27 2012-12-26 苏州威士达信息科技有限公司 一种低延时的深空通信中ldpc并行编码器和编码方法
US10193570B2 (en) 2013-12-03 2019-01-29 Samsung Electronics Co., Ltd Method of and apparatus for generating spatially-coupled low-density parity-check code
CN104092536B (zh) * 2014-05-24 2018-02-16 中国人民解放军信息工程大学 便于硬件实现的量子密钥分发中的信息协调方法
CN104967455B (zh) * 2015-07-09 2018-02-23 北京邮电大学 空间耦合低密度奇偶校验码的递归编码方法
EP3232574A1 (en) * 2016-04-14 2017-10-18 Xieon Networks S.à r.l. A decoder for a family of rate compatible low-density parity check (ldpc) codes
CN116683917A (zh) * 2016-09-30 2023-09-01 中兴通讯股份有限公司 准循环ldpc编译码方法、装置及ldpc编译码器
WO2018084732A1 (en) * 2016-11-01 2018-05-11 Huawei Technologies Co., Ltd Ldpc codes for incremental redundancy harq (ir-harq) schemes
WO2018227681A1 (zh) 2017-06-15 2018-12-20 华为技术有限公司 信息处理的方法和通信装置
CN110677157B (zh) 2017-06-27 2023-02-07 华为技术有限公司 信息处理的方法、装置和通信设备
CN109150197B (zh) * 2017-06-27 2024-05-14 华为技术有限公司 信息处理的方法、装置和通信设备
EP3718216A1 (en) 2017-12-15 2020-10-07 Huawei Technologies Co., Ltd. Design of base parity-check matrices for ldpc codes that have subsets of orthogonal rows
US11588578B2 (en) 2019-12-13 2023-02-21 Samsung Electronics Co., Ltd. System and method for encoding data using punctured low-density parity-check codes

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WO2015120719A1 (zh) * 2014-02-12 2015-08-20 中兴通讯股份有限公司 信息处理方法及装置
JP2019517209A (ja) * 2016-05-13 2019-06-20 中興通訊股▲ふん▼有限公司Zte Corporation 構造的ldpcの符号化、復号化方法および装置
US10892778B2 (en) 2016-05-13 2021-01-12 Zte Corporation Encoding method and device and decoding method and device for structured LDPC
JP7025349B2 (ja) 2016-05-13 2022-02-24 中興通訊股▲ふん▼有限公司 構造的ldpcの符号化、復号化方法および装置
JP2022058949A (ja) * 2016-05-13 2022-04-12 中興通訊股▲ふん▼有限公司 構造的ldpcの符号化、復号化方法および装置
JP7372369B2 (ja) 2016-05-13 2023-10-31 中興通訊股▲ふん▼有限公司 構造的ldpcの符号化、復号化方法および装置
CN107733440A (zh) * 2016-08-12 2018-02-23 中兴通讯股份有限公司 多边类型结构化ldpc处理方法及装置
CN107733440B (zh) * 2016-08-12 2022-12-02 中兴通讯股份有限公司 多边类型结构化ldpc处理方法及装置
JP2019537378A (ja) * 2016-11-30 2019-12-19 華為技術有限公司Huawei Technologies Co.,Ltd. 符号化および変調方法ならびに通信装置
US10917117B2 (en) 2016-11-30 2021-02-09 Huawei Technologies Co., Ltd. Encoding and modulation method and communications apparatus
CN114268326A (zh) * 2021-12-06 2022-04-01 西安空间无线电技术研究所 一种自适应qc-ldpc码的确定性构造方法

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US20100251062A1 (en) 2010-09-30
JPWO2009060627A1 (ja) 2011-03-17
CN101431337A (zh) 2009-05-13

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