WO2008093717A1 - 無線通信装置およびパンクチャリング方法 - Google Patents

無線通信装置およびパンクチャリング方法 Download PDF

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Publication number
WO2008093717A1
WO2008093717A1 PCT/JP2008/051383 JP2008051383W WO2008093717A1 WO 2008093717 A1 WO2008093717 A1 WO 2008093717A1 JP 2008051383 W JP2008051383 W JP 2008051383W WO 2008093717 A1 WO2008093717 A1 WO 2008093717A1
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WIPO (PCT)
Prior art keywords
puncturing
unit
ldpc code
code word
inspection matrix
Prior art date
Application number
PCT/JP2008/051383
Other languages
English (en)
French (fr)
Inventor
Kenichi Kuri
Akihiko Nishio
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Priority to US12/524,680 priority Critical patent/US20100107033A1/en
Priority to JP2008556140A priority patent/JPWO2008093717A1/ja
Publication of WO2008093717A1 publication Critical patent/WO2008093717A1/ja

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6362—Error control coding in combination with rate matching by puncturing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0067—Rate matching
    • H04L1/0068—Rate matching by puncturing
    • H04L1/0069—Puncturing patterns

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

　誤り訂正符号にＬＤＰＣ符号を用いた場合に、パンクチャリングによる誤り率特性の劣化を最小限に抑えることができる無線通信装置。この装置において、ＬＤＰＣ符号化部１０１は、検査行列を用いて、送信ビット列に対してＬＤＰＣ符号化を行い、システマチックビットとパリティビットとから成るＬＤＰＣ符号語を得る。このＬＤＰＣ符号語は、パンクチャリング部１０２に出力される。また、ＬＤＰＣ符号化部１０１は、検査行列をパンクチャリング部１０２に出力する。パンクチャリング部１０２は、ＬＤＰＣ符号語において、検査行列の列重みがより小さいパリティビットから順に、かつ、列重みが同じ複数のパリティビットがある場合は検査行列の行重みがより大きいチェックノードと接続された変数ノードに対応するパリティビットから順に、パリティビットをパンクチャリングし、パンクチャリング後のＬＤＰＣ符号語を変調部１０３に出力する。
PCT/JP2008/051383 2007-01-31 2008-01-30 無線通信装置およびパンクチャリング方法 WO2008093717A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US12/524,680 US20100107033A1 (en) 2007-01-31 2008-01-30 Radio communication device and puncturing method
JP2008556140A JPWO2008093717A1 (ja) 2007-01-31 2008-01-30 無線通信装置およびパンクチャリング方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-022031 2007-01-31
JP2007022031 2007-01-31

Publications (1)

Publication Number Publication Date
WO2008093717A1 true WO2008093717A1 (ja) 2008-08-07

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US (1) US20100107033A1 (ja)
JP (1) JPWO2008093717A1 (ja)
WO (1) WO2008093717A1 (ja)

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WO2010041466A1 (ja) * 2008-10-10 2010-04-15 パナソニック株式会社 符号化器、送信装置及び符号化方法
WO2014122772A1 (ja) * 2013-02-08 2014-08-14 三菱電機株式会社 誤り訂正符号の検査行列のデータ構造、並びに誤り訂正符号の符号化率可変装置および可変方法

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US20100107033A1 (en) 2010-04-29
JPWO2008093717A1 (ja) 2010-05-20

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