WO2009050821A1 - 半導体集積回路装置の動作周波数決定装置および決定方法ならびに決定プログラム - Google Patents

半導体集積回路装置の動作周波数決定装置および決定方法ならびに決定プログラム Download PDF

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Publication number
WO2009050821A1
WO2009050821A1 PCT/JP2007/070462 JP2007070462W WO2009050821A1 WO 2009050821 A1 WO2009050821 A1 WO 2009050821A1 JP 2007070462 W JP2007070462 W JP 2007070462W WO 2009050821 A1 WO2009050821 A1 WO 2009050821A1
Authority
WO
WIPO (PCT)
Prior art keywords
operation delay
unit operation
delay verification
packaging
cost
Prior art date
Application number
PCT/JP2007/070462
Other languages
English (en)
French (fr)
Inventor
Noriyuki Ito
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to PCT/JP2007/070462 priority Critical patent/WO2009050821A1/ja
Priority to JP2009537836A priority patent/JP5104873B2/ja
Publication of WO2009050821A1 publication Critical patent/WO2009050821A1/ja
Priority to US12/662,338 priority patent/US7855572B2/en

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3016—Delay or race condition test, e.g. race hazard test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31718—Logistic aspects, e.g. binning, selection, sorting of devices under test, tester/handler interaction networks, Test management software, e.g. software for test statistics or test evaluation, yield analysis

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

　半導体集積回路装置の製造工程におけるパッケージング前のチップ毎にその動作遅延を検証する単体動作遅延検証工程において適用する単体動作遅延測定周波数を決定する単体動作遅延検証周波数を決定するため、単体動作遅延検証工程に要される単体動作遅延検証費用を求め、単体動作遅延検証工程では否定的な結果が得られるがパッケージング後の動作遅延の検証工程における検証では肯定的な結果が得られものについて生ずるオーバーキル損失額を求め、単体動作遅延検証工程で否定的な結果が得られ且つ前記パッケージング後の動作遅延の検証工程における検証でも否定的な結果が得られるものについて削減可能なパッケージング以降の費用を求め、パッケージング以降の費用から単体動作遅延検証費用およびオーバーキル損失額を差し引いて得られる単体動作遅延検証時費用削減分が最大になると見なされる前記単体動作遅延検証周波数の値を求める。
PCT/JP2007/070462 2007-10-19 2007-10-19 半導体集積回路装置の動作周波数決定装置および決定方法ならびに決定プログラム WO2009050821A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
PCT/JP2007/070462 WO2009050821A1 (ja) 2007-10-19 2007-10-19 半導体集積回路装置の動作周波数決定装置および決定方法ならびに決定プログラム
JP2009537836A JP5104873B2 (ja) 2007-10-19 2007-10-19 半導体集積回路装置の動作周波数決定装置および決定方法ならびに決定プログラム
US12/662,338 US7855572B2 (en) 2007-10-19 2010-04-12 Semiconductor integrated circuit device operating frequency determining apparatus, determining method and computer-readable information recording medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/070462 WO2009050821A1 (ja) 2007-10-19 2007-10-19 半導体集積回路装置の動作周波数決定装置および決定方法ならびに決定プログラム

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/662,338 Continuation US7855572B2 (en) 2007-10-19 2010-04-12 Semiconductor integrated circuit device operating frequency determining apparatus, determining method and computer-readable information recording medium

Publications (1)

Publication Number Publication Date
WO2009050821A1 true WO2009050821A1 (ja) 2009-04-23

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/070462 WO2009050821A1 (ja) 2007-10-19 2007-10-19 半導体集積回路装置の動作周波数決定装置および決定方法ならびに決定プログラム

Country Status (3)

Country Link
US (1) US7855572B2 (ja)
JP (1) JP5104873B2 (ja)
WO (1) WO2009050821A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113097093A (zh) * 2021-04-12 2021-07-09 英特尔产品（成都）有限公司 用于翘曲度监测的方法和装置

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102071735B1 (ko) * 2012-03-19 2020-01-30 케이엘에이 코포레이션 반도체 소자의 자동화 검사용 레시피 생성을 위한 방법, 컴퓨터 시스템 및 장치
US9194912B2 (en) * 2012-11-29 2015-11-24 International Business Machines Corporation Circuits for self-reconfiguration or intrinsic functional changes of chips before vs. after stacking
US10565702B2 (en) 2017-01-30 2020-02-18 Dongfang Jingyuan Electron Limited Dynamic updates for the inspection of integrated circuits
CN116581043B (zh) * 2023-04-20 2023-12-12 深圳市晶存科技有限公司 芯片分类方法、装置、电子设备及计算机可读存储介质

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003004818A (ja) * 2001-06-26 2003-01-08 Mitsubishi Electric Corp 半導体集積回路およびテスト方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003043109A (ja) 2001-07-30 2003-02-13 Nec Corp 半導体集積回路装置及びその試験装置
US7112979B2 (en) * 2002-10-23 2006-09-26 Intel Corporation Testing arrangement to distribute integrated circuits
JP2005083895A (ja) 2003-09-09 2005-03-31 Matsushita Electric Ind Co Ltd 半導体装置のテスト方法
JP2005257654A (ja) 2004-02-13 2005-09-22 Handotai Rikougaku Kenkyu Center:Kk 回路の品質判定方法および品質判定装置、並びに、回路の品質判定プログラムおよび該プログラムを記録した媒体
KR100765180B1 (ko) 2005-03-11 2007-10-15 삼성전기주식회사 적층 세라믹 콘덴서 및 그 제조 방법
US7528622B2 (en) * 2005-07-06 2009-05-05 Optimal Test Ltd. Methods for slow test time detection of an integrated circuit during parallel testing

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003004818A (ja) * 2001-06-26 2003-01-08 Mitsubishi Electric Corp 半導体集積回路およびテスト方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113097093A (zh) * 2021-04-12 2021-07-09 英特尔产品（成都）有限公司 用于翘曲度监测的方法和装置
CN113097093B (zh) * 2021-04-12 2024-05-10 英特尔产品（成都）有限公司 用于翘曲度监测的方法和装置

Also Published As

Publication number Publication date
JP5104873B2 (ja) 2012-12-19
US20100194422A1 (en) 2010-08-05
US7855572B2 (en) 2010-12-21
JPWO2009050821A1 (ja) 2011-02-24

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