WO2009047844A1 - 試験装置、試験方法、およびプログラム - Google Patents

試験装置、試験方法、およびプログラム Download PDF

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Publication number
WO2009047844A1
WO2009047844A1 PCT/JP2007/069764 JP2007069764W WO2009047844A1 WO 2009047844 A1 WO2009047844 A1 WO 2009047844A1 JP 2007069764 W JP2007069764 W JP 2007069764W WO 2009047844 A1 WO2009047844 A1 WO 2009047844A1
Authority
WO
WIPO (PCT)
Prior art keywords
output signal
device output
outputted
comparison
signal
Prior art date
Application number
PCT/JP2007/069764
Other languages
English (en)
French (fr)
Inventor
Yoshihito Nagata
Naoyoshi Watanabe
Original Assignee
Advantest Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corporation filed Critical Advantest Corporation
Priority to PCT/JP2007/069764 priority Critical patent/WO2009047844A1/ja
Priority to JP2009536885A priority patent/JP5066189B2/ja
Publication of WO2009047844A1 publication Critical patent/WO2009047844A1/ja

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31703—Comparison aspects, e.g. signature analysis, comparators
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G01R31/31932—Comparators

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

　被試験デバイスを試験する試験装置であって、被試験デバイスが出力するデバイス出力信号の期待値を発生し、デバイス出力信号と期待値とを比較すべき試験サイクルにおいて比較イネーブル信号を出力するパターン発生部と、デバイス出力信号を取得すべきタイミングを示すストローブ信号を発生するタイミング発生部と、比較イネーブル信号が出力されたことを条件として、デバイス出力信号と期待値とを比較する論理比較部と、ストローブ信号が発生されず、または、比較イネーブル信号が出力されないことを条件として、当該試験サイクルが、論理比較が行われないフリーパスサイクルであることを検出するフリーパス検出部と、を備える試験装置を提供する。
PCT/JP2007/069764 2007-10-10 2007-10-10 試験装置、試験方法、およびプログラム WO2009047844A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/JP2007/069764 WO2009047844A1 (ja) 2007-10-10 2007-10-10 試験装置、試験方法、およびプログラム
JP2009536885A JP5066189B2 (ja) 2007-10-10 2007-10-10 試験装置、試験方法、およびプログラム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/069764 WO2009047844A1 (ja) 2007-10-10 2007-10-10 試験装置、試験方法、およびプログラム

Publications (1)

Publication Number Publication Date
WO2009047844A1 true WO2009047844A1 (ja) 2009-04-16

Family

ID=40548999

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/069764 WO2009047844A1 (ja) 2007-10-10 2007-10-10 試験装置、試験方法、およびプログラム

Country Status (2)

Country Link
JP (1) JP5066189B2 (ja)
WO (1) WO2009047844A1 (ja)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05274386A (ja) * 1992-03-26 1993-10-22 Ricoh Co Ltd 論理回路シミュレ−ション結果表示装置
JPH11295393A (ja) * 1998-04-14 1999-10-29 Advantest Corp 半導体試験用プログラムのデバッグ装置
JP2000200499A (ja) * 1999-01-06 2000-07-18 Advantest Corp 半導体デバイス試験装置
JP2001255357A (ja) * 2000-01-07 2001-09-21 Advantest Corp テストパターン妥当性検証方法及びその装置
JP2004028591A (ja) * 2002-06-21 2004-01-29 Shibasoku:Kk 試験装置及び波形表示方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05274386A (ja) * 1992-03-26 1993-10-22 Ricoh Co Ltd 論理回路シミュレ−ション結果表示装置
JPH11295393A (ja) * 1998-04-14 1999-10-29 Advantest Corp 半導体試験用プログラムのデバッグ装置
JP2000200499A (ja) * 1999-01-06 2000-07-18 Advantest Corp 半導体デバイス試験装置
JP2001255357A (ja) * 2000-01-07 2001-09-21 Advantest Corp テストパターン妥当性検証方法及びその装置
JP2004028591A (ja) * 2002-06-21 2004-01-29 Shibasoku:Kk 試験装置及び波形表示方法

Also Published As

Publication number Publication date
JP5066189B2 (ja) 2012-11-07
JPWO2009047844A1 (ja) 2011-02-17

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