WO2009031377A1 - 二重自己整合プロセスによる多重チャネル自己整合トランジスタ及びその製造方法 - Google Patents
二重自己整合プロセスによる多重チャネル自己整合トランジスタ及びその製造方法 Download PDFInfo
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- WO2009031377A1 WO2009031377A1 PCT/JP2008/063887 JP2008063887W WO2009031377A1 WO 2009031377 A1 WO2009031377 A1 WO 2009031377A1 JP 2008063887 W JP2008063887 W JP 2008063887W WO 2009031377 A1 WO2009031377 A1 WO 2009031377A1
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- H—ELECTRICITY
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
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- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/484—Insulated gate field-effect transistors [IGFETs] characterised by the channel regions
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/491—Vertical transistors, e.g. vertical carbon nanotube field effect transistors [CNT-FETs]
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- H10K19/10—Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00 comprising field-effect transistors
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- H10K85/10—Organic polymers or oligomers
- H10K85/111—Organic polymers or oligomers comprising aromatic, heteroaromatic, or aryl chains, e.g. polyaniline, polyphenylene or polyphenylene vinylene
- H10K85/113—Heteroaromatic compounds comprising sulfur or selene, e.g. polythiophene
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- H10K85/10—Organic polymers or oligomers
- H10K85/111—Organic polymers or oligomers comprising aromatic, heteroaromatic, or aryl chains, e.g. polyaniline, polyphenylene or polyphenylene vinylene
- H10K85/114—Poly-phenylenevinylene; Derivatives thereof
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- H10K85/649—Aromatic compounds comprising a hetero atom
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- H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
- H10K85/60—Organic compounds having low molecular weight
- H10K85/649—Aromatic compounds comprising a hetero atom
- H10K85/655—Aromatic compounds comprising a hetero atom comprising only sulfur as heteroatom
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Nanotechnology (AREA)
- Thin Film Transistor (AREA)
Abstract
二度の背面露光を用いることで、ゲート、ドレイン及びソース電極の位置を順次決定し、櫛形ゲート電極を用いた縦形構造でマルチ・短チャネル化を図ることができる二重自己整合プロセスによる多重チャネル自己整合トランジスタとその製造方法を提供する。 二重自己整合プロセスによる多重チャネル自己整合トランジスタにおいて、基板(10)上に櫛形に加工された不透明ゲート電極(11)と、その上に積層された絶縁膜(21)と、前記櫛形に加工された不透明ゲート電極(11)との間に、前記基板(10)側からの1回目の背面露光によって形成される透明ドレイン電極(12)と、その上に積層される絶縁膜(21a)と前記櫛形に加工された不透明ゲート電極(11)の上方に前記基板(10)側からの2回目の背面露光によって形成される透明ソース電極(13)と、その上に積層される半導体(31)を有する。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009531164A JP5403614B2 (ja) | 2007-09-03 | 2008-08-01 | 二重自己整合プロセスによる多重チャネル自己整合トランジスタ及びその製造方法 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP2007228080 | 2007-09-03 | ||
JP2007-228080 | 2007-09-03 |
Publications (1)
Publication Number | Publication Date |
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WO2009031377A1 true WO2009031377A1 (ja) | 2009-03-12 |
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PCT/JP2008/063887 WO2009031377A1 (ja) | 2007-09-03 | 2008-08-01 | 二重自己整合プロセスによる多重チャネル自己整合トランジスタ及びその製造方法 |
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JP (1) | JP5403614B2 (ja) |
WO (1) | WO2009031377A1 (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013062533A (ja) * | 2009-11-27 | 2013-04-04 | Semiconductor Energy Lab Co Ltd | 非線形素子 |
US8916869B2 (en) | 2009-11-06 | 2014-12-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device including an oxide semiconductor layer |
US9425226B2 (en) | 2014-03-13 | 2016-08-23 | Semiconductor Energy Laboratory Co., Ltd. | Imaging device |
US9905598B2 (en) | 2014-04-23 | 2018-02-27 | Semiconductor Energy Laboratory Co., Ltd. | Imaging device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01152763A (ja) * | 1987-09-09 | 1989-06-15 | Natl Res Dev Corp | 半導体装置の製造方法 |
JP2004349292A (ja) * | 2003-05-20 | 2004-12-09 | Sony Corp | 電界効果型トランジスタ及びその製造方法 |
JP2005019446A (ja) * | 2003-06-23 | 2005-01-20 | Sharp Corp | 電界効果トランジスタおよびその製造方法 |
-
2008
- 2008-08-01 WO PCT/JP2008/063887 patent/WO2009031377A1/ja active Application Filing
- 2008-08-01 JP JP2009531164A patent/JP5403614B2/ja not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01152763A (ja) * | 1987-09-09 | 1989-06-15 | Natl Res Dev Corp | 半導体装置の製造方法 |
JP2004349292A (ja) * | 2003-05-20 | 2004-12-09 | Sony Corp | 電界効果型トランジスタ及びその製造方法 |
JP2005019446A (ja) * | 2003-06-23 | 2005-01-20 | Sharp Corp | 電界効果トランジスタおよびその製造方法 |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8916869B2 (en) | 2009-11-06 | 2014-12-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device including an oxide semiconductor layer |
US9331112B2 (en) | 2009-11-06 | 2016-05-03 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device including an oxide semiconductor layer |
US9773814B2 (en) | 2009-11-06 | 2017-09-26 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
JP2013062533A (ja) * | 2009-11-27 | 2013-04-04 | Semiconductor Energy Lab Co Ltd | 非線形素子 |
US9425226B2 (en) | 2014-03-13 | 2016-08-23 | Semiconductor Energy Laboratory Co., Ltd. | Imaging device |
US9711549B2 (en) | 2014-03-13 | 2017-07-18 | Semiconductor Energy Laboratory Co., Ltd. | Imaging device |
US9905598B2 (en) | 2014-04-23 | 2018-02-27 | Semiconductor Energy Laboratory Co., Ltd. | Imaging device |
Also Published As
Publication number | Publication date |
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JP5403614B2 (ja) | 2014-01-29 |
JPWO2009031377A1 (ja) | 2010-12-09 |
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