WO2008157642A1 - Procédé d'émulsion photosensible automatisée pour la fabrication de circuits imprimés et de circuits imprimés multicouches - Google Patents

Procédé d'émulsion photosensible automatisée pour la fabrication de circuits imprimés et de circuits imprimés multicouches Download PDF

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Publication number
WO2008157642A1
WO2008157642A1 PCT/US2008/067405 US2008067405W WO2008157642A1 WO 2008157642 A1 WO2008157642 A1 WO 2008157642A1 US 2008067405 W US2008067405 W US 2008067405W WO 2008157642 A1 WO2008157642 A1 WO 2008157642A1
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WO
WIPO (PCT)
Prior art keywords
substrate
coating
imaging
printed circuit
coated
Prior art date
Application number
PCT/US2008/067405
Other languages
English (en)
Inventor
Steven Lee Dutton
Original Assignee
Steven Lee Dutton
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Steven Lee Dutton filed Critical Steven Lee Dutton
Priority to EP08771412A priority Critical patent/EP2165583A4/fr
Priority to CN2008801004040A priority patent/CN101785372B/zh
Priority to JP2010513391A priority patent/JP2010530646A/ja
Publication of WO2008157642A1 publication Critical patent/WO2008157642A1/fr

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • H05K3/182—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
    • H05K3/185—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method by making a catalytic pattern by photo-imaging
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4661—Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107—Using laser light
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15—Position of the PCB during processing
    • H05K2203/1545—Continuous processing, i.e. involving rolls moving a band-like or solid carrier along a continuous production path
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0008—Apparatus or processes for manufacturing printed circuits for aligning or positioning of tools relative to the circuit board
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0023—Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/105—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by conversion of non-conductive material on or in the support into conductive material, e.g. by using an energy beam
    • H05K3/106—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by conversion of non-conductive material on or in the support into conductive material, e.g. by using an energy beam by photographic methods
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4679—Aligning added circuit layers or via connections relative to previous circuit layers

Definitions

  • the present invention relates to printed circuit board technology and more particularly to a direct emulsion process for making multilayer printed circuits and an automated direct emulsion process for making printed circuits and multilayer printed circuits.
  • the direct emulsion process for making multilayer circuits includes a) coating a non-metallized substrate with a solution which creates a light sensitive surface on the substrate, b) imaging the coated substrate with a circuit design, c) developing the imaged substrate, d) directly plating the developed image onto the coated substrate, e) coating the plated substrate with a liquid photoimageable cover coat, f) imaging the coated plated substrate with a predesigned circuitry, g) developing the liquid photoimageable cover coat, and repeating steps a) through d). Steps e) through g) are then repeated followed by steps a) through d) until a desired number of layers is achieved for the multilayer circuit.
  • the present invention also relates to multilayer printed circuits which result from this method. Background of the Invention
  • One example of a prior art process for forming printed circuit boards includes the steps of creating a CAD/CAM design, sending data relating to the design to a photo plotter, photo plotting to a silver halide polyester film, developing an image from the sent data, cieating intermediate tools, scrubbing or cleaning substrate for imaging, coating the substrate with a dry film, imaging the substrate with the design, developing the image, etching the image, and then stripping the remaining dry film
  • This prior art process requires several steps and has limitations on the imaging, developing, and etching of fine line images With this process, fine line imaging can be consistently performed down to 003 inches Imaging of much finer lines, for example imaging fine lines down to 0025 inches, creates a problem and is inconsistent when using this prior art process
  • laminate must be purchased with copper adhered to a panel and this type of processing has inherent issues with undercutting and rough edges which can create "lossy" issues for high speed RF applications In other words, with this process, any rough protrusions or undercutting act like small antenna
  • the present invention is directed to a method for making multilayer printed circuits which eliminates the need for several processing steps used in prior art processes
  • the method for making multilayer printed circuits in accordance with the present invention includes the steps of a) coating a non-metallized substrate with a solution which creates a light sensitive surface on the substrate, b) imaging the coated substrate with a circuit design, c) developing the imaged substrate, d) directly plating the developed image onto the coated substrate, e) coating the plated substrate with a liquid photoimageable cover coat, f) imaging the coated plated substrate with a predesigned circuitry, g) developing the liquid photoimageable cover coat, and repeating steps a) through d) Steps e) through g) are then repeated followed by steps a) through d) until a desired number of layers is achieved for the multilayer circuit.
  • the step of coating a non-metallized substrate includes coating the non-metallized substrate with a ferric oxalate and palladium emulsion In another exemplary embodiment, the step of coating a non-metallized substrate includes coating the non-metallized substrate with a silver based emulsion.
  • the non-metallized substrate may include, but is not limited to, the following materials a liquid crystal polymer, a polyimide, a ceramic, a ceramic filled, a glass, a filled polytetrafluoroethylene, an unfilled polytetrafluoroethylene, a polytetrafluoroethylene woven glass, and a polytetrafluoroethylene non woven glass which is coated and an image of the desired circuit is then plated directly onto the coated substrate.
  • the step of imaging the coated substrate may include exposing the surface of the coated substrate to at least one of an ultraviolet light, a laser photo plotter, direct collimation imaging, and laser direct imaging.
  • the present invention is also directed to a multilayer printed circuit that is made in accordance with the above-described method where the multilayer printed circuit includes fine line images down to 2 microns, and in particular fine line images down to 2 microns with very thin copper
  • the present invention is also directed to an automated method for making a multilayer printed circuit which includes the steps of a) providing a roll of non-metallized substrate which is automatically unrolled and diiected through a number of coating, imaging, developing and plating stations, b) coating at least one of a top surface and bottom surface of the non-metallized substrate with a solution which creates a light sensitive surface on the substrate in a first coating station, c) imaging at least one of a top and bottom surface of the coated substrate with at least one predesigned circuitry by exposing at least one of the top and bottom surfaces of the coated substrate to a light source in a first imaging station, d) developing at least one of a top and bottom surface of the imaged substrate with one or more chemistries m a first developing station, e) directly plating at least one of a top and bottom surface of the developed image onto the substrate in a first plating station, f) coating at least one of a top and bottom surface of the plated substrate with a liquid photoimageable cover coat in
  • the automated method for making a multilayei printed circuit may also include the step of tool punching the non-metallized substrate prior to the step of coating the non- metallized substrate in order to aid in alignment of multiple layers of the multilayered printed circuit.
  • the step of coating at least one of a top surface and a bottom surface of the non-metallized substrate may include coating the non-metallized substrate with a ferric oxalate and palladium emulsion and the step of coating at least one of a top and bottom surface of the developed liquid photoimageable cover coat image may include coating the developed liquid photoimageable cover coat image with a ferric oxalate and palladium emulsion
  • Other coating solutions may also be used including, but not limited to, a silver nitrate based liquid, a silver chloride based with citric acid and a photosensitive gelatin, an iron based material, a chrome copper based material, a chrome nickel based material, an immersion gold material, and a platinum based material used m conjunction with palladium.
  • the automated method for making a multilayer printed circuit may also include automatically umolling the ioll of non-metallized substrate and directing it through a number of coating, imaging, developing and plating stations via a conveyer like system that passes through various stations.
  • the present invention also includes multilayer circuits made in accordance with the automated method for making a multilayer circuit of the present invention.
  • the present invention also includes an automated system for making a multilayer printed circuit which includes a first coating station containing a solution which creates a light sensitive surface on a substrate, a first imaging station containing at least one light source, a first developing station containing one or more chemistries, a first plating station containing an electroless solution, a second coating station containing a liquid photoimageable cover coat solution, a second imaging station containing at least one source of light, a second developing station containing one or more chemistries, a third coating station containing a solution which creates a light sensitive surface on a substrate, a third imaging station containing at least one light source, a third developing station containing one or more chemistries, and a second plating station containing an electroless solution.
  • the first and third coating stations preferably contain a ferric oxalate and palladium emulsion or a silvei based emulsion but may also include a number of other solutions including, but not limited to, a silver nitrate based liquid, a silver chloride based with citric acid and a photosensitive gelatin, an iron based material, a chrome copper based material, a chrome nickel based material, an immeision gold material, and a platinum based material used in conjunction with palladium Brief Description of the Drawings
  • Fig 1 is a schematic showing the prior art conventional piocess for laminating copper to a substrate
  • Fig 2 is a flow chart depicting a prior art process for making printed circuits and printed circuit boards
  • Fig 3 is a flow chart depicting an exemplary embodiment of the method of the present invention for fabricating printed circuits and printed circuit boards
  • Fig 4 is a flow chart depicting another exemplary embodiment of the method of the present invention for fabricating printed circuits and printed circuit boaids
  • Fig 5 is a flow chart depicting yet another exemplary embodiment of the method of the present invention for fabricating printed circuits and printed circuit boards
  • Fig 6 is a schematic showing an automated method for making a multilayer p ⁇ nted circuit in accordance with the present invention
  • Fig 7 is a perspective view of a multilayer printed circuit made in accordance with the method foi making a multilayer circuit of the present invention.
  • Fig 8 is a chart comparing the process steps for making a multilayer printed circuit using prior art conventional p ⁇ nted circuit board processing and direct emulsion processing of the piesent invention
  • Methods of the present invention for fabricating printed circuits and printed circuit boards generally include providing a non-metallized substrate, coating the non-metallized substrate, and imaging of a circuit design directly onto the coated substrate The imaged substrate may then be developed with one or more chemistries and processed by subjecting it to an electroless solution in order to create a printed circuit or printed circuit board having a metal image
  • any type of non- metallized substrate may be used as long as the substrate is uniform for imaging
  • a number of photosensitive chemicals may be used to coat the surface of the non-metallized substrate and that a variety of chemistries may be used to develop the imaged substrate
  • Fig 1 is a schematic showing the prior art conventional process 10 for laminating copper to a substrate.
  • a large lamination press 12 is used to laminate copper 14 to a substrate 16 thereby creating or inducing stress into the material during the lamination cycle.
  • This laminated material contracts or shrinks as it is exposed to heat during conventional printed circuit board processes.
  • the shrinking of the laminated material is unpredictable over the size of the panel or sheet of laminated material. Therefore, a process or method for making printed circuit boards which does not require the use of an initial metal laminated substrate is preferable
  • Fig 2 shows a flow chart 20 which depicts an exemplary prior art process for forming printed circuits and printed circuit boards.
  • the method begins with a copper clad laminate material in step 22 which is then chemically cleaned and laminated with a dry film resist m step 24. The chemical cleaning and dry film resist lamination induce further stress into the copper clad laminate.
  • a circuit is created with a CAD/CAM design in step 26 and the data relating to the circuit design is sent to a laser photo plotter in step 28.
  • step 29 the circuit design is photo plotted to a silver master and diazo working film such as, for example, a silver halide polyester film.
  • a photo image of the circuit is created on the copper clad laminate with a dry film resist in step 30 using the silver and diazo film or laser direct imaging of the circuit design.
  • the image of the circuit design is developed in step 31 using an aqueous dry film developer
  • the copper clad laminate is etched and stripped in step 32 to create a metal image of the circuit design.
  • the etched imaged laminate is then ready for oxide and lamination processing in step 33 to create a printed circuit.
  • Developing the imaged circuit on the copper clad laminate using aqueous dry film developer in step 31 creates a by product 36 which must be removed from the process Spent chemicals 37 from step 31 also need to be waste treated thereby resulting in increased costs and increased process times for making printed circuits
  • spent etchant 38 iesulting fiom etching and stripping the copper clad laminate m step 32 must be hauled away and chemicals 39 spent from this step must also be waste treated These too add to the increased costs and increased process times for making printed circuits.
  • the etching or subtractive process m step 32 allows for undercut and the inability to reach the line width and feature technology required for some applications.
  • a flow chart 40 depicts an exemplary embodiment of the method of the present invention for fabricating a printed circuit or printed circuit board.
  • a non-metallized substrate is coated in step 41.
  • a circuit design is created.
  • the data relating to the circuit design is then sent to a photo plotter or direct imaging equipment in step 43 and the image relating to the circuit design is directly plotted on the coated non-metallized substrate in step 44.
  • the image is not plotted to an intermediate silver halide polyester film or diazo.
  • the plotted or direct image of the circuit design is then developed in step 45 and the developed image is then processed in step 46 without the need for intermediate developing and etching processes.
  • a non-metallized pre -tooled substrate is provided in step 48 which is then coated in step 51.
  • the non-metallized pre-tooled substrate may comprise any substrate or bonding film known in the industry of printed circuit board technology as long as the substrate is flat and uniform for imaging.
  • the non-metallized substrate may be a liquid crystal polymer, a polyimide, a flat glass plate, a polyethylene terephthalate, a filled polytetrafluoroethylene, a unfilled polytetrafluoroethylene, a polytetrafluoroethylene woven glass, a polytetrafluoroethylene non woven glass, a low temperature cofired ceramic (LTCC), and a high temperature cofired ceramic (HTCC).
  • the substrates may be woven or non woven and ceramic filled or unfilled.
  • non-metallized substrate is coated in step 51 with a photosensitive chemical that is suitable for laser imaging.
  • a photosensitive chemical may include, but are not limited to, a silver nitrate based liquid, a silver chloride based with citric acid and photosensitive gelatin, an iron based material, a chrome copper based material, a chrome nickel based material, an electroless nickel, an immersion gold, a platinum based material, and palladium based material
  • the coated substrate is then baked until dry in step 49 In one exemplary embodiment, the coated substrate is baked at 40 degrees Celsius in a conventional oven or a conveyor oven for approximately 20 to 30 minutes
  • the circuitry for the printed circuit or printed circuit board is then designed m step 52 and the data relating to the circuit design is sent to a photo plotter oi laser direct imaging in step 54
  • the circuitry design is imaged onto the coated substrate using the photo plotter oi laser direct imager m step 56 and the tooling m the coated substrate is used as a reference guide during the imaging
  • a silver halide polyester film is not used for imaging
  • the coated substrate is placed directly on the photo plotter or laser direct imager for imaging
  • the method of the present invention for fabricating printed circuits and printed circuit boaids eliminates the need for a number of products, steps, and procedures including the need foi silver film, diazo film, dry film, liquid dry films, collimated or non-colhmated UV light sources, hot roll vacuum lamination
  • the image substrate is then developed with chemistries m step 58
  • chemistries such as any paper type developer like KODAK DEKTOL or NGS NAT 540 and FIXER NAT 750 may be used or EDTA based developer
  • the developed image is processed in step 60 with a copper bath to create the resulting punted circuit or printed circuit board This may include any standard electroless copper plating process used for circuit board hole metallization that is known in the art
  • a flow chart 70 depicting yet another exemplary embodiment of the method of the present invention for fabricating printed circuits and printed circuit boards is shown in Fig 5
  • the process begins with an unclad substrate in step 72
  • the unclad substrate is then prepaied with a direct emulsion process chemistry m step 74
  • Step 74 involves coating the unclad (or non-metallized) substrate with a solution which creates a light sensitive surface on the substrate
  • the solution preferably comprises a ferric oxalate and palladium emulsion oi a silver based emulsion
  • the solution may also include, but is not limited to, the following a silvei nitrate based liquid, a silver chloride based with citric acid and a photosensitive gelatin, an iron based material, a chrome copper based material, a chrome nickel based material, an immersion gold material, and a platinum based material used in conjunction with palladium.
  • a circuit is created with a CAD/CAM design in step 76 and the data relating to the circuit design is sent to a laser photo plotter in step 78.
  • the circuit design is photo plotted to a silver master and diazo working film.
  • the coated substrate from step 74 is then imaged with the circuit design in step 80 by exposing the surface of the coated substrate to a light source such as, for example, an ultraviolet source, a laser photo plotter, direct collimation imaging, or lasei direct imaging. Once the surface is exposed to light, the iron material from the ferric oxalate and palladium emulsion darkens or oxidizes thereby allowing the palladium particles to adhere to these exposed sites.
  • a light source such as, for example, an ultraviolet source, a laser photo plotter, direct collimation imaging, or lasei direct imaging.
  • the now exposed iron/palladium site remains and the unexposed areas are washed (developed) away leaving a darkened image on the substrate.
  • the imaged substrate is developed with one or more chemistries in step 81 which may include a low cost developer for the direct emulsion process chemistry used in step 74. Other chemistries may also be used such as any paper type developer like KODAK DEKTOL or NGS NAT 540 and FIXER NAT 750 may be used or EDTA based developer.
  • the developed image is directly plated onto the substrate.
  • Step 82 of diiectly plating the developed image onto the substrate may include the step of passing the developed substrate through an electroless solution to enable a metal to adhere to the developed image thereby creating a metal image on the substrate.
  • the imaged and plated laminate is then ready for oxide and lamination processing in step 83 to create a printed circuit.
  • the method for making printed circuit boards in accordance with the present invention and described with reference to Fig. 3 creates efficiencies and eliminates waste thereby reducing costs and process times for making printed circuits.
  • the developing solution (chemistry) used in step 81 can be reclaimed 86 and no etching is lequired 88 when the developed image is directly plated onto the substrate in step 82
  • eliminating the need for copper on the substrate and the need for dry film, dry film coating, dry film developing, etching and dry film stripping significantly reduces stress in the laminate thereby improving registration of the layers from top to bottom.
  • Fig. 6 is a schematic showing an automated method 100 for making a multilayer printed circuit in accordance with the present invention.
  • a roll of non-metallized substrate 102 is passed through a first station 104 where the non-metallized substrate is tool punched to aid in aligning multiple layers of a multi-layered printed circuit.
  • the tool punched non- metallized substrate is then coated in station 106 with a solution which creates a light sensitive surface on the substrate.
  • the non-metallized substrate may be spray coated on its top and/or bottom surface with the coating solution.
  • the coated substrate is then imaged in station 108 with a pre-designed circuitry by exposing the surface of the coated substrate to a light source. Both the top and/or bottom surfaces of the coated substrate may be imaged.
  • the imaged substrate is then developed with one or more chemistries at station 110 where both the top and/or bottom surfaces of the imaged substrate may be developed.
  • the developed image is plated directly onto the substrate in station 112 by passing the developed image through an electroless solution.
  • the plated substrate is then coated with a liquid photoimageable cover coat at station
  • the coated plated substrate is then imaged with a predesigned circuitry in station 1 16 by exposing the surface of the coated plated substrate to a light source.
  • the liquid photoimageable cover coat is then developed in station 118 with one or more chemistries.
  • the liquid photoimageable cover coat may be developed from both a top and/or bottom surface.
  • the developed liquid photoimageable cover coat is then coated in step 120 with a solution which creates a light sensitive surface.
  • the coated liquid photoimageable cover coat is then imaged with a predesigned circuitry in station 122 by exposing the surface of the coated liquid photoimageable cover coat to a light source.
  • the imaged coated liquid photoimageable cover coat is then developed from a top and/or bottom surface in station 124 with one or more chemistries.
  • the resulting developed layer is then passed through an electroless solution to plate the circuit and complete processing of the second layer. These steps may then be repeated until a desired number of layers is achieved for the multilayered printed circuit
  • the method may be automated by automatically unrolling the roll of non metallized substrate 102 and directing the roll of non-metallized substrate through a number of various coating, imaging, developing, and plating stations using a conveyer-like means
  • FIG. 7 A perspective view of a multilayer printed circuit 130 made in accordance with the method of the present invention for making a multilayer circuit is shown in Fig 7
  • the multilayer printed circuit 130 includes a bottom layer comprised of a non-metallized substrate and alternating layers of a direct emulsion chemistry 134 which creates a light sensitive suiface and a liquid photoimageable cover 136
  • the alternating layeis of direct emulsion chemistry 134 and liquid photoimageable cover 136 are positioned above the non- metallized substrate 132 and include direct emulsion features 138 such as the stacked vias shown in Fig 7
  • Fig 8 is a chart comparing the process steps for making a multilayer printed circuit using p ⁇ or art conventional printed circuit board processing and direct emulsion processing in accordance with the present invention

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

L'invention porte sur un procédé de fabrication de circuits imprimés multicouches qui consiste à: a) enduire d'une solution un substrat non métallisé afin de créer une surface photosensible sur le substrat; b) former l'image d'un modèle de circuit sur le substrat enduit; c) développer le substrat muni de l'image; d) plaquer directement l'image développée sur le substrat enduit; e) enduire le substrat plaqué d'une couche secondaire liquide photosensible; f) former l'image de circuits préalablement tracés sur le substrat plaqué enduit; g) développer la couche secondaire liquide photosensible; et répéter les étapes a) à d). On répète ensuite les étapes e) à g), suivies des étapes a) à d), jusqu'à ce que l'on ait obtenu un nombre de couches désiré pour le circuit multicouches. On peut automatiser le procédé en utilisant un système de type transporteur qui déroule et dirige automatiquement un rouleau de substrat non métallisé vers différents postes d'enduction, formation d'image, développement et placage.
PCT/US2008/067405 2007-06-18 2008-06-18 Procédé d'émulsion photosensible automatisée pour la fabrication de circuits imprimés et de circuits imprimés multicouches WO2008157642A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP08771412A EP2165583A4 (fr) 2007-06-18 2008-06-18 Procédé d'émulsion photosensible automatisée pour la fabrication de circuits imprimés et de circuits imprimés multicouches
CN2008801004040A CN101785372B (zh) 2007-06-18 2008-06-18 用于制造印刷电路和多层印刷电路的自动直接乳化工艺
JP2010513391A JP2010530646A (ja) 2007-06-18 2008-06-18 プリント回路および多層プリント回路を作る自動化ダイレクト乳剤プロセス

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US94473107P 2007-06-18 2007-06-18
US60/944,731 2007-06-18

Publications (1)

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WO2008157642A1 true WO2008157642A1 (fr) 2008-12-24

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EP (1) EP2165583A4 (fr)
JP (1) JP2010530646A (fr)
CN (1) CN101785372B (fr)
WO (1) WO2008157642A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017082744A1 (fr) * 2015-11-13 2017-05-18 Skorut Systemy Solarne - Sp. Z O. O. Procédé de formation d'un stratifié pour carte de circuits imprimés

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CN101785372A (zh) 2010-07-21
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EP2165583A4 (fr) 2012-05-16
CN101785372B (zh) 2012-07-18

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