WO2008149402A1 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
WO2008149402A1
WO2008149402A1 PCT/JP2007/000593 JP2007000593W WO2008149402A1 WO 2008149402 A1 WO2008149402 A1 WO 2008149402A1 JP 2007000593 W JP2007000593 W JP 2007000593W WO 2008149402 A1 WO2008149402 A1 WO 2008149402A1
Authority
WO
WIPO (PCT)
Prior art keywords
capacitor
semiconductor device
ferroelectric
film
producing semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2007/000593
Other languages
English (en)
French (fr)
Inventor
Katsuyoshi Matsuura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Semiconductor Ltd filed Critical Fujitsu Semiconductor Ltd
Priority to JP2009517622A priority Critical patent/JPWO2008149402A1/ja
Priority to PCT/JP2007/000593 priority patent/WO2008149402A1/ja
Publication of WO2008149402A1 publication Critical patent/WO2008149402A1/ja
Priority to US12/624,081 priority patent/US20100068829A1/en
Anticipated expiration legal-status Critical
Priority to US13/839,327 priority patent/US20130210169A1/en
Priority to US14/157,752 priority patent/US9093418B2/en
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/60Capacitors
    • H10D1/68Capacitors having no potential barriers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B53/00Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/30Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/60Capacitors
    • H10D1/68Capacitors having no potential barriers
    • H10D1/682Capacitors having no potential barriers having dielectrics comprising perovskite structures
    • H10D1/688Capacitors having no potential barriers having dielectrics comprising perovskite structures comprising barrier layers to prevent diffusion of hydrogen or oxygen

Landscapes

  • Semiconductor Memories (AREA)
  • Formation Of Insulating Films (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physical Vapour Deposition (AREA)
  • Chemical Vapour Deposition (AREA)
  • Drying Of Semiconductors (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

 (a)半導体基板上に下部電極(81)、強誘電体膜(75)、及び上部電極(83)がこの順番に積層された強誘電体キャパシタ(85)を形成する。(b)強誘電体キャパシタを覆うように、酸化アルミニウムからなる厚さ30nm以上の第1のキャパシタ保護膜(90)を形成する。(c)第1のキャパシタ保護膜の上に、高密度プラズマを用いた化学気相成長により、酸化シリコンからなる第1の絶縁膜(91)を形成する。
PCT/JP2007/000593 2007-06-01 2007-06-01 半導体装置の製造方法 Ceased WO2008149402A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2009517622A JPWO2008149402A1 (ja) 2007-06-01 2007-06-01 半導体装置の製造方法
PCT/JP2007/000593 WO2008149402A1 (ja) 2007-06-01 2007-06-01 半導体装置の製造方法
US12/624,081 US20100068829A1 (en) 2007-06-01 2009-11-23 Manufacture method for semiconductor device capable of preventing reduction of ferroelectric film
US13/839,327 US20130210169A1 (en) 2007-06-01 2013-03-15 Manufacture method for semiconductor device capable of preventing reduction of ferroelectric film
US14/157,752 US9093418B2 (en) 2007-06-01 2014-01-17 Manufacture method for semiconductor device capable of preventing reduction of ferroelectric film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/000593 WO2008149402A1 (ja) 2007-06-01 2007-06-01 半導体装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/624,081 Continuation US20100068829A1 (en) 2007-06-01 2009-11-23 Manufacture method for semiconductor device capable of preventing reduction of ferroelectric film

Publications (1)

Publication Number Publication Date
WO2008149402A1 true WO2008149402A1 (ja) 2008-12-11

Family

ID=40093239

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/000593 Ceased WO2008149402A1 (ja) 2007-06-01 2007-06-01 半導体装置の製造方法

Country Status (3)

Country Link
US (3) US20100068829A1 (ja)
JP (1) JPWO2008149402A1 (ja)
WO (1) WO2008149402A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015173206A (ja) * 2014-03-12 2015-10-01 株式会社リコー マイクロデバイス及びその製造方法
JP2023091207A (ja) * 2021-12-20 2023-06-30 富士通セミコンダクターメモリソリューション株式会社 半導体装置および半導体装置の製造方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102805281B1 (ko) * 2023-06-20 2025-05-12 삼성전자주식회사 커패시터 및 이를 포함하는 반도체 장치

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003218325A (ja) * 2002-01-18 2003-07-31 Fujitsu Ltd 強誘電体膜形成方法及び半導体装置製造方法
JP2004095755A (ja) * 2002-08-30 2004-03-25 Fujitsu Ltd 半導体装置の製造方法
JP2006049795A (ja) * 2004-06-28 2006-02-16 Fujitsu Ltd 半導体装置及びその製造方法
JP2006186311A (ja) * 2004-12-03 2006-07-13 Fujitsu Ltd 半導体装置及びその製造方法
JP2006279083A (ja) * 2006-07-11 2006-10-12 Fujitsu Ltd 半導体装置の製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001044375A (ja) 1999-07-29 2001-02-16 Fujitsu Ltd 半導体装置およびその製造方法
US6635528B2 (en) * 1999-12-22 2003-10-21 Texas Instruments Incorporated Method of planarizing a conductive plug situated under a ferroelectric capacitor
US6534809B2 (en) * 1999-12-22 2003-03-18 Agilent Technologies, Inc. Hardmask designs for dry etching FeRAM capacitor stacks
JP4025829B2 (ja) 2000-09-18 2007-12-26 富士通株式会社 半導体装置及びその製造方法
US6753618B2 (en) * 2002-03-11 2004-06-22 Micron Technology, Inc. MIM capacitor with metal nitride electrode materials and method of formation
US6897106B2 (en) * 2002-08-16 2005-05-24 Samsung Electronics Co., Ltd. Capacitor of semiconductor memory device that has composite Al2O3/HfO2 dielectric layer and method of manufacturing the same
JP2004193280A (ja) 2002-12-10 2004-07-08 Fujitsu Ltd 半導体装置及びその製造方法
US20060118957A1 (en) * 2004-12-03 2006-06-08 Fujitsu Limited Semiconductor device and fabricating method of the same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003218325A (ja) * 2002-01-18 2003-07-31 Fujitsu Ltd 強誘電体膜形成方法及び半導体装置製造方法
JP2004095755A (ja) * 2002-08-30 2004-03-25 Fujitsu Ltd 半導体装置の製造方法
JP2006049795A (ja) * 2004-06-28 2006-02-16 Fujitsu Ltd 半導体装置及びその製造方法
JP2006186311A (ja) * 2004-12-03 2006-07-13 Fujitsu Ltd 半導体装置及びその製造方法
JP2006279083A (ja) * 2006-07-11 2006-10-12 Fujitsu Ltd 半導体装置の製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015173206A (ja) * 2014-03-12 2015-10-01 株式会社リコー マイクロデバイス及びその製造方法
JP2023091207A (ja) * 2021-12-20 2023-06-30 富士通セミコンダクターメモリソリューション株式会社 半導体装置および半導体装置の製造方法
JP7772306B2 (ja) 2021-12-20 2025-11-18 Ramxeed株式会社 半導体装置および半導体装置の製造方法

Also Published As

Publication number Publication date
US20100068829A1 (en) 2010-03-18
US20130210169A1 (en) 2013-08-15
US9093418B2 (en) 2015-07-28
US20140134754A1 (en) 2014-05-15
JPWO2008149402A1 (ja) 2010-08-19

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