WO2008114374A1 - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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Publication number
WO2008114374A1
WO2008114374A1 PCT/JP2007/055474 JP2007055474W WO2008114374A1 WO 2008114374 A1 WO2008114374 A1 WO 2008114374A1 JP 2007055474 W JP2007055474 W JP 2007055474W WO 2008114374 A1 WO2008114374 A1 WO 2008114374A1
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor device
wirings
die pad
relay member
manufacturing same
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2007/055474
Other languages
English (en)
French (fr)
Inventor
Takashi Kikuchi
Koichi Kanemoto
Akihiko Iwaya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Original Assignee
Renesas Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to PCT/JP2007/055474 priority Critical patent/WO2008114374A1/ja
Publication of WO2008114374A1 publication Critical patent/WO2008114374A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/811—Multiple chips on leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/464—Additional interconnections in combination with leadframes
    • H10W70/468—Circuit boards
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/753—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

　本発明に係る半導体装置は、ダイパッドやインナーリードを有するリードフレームと、ダイパッド上に搭載され、複数の配線が形成された中継部材と、中継部材上に平置きに搭載され、複数の配線に接続された第１，第２チップと、複数の配線と複数のインナーリードとの間をそれぞれ接続する複数の金属ワイヤと、これらを封止する樹脂とを備える。そして、ダイパッドの外形寸法は、中継部材の外形寸法よりも小さい。これにより、耐リフロー性を向上させ、かつ製造コストを低減することができる。
PCT/JP2007/055474 2007-03-19 2007-03-19 半導体装置及びその製造方法 Ceased WO2008114374A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/055474 WO2008114374A1 (ja) 2007-03-19 2007-03-19 半導体装置及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/055474 WO2008114374A1 (ja) 2007-03-19 2007-03-19 半導体装置及びその製造方法

Publications (1)

Publication Number Publication Date
WO2008114374A1 true WO2008114374A1 (ja) 2008-09-25

Family

ID=39765496

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/055474 Ceased WO2008114374A1 (ja) 2007-03-19 2007-03-19 半導体装置及びその製造方法

Country Status (1)

Country Link
WO (1) WO2008114374A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100109148A1 (en) * 2008-10-31 2010-05-06 Renesas Technology Corp. Semiconductor device
JP2021015936A (ja) * 2019-07-16 2021-02-12 Tdk株式会社 電子部品パッケージ

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5056161A (ja) * 1973-09-14 1975-05-16
JPS59172755A (ja) * 1983-03-22 1984-09-29 Toshiba Corp リ−ドフレ−ム
JPH0316162A (ja) * 1989-03-31 1991-01-24 Hitachi Ltd 半導体装置およびその製造方法
JPH06132444A (ja) * 1992-10-20 1994-05-13 Hitachi Ltd 半導体装置
JPH06216303A (ja) * 1992-03-27 1994-08-05 Hitachi Ltd リードフレーム、その製造方法およびそれを用いた半導体集積回路装置の製造方法
JPH09260575A (ja) * 1996-03-22 1997-10-03 Mitsubishi Electric Corp 半導体装置及びリードフレーム

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5056161A (ja) * 1973-09-14 1975-05-16
JPS59172755A (ja) * 1983-03-22 1984-09-29 Toshiba Corp リ−ドフレ−ム
JPH0316162A (ja) * 1989-03-31 1991-01-24 Hitachi Ltd 半導体装置およびその製造方法
JPH06216303A (ja) * 1992-03-27 1994-08-05 Hitachi Ltd リードフレーム、その製造方法およびそれを用いた半導体集積回路装置の製造方法
JPH06132444A (ja) * 1992-10-20 1994-05-13 Hitachi Ltd 半導体装置
JPH09260575A (ja) * 1996-03-22 1997-10-03 Mitsubishi Electric Corp 半導体装置及びリードフレーム

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100109148A1 (en) * 2008-10-31 2010-05-06 Renesas Technology Corp. Semiconductor device
JP2010109234A (ja) * 2008-10-31 2010-05-13 Renesas Technology Corp 半導体装置
JP2021015936A (ja) * 2019-07-16 2021-02-12 Tdk株式会社 電子部品パッケージ
JP7192688B2 (ja) 2019-07-16 2022-12-20 Tdk株式会社 電子部品パッケージ
US11721618B2 (en) 2019-07-16 2023-08-08 Tdk Corporation Electronic component package
US12205873B2 (en) 2019-07-16 2025-01-21 Tdk Corporation Electronic component package

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