WO2008108139A1 - Ｐｌｌ周波数シンセサイザ - Google Patents

Ｐｌｌ周波数シンセサイザ Download PDF

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Publication number
WO2008108139A1
WO2008108139A1 PCT/JP2008/052160 JP2008052160W WO2008108139A1 WO 2008108139 A1 WO2008108139 A1 WO 2008108139A1 JP 2008052160 W JP2008052160 W JP 2008052160W WO 2008108139 A1 WO2008108139 A1 WO 2008108139A1
Authority
WO
WIPO (PCT)
Prior art keywords
loop filter
semiconductor substrate
frequency synthesizer
pll frequency
changing
Prior art date
Application number
PCT/JP2008/052160
Other languages
English (en)
French (fr)
Inventor
Takayuki Sugano
Senichiro Yatsuda
Shigeki Ohtsuka
Yutaka Chiba
Original Assignee
Thine Electronics, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thine Electronics, Inc. filed Critical Thine Electronics, Inc.
Priority to US12/530,171 priority Critical patent/US20100052747A1/en
Priority to EP08711039A priority patent/EP2124342A1/en
Publication of WO2008108139A1 publication Critical patent/WO2008108139A1/ja

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1075—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

　本発明の一実施形態のＰＬＬ周波数シンセサイザ１は、分周器３０と、位相比較器４０と、チャージポンプ５０と、ループフィルタ６０と、電圧制御発振器７０と、切換スイッチ（切換部８０の内部）とを備える。ループフィルタ６０は、半導体基板上の基準電位を接地電位とし、切換スイッチは、半導体基板２上に形成され、ループフィルタ６０の時定数を切り換えるためにループフィルタ６０の中間ノードと半導体基板２上の基準電位とを接続するか否かを切り換える。
PCT/JP2008/052160 2007-03-07 2008-02-08 Ｐｌｌ周波数シンセサイザ WO2008108139A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US12/530,171 US20100052747A1 (en) 2007-03-07 2008-02-08 Pll frequency synthesizer
EP08711039A EP2124342A1 (en) 2007-03-07 2008-02-08 Pll frequency synthesizer

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-057692 2007-03-07
JP2007057692A JP2008219799A (ja) 2007-03-07 2007-03-07 Ｐｌｌ周波数シンセサイザ

Publications (1)

Publication Number Publication Date
WO2008108139A1 true WO2008108139A1 (ja) 2008-09-12

Family

ID=39738036

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/052160 WO2008108139A1 (ja) 2007-03-07 2008-02-08 Ｐｌｌ周波数シンセサイザ

Country Status (5)

Country Link
US (1) US20100052747A1 (ja)
EP (1) EP2124342A1 (ja)
JP (1) JP2008219799A (ja)
CN (1) CN101622788A (ja)
WO (1) WO2008108139A1 (ja)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101888244B (zh) * 2010-07-16 2015-07-01 上海集成电路研发中心有限公司 低功耗锁相环电路
JP5463246B2 (ja) * 2010-09-01 2014-04-09 株式会社日立製作所 位相同期回路、ｃｄｒ回路及び受信回路
JP5776657B2 (ja) * 2012-09-18 2015-09-09 株式会社デンソー 受信回路
TWI507704B (zh) * 2013-08-08 2015-11-11 Realtek Semiconductor Corp 延遲時間差偵測暨調整裝置與方法
JP2015053628A (ja) * 2013-09-09 2015-03-19 ソニー株式会社 位相同期回路、位相同期モジュール、および位相同期方法
CN111030683B (zh) * 2019-12-31 2024-04-09 加特兰微电子科技(上海)有限公司 低通滤波器、锁相环以及雷达系统
RU209400U1 (ru) * 2021-11-09 2022-03-16 Артем Алексеевич Головизин Многоканальный синтезатор радиочастот
WO2023218656A1 (ja) * 2022-05-13 2023-11-16 株式会社ソシオネクスト Ｐｌｌに用いられるループフィルタおよびｐｌｌ
CN115395770B (zh) * 2022-10-27 2023-03-24 广东汇芯半导体有限公司 高压集成电路和接地方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004140688A (ja) 2002-10-18 2004-05-13 Matsushita Electric Ind Co Ltd 高速ｐｌｌ周波数シンセサイザ
JP2004266594A (ja) * 2003-03-03 2004-09-24 Kokusai Denki Engineering:Kk 高速ｐｌｌ周波数シンセサイザー
JP2006261714A (ja) * 2005-03-15 2006-09-28 Renesas Technology Corp 通信用半導体集積回路および携帯通信端末

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62199119A (ja) * 1986-02-27 1987-09-02 Hitachi Ltd 位相同期回路
JPH0338113A (ja) * 1989-07-05 1991-02-19 Sharp Corp 位相同期回路
JP2006067565A (ja) * 2004-07-27 2006-03-09 Matsushita Electric Ind Co Ltd Ｐｌｌ特性切り換え方法およびｐｌｌ回路

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004140688A (ja) 2002-10-18 2004-05-13 Matsushita Electric Ind Co Ltd 高速ｐｌｌ周波数シンセサイザ
JP2004266594A (ja) * 2003-03-03 2004-09-24 Kokusai Denki Engineering:Kk 高速ｐｌｌ周波数シンセサイザー
JP2006261714A (ja) * 2005-03-15 2006-09-28 Renesas Technology Corp 通信用半導体集積回路および携帯通信端末

Also Published As

Publication number Publication date
JP2008219799A (ja) 2008-09-18
US20100052747A1 (en) 2010-03-04
CN101622788A (zh) 2010-01-06
EP2124342A1 (en) 2009-11-25

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