WO2008084906A1 - Support de boîtier de puce semi-conductrice - Google Patents

Support de boîtier de puce semi-conductrice Download PDF

Info

Publication number
WO2008084906A1
WO2008084906A1 PCT/KR2007/004950 KR2007004950W WO2008084906A1 WO 2008084906 A1 WO2008084906 A1 WO 2008084906A1 KR 2007004950 W KR2007004950 W KR 2007004950W WO 2008084906 A1 WO2008084906 A1 WO 2008084906A1
Authority
WO
WIPO (PCT)
Prior art keywords
base
semiconductor chip
rotation
chip package
latch
Prior art date
Application number
PCT/KR2007/004950
Other languages
English (en)
Inventor
Jin Guk Jun
Sung Kyu Park
Mu Jun Kim
Original Assignee
Okins Electronics Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Okins Electronics Co., Ltd. filed Critical Okins Electronics Co., Ltd.
Publication of WO2008084906A1 publication Critical patent/WO2008084906A1/fr

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2893—Handling, conveying or loading, e.g. belts, boats, vacuum fingers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders

Definitions

  • the present invention relates to a semiconductor chip package carrier, and more particularly, to a semiconductor chip package carrier which has a simple structure and operability, and includes a driving mechanism adapted to directly drive a latch, thereby reducing the installation space and the manufacturing cost, improving productivity in the manufacture, and preventing malfunction of the latch due to accumulated dust, etc., during the test of the semiconductor chip package carrier.
  • the semiconductor chip package is connected to a predetermined test signal generation circuit under a normal condition or a stress condition such as high temperature, high voltage and the like so as to test the performance, the lifespan, etc, . , and then it is sorted into a good product or a defective product according to the test result .
  • a semiconductor chip package carrier is used to securely transport the semiconductor chip package, and transmit signals to the external connection terminal of the semiconductor chip package.
  • the carrier As a specific example of the carrier, there is disclosed in Korean Patent Application No.1999-33097 and Korean Utility Model Registration No.389391 as an improvement thereof. Also, each operation for these semiconductor chip package carriers is described in detail in respective corresponding specifications, and these examples are shown in FIG. 1.
  • the semiconductor chip package carrier include an inclined surface for entering/exiting and fixing of the semiconductor chip package, a latch having a saw-tooth structure, a spring and a rotation shaft for driving the latch, and the like, there may occur problems in that the structure and assembly of the semiconductor chip package carrier are complicate due to a large number of components, and malfunction or failure in the driving of the semiconductor chip package carrier occur due to the complicate driving mechanism operated in a stepwise manner.
  • the latch is fixed at a given groove by a rotation shaft so as to be repeatedly slidingly moved even during the use of the semiconductor chip package carrier after the assembly thereof, dust particles are generated from a frictional surface due to the movement of the latch, so that the contact between the external connection terminal of the semiconductor chip package and a test probe is interfered as shown in FIG. 2, thereby leading to a distortion of the test results (e.g., a good product is determined as a defective product, and the like) .
  • the semiconductor chip package and the latch are interfered with each other at the time of entering/exiting of the semiconductor chip package due to incorrect sliding movement of the latch, thereby resulting in an erroneous operation such as damage of the semiconductor chip package, etc.
  • the present invention has been made in an effort to solve the above-mentioned problems occurring in the conventional art, and it is an object of the present invention to provide a semiconductor chip package carrier which has a simple structure and operability, and includes a driving mechanism adapted to directly drive a latch, thereby reducing the installation space and the manufacturing cost, improving productivity in the manufacture, and preventing malfunction of the latch occurring due to accumulated dust during the test of the semiconductor chip package carrier.
  • a semiconductor chip package carrier which comprises: a base including an opening portion opened in a vertical direction and a mounting chamber, the mounting chamber having a contact opening formed in the bottom surface of the mounting chamber in such a manner as to communicate with the opening portion, and a mounting surface surrounding the contact opening and adapted to allow a semiconductor chip to be accommodated thereon; at least two rotation latches pivotally fixed at one side thereof to the base by a pivot hole, each of the rotation latches including a downwardly inclined protrusion portion protruded towards a center of the opening portion of the base from the pivot hole, and a button portion protruded upward and disposed inwardly of the base in such a manner as to be spaced apart from the pivot hole; and an elastic portion positioned between the rotation latch and the base and adapted to restrict rotation of the rotation latch and realize elastic recovery of the rotation latch.
  • the manufacturing cost is increased due to complicate structure of respective components such as a latch, and a button coupled with the latch, and the like, a separate cost for an assembly of the respective components is needed, and manufacturing time for the assembly is increased.
  • the semiconductor chip package carrier is precisely driven only when the respective components operated in a stepwise manner consecutively satisfy their driving conditions, and thus there are always concerns for malfunction of the semiconductor chip package carrier.
  • the number of components is reduced due to the rotation latch also acting as a button, the manufacturing cost is reduced due to the simplified structure, and productivity of the semiconductor chip package carrier is improved, thereby reducing the manufacturing cost and time.
  • the rotation latch is directly driven by the driving portion due to the simplified structure at the time of the test of the semiconductor chip package carrier, a driving mechanism is simplified, and the malfunction is reduced.
  • the malfunction of the latch occurring due to accumulated dust is prevented, thereby preventing damage of the semiconductor chip.
  • more precise test results can be acquired due to minimization of the dust generation.
  • FIG. 1 is an exploded perspective view illustrating an example of a conventional semiconductor chip package carrier
  • FIG. 2 is a cross-sectional view illustrating a state where a conventional semiconductor chip package carrier is latched by a latch at the time of malfunction;
  • FIG. 3 is an exploded perspective view illustrating a semiconductor chip package carrier according to an exemplary embodiment of the present invention
  • FIG. 4 is a view illustrating a state where the semiconductor chip package carrier of FIG. 3 is assembled according to an exemplary embodiment of the present invention
  • FIG. 5 is an exploded perspective view illustrating a semiconductor chip package carrier according to another exemplary embodiment of the present invention.
  • FIG. 6 is a view illustrating a rotation latch and an elastic portion of a semiconductor chip package carrier according to another exemplary embodiment of the present invention.
  • FIG. 7 is a cross-sectional view illustrating the semiconductor chip package carrier of FIG. 6.
  • FIG. 8 is a partially magnified view illustrating an operation example of the semiconductor chip package carrier of FIG. 7.
  • a semiconductor chip package carrier comprises: a base 10 including an opening portion 11 opened in a vertical direction and a mounting chamber, the mounting chamber having a contact opening 12 formed in the bottom surface thereof in such a manner as to communicate with the opening portion 11 and a mounting surface 13 surrounding the contact opening 12 and adapted to allow a semiconductor chip to be accommodated thereon; at least two rotation latches 20 pivotally fixed at one side of the rotation latch to the base 10 by a pivot hole 26, each of the rotation latches including a downwardly inclined protrusion portion 24 protruded towards a center of the opening portion of the base 10 from the pivot hole, and a button portion 27 protruded upward and disposed inwardly of the base 10 in such a manner as to be spaced apart from the pivot hole; and an elastic portion 30 positioned between the rotation latch 20 and the base 10, and adapted to restrict rotation of the rotation latch and realize elastic recovery of the rotation latch 20.
  • the base 10 is featured in that the rotation latch is pivotally fixed to the base and the elastic portion is accommodated in the base in comparison with a conventional base having a structure where a latch is seated in the base.
  • the base 10 may have a similar shape as the conventional base as illustrated in FIG. 1, and also have various shapes of the well-known semiconductor chip package carrier. Accordingly, the base may be manufactured in well-known various methods or shapes.
  • the base includes the opening portion 11 opened in a vertical direction and adapted to allow the semiconductor chip to be mounted and taken out therethrough for the purposes of transportation and test of the semiconductor chip package carrier.
  • the base includes a mounting chamber having a contact opening formed in the bottom surface thereof in such a manner as to communicate with the opening portion 11, and also having a mounting surface 13 surrounding the contact opening 12 and adapted to allow a semiconductor chip to be mounted thereon. Specific examples for theses components are illustrated in FIGS. 3 to 8.
  • the rotation latch 20 is pivotally fixed at one side thereof to the base 10 by a pivot hole.
  • the rotation latch 20 includes a downwardly inclined protrusion portion 24 (preferably, formed in a plate shape) protruded towards a center of the opening portion 11 of the base 10 from the pivot hole, and a button portion protruded upward and disposed inwardly of the base in such a manner as to be spaced apart from the pivot hole.
  • the button portion is directly pressurized by a driving portion (cover) so as to allow the latch to be rotated.
  • at least two rotation latches are provided so as to allow a semiconductor chip to be accommodated in and fixedly fixed to the base, and preferably disposed symmetrically with each other.
  • the button portion 27 is pressurized by the driving portion as illustrated in FIG. 8 so as to be slightly rotated in a direction of an inner wall of the mounting chamber, so that the protrusion portion is moved outwardly so as to allow the opening portion to be widened.
  • the protrusion portion is returned to the former position due to the elastic force of the elastic portion in such a manner as to be moved inwardly of the opening portion, thereby fixing the semiconductor chip package.
  • the rotation latch may be formed in a shape illustrated in FIGS. 3 to 8.
  • the rotation latch may have the protrusion portion formed in a shape downwardly inclined directly from the pivot hole, and preferably a plate shape, as illustrated in FIGS. 5 and 6.
  • the protrusion portion may be formed in a plate shape inclined downward from a predetermined extended portion extended from the pivot hole.
  • the elastic portion 30 is supported between the rotation latch 20 and the base, so that the rotation latch is prevented from being further inwardly rotated.
  • the force operation urging to rotate the rotation latch inwardly is not exerted on the rotation latch any more, the rotation latch is returned to the original position due to elastic recovery of the elastic portion.
  • the shape of the elastic portion 30 is not limited as long as above-described relationship and configuration of the elastic portion 30 and the rotation latch are satisfied.
  • the elastic portion 30 has an elastic member positioned in a rear surface of the protrusion portion and supported by the base.
  • the elastic portion may have a twist coil spring coupled to the base together with the rotation latch by a pivot shaft of the rotation latch. At this time, the twist coil spring is supported at one end thereof by the rear surface of the rotation latch, and supported at the other end thereof by the base.
  • the twist coil spring is elastically deformed by the rotation of the rotation latch.
  • the rotation latch and the base may be constructed such that the rotation latch is rotated within a predetermined angle.
  • the rotation latch and the base may have a stop portion for preventing rotation and a latching portion corresponding to the stop portion, respectively, so as to allow the stop portion to be latched thereon when the stop portion is not within the predetermined angel.
  • the rotation latch and the base may have a groove for guiding rotation and a protrusion inserted in the groove corresponding to the groove.
  • the rotation lath 20 further includes a stop portion 28 positioned at a lower end of the protrusion portion 24 and protruded outwardly from a side surface of the rotation latch
  • the base further includes a latching portion 15 adapted to prevent the stop portion from being moved inwardly of the base. In this manner, the rotation latch is prevented from being overly rotated due to the elastic force of the elastic portion, thereby acquiring stable driving of the rotation latch.
  • the elastic portion may use various well-known elastic members, and preferably, a coil spring is used as the elastic member.
  • a coil spring is used as the elastic member.
  • a compression coil spring and the twist coil spring as described above may be used. In this manner, reliability of each operation of components of the semiconductor chip package carrier is increased and generation of dust is minimized.
  • FIGS. 3 to 6 Examples of these driving components are illustrated in FIGS. 3 to 6.
  • pivot mechanism Various well-known pivot configurations enabling well- known rotation movement may be applied to the above-mentioned pivot mechanism.
  • a pin and a hole may be used for the pivot mechanism, and a rotation protrusion integrally formed on the rotation latch and acting as a pivot shaft, and a groove formed on the base so as to allow the rotation protrusion to be accommodated therein and acting as a pivot hole are used for the pivot mechanism.
  • the semiconductor chip package carrier may further include a driving portion 40 for driving the rotation latch.
  • the driving portion 40 pressurizes and rotates the rotation latch 20 in a state where the semiconductor chip package carrier is accommodated in and taken out from the base while the semiconductor chip package carrier is operated, so that the protrusion portion 24 of the rotation latch 20 is prevented from being moved.
  • the semiconductor chip is stably fixed by the semiconductor chip package carrier during the test of the semiconductor chip package, and is readily accommodated in and taken out from the base without an external force.
  • the driving portion (cover) 40 may be formed in a plate shape connected to the upper surface of the base 10 through the elastic member, as illustrated in FIGS. 3, 5, 7, and 8. In this manner, the driving portion may be applied to all equipments where the conventional semiconductor chip package carrier is used, and may be configured such that operation of the semiconductor chip package carrier is precisely performed, [industrial applicability]
  • the manufacturing cost is increased due to complicate structure of respective components such as a latch, and a button coupled with the latch, and the like, a separate cost for an assembly of the respective components is needed, and manufacturing time for the assembly is increased.
  • the semiconductor chip package carrier is precisely driven only when the respective components operated in a stepwise manner consecutively satisfy their driving conditions, and thus there are always concerns for malfunction of the semiconductor chip package carrier.
  • the number of components is reduced due to the rotation latch acting as a button, the manufacturing cost is reduced due to the simplified structure, and productivity of the semiconductor chip package carrier is improved, thereby reducing the manufacturing cost and time.
  • the rotation latch is directly driven by the driving portion due to the simplified structure at the time of the test of the semiconductor chip package carrier, a driving mechanism is simplified, and the malfunction is reduced.
  • the malfunction of the latch occurring due to accumulated dust is prevented, thereby preventing damage of the semiconductor chip.
  • more precise test results can be acquired due to minimization of the dust generation.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Packaging Frangible Articles (AREA)

Abstract

La présente invention porte sur un support de boîtier de puce semi-conductrice. Le support de boîtier de puce semi-conductrice comporte une base comportant une partie d'ouverture ouverte dans une direction verticale et une chambre de montage, la chambre de montage ayant une ouverture de contact formée dans la surface inférieure de la chambre de montage de façon à communiquer avec la partie d'ouverture, et une surface de montage entourant l'ouverture de contact et conçue pour permettre à une puce semi-conductrice d'être disposée sur celle-ci ; au moins deux loqueteaux en rotation fixés de façon pivotante sur un côté de ceux-ci à la base par un trou de pivot, chacun des loqueteaux en rotation comprenant une partie de saillie inclinée vers le bas faisant saillie vers le centre de la partie d'ouverture de la base à partir du trou de pivot, et une partie de bouton faisant saillie vers le haut et disposée vers l'intérieur de la base de façon à être espacée du trou de pivot ; et une partie élastique positionnée entre le loqueteau en rotation et la base et conçue pour restreindre la rotation du loqueteau en rotation et pour exécuter une reprise élastique du loqueteau en rotation.
PCT/KR2007/004950 2007-01-08 2007-10-10 Support de boîtier de puce semi-conductrice WO2008084906A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020070002157A KR100785510B1 (ko) 2007-01-08 2007-01-08 반도체칩 패키지 캐리어
KR10-2007-0002157 2007-01-08

Publications (1)

Publication Number Publication Date
WO2008084906A1 true WO2008084906A1 (fr) 2008-07-17

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2007/004950 WO2008084906A1 (fr) 2007-01-08 2007-10-10 Support de boîtier de puce semi-conductrice

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KR (1) KR100785510B1 (fr)
WO (1) WO2008084906A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI408837B (zh) * 2011-02-08 2013-09-11 Subtron Technology Co Ltd 封裝載板及其製作方法

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100996905B1 (ko) 2008-07-30 2010-11-26 주식회사 오킨스전자 반도체 칩 캐리어
KR101069741B1 (ko) 2009-03-18 2011-10-04 에버테크노 주식회사 테스트 핸들러의 캐리어 모듈
KR101345814B1 (ko) * 2012-03-28 2014-02-14 주식회사 오킨스전자 반도체칩 패키지 캐리어

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5139437A (en) * 1990-05-14 1992-08-18 Texas Instruments Incorporated Socket
US5288240A (en) * 1992-12-16 1994-02-22 Minnesota Mining And Manufacturing Company Top-load socket for integrated circuit device
US5742487A (en) * 1994-10-11 1998-04-21 Advantest Corporation IC carrier
KR0136169Y1 (ko) * 1996-05-31 1999-03-20 정문술 반도체 소자테스트용 테스트트레이의 캐리어모듈

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19980069436A (ko) * 1997-02-28 1998-10-26 김광호 테스트 핸들러의 캐리어
KR200258557Y1 (ko) * 2001-09-21 2001-12-31 주식회사 오킨스전자 집적회로캐리어
KR100502052B1 (ko) * 2002-10-01 2005-07-18 미래산업 주식회사 캐리어 모듈
JP3095975U (ja) * 2003-02-18 2003-08-29 有限会社デザイン工房シーアイシー 水差し
KR200383888Y1 (ko) * 2005-02-18 2005-05-10 주식회사 하나엔-텍 반도체칩 검사용 케리어의 래치구조

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5139437A (en) * 1990-05-14 1992-08-18 Texas Instruments Incorporated Socket
US5288240A (en) * 1992-12-16 1994-02-22 Minnesota Mining And Manufacturing Company Top-load socket for integrated circuit device
US5742487A (en) * 1994-10-11 1998-04-21 Advantest Corporation IC carrier
KR0136169Y1 (ko) * 1996-05-31 1999-03-20 정문술 반도체 소자테스트용 테스트트레이의 캐리어모듈

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI408837B (zh) * 2011-02-08 2013-09-11 Subtron Technology Co Ltd 封裝載板及其製作方法

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