WO2008072827A1 - Matériau ferroélectrique et procédé de formation d'une couche ferroélectrique au moyen de ce matériau - Google Patents

Matériau ferroélectrique et procédé de formation d'une couche ferroélectrique au moyen de ce matériau Download PDF

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WO2008072827A1
WO2008072827A1 PCT/KR2007/002886 KR2007002886W WO2008072827A1 WO 2008072827 A1 WO2008072827 A1 WO 2008072827A1 KR 2007002886 W KR2007002886 W KR 2007002886W WO 2008072827 A1 WO2008072827 A1 WO 2008072827A1
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ferroelectric
organic
solution
inorganic
ferroelectric material
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PCT/KR2007/002886
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English (en)
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Byung-Eun Park
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University Of Seoul Foundation Of Industry-Academic Cooperation
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Priority to US12/523,319 priority Critical patent/US20100215836A1/en
Priority to JP2009541207A priority patent/JP2010514155A/ja
Priority claimed from KR1020070058179A external-priority patent/KR100893764B1/ko
Publication of WO2008072827A1 publication Critical patent/WO2008072827A1/fr

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H01L21/0212—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC the material being fluoro carbon compounds, e.g.(CFx) n, (CHxFy) n or polytetrafluoroethylene
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40111—Multistep manufacturing processes for data storage electrodes the electrodes comprising a layer which is used for its ferroelectric properties
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/78391—Field effect transistors with field effect produced by an insulated gate the gate comprising a layer which is used for its ferroelectric properties
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/468—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics
    • H10K10/478—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics the gate dielectric comprising a layer of composite material comprising interpenetrating or embedded materials, e.g. TiO2 particles in a polymer matrix

Definitions

  • the present invention relates to a ferroelectric material that can be effectively used in manufacturing various electric and electronic elements, and a method of forming a ferroelectric layer using the ferroelectric material .
  • ferroelectric materials are used as materials of various electric and electronic elements.
  • the electronic elements using the ferroelectric material include piezoelectric elements, pyroelectric elements, and the like.
  • extensive research aimed at manufacturing a nonvolatile memory device using polarization characteristics of the ferroelectric material has continued to progress.
  • the ferroelectric materials being used at present broadly classified into inorganic material and organic materials. Since the inorganic ferroelectric materials have dielectric constants greater than those of the organic ferroelectric materials, the inorganic ferroelectric materials are most widely used in the various electric and electronic elements.
  • the inorganic ferroelectric materials require a high temperature treatment above 500"C, for example, to be formed on a substrate. Accordingly, the formation of a ferroelectric layer using the ferroelectric material has some drawbacks in that it requires expensive equipment and high manufacturing cost and there are limitations associated with the material of the substrate on which the ferroelectric layer is formed.
  • a ferroelectric memory formed of the inorganic ferroelectric material has a fatal problem that the data retention characteristics are degraded due to the high temperature required in the above-described formation process.
  • FIG. 1 is a cross-sectional view showing a typical structure of a metal-ferroelectric-semiconductor (MFS) type memory device using the ferroelectric material.
  • MFS metal-ferroelectric-semiconductor
  • source and drain regions 2 and 3 are formed in predetermined areas of a silicon substrate 1, and a ferroelectric layer 5 is formed on a channel region 4 between the source and drain regions 2 and 3.
  • the ferroelectric layer 5 comprises an inorganic material having ferroelectric properties such as PbZr x Tii- x O 3 (PZT) , SrBi 2 Ta 2 O 9 (SBT), (Bi, La) 4 Ti 3 Ch 2 (BLT), and the like.
  • a source electrode 6, a drain electrode 7 and a gate electrode 8 formed of a metal material, respectively, are arranged on the top of the source and drain regions 2 and 3 and the ferroelectric layer 5.
  • the ferroelectric layer 5 has polarization characteristics according to a voltage applied through the gate electrode 8, and a conductive channel is formed between the source region 2 and the drain region 3 by the polarization characteristics. As a result, a current flows between the source electrode 6 and the drain electrode 7. Especially, in the above-described structure, even in the case where the voltage applied through the gate electrode 8 is cut off, the polarization characteristics of the ferroelectric layer 5 are continuously maintained.
  • the ferroelectric memory having the above- described structure has the following problems. That is, when the ferroelectric layer 5 is directly formed on the silicon substrate 1 in the temperature range of 500 to 800 °C by a chemical vapor deposition (CVD) or sputtering method, for example, a transition layer of low quality is formed on the boundary between the ferroelectric layer 5 and the silicon substrate 1 by the high temperature, and chemical elements such as Pb and Bi in the ferroelectric layer 5 are diffused into the silicon substrate 1, thus making it difficult to form a ferroelectric layer 5 of high quality. As a result, there occurs a problem that the polarization characteristics of the ferroelectric layer 5 are deteriorated, that is, the data retention time of the ferroelectric memory becomes very short.
  • CVD chemical vapor deposition
  • sputtering method for example, a transition layer of low quality is formed on the boundary between the ferroelectric layer 5 and the silicon substrate 1 by the high temperature, and chemical elements such as Pb and Bi in the ferroelectric layer 5 are diffused into the
  • the present invention has been made in an effort to solve the above-described problems.
  • the present invention provides a ferroelectric material having excellent ferroelectric characteristics and capable of forming a ferroelectric layer at a low temperature.
  • the present invention provides a method of forming a ferroelectric layer using the ferroelectric material.
  • a ferroelectric material comprising a mixture of an inorganic material and an organic material.
  • a ferroelectric material comprising a mixture of a solid solution of an inorganic material and an organic material.
  • the inorganic ferroelectric material may comprise at least one selected from the group consisting of a ferroelectric oxide, a ferroelectric fluoride, a ferroelectric semiconductor, and a mixture thereof.
  • the inorganic ferroelectric material may be PZT.
  • the mixture may further comprise a suicide, a silicate or any other metal.
  • the organic material may be a polymer ferroelectric material.
  • the polymer ferroelectric material may comprise at least one selected from the group consisting of polyvinylidene fluoride (PVDF) , PVDF polymer, PVDF copolymer, PVDF terpolymer and, further, odd-numbered nylon, cyano- polymer, and polymer or copolymer thereof.
  • PVDF polyvinylidene fluoride
  • the polymer ferroelectric material may be PVDF-TrFE.
  • the ferroelectric material may be formed by heating and baking a mixed solution of an inorganic ferroelectric material and an organic material.
  • the ferroelectric material may be used as a material of a ferroelectric transistor or a ferroelectric memory device.
  • a method of forming a ferroelectric layer comprising: preparing a mixed solution of an inorganic ferroelectric material and an organic material; applying the mixed solution on a substrate to form a ferroelectric film; and heating and baking the ferroelectric film to form a ferroelectric layer.
  • a method of forming a ferroelectric layer comprising: preparing a mixed solution of a solid solution of an inorganic ferroelectric material and an organic material; applying the mixed solution on a substrate to form a ferroelectric film; and heating and baking the ferroelectric film to form a ferroelectric layer.
  • the mixed solution may be prepared by mixing an inorganic powder with an organic powder and dissolving the mixed powders in a solvent.
  • the mixed solution may be prepared by dissolving an organic powder in an inorganic solution.
  • the mixed solution may be prepared by dissolving an inorganic powder in an organic solution.
  • the mixed solution may be prepared by mixing an inorganic solution with an organic solution.
  • the organic material may be an organic ferroelectric material .
  • the mixed solution may comprise a PZT solution and a PVDF-TrFE solution.
  • the PZT solution may be prepared by mixing a PZO solution and a PTO solution.
  • the PVDF-TrFE solution may be prepared by dissolving PVDF-TrFE powder in at least one solvent selected from the group consisting of C 4 H 5 O (THF), C 4 H 8 O (MEK), C 3 H 6 O (acetone), C 3 H 7 NO (DMF), and C 2 H 6 OS (DMSO).
  • the ferroelectric layer may be formed by a spin coating method.
  • the ferroelectric layer may be by an ink-jet printing method.
  • the ferroelectric layer may be by a screen printing method.
  • the method of forming a ferroelectric layer may further comprises a process of etching a portion of the ferroelectric layer.
  • the process of etching the ferroelectric layer may be performed by a buffered oxide etching (BOE) method.
  • BOE buffered oxide etching
  • the process of etching the ferroelectric layer may be performed by a two-step etching method using BOE and gold etchant .
  • the process of etching the ferroelectric layer may be performed by a reactive ion etching (RIE) method.
  • the baking temperature may be below 200 ° C.
  • the substrate may be formed of a material selected from the group consisting of polyimide (PI) , polycarbonate (PC), polyethersulfone (PES), polyetheretherketone (PEEK), polybutyleneterephthalate (PBT) , polyethyleneterephthalate (PET), polyvinylchloride (PVC), polyethylene (PE), ethylene copolymer, polypropylene (PP), propylene copolymer, poly (4- methyl-1-pentene) (TPX) , polyarylate (PAR), polyacetal (POM), polyphenyleneoxide (PPO) , polysulfone (PSF) , polyphenylenesulfide (PPS) , polyvinylidenechloride (PVDC) , polyvinylacetate (PVAC) , polyviny
  • the substrate may be formed of a material including paper.
  • FIG. 1 is a cross-sectional view showing a typical structure of a metal-ferroelectric-semiconductor (MFS) type memory device;
  • FIGS. 2 to 6 are graphs showing capacitance-voltage characteristics of ferroelectric materials applied to the present invention
  • FIG. 7 is a graph showing the change in capacitance of the ferroelectric layer formed of a ferroelectric material in accordance with the present invention with the passage of time.
  • the inorganic ferroelectric materials include ferroelectric oxides, ferroelectric fluorides such as BaMgF 4 (BMF), and ferroelectric semiconductors.
  • the organic ferroelectric materials include polymer ferroelectric materials and the like.
  • the ferroelectric oxides include perovskite ferroelectric materials such as PbZr x Tii_ x O 3 (PZT) , BaTiO 3 and PBTiO 3 , pseudo-ilmenite ferroelectric materials such as LiNbO 3 and LiTaO 3 , tungsten-bronze (TB) ferroelectric materials such as PbNb 3 O 6 and Ba 2 NaNb S Oi 5 , ferroelectric materials having a bismuth layer structure such as SrBi 2 Ta 2 O 9 (SBT), (Bi, La) 4 Ti 3 0i 2 (BLT) and Bi 4 Ti 3 Oi 2 , pyrochlore ferroelectric materials such as La 2 Ti 2 O 7 , and ferroelectric materials such as RMnO 3 , Pb 5 Ge 3 On (PGO) and BiFeO 3 (BFO) including a rare earth element (R) such as Y, Er, Ho, Tm, Yb and Lu.
  • R rare earth element
  • ferroelectric semiconductors include 2-6 compounds such as CdZnTe, CdZnS, CdZnSe, CdMnS, CdFeS, CdMnSe and CdFeSe.
  • the polymer ferroelectric materials include polyvinylidene fluoride (PVDF) , PVDF polymer, PVDF copolymer, PVDF terpolymer and, further, odd-numbered nylon, cyano-polymer, and polymer or copolymer thereof.
  • PVDF polyvinylidene fluoride
  • the inorganic ferroelectric materials including the ferroelectric oxides, the ferroelectric fluorides and the ferroelectric semiconductors have dielectric constants greater than those of the organic ferroelectric materials.
  • the generally proposed piezoelectric element, pyroelectric element, ferroelectric field-effect transistor (FET) or ferroelectric memory device employs the inorganic ferroelectric materials for forming the ferroelectric layer.
  • the above-described inorganic ferroelectric materials require a high temperature treatment above 500 ° C, for example, to be formed on a substrate.
  • the ferroelectric material in accordance with a preferred embodiment of the present invention comprises a mixture of an inorganic ferroelectric material and an organic material.
  • the ferroelectric material in accordance with another preferred embodiment of the present invention comprises a mixture of an inorganic ferroelectric material and an organic ferroelectric material.
  • the inorganic ferroelectric materials are formed at higher temperatures, while their dielectric constants are high.
  • the organic materials including the organic ferroelectric materials are formed at lower temperatures, while their dielectric constants are relatively low. Accordingly, when mixing the inorganic ferroelectric material with the organic material or the organic ferroelectric material, it is possible to obtain a ferroelectric material having a dielectric constant above a predetermined value and formed at a much lower temperature.
  • methods of forming mixed solutions of the inorganic ferroelectric material and the organic material or the organic ferroelectric material are as follows : 1. Mixing an inorganic powder with an organic powder and dissolving the mixed powders in a solvent to form a mixed solution;
  • the inorganic ferroelectric material and the organic material may be mixed with each other as follows:
  • the organic materials mixed with the inorganic ferroelectric material include, a monomer, an oligomer, a polymer, and a copolymer.
  • an organic material having a high dielectric constant may be used.
  • the organic materials having a high dielectric constant include polyvinylpyrrolidone (PVP) , polycarbonate (PC), polyvinyl chloride (PVC), polystyrene (PS), epoxy, polymethylmethacrylate (PMMA), polyimide (PI), polyethylene (PE) , polyvinyl alcohol (PVA) , polyhexamethylene adipamide (nylon 66), polyetherketoneketone (PEKK), and the like.
  • the organic materials include a nonpolar organic material, such as fluorinated para-xylene, fluoropolyarylether, fluorinated polyimide, polystyrene, poly ( ⁇ -methyl styrene) , poly ( ⁇ -vinylnaphthalene) , poly (vinyltoluene) , polyethylene, cis-polybutadiene, polypropylene, polyisoprene, poly (4-methyl-l-pentene) , poly (tetrafluoroethylene) , poly (chlorotrifluoroethylene) , poly (2-methyl-l, 3-butadiene) , poly (p-xylylene) , poly( ⁇ - ⁇ - ⁇ '- ⁇ ' -tetrafluoro-p-xylylene) , poly [1,1- (2-methyl propane) bis (4-phenyl) carbonate] , poly (cyclohexyl methacrylate) , poly (chlorost
  • organic semi-conducting materials that can be used in this invention include soluble compounds and soluble derivatives of compounds of the following list: conjugated hydrocarbon polymers such as polyacene, polyphenylene, poly (phenylene vinylene) , polyfluorene including oligomers of those conjugated hydrocarbon polymers; condensed aromatic hydrocarbons such as anthracene, tetracene, chrysene, pentacene, pyrene, perylene, coronene; oligomeric para substituted phenylenes such as p-quaterphenyl (p-4P) , p- quinquephenyl (p-5P) , p-sexiphenyl (p-6P) ; conjugated heterocyclic polymers such as poly (3-substituted thiophene) , poly (3, 4-bisubstituted thiophene), polybenzothiophene, polyisothianapthene, poly (N-substit
  • the mixture ratio of the inorganic material and the organic material it is possible to appropriately set the mixture ratio of the inorganic material and the organic material. If the mixture ratio of the inorganic ferroelectric material is increased, the formation temperature is increased while the dielectric constant of the mixture is increased, whereas if the mixture ratio of the inorganic ferroelectric material is decreased, the formation temperature is lowered while the dielectric constant of the mixture is reduced.
  • the ferroelectric layer is formed using a mixed solution of an inorganic material and an organic material, it is possible to easily form the ferroelectric layer by an ink-jet printing, spin coating or screen printing method;
  • the formation temperature of the ferroelectric layer is lowered to below about 200 ° C, it is possible to form the ferroelectric layer having excellent data retention characteristics on the silicon substrate;
  • ferroelectric layer Since the formation temperature of the ferroelectric layer is lowered, it is possible to form the piezoelectric element, pyroelectric element, ferroelectric field-effect transistor (FET) or ferroelectric memory device on various kinds of substrates such as an organic material or paper instead of the existing silicon substrate.
  • FET ferroelectric field-effect transistor
  • the substrate may be formed of a Si wafer, a Ge wafer, paper, paper coated with parylene, or an organic material such as flexible plastic.
  • the available organic materials may include polyimide (PI), polycarbonate (PC), polyethersulfone (PES), polyetheretherketone (PEEK), polybutyleneterephthalate (PBT) , polyethyleneterephthalate (PET), polyvinylchloride (PVC), polyethylene (PE), ethylene copolymer, polypropylene (PP), propylene copolymer, poly(4- methyl-1-pentene) (TPX) , polyarylate (PAR), polyacetal (POM), polyphenyleneoxide (PPO) , polysulfone (PSF) , polyphenylenesulfide (PPS), polyvinylidenechloride (PVDC), polyvinylacetate (PVAC) , polyviny
  • FIGS. 2 to 6 are graphs showing polarization characteristics of ferroelectric layers formed of an inorganic ferroelectric material and an organic ferroelectric material such as PbZr x Tii- x O 3 (PZT) and PVDF- TrFE mixed in predetermined ratios.
  • the ferroelectric layer was formed in such a manner that a PZT solution and a PVDF-TrFE solution were mixed in a predetermined ratio to form a mixed solution, the mixed solution was coated on a silicon wafer by a spin coating method, and the resulting silicon wafer was heated in the temperature range of 150 to 200 ° C on a hot plate for a predetermined period of time.
  • the PZT solution was prepared by mixing a PZO solution and a PTO solution, in which the PZO solution was formed by mixing a zirconium propoxide solution with a mixed solution of a 2-methoxyethanol solution and a lead acetate trihydrate solution and the PTO solution was formed by mixing a titanium isopropoxide solution with the mixed solution of the 2-methoxyethanol solution and the lead acetate trihydrate solution.
  • the PVDF-TrFE solution was prepared by dissolving PVDF-TrFE powder in a solvent such as C 4 H 5 O (THF) , C 4 H 8 O (MEK), C 3 H 6 O (acetone), C 3 H 7 NO (DMF), and C 2 H 6 OS (DMSO).
  • FIG. 2 shows the polarization characteristics in which the mixed ratio of the PZT and PVDF-TrFE was 1:1
  • FIG. 3 shows the polarization characteristics in which the mixed ratio of the PZT and PVDF-TrFE was 2:1
  • FIG. 4 shows the polarization characteristics in which the mixed ratio of the PZT and PVDF-TrFE was 3:1
  • FIG. 5 shows the polarization characteristics in which the mixed ratio of the PZT and PVDF-TrFE was 1:2
  • FIG. 6 shows the polarization characteristics in which the mixed ratio of the PZT and PVDF-TrFE was 1:3.
  • the thickness of the ferroelectric layer was 50 ran; in FIGS. 2B, 3B, 4B, 5 and 6, the thickness of the ferroelectric layer was 75 nm; and in FIG. 2C, the thickness of the ferroelectric layer was 100 nm.
  • the characteristic curves represented as A show the polarization characteristics in which the formation temperature of the ferroelectric layer was 190 ° C
  • the characteristic curves represented as B show the polarization characteristics in which the formation temperature of the ferroelectric layer was 170 °C
  • the characteristic curves represented as C show the polarization characteristics in which the formation temperature of the ferroelectric layer was 150 ° C.
  • the formation temperature of the conventional inorganic ferroelectric materials is high, various problems occur when forming the ferroelectric layer on the silicon substrate. Contrarily, when the mixture of the inorganic ferroelectric material and the organic material in accordance with the present invention is used, it is possible to form the ferroelectric layer at a low temperature of below 200 ° C and excellent hysteresis characteristics are shown in a voltage range of -5 to 5 V. Accordingly, the ferroelectric materials in accordance with the present invention can be effective used in manufacturing various electric and electronic elements that can operate at a very low voltage.
  • source and drain regions 2 and 3 and a channel region 4 are formed in predetermined areas of a silicon substrate 1 by the same method as the conventional method.
  • a ferroelectric solution in accordance with the present invention is coated on the above structure by a spin coating, ink-jet printing, or screen printing method, and the resulting structure is baked at a low temperature below 200 ° C, for example, thus forming a ferroelectric layer.
  • the ferroelectric material may include a mixture of an inorganic ferroelectric material and an organic material, a mixture of an inorganic ferroelectric material and an organic ferroelectric material, a mixture of a solid solution of an inorganic ferroelectric material and an organic material, a mixture of a solid solution of an inorganic ferroelectric material and an organic ferroelectric material, and a mixture further comprising a suicide, a silicate or any other metal.
  • the ferroelectric layer except for the area corresponding to the channel region is removed by a buffered oxide etching (BOE) or two-step etching using BOE and gold etchant method, thus forming a ferroelectric layer 5.
  • BOE buffered oxide etching
  • a source electrode 6, a drain electrode 7 and a gate electrode 8 are formed of a metal material, respectively, on the top of the source and drain regions 2 and 3 and the ferroelectric layer 5, like the general one.
  • the ferroelectric layer 5 is formed at a lower temperature below 200 ° C. Accordingly, it is possible to solve the problems that a transition layer of low quality is formed on the boundary between the ferroelectric layer and the silicon substrate due to the high temperature and chemical elements such as Pb and Bi in the ferroelectric material are diffused into the silicon substrate during the formation of the ferroelectric layer on the silicon substrate.
  • FIG. 7 is a graph showing the change in capacitance of the ferroelectric layer formed of the ferroelectric material in accordance with the present invention with the passage of time.

Abstract

L'invention concerne un matériau ferroélectrique pouvant être utilisé efficacement dans la fabrication de divers éléments électriques et électroniques, ainsi qu'un procédé de formation d'une couche ferroélectrique au moyen dudit matériau. Le matériau ferroélectrique selon l'invention est composé d'un mélange de matériau ferroélectrique inorganique et d'un matériau ferroélectrique organique. Le procédé de formation d'une couche ferroélectrique comprend les étapes suivantes : préparation d'une solution mixte d'un matériau ferroélectrique inorganique et d'un matériau organique; formation d'un film ferroélectrique par application de la solution mixte sur un substrat; et formation d'une couche ferroélectrique par recuit du film ferroélectrique.
PCT/KR2007/002886 2006-12-15 2007-06-14 Matériau ferroélectrique et procédé de formation d'une couche ferroélectrique au moyen de ce matériau WO2008072827A1 (fr)

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US12/523,319 US20100215836A1 (en) 2006-12-15 2007-06-14 Ferroelectric material and method of forming ferroelectric layer using the same
JP2009541207A JP2010514155A (ja) 2006-12-15 2007-06-14 強誘電物質及びこれを用いた強誘電体層の形成方法

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010086097A (ko) * 1998-12-10 2001-09-07 추후제출 강유전 메모리 전계-효과 트랜지스터 장치 및 이것의 제조방법
KR20020086568A (ko) * 2000-02-24 2002-11-18 인피네온 테크놀로지스 아게 강유전 층의 제조 방법
KR20030078074A (ko) * 2001-02-09 2003-10-04 인피네온 테크놀로지스 아게 강유전 커패시터의 제조 방법 및 집적 반도체 메모리 칩

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010086097A (ko) * 1998-12-10 2001-09-07 추후제출 강유전 메모리 전계-효과 트랜지스터 장치 및 이것의 제조방법
KR20020086568A (ko) * 2000-02-24 2002-11-18 인피네온 테크놀로지스 아게 강유전 층의 제조 방법
KR20030078074A (ko) * 2001-02-09 2003-10-04 인피네온 테크놀로지스 아게 강유전 커패시터의 제조 방법 및 집적 반도체 메모리 칩

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