WO2008056436A1 - Circuit de détection de tension d'entrée - Google Patents

Circuit de détection de tension d'entrée Download PDF

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Publication number
WO2008056436A1
WO2008056436A1 PCT/JP2007/001158 JP2007001158W WO2008056436A1 WO 2008056436 A1 WO2008056436 A1 WO 2008056436A1 JP 2007001158 W JP2007001158 W JP 2007001158W WO 2008056436 A1 WO2008056436 A1 WO 2008056436A1
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WO
WIPO (PCT)
Prior art keywords
circuit
voltage
input voltage
capacitor
control circuit
Prior art date
Application number
PCT/JP2007/001158
Other languages
English (en)
Japanese (ja)
Inventor
Akira Mizutani
Atsushi Shimbo
Original Assignee
Tamura Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tamura Corporation filed Critical Tamura Corporation
Publication of WO2008056436A1 publication Critical patent/WO2008056436A1/fr

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/80—Constructional details
    • H10N30/802—Drive or control circuitry or methods for piezoelectric or electrostrictive devices not otherwise provided for
    • H10N30/804—Drive or control circuitry or methods for piezoelectric or electrostrictive devices not otherwise provided for for piezoelectric transformers

Definitions

  • the present invention relates to an input voltage detection circuit suitable for use in a control circuit such as a backlight inverter for a liquid crystal television.
  • the input voltage to be detected is 1
  • the control circuit that is generated on the secondary circuit side and operates based on this input voltage is a secondary circuit
  • it relates to an input voltage detection circuit that can insulate the primary side and the secondary side with a simple configuration. .
  • Piezoelectric inverters used as backlight inverters for liquid crystal televisions and notebook personal computers use the frequency characteristics (resonance characteristics) of piezoelectric transformers to make the drive frequency variable.
  • the output current can be controlled. Therefore, even when the input voltage changes, by making the drive frequency variable, it is possible to absorb input fluctuations and keep the output current constant.
  • the conversion efficiency of a piezoelectric transformer is maximized in a specific region near the resonance point, and the conversion efficiency gradually decreases when it is outside this region. Therefore, when the input voltage changes, the frequency changes accordingly. As a result, the frequency range where the maximum efficiency of the piezoelectric transformer is obtained is deviated, and the efficiency of the inverter is lowered. Therefore, in a backlight inverter using a piezoelectric transformer, it is necessary to control the change of the input voltage at the previous stage of the piezoelectric transformer and to input a constant voltage to the piezoelectric transformer.
  • the drive circuit of the piezoelectric transformer using such a full bridge circuit includes a full bridge circuit 1 composed of four FETs (field effect transistors) Q1 to Q4, Each of the piezoelectric circuits 4 includes a filter circuit 3 for converting the rectangular wave output from the drive circuit 2 and the full bridge circuit 1 into a sine wave and one or a plurality of piezoelectric transformers 4 connected to the filter circuit 3.
  • a cold cathode tube (not shown) serving as a backlight is connected to the secondary terminal of the transformer 4.
  • the full bridge circuit 1 is connected to an input voltage source (not shown).
  • the full bridge circuit 1 information on the output voltage of the full bridge circuit 1 (a value obtained by dividing the output voltage) is extracted via the voltage divider 5 and the pulse transformer 6, and the rectifier circuit It is input to the control circuit (microcomputer) 8 via 7.
  • the pulse transformer 6 transmits the analog value, which is the input voltage divided by the voltage divider 5, to the secondary side.
  • the control circuit 8 performs lighting and other control of the backlight, and detects the output voltage (voltage input to the piezoelectric inverter) of the full bridge circuit 1 taken out through the voltage divider 5.
  • the control circuit 8 detects when the output voltage of the full-bridge circuit 1 fluctuates due to a change in input power supply or ripples, and detects this when the full-bridge is connected via the drive circuit 9 and the pulse transformer 6.
  • the fundamental wave component input to the piezoelectric transformer 4 is controlled to be a constant value.
  • FIG. 8 shows voltage waveforms at various parts in the circuit of FIG.
  • the output voltage from the full bridge circuit 1 is a rectangular wave of 40 0 V as an example
  • the output a from the voltage divider 5 is a divided value by the voltage divider 5 of 40 OV.
  • the output b on the secondary side of the pulse transformer 6 appears as a rectangular wave corresponding to the voltage divider output a and is controlled as a signal c smoothed by the capacitor C 1 and the resistor R 1 constituting the rectifier circuit 7. Input to circuit 8.
  • control circuit 8 a part of the input voltage signal c is sampled and the voltage value is sampled. A control signal d is output so that a predetermined duty corresponding to is output from the full bridge circuit. This control signal d is sent to the drive circuit 2 via the pulse transformer 6, and the drive circuit 2 changes the duty of the full bridge circuit 1 based on this control signal, so that the output from the full bridge circuit 1 is output. The voltage is held at a constant value.
  • the principle is to insulate the power supply from the equipment used by stepping down or boosting it from the viewpoint of user safety.
  • an insulation type piezoelectric transformer is used as the piezoelectric transformer 4 to insulate the inverter portion from the primary side to the secondary side.
  • the primary side and the secondary side are electrically separated by arranging the pulse transformer 6 between the voltage divider 5 and the control circuit 8 and between the control circuit 8 and the drive circuit 2 of the full bridge circuit. And insulation is ensured.
  • Patent Document 1 Japanese Patent Laid-Open No. 10-20000 1 74
  • Patent Document 2 Japanese Patent Laid-Open No. 2 0 0 2 — 2 3 3 1 5 8
  • the pulse transformer 6 having the primary and secondary windings and the iron core is expensive, and its shape is large, and it is difficult to reduce the size of the device. There's a problem.
  • the distance between the primary and secondary windings is required, and there is a limit to downsizing the pulse transformer 6.
  • Such problems are not limited to the piezoelectric inverter, but the primary side and the secondary side of the input voltage source are insulated by using a pulse transformer, and the input voltage from the primary side is reduced. This was true for all input voltage detection circuits that need to be detected on the secondary side.
  • the present invention has been proposed to solve the above-described problems of the prior art, and the object thereof is to provide an input voltage source provided on the primary side and a secondary side.
  • a capacitor is placed between the input voltage detector and the secondary side of this capacitor.
  • the input voltage information can be transmitted to the secondary side while isolating the primary and secondary sides without using a pulse transformer.
  • the object is to provide a voltage detection circuit.
  • an input voltage detection circuit has an input voltage source provided on the primary side connected to the primary terminal of the capacitor, and an input provided on the secondary side.
  • a rectifier circuit having a voltage dividing resistor is connected between the capacitor and the detection unit, a voltage appearing at a secondary terminal of the capacitor is divided by the rectification circuit, and detected by the detection unit;
  • a rectifier circuit having a smoothing capacitor is connected between the capacitor and the detection unit, and the voltage appearing at the secondary terminal of the capacitor is smoothed by the rectification circuit and detected by the detection unit.
  • the input voltage source is a switching circuit such as a full bridge circuit provided on the primary side
  • the detection unit is a control circuit of the switching circuit provided on the secondary side, the control It is also an aspect of the present invention that the circuit controls the timing of the output voltage from the switching circuit and the sampling timing for detecting the voltage appearing at the secondary terminal of the condenser.
  • the control circuit may control the sampling timing for detecting the input voltage so as to be delayed from the rise of the capacitor charge while avoiding the noise generation region.
  • the switching circuit is a full-bridge circuit, and the control circuit controls the drive circuit of the full-bridge circuit based on the voltage detected at the secondary terminal of the condenser. Duty control Thus, it is possible to adopt a configuration in which the voltage output from the full bridge circuit is held at a constant value.
  • insulation between the primary side input voltage source and the secondary side control circuit is achieved by a simple configuration in which a small-capacitance capacitor is arranged instead of the conventional pulse transformer. This makes it possible to reduce the size and cost of the circuit.
  • FIG. 1 is a circuit diagram showing a first embodiment of an input voltage detection circuit of the present invention.
  • FIG. 2 is a timing chart showing voltage waveforms at various parts of the circuit according to the first embodiment.
  • FIG. 3 is a circuit diagram showing a second embodiment of the input voltage detection circuit of the present invention.
  • FIG. 4 is a timing chart showing voltage waveforms at various parts of the circuit according to the second embodiment.
  • FIG. 5 is a timing chart showing the timing of the sampling timing by the control circuit in the second embodiment.
  • FIG. 6 is a circuit diagram showing a third embodiment of the input voltage detection circuit of the present invention.
  • FIG. 7 is a circuit diagram showing a conventional input voltage detection circuit.
  • FIG. 8 is a timing chart showing voltage waveforms at various parts of the circuit in the conventional circuit. Explanation of symbols [0025] 1 ... Full bridge circuit
  • an input voltage as an input signal as viewed from the secondary control circuit is drawn from one output terminal of the full bridge circuit 1, and this input voltage is supplied to the primary side of the capacitor 10. It is connected.
  • This capacitor 10 has an insulating function similar to the pulse transformer in the prior art of FIG. 7. Unlike FIG. 7, the input voltage is directly connected to the capacitor 10 without going through the voltage divider 5. ing.
  • This capacitor 10 has a small capacity in which charging is completed at the initial stage of ON duty 1 of the full bridge circuit 1 output as a rectangular wave, for example, when the input voltage is 40 OV. It has a capacity of about 0 0 p F.
  • a rectifier circuit 7 comprising a voltage dividing resistor R 1, R2 for the control circuit 8 and a diode D connected in parallel with the voltage dividing resistors R 1, R 2. Is connected.
  • the microcomputer that is the control circuit 8 is connected to the full bridge circuit 1 via the secondary side drive circuit 9, the pulse transformer 6, and the primary side drive circuit 2. Turn on / off each FET (Q1 to Q4) in circuit 1, and output a signal (indicated by d in the figure) that controls the timing to alternately output +400 V and _400 V square waves as an example .
  • the microcomputer outputs the duty set in advance in the microcomputer constituting the control circuit 8 based on the measured input voltage information. As an example, if the duty is 67% at 400V, if the duty is 440V, the control signal d that drives the full bridge circuit at the duty determined so that the fundamental wave is reduced by 10% is output. .
  • the control circuit 8 determines a sampling timing for detecting the voltage generated at the secondary terminal of the capacitor 10 at a constant timing.
  • the secondary terminal of the capacitor 10 charged by the input voltage is applied with the same level of voltage as the input voltage at the start of charging, but after that, the secondary voltage is charged at a constant rate as the charging proceeds. Terminal voltage decreases.
  • the timing is important for detecting the input voltage. Therefore, the sampling timing and the control timing of the full bridge circuit 1 are the same as the clock provided in the control circuit 8. Synchronized.
  • FIG. 2 corresponds to the timing chart shown in FIG. 8 in the description of the prior art of FIG.
  • the output voltage from the full bridge circuit 1 has a voltage value of + 400V and a duty cycle corresponding to the duty determined by the full bridge circuit, as shown in FIG. 2a.
  • a rectangular wave having a duration is applied to the primary terminal of the capacitor 10.
  • the same voltage as the rectangular wave a appears as a secondary side input voltage at the secondary terminal of the capacitor 10. Note that when the capacitor 10 is charged, its secondary voltage drops, so the voltage is detected at the initial stage of charging.
  • the capacitance of the capacitor 10 is appropriately small (for example, 1 0 0
  • the leakage current due to the capacitor 10 becomes less than the specified value, and the primary and secondary sides of the condenser are considered to be insulated.
  • This secondary terminal voltage a is divided by the voltage-dividing resistors R 1 and R 2 constituting the rectifier circuit 7 and gradually decreases with the charging of 10.
  • a voltage having a waveform such as is input to the control circuit 8.
  • the capacitor 10 is set to about 100 pF,
  • R 1 is about 1 ⁇ and R 2 is about 4.7 k ⁇ .
  • This sampling timing is performed in synchronization with the timing at which the control circuit 8 outputs the control signal shown in FIG. 2d and controls the drive circuit 2 of the full bridge circuit 1 to output a rectangular wave. .
  • the output voltage of the full bridge circuit 1 is detected on the control circuit 8 side by detecting the voltage appearing at the secondary terminal of the capacitor. It becomes possible to do. Then, the control signal d is output from the detected input voltage at a predetermined duty value corresponding to the voltage value in the control circuit 8, so that the control signal d corresponds to the fluctuation of the output voltage of the full bridge circuit 1.
  • the drive circuit 2 it is possible to change the duty of the full bridge circuit 1 and suppress the fluctuation of the output voltage of the full bridge circuit 1.
  • the primary side such as the full bridge circuit 1 and its drive circuit 2 and the secondary side such as the control circuit 8 are insulated from each other by the capacitor 10. There is no problem.
  • a capacitor having a small capacity is used, it is possible to reduce the size and price as compared with the conventional pulse transformer.
  • control circuit 8 controls the output timing of the rectangular wave of the full bridge circuit 1 and also uses the same control circuit 8 to control the detection timing of the detection voltage, thereby sampling. Timing can be set with high accuracy, and noise resistance can be easily improved.
  • a smoothing capacitor C is added to the rectifier circuit 7.
  • the delay time until the control signal d from the control circuit 8 reaches the drive circuit 2 and the drive circuit 2 controls the full bridge circuit 1 to output a rectangular wave is 2 0 0 to 5 50 ns, secondary end of capacitor 1 0
  • the time that transient noise occurs when the input voltage rises at the child is usually less than 200 ns.
  • the measurement timing that can be sampled without being affected by noise and with low error is a maximum of 160 ns and a minimum of 50 ns.
  • the timing of the sampling timing is compared with that of the first embodiment by detecting the input voltage using any time point of the voltage change approximated to the gently inclined straight line as the sampling timing. Even if it is set to a wide range, the detection accuracy will not decrease.
  • C 1 and C 2 are added to have a discharge time constant.
  • a circuit with a discharge time constant usually has a charge time constant, so instantaneous charging is difficult.
  • the input voltage applied to the primary terminal of the capacitor 10 is a voltage with respect to the ground of the primary circuit
  • the voltage detected at the secondary terminal of the capacitor 10 Since is a voltage with respect to the ground of the secondary circuit, it may be affected by the noise voltage that exists between the ground of the primary and secondary. But, in the present embodiment, as shown in FIG. 5, the influence of noise can be reduced by setting the sampling timing while avoiding the power change point where noise easily occurs.
  • a voltage dividing circuit is configured by connecting capacitors C 3 and C 4 to the primary side of the capacitor 10, and the voltage is applied from the full bridge circuit 1 to the primary side of the capacitor 10.
  • the input voltage information is transmitted to the secondary side of the capacitor after dividing the voltage (for example, 400 V as an example).
  • the present invention is not limited to the embodiment described above, and includes other embodiments as follows.
  • a full bridge circuit that outputs a rectangular wave by a control circuit is used as an input voltage source, but a rectangular wave that is output from a half-bridge circuit or other primary-side switching circuit. This can be widely used when detecting the voltage of the secondary control circuit that is isolated from the primary side.
  • the rectifier circuit is not limited to that shown in FIGS. 1 and 3, and a circuit that forms various detection waveforms can be used in accordance with the sampling timing and the detection accuracy. Also insulated Sampling timing tolerance can be adjusted by changing the time constant of capacitor 10 that secures.
  • control circuit 8 outputs the duty value corresponding to the detected voltage value as the control signal. By comparing the detected value with the reference signal, the sampling voltage value and the reference signal are output. It is also possible to output a control signal d such that becomes equal.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Inverter Devices (AREA)

Abstract

L'invention concerne un circuit de détection de tension d'entrée utilisé pour transférer des informations sur une tension d'entrée au côté secondaire sans utiliser aucun transformateur d'impulsions tout en maintenant l'isolation électrique entre le côté primaire et le côté secondaire. Le circuit comporte un circuit en pont complet (1) composé de Q1 à Q4, d'un circuit de commande (2) pour celui-ci, d'un circuit de filtrage (3) pour transformer une onde rectangulaire émise par le circuit en pont complet (1) en une onde sinusoïdale, et d'un ou de plusieurs transformateurs piézoélectriques (4) connectés au circuit de filtrage (3). La tension de sortie provenant du circuit en pont complet (1) est appliquée à la borne primaire du condensateur (10). Au niveau de la borne secondaire du condensateur (10), la même tension que celle de l'onde rectangulaire apparaît en tant que tension d'entrée du côté secondaire. La tension d'entrée est entrée dans un circuit de commande (microordinateur) (8) par un circuit redresseur (7) de façon à détecter la tension d'entrée. Le circuit en pont complet (1) et le circuit de commande (8) sont électriquement isolés par le condensateur (10).
PCT/JP2007/001158 2006-11-09 2007-10-24 Circuit de détection de tension d'entrée WO2008056436A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2006-304608 2006-11-09
JP2006304608A JP2010045867A (ja) 2006-11-09 2006-11-09 入力電圧検出回路

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WO2008056436A1 true WO2008056436A1 (fr) 2008-05-15

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015156139A1 (fr) * 2014-04-11 2015-10-15 株式会社村田製作所 Dispositif d'alimentation électrique

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10164848A (ja) * 1996-11-26 1998-06-19 Matsushita Electric Works Ltd 電力変換装置
JPH10285942A (ja) * 1997-02-06 1998-10-23 Nippon Cement Co Ltd 圧電トランスの制御回路及び制御方法
JPH11296235A (ja) * 1998-04-09 1999-10-29 Yamaha Corp 電源回路及びこれを用いた電気機器
JP2000116141A (ja) * 1998-10-05 2000-04-21 Murata Mfg Co Ltd 圧電トランスインバータ
JP2001319767A (ja) * 2001-04-02 2001-11-16 Matsushita Electric Ind Co Ltd 高周波加熱装置
JP2003061342A (ja) * 2001-06-05 2003-02-28 Toto Ltd 圧電トランス回路装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10164848A (ja) * 1996-11-26 1998-06-19 Matsushita Electric Works Ltd 電力変換装置
JPH10285942A (ja) * 1997-02-06 1998-10-23 Nippon Cement Co Ltd 圧電トランスの制御回路及び制御方法
JPH11296235A (ja) * 1998-04-09 1999-10-29 Yamaha Corp 電源回路及びこれを用いた電気機器
JP2000116141A (ja) * 1998-10-05 2000-04-21 Murata Mfg Co Ltd 圧電トランスインバータ
JP2001319767A (ja) * 2001-04-02 2001-11-16 Matsushita Electric Ind Co Ltd 高周波加熱装置
JP2003061342A (ja) * 2001-06-05 2003-02-28 Toto Ltd 圧電トランス回路装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015156139A1 (fr) * 2014-04-11 2015-10-15 株式会社村田製作所 Dispositif d'alimentation électrique
JP5861810B1 (ja) * 2014-04-11 2016-02-16 株式会社村田製作所 電源装置

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