WO2008004557A1 - Branch circuit, high frequency circuit and high frequency module - Google Patents

Branch circuit, high frequency circuit and high frequency module Download PDF

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Publication number
WO2008004557A1
WO2008004557A1 PCT/JP2007/063323 JP2007063323W WO2008004557A1 WO 2008004557 A1 WO2008004557 A1 WO 2008004557A1 JP 2007063323 W JP2007063323 W JP 2007063323W WO 2008004557 A1 WO2008004557 A1 WO 2008004557A1
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WO
WIPO (PCT)
Prior art keywords
frequency
circuit
capacitor
transmission line
low
Prior art date
Application number
PCT/JP2007/063323
Other languages
French (fr)
Japanese (ja)
Other versions
WO2008004557B1 (en
Inventor
Kenji Hayashi
Masayuki Uchida
Original Assignee
Hitachi Metals, Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Metals, Ltd. filed Critical Hitachi Metals, Ltd.
Priority to JP2008523693A priority Critical patent/JP5463669B2/en
Priority to CN2007800250950A priority patent/CN101485085B/en
Priority to US12/304,898 priority patent/US8183956B2/en
Priority to EP07768093.2A priority patent/EP2040377B1/en
Priority to KR1020087029504A priority patent/KR101421452B1/en
Priority to KR1020147007807A priority patent/KR101404535B1/en
Publication of WO2008004557A1 publication Critical patent/WO2008004557A1/en
Publication of WO2008004557B1 publication Critical patent/WO2008004557B1/en

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/46Networks for connecting several sources or loads, working on different frequencies or frequency bands, to a common load or source
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/46Networks for connecting several sources or loads, working on different frequencies or frequency bands, to a common load or source
    • H03H7/463Duplexers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/005Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges
    • H04B1/0053Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges with common antenna for more than one band
    • H04B1/0057Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges with common antenna for more than one band using diplexing or multiplexing filters for selecting the desired band
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40Circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40Circuits
    • H04B1/50Circuits using different frequencies for the two directions of communication
    • H04B1/52Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H1/00Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
    • H03H2001/0021Constructional details
    • H03H2001/0085Multilayer, e.g. LTCC, HTCC, green sheets
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/0115Frequency selective two-port networks comprising only inductors and capacitors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/0123Frequency selective two-port networks comprising distributed impedance elements together with lumped impedance elements
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/17Structural details of sub-circuits of frequency selective networks
    • H03H7/1708Comprising bridging elements, i.e. elements in a series path without own reference to ground and spanning branching nodes of another series path
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/17Structural details of sub-circuits of frequency selective networks
    • H03H7/1741Comprising typical LC combinations, irrespective of presence and location of additional resistors
    • H03H7/1758Series LC in shunt or branch path
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/17Structural details of sub-circuits of frequency selective networks
    • H03H7/1741Comprising typical LC combinations, irrespective of presence and location of additional resistors
    • H03H7/1766Parallel LC in series path
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/17Structural details of sub-circuits of frequency selective networks
    • H03H7/1741Comprising typical LC combinations, irrespective of presence and location of additional resistors
    • H03H7/1775Parallel LC in shunt or branch path
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/17Structural details of sub-circuits of frequency selective networks
    • H03H7/1741Comprising typical LC combinations, irrespective of presence and location of additional resistors
    • H03H7/1783Combined LC in series path
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/38Impedance-matching networks
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/46Networks for connecting several sources or loads, working on different frequencies or frequency bands, to a common load or source
    • H03H7/463Duplexers
    • H03H7/465Duplexers having variable circuit topology, e.g. including switches

Definitions

  • the present invention relates to a demultiplexing circuit, a high-frequency circuit, and a high-frequency module using the demultiplexing circuit used in a communication device such as a wireless communication device between mobile communication devices such as mobile phones, electronic devices, and electric devices. .
  • EGSM Extended Global System for Mobile Communications
  • DCS Digital Cellular System
  • PCS Personal Communication Service
  • TDMA Time division multiple access
  • PDC Personal Digital Cellular
  • a dual-band compatible high-frequency switch module used in portable communication devices compatible with two systems of EGSM and DCS
  • three types of EGSM, DCS, and PCS A triple-band compatible high-frequency switch module, etc., used for portable communication devices compatible with the system has been proposed.
  • wireless LAN represented by the IEEE802.il standard is widely used, but there are a plurality of standards with different frequency bands in this wireless LAN standard.
  • Various high-frequency circuits are also used in multiband communication devices using wireless LAN.
  • a high-frequency switch module incorporating a circuit for demultiplexing transmission / reception signals of a plurality of frequency bands transmitted / received by an antenna and a switch for switching transmission / reception paths is provided. is necessary.
  • High-frequency switch modules which are key parts of multiband wireless communication, are increasingly required to be smaller and have higher performance. In particular, it is essential to remove unwanted band noise.
  • Japanese Patent Application Laid-Open No. 11-27177 uses a stray capacitance generated between the antenna and the ground in order to eliminate harmonic distortion generated in the transmission signal from the power amplifier.
  • a high-frequency switch with a reduced number of filters is proposed.
  • This high frequency switch T suchi adjusts the stray capacitance generated between the antenna terminal, the transmitter circuit terminal and the receiver circuit terminal and the ground, and adjusts the length of the transmission line, which is a choke element, to approximately / 6.
  • An attenuation pole is provided in the harmonic band.
  • a specific adjustment method is not described, it is very troublesome to adjust all of these stray capacitances and at the same time adjust the transmission line to a desired length. For example, in a GSM system, it is necessary to reduce the harmonic level up to about 7th harmonic. Since this method uses only the 3rd harmonic attenuation pole, this higher harmonic level is reduced. Can not ,.
  • Japanese Patent Laid-Open No. 2003-69362 proposes a diplexer in which a parallel resonant circuit having a resonance frequency of the second harmonic is provided on the low-pass filter terminal side in order to efficiently remove the second harmonic. ing.
  • this diplexer by providing parallel resonance circuits at the common terminal and low-pass filter terminal, signal loss is reduced and harmonics twice the first frequency on the low frequency side are efficiently removed.
  • the low-pass filter circuit of the diplexer has two parallel resonance circuits composed of a coil and a capacitor, and a grounding capacitor is provided at the connection portion of these parallel resonance circuits and the low-pass filter terminal. .
  • the circuit configuration becomes complicated as well as the diplexer becomes larger.
  • multi-stage low-pass filters have a large insertion loss, which has a detrimental effect on characteristics.
  • the low-pass filter circuit of this diplexer is set to attenuate the second frequency or twice the first frequency, so that unnecessary bands other than the nth harmonic cannot be sufficiently reduced.
  • EGSM and DCS use frequency bands different from the 900 MHz band and 1800 MHz band, respectively, but if both circuits are mixed, the signal leaks and the isolation characteristics deteriorate. This problem becomes apparent as the high frequency components become smaller.
  • Japanese Patent Laid-Open No. 20 01-352202 divides a region in the plane direction of a laminate in one high-frequency switch module that handles a plurality of transmission / reception systems having different passbands. A high-frequency switch module is proposed. However, since different regions are formed separately in the plane direction of the laminate, there is a problem that one transmission / reception system and the other transmission / reception system cannot be shielded sufficiently.
  • Japanese Patent Application Laid-Open No. 2004-3281 relates to a low-pass filter used in a high-frequency switch module No. 36 is a low-pass filter in which a series resonance circuit and a parallel resonance circuit are cascaded in order to improve the attenuation characteristics of the second harmonic and the third harmonic of the signal wave (fundamental wave).
  • a low-pass filter is proposed in which a grounding capacitor is connected to both ends, and a phase-adjustment transmission line is interposed between the series resonant circuit and the parallel resonant circuit.
  • the attenuation characteristics and insertion loss of this low-pass filter were not always sufficient in response to the demand for higher performance due to the multiband and the like.
  • a low-pass filter and a notch filter are combined into a composite filter and a transmission line connecting them is added, characteristic degradation due to electromagnetic interference between circuits, transmission lines constituting the filter, and capacitance, and parasitic capacitance is reduced. Occur.
  • the composite filter sacrifices downsizing to improve characteristics. In this way, with the progress of high integration of multilayer modules, the layout of low-pass filters and inductors and other elements that constitute multilayer modules using the same should be designed while satisfying the demands for miniaturization and high performance. Was difficult. Disclosure of the invention
  • a first object of the present invention is to provide a branching circuit that reduces the unnecessary band while suppressing the complexity and size of the circuit and the increase in insertion loss.
  • a second object of the present invention is to provide a high-frequency circuit including such a branching circuit.
  • a third object of the present invention is to provide a high frequency module in which such a high frequency circuit is configured on a multilayer substrate.
  • a fourth object of the present invention is to provide a high-frequency joule that suppresses mutual interference and signal leakage between transmission / reception circuits having different frequency bands while suppressing an increase in mounting area.
  • a fifth object of the present invention is to provide a high-frequency module having a low-pass filter that is easy to design an inductor and a capacitor and has excellent filter performance.
  • a first branching circuit of the present invention includes a common terminal, a low frequency terminal, a high frequency terminal, and a low frequency filter having a low frequency filter provided between the common terminal and the low frequency terminal.
  • the parallel resonant circuit that suppresses the unnecessary band is configured by using a part of the first transmission line on the low frequency side path, so that the branching circuit can be reduced in size.
  • the capacitor is connected in parallel to a part on the low frequency terminal side of the first transmission line to form a parallel resonant circuit, and the part other than the part of the first transmission line. It is preferable that this part constitutes an inductance part.
  • the portion constituting the inductance portion is arranged on the common terminal side, and the portion constituting the parallel resonance circuit is arranged on the low frequency terminal side, thereby arranging the parallel resonance circuit.
  • the degree of freedom increases.
  • One end of the capacitor may be connected in parallel to a part of the first transmission line, and the other end may be connected to another circuit element connected to the low frequency terminal.
  • a second branching circuit of the present invention includes a common terminal, a low-frequency terminal, a high-frequency terminal, and a low-frequency filter having a low-frequency filter provided between the common terminal and the low-frequency terminal.
  • the high frequency filter may include a first capacitor connected to the common terminal, and the parasitic capacitance may be formed on the common terminal side of the first capacitor.
  • an electrode connected to the common terminal among the counter electrodes constituting the first capacitor and a ground electrode are arranged to face each other, and thus the parasitic is interposed between the two electrodes. It is preferable that the capacity is formed.
  • the high-frequency filter includes a first capacitor connected to the common terminal, a second capacitor connected between the first capacitor and the high-frequency terminal, A third transmission line connected between the first capacitor and the second capacitor and the ground, and a series resonance circuit consisting of a third capacitor, the third transmission line,
  • the one capacitor, the second capacitor, and the third capacitor are configured in a stacked body in which dielectric layers having electrode patterns are stacked, and the first capacitor is configured in the stacked body. It is preferable that the electrode connected to the common terminal is opposed to the ground electrode.
  • the area of the ground electrode that can efficiently generate parasitic capacitance and the first capacitor can be easily adjusted by changing the distance between the electrode connected to the common terminal and the ground electrode among the counter electrodes constituting the.
  • a first high-frequency circuit of the present invention includes the first branching circuit, includes a second transmission line connected to the low-frequency terminal, and the capacitor includes the first transmission line. A part and at least a part of the second transmission line are connected in parallel. Since the parallel resonance circuit that suppresses the unnecessary band is configured by using the first transmission line and the transmission line of another circuit connected to the low frequency terminal, the branching circuit can be reduced in size. Further, since the capacitor is connected so as to straddle the first transmission line and the second transmission line, the capacitor can be easily arranged when the high-frequency circuit is formed on the multilayer substrate.
  • the high-frequency circuit includes a switch circuit that is connected to the low-frequency terminal and switches between the transmission-side path and the reception-side path of the low-frequency side path, and the second transmission line is the switch It is preferable that the transmission line is provided in the circuit on the receiving side. With this configuration, a small high-frequency circuit that has a switch circuit in the subsequent stage of the branching circuit and suppresses unnecessary bands can be obtained.
  • the branching circuit or the high-frequency circuit is configured on a multilayer substrate formed by laminating dielectric layers on which electrode patterns are formed.
  • an electrode pattern constituting a part of the first transmission line, an electrode pattern constituting at least a part of the second transmission line, and an electrode pattern of the capacitor are formed of a laminate. Overlapping in the stacking direction! / This configuration can reduce the size of the parallel resonant circuit and is advantageous for downsizing the high-frequency module.
  • the second high-frequency module of the present invention is characterized in that the second demultiplexing circuit is configured on a multilayer substrate formed by laminating dielectric layers in which electrode patterns are formed. If the common terminal of this demultiplexing circuit is connected to other circuit elements, the parasitic capacitance functions as a capacitive element, and the design efficiency and flexibility of the high-frequency module is improved.
  • the high frequency module includes a first switch circuit that switches between a transmission system and a reception system in a first frequency band divided by the branching circuit, and a transmission in a second frequency band divided by the branching circuit. It is preferable to have a second switch circuit that switches between the system and the receiving system.
  • a third high-frequency module of the present invention is used for a multiband radio communication device that selectively uses at least a first frequency band and a second frequency band higher than the first frequency band.
  • a demultiplexing circuit that separates a first transmission / reception system in the first frequency band and a second transmission / reception system in the second frequency band; and a transmission system connected to the demultiplexing circuit and connected to the first transmission / reception system
  • a first switch circuit for switching the reception system, and a second switch circuit connected to the branching circuit and for switching the transmission system and the reception system of the second transmission / reception system, the branching circuit
  • the first switch circuit and the second switch circuit are configured as a laminate formed by laminating dielectric layers on which electrode patterns are formed, and the branching circuit, the first switch circuit, and the second switch circuit are formed.
  • the transmission line through which the signal in the first frequency band passes is formed on one side in the stacking direction of the ground electrode provided in the dielectric layer in the stack, A transmission line through which a signal in a frequency band passes is formed on the other side in the stacking direction of the ground electrode.
  • a transmission / reception circuit for a third frequency band or the like having a different frequency band may be provided.
  • transmission lines through which signals in the third or fourth frequency band pass are formed collectively on one side of the ground electrode.
  • the second frequency band and the frequency band of the second harmonic of the first frequency band are substantially the same. If the frequency band of the second frequency band and the double frequency band of the first frequency band are the same, the leakage of unwanted harmonics in the first frequency band has a significant effect on the signal in the second frequency band. Therefore, the third high-frequency module that reliably shields the first frequency band and the second frequency band is particularly effective.
  • the third high-frequency module includes a low-pass filter including a transmission line that forms an inductance and a capacitor in order to suppress harmonics, and an electrode pattern that forms the transmission line is formed.
  • the dielectric layer on which the electrode pattern constituting the capacitor is formed is separated in the laminating direction by a ground electrode, and the direction in which the ground electrode is laminated with respect to the electrode pattern constituting the transmission line It is preferable not to have a ground electrode facing the opposite side. In this case, one side of the ground electrode in the stacking direction is an inductance forming part, and the other side is a capacitor forming part. In this configuration, since the ground electrode is disposed between the transmission line and the capacitor, interference between the transmission line and the capacitor is prevented, the filter performance is improved, and the transmission line and the capacitor are easily designed.
  • the third high-frequency module does not include a ground electrode facing the opposite side of the ground electrode in the stacking direction with respect to the electrode pattern constituting the capacitor.
  • the low-pass filter can be reduced in size.
  • the high-frequency module preferably includes a plurality of the capacitors. In the case of having a plurality of capacitors such as a ⁇ -type or ladder-type low-pass filter, interference is likely to occur if the capacitors are arranged close to the inductance. On the other hand, by forming the plurality of capacitors together on one side in the stacking direction of the ground electrode, interference between the transmission line forming the inductance and the capacitor can be effectively suppressed.
  • At least one of the capacitors may be connected in parallel to the transmission line. Even with this configuration, the interference between the transmission line and the capacitor is effectively suppressed.
  • the branching circuit of the present invention includes a first transmission line in which a low-frequency filter is connected in series to the low-frequency side path, and a capacitor connected in parallel to a part of the first transmission line. Therefore, the unnecessary band can be effectively suppressed while being small in size and low loss.
  • the high-frequency module of the present invention can suppress signal leakage and interference between transmission / reception systems having different frequency bands while maintaining a small size.
  • FIG. 1 is a diagram showing an equivalent circuit of a branching circuit according to an embodiment of the present invention.
  • FIG. 2 is a diagram showing an equivalent circuit of a high-frequency circuit according to another embodiment of the present invention.
  • FIG. 3 is a diagram showing an equivalent circuit of the quad-band antenna switch circuit of the present invention.
  • FIG. 4 is a partial development view showing an electrode layer with an electrode pattern constituting the high-frequency module according to one embodiment of the present invention.
  • FIG. 5 is a graph showing pass characteristics of a high-frequency module according to an embodiment of the present invention.
  • FIG. 6 is a graph showing pass characteristics of a high-frequency switch module of a comparative example.
  • FIG. 7 is a diagram showing an equivalent circuit of a branching circuit according to another embodiment of the present invention.
  • FIG. 8 is a diagram showing parasitic capacitance in an equivalent circuit of a branching circuit according to another embodiment of the present invention.
  • FIG. 9 schematically shows a part of a laminate of a high-frequency module according to another embodiment of the present invention.
  • FIG. 10 is a diagram showing an equivalent circuit of a quad-band antenna switch circuit according to another embodiment of the present invention.
  • FIG. 11 is a block diagram showing a high-frequency module according to still another embodiment of the present invention.
  • FIG. 12 is a partial development view showing a dielectric layer with an electrode pattern constituting a high-frequency module according to still another embodiment of the present invention.
  • FIG. 13 is a partial development view showing a dielectric layer with an electrode pattern constituting still another high-frequency switch module of the present invention.
  • FIG. 14 is a partial development view showing a dielectric layer with an electrode pattern constituting a laminated high-frequency module using a low-pass filter according to an embodiment of the present invention.
  • FIG. 15 is a diagram showing an equivalent circuit of a low-pass filter according to one embodiment of the present invention.
  • FIG. 16 is a diagram showing an equivalent circuit of a low-pass filter according to another embodiment of the present invention.
  • FIG. 17 (a) is a cross-sectional view schematically showing an example of a low-pass filter used in the present invention.
  • FIG. 17 (b) is a cross-sectional view schematically showing another example of the low-pass filter used in the present invention.
  • FIG. 1 shows an equivalent circuit of a branching circuit according to an embodiment of the present invention.
  • the demultiplexing circuit passes the transmission signal of the high-frequency side transmission circuit or the low-frequency side transmission circuit during transmission, and demultiplexes the reception signals with different frequencies during reception to the high-frequency side reception circuit or low-frequency side reception circuit.
  • the branching circuit shown in FIG. 1 has a common terminal Pc, a low-frequency terminal PI, and a high-frequency terminal Ph, and has a low-frequency filter and a high-frequency filter, and signals connected to the common terminal Pc using these filters.
  • the path is branched into a low-frequency path that connects the common terminal Pc and the low-frequency terminal P1, and a high-frequency path that connects the common terminal Pc and the high-frequency terminal Ph.
  • the low frequency filter has one end connected between the first transmission line LL1 provided between the common terminal Pc and the low frequency terminal P1, and between the first transmission line LL1 and the low frequency terminal P1.
  • the other end is grounded
  • the transmission line LL2 is composed of a series resonant circuit of the first capacitor CL1.
  • a capacitor C is connected in parallel to a part of the first transmission line LL1 (low frequency terminal P1 side) of the low frequency filter, thereby forming a parallel resonance circuit.
  • the remaining part of the first transmission line LL1 (common terminal Pc side) constitutes an inductor. Since part of the first transmission line LL1 forms a parallel resonant circuit with the capacitor C, it is possible to avoid an increase in the size of the low frequency filter circuit due to the addition of the parallel resonant circuit.
  • the capacitor C is connected in parallel with a part of the first transmission line LL1, not limited to this configuration, and the capacitor C is another circuit connected in series with the first transmission line LL1. It may be connected in parallel to the part including the element. Except for the series resonant circuit and the parallel resonant circuit of a part of the first transmission line LL1 and the capacitor C, the configuration is not limited to that shown in FIG.
  • the high frequency filter includes the second and third capacitors CH4 and CH5 connected between the common terminal Pc and the high frequency terminal Ph, and the connection point between the second and third capacitors CH4 and CH5 and the ground.
  • a series resonance circuit including a transmission line LH4 and a fourth capacitor CH6 connected between them.
  • the circuit configuration of the high-frequency filter is not limited to this configuration, and can be changed as appropriate.
  • a branching circuit having a configuration in which a part of the first transmission line LL1 and the capacitor C are connected in parallel can be configured as follows in a multilayer substrate including a dielectric layer having an electrode pattern.
  • the electrode pattern of the capacitor C is formed on the adjacent dielectric layer so as to face a part of the electrode pattern of the first transmission line LL1 formed on the dielectric layer, and one end of these electrode patterns is formed.
  • the width of a part of the first transmission line LL1 may be made larger than the other part.
  • FIG. 2 shows an equivalent circuit of a high-frequency circuit according to an embodiment of the present invention.
  • This high-frequency circuit includes a demultiplexing circuit and has a second transmission line Lg2 provided in a subsequent circuit connected to the low-frequency terminal P1 of the demultiplexing circuit, and the low-frequency of the first transmission line LL1.
  • Terminal P1 side A capacitor is connected in parallel to a part and at least a part of the second transmission line Lg2 on the low frequency terminal PI side.
  • the subsequent circuit is a switch circuit (circuit configuration will be described later) that switches between the transmission side path and the reception side path of the low frequency side path.
  • the second transmission line Lg2 is provided in the receiving side path of the switch circuit.
  • Figure 2 also shows the diode Dgl of the switch circuit connected to the low frequency terminal P1.
  • the other circuit configurations such as the high frequency filter are the same as those shown in FIG.
  • the capacitor C may be connected in parallel with a part of the second transmission line Lg2, or may be connected in parallel with the entire second transmission line Lg2.
  • the high-frequency circuit shown in FIG. 2 can be configured as a high-frequency module by forming it on a multilayer substrate having a dielectric layer force on which an electrode pattern is formed.
  • the high-frequency module include an antenna switch module that switches a signal path between a transmission system and a reception system connected to an antenna, a high-frequency amplifier module that includes a high-frequency amplifier circuit that amplifies a transmission signal, and the antenna switch module.
  • the integrated module include, but are not limited to.
  • FIG. 3 shows a low-frequency GSM850 band (transmission frequency: 824 to 849 MHz, reception frequency: 869 to 894 MHz) and an EGSM band (transmission frequency: 880 to 915 MHz, reception frequency: 925 to 960 MHz), and high frequency DCS band (transmission frequency: 1710 to 1785 MHz, reception frequency: 1805 to 1880 MHz) and PCS band (transmission frequency: 1850 to 1910 MHz, An equivalent circuit of a quad-band antenna switch circuit using a reception frequency of 1930 to 1990 MHz) is shown.
  • GSM850 band transmission frequency: 824 to 849 MHz, reception frequency: 869 to 894 MHz
  • EGSM band transmission frequency: 880 to 915 MHz, reception frequency: 925 to 960 MHz
  • high frequency DCS band transmission frequency: 1710 to 1785 MHz, reception frequency: 1805 to 1880 MHz
  • PCS band transmission frequency: 1850 to 1910 MHz
  • This antenna switch circuit is disposed after the demultiplexing circuit Dip, which is a low-frequency filter and a high-frequency filter power, and the low-frequency filter of the demultiplexing circuit.
  • the first switch circuit SW1 that switches between terminals Rx-LB and the high-frequency filter of the demultiplexing circuit
  • a second switch circuit SW2 that switches between the transmission terminal Tx-HB and the reception terminal Rx-HB by a voltage supplied from the control terminal Vc.
  • the low frequency transmission terminal Tx-LB and the reception terminal Rx-LB are shared by GSM and EGSM
  • the high frequency transmission terminal Tx-HB and the reception terminal Rx-HB are shared by DCS and PCS. .
  • the low-frequency side receiving terminal Rx-LB and the high-frequency side receiving terminal Rx-HB are selectively used depending on the region where the mobile terminal in which this module is installed is used.
  • Rx-LB is used as EGSM
  • Rx. -HB is assigned to DCS.
  • Rx-LB is assigned to GSM
  • Rx-HB is assigned to PCS.
  • each transmitter / receiver terminal needs to have a broadband design with desired characteristics in the GSM850 and EGSM bands, which are low frequency bands, and the DCS and PCS bands, which are high frequency bands.
  • a low-frequency receiving terminal Rx-LB and a high-frequency receiving terminal Rx-HB may be followed by a switch circuit (not shown) and provided with four receiving terminals.
  • the high frequency module is not limited to the quad band, and may be a triple band or dual band high frequency switch module.
  • one of the low frequency band GSM850 and EGSM may be the first frequency band
  • one of the high frequency band DCS and PCS may be the second frequency band.
  • the high-frequency module is not limited to a mobile phone communication system, but may be used for another communication system such as a wireless LAN.
  • the number and arrangement of circuit elements such as filter circuits, switch circuits, detector circuits, balanced / unbalanced circuits, etc. used in the high-frequency circuit and the high-frequency module may be changed as necessary.
  • a branching circuit (diplexer) Dip composed of a low-frequency filter and a high-frequency filter is used to separate the transmission / reception system in the first frequency band from the transmission / reception system in the second frequency band.
  • a low-pass filter is provided as a low-frequency filter (GSMZEGSM Side) that passes the GSM and EGSM transmission and reception signals and attenuates the DCS and PCS transmission and reception signals, and passes the GSM and EGSM transmission signals.
  • a high-pass filter is provided as a high-frequency (DCSZPCS Side) filter that attenuates the transmitted and received signals.
  • the low-frequency filter and high-frequency filter connected to the antenna terminal Ant which is a common terminal, are each composed of a transmission line and a capacitor! However, they can also be composed of a band-pass filter or a notch filter.
  • a transmission line Route LL1 has a high impedance to the signal in the high frequency band (DCS and PCS) that allows low frequency band (GSM and EGSM) signals to pass through with low loss, and prevents the DCS and PCS band signals from wrapping around.
  • the transmission line LL1 is preferably set to a length that provides high impedance at the frequency of the DCS and PCS band signals so that signals in the DCS and PCS bands are not transmitted to the GSM system path.
  • Transmission line LL2 and capacitor CL1 form a series resonant circuit with resonant frequencies in the DCS and PCS bands, and drop signals in the DCS and PCS bands to ground to prevent wraparound.
  • capacitors CH4 and CH5 allow high-frequency band (DCS and PCS) signals to pass through with low loss, but for low-frequency band (GSM and EGSM) signals. High impedance prevents wraparound of GSM and EGSM band signals.
  • the transmission line LH4 and the capacitor CH4 constitute a series resonance circuit having a resonance frequency in the GSM and EGSM bands, and drop signals in the GSM and EGSM bands to the ground to prevent wraparound.
  • the switch circuit shown in FIG. 3 is connected to the branching circuit and is connected to the first transmission / reception system.
  • the first switch circuit SW1 that switches between the (transmission terminal Tx-LB) and the reception system (reception terminal Rx-LB), and the second transmission / reception system transmission system (transmission terminal Tx-HB) connected to the demultiplexing circuit And a second switch circuit SW2 for switching the receiving system (receiving terminal Rx-HB).
  • the first and second switch circuits SW1 and SW2 have a switch element and a transmission line as main elements.
  • As the switch element a force GaAs switch for which a PIN diode is suitable can be used. Switch circuits using PIN diodes are less expensive than switch circuits using GaAs switches. GaAs switches can consume less power than switch circuits using PIN diodes. select.
  • the first switch circuit SW1 (in the upper part of Fig. 3) that switches between the transmitting terminal Tx-LB and the receiving terminal Rx-LB of GSMZEGSM mainly consists of two diodes Dgl and Dg2 and two transmission lines Lgl and Lg2. Element.
  • the diode Dgl is inserted between the low frequency filter of the demultiplexing circuit and the transmission terminal Tx-LB, the anode of the diode Dgl is connected to the low frequency filter of the demultiplexing circuit, and the power sword of the diode Dgl is transmitted It is connected to an L-type low-pass filter LPF1 composed of line LL3 and capacitors CL2 and CL3.
  • a transmission line Lgl is connected between the other end of the transmission line LL3 constituting the low-pass filter LPF1 and the ground.
  • Rover The filter LPF1 passes the GSMZEGSM transmission signal in order to suppress high-order harmonic distortion contained in the transmission signal input from the power amplifier (not shown) on the GSMZEGSM side, but it is twice the GSMZEGSM transmission signal. It is preferable to have a characteristic that sufficiently attenuates the above frequencies.
  • Power amplifier force In order to sufficiently attenuate the harmonic distortion contained in the input GSMZEGSM transmission signal, the transmission line LL3 and capacitor CL3 that form an inductance have a resonance frequency that is twice or three times the transmission frequency of GSMZEGSM.
  • a parallel resonance circuit is configured.
  • the capacitors Cg6, Cg2, and Cgl function as a DC cut capacitor that removes the DC component and applies a control DC voltage to the circuit including the diodes Dgl and Dg2, and also functions as a part of the phase adjustment circuit. Function.
  • a transmission line Lg2 is inserted between the anode of the diode Dgl and the receiving terminal Rx-LB.
  • the diode Dg2 is connected between one end of the transmission line Lg2 and the ground, and between the anode of the diode Dg2 and the ground.
  • Capacitor Cgl is connected.
  • a resistor Rg is connected in series between the anode of the diode Dg2 and the control terminal Vc.
  • the capacitor Cvg connected between the control terminal Vc and the ground prevents noise from entering the control power supply and stabilizes the control.
  • the transmission line Lgl and the transmission line Lg2 are ⁇ / 4 lines, and preferably both have a line length such that the resonance frequency is within the frequency band of the transmission signal of GSMZEGSM. For example, if each resonance frequency is set to a frequency (869.5 MHz) approximately in the middle of the GSM transmission signal frequency, excellent insertion loss characteristics can be obtained within the desired frequency band.
  • the second switch circuit SW2 (in the lower part of Fig. 3) switches between the reception terminal Rx-HB common to DCS and PCS and the transmission terminal Tx-HB common to DCS and PCS.
  • the second switch circuit SW2 includes two diodes Ddl and Dd2 and two transmission lines Ldl and Ld2 as main elements.
  • the diode Ddl is inserted between the high frequency filter of the branching circuit and the transmission terminal Tx-HB, the anode of the diode Ddl is connected to the high frequency filter of the branching circuit, and the power sword of the diode Ddl is composed of the transmission line LH5 and the capacitor.
  • L-type lowpass filter LPF2 composed of CH7 and CH8.
  • a transmission line Ldl is connected between the other end of the transmission line LH5 constituting the low-pass filter LPF2 and the ground.
  • the low-pass filter LPF2 is a high-order filter included in the transmission signal input from the DCS and PCS side power amplifiers (not shown).
  • the DCS or PCS transmission signal has a characteristic that sufficiently attenuates a frequency that is at least twice that of the DCS or PCS transmission signal.
  • the inductor Ls and the capacitor Cs are connected in series.
  • a circuit is connected in parallel with the diode Ddl to cancel the capacitance component of the diode when OFF.
  • the transmission lines Ldl and Ld2 are ⁇ 4 lines, both of which preferably have a line length that falls within the frequency band of the transmission signal of the transmission / reception system of the resonance frequency force 3 ⁇ 4CS and PCS, particularly the frequency It is preferable to have a line length that is an intermediate frequency in the band. For example, if the resonance frequency of the transmission lines Ldl and Ld2 is set to a frequency (1810 MHz) approximately halfway between the transmission signals in the DCS band and the PCS band, excellent electrical characteristics can be obtained in each mode. The signal can be handled by one circuit.
  • the capacitor Cd2 functions as a DC cut capacitor that removes the DC component and applies a control DC voltage to the circuit including the diodes Ddl and Dd2, and also functions as a part of the phase adjustment circuit.
  • One end of the transmission line Ld2 is connected to the capacitor CH5 constituting the high-frequency filter of the branching circuit, and the other end of the transmission line Ld2 is connected to the diode Dd2 and the capacitor Cdl connected to the ground.
  • the control terminal Vc is connected to the anode of the diode Dd2 via the resistor Rd.
  • Capacitor Cvd stabilizes control by preventing noise from entering the control power supply.
  • Capacitor Cd5 is a DC cut capacitor.
  • Inductor L1 functions to prevent destruction of the module when an overcurrent is applied to the antenna terminal due to static electricity, lightning strikes, etc., to ground GND.
  • Inductors L2 and Cg2 and inductors L5 and Cd2 function as a high-pass phase adjustment circuit that adjusts the connection phase, respectively, and suppress harmonics that leak from the high-frequency amplifier circuit HPA. The relationship with the antenna switch side impedance is adjusted so that it becomes conjugate matching for the fundamental wave and non-conjugated matching for the unnecessary n-th harmonic wave.
  • L3, C2, L4, and CI constitute an LC resonant circuit and an LC high-pass circuit, and have a resonance point near 250 MHz to attenuate electrostatic pulses and prevent leakage of electrostatic pulses to the back of the receiving terminal. , Preventing the destruction of the bandpass filter behind.
  • C3 is a matching adjustment capacitor.
  • Fig. 4 shows a high-frequency module in which the antenna switch circuit shown in Fig. 3 is formed on an 11-layer multilayer board.
  • BOTTOM indicates the back side of the multilayer substrate.
  • An antenna switch circuit is formed in the region 1 of about 1/3 on the right side of each layer, and a high-frequency amplifier circuit (not shown) is formed in the region 2 of about 2/3 on the left side.
  • the branching circuit has the configuration shown in FIG.
  • the high-frequency amplifier circuit is connected to the transmission terminal Tx-LB of the GSMZEGSM of the antenna switch circuit, for example, and sends the amplified transmission signal to the antenna switch circuit. It is preferable that the connection between the high-frequency amplifier and the antenna switch circuit is provided on the upper layer side, and the line of the high-frequency amplifier and the line of the antenna switch circuit are formed in different layers so as not to overlap each other in order to avoid mutual interference.
  • the electrode patterns corresponding to the transmission lines and capacitors shown in FIGS. 2 and 3 are denoted by the same reference numerals.
  • the second capacitor CH4 and third capacitor CH5 of the high frequency filter of the branching circuit and the first capacitor CL1 of the low frequency filter are provided below the sixth dielectric layer provided with the ground electrode. .
  • the electrode patterns of the transmission line LL2 and the first capacitor CL1 constituting the series resonant circuit are formed so as to overlap in the stacking direction.
  • the electrode patterns of the transmission line LH4 and the fourth capacitor CH6 constituting the series resonant circuit are formed so as to overlap in the stacking direction.
  • the electrode pattern of the first transmission line LL1 of the low-frequency filter is formed on the second to fifth layers so as to form a coil shape.
  • the electrode pattern of the second transmission line Lg2 of the first switch circuit SW1 is formed on the fifth layer, the seventh layer to the eleventh layer so as to be coiled.
  • the end of the electrode pattern of the first transmission line LL1 formed in the second layer is connected to the electrode pattern of the capacitor C formed in the third layer via a through-hole electrode.
  • the electrode pattern of capacitor C is opposed to the end of the electrode pattern of the second transmission line Lg2 formed in the fifth layer, and constitutes a capacitor.
  • the end of the electrode pattern of the first transmission line LL1 formed on the second layer and the end of the electrode pattern of the second transmission line Lg2 formed on the seventh layer are mounted on the top layer. Is connected to the capacitor Cg6 via a through-hole electrode.
  • the capacitor C is connected in parallel to a part of the first transmission line LL1 and a part of the second transmission line Lg2.
  • the electrode pattern that forms part of the first transmission line LL1, the electrode pattern that forms part of the second transmission line Lg2, and the electrode pattern of the capacitor C are stacked in the stacking direction. It has a part that overlaps.
  • the high-frequency module shown in Fig. 4 was fabricated using an 11-layer dielectric green sheet made of LTCC that can be fired at low temperatures below 950 ° C.
  • the thickness of the green sheet is preferably 40 to 200 ⁇ m so that the transmission line and the capacitor can be easily formed.
  • the electrode pattern is preferably formed of a silver-based conductive paste. Electrode patterns for transmission lines and capacitor are formed on each green sheet, and through holes are provided as appropriate. After lamination, pressure bonding is performed, and firing is performed at 950 ° C. Lamination of approximately 10 mm x approximately 8 mm x approximately 0.65 mm Get the body. A diode, transistor, chip inductor, chip capacitor, resistor, etc.
  • a high-frequency module is usually covered with a metal case (not shown) with a height of about 1.6 mm. Instead of a metal case, it may be a resin-sealed package. In this case, the height is about 1.5 mm.
  • FIG. 5 shows the pass characteristics of the high-frequency module of Example 1
  • FIG. 6 shows the pass characteristics of the high-frequency module having a conventional circuit structure.
  • the conventional characteristics have a large rise of about 15 dB in the unnecessary band near 3 GHz. Depending on manufacturing variations, it may exceed about 10 dB, which may cause problems in the reception characteristics.
  • the vicinity of 3 GHz can be suppressed to about ⁇ 25 dB or less, and adverse effects on the reception characteristics are eliminated.
  • the passage loss of the high-frequency module of Example 1 is about 1.0 dB, which is about the same as the conventional high-frequency module that does not include a capacitor for suppressing unnecessary waves.
  • FIG. 7 shows an equivalent circuit of the branching circuit according to the second embodiment of the present invention.
  • the demultiplexing circuit passes the transmission signal of the high frequency side transmission circuit or the low frequency side transmission circuit during transmission, demultiplexes signals having different frequencies during reception, and sends the reception signal to the high frequency side reception circuit or low frequency side reception circuit.
  • Diagram consisting of low frequency filter and high frequency filter 7 includes a common terminal Pc, a low frequency terminal PI, and a high frequency terminal Ph.
  • the high-frequency filter includes a first capacitor CH4 connected to the common terminal Pc, a second capacitor CH5 connected between the first capacitor CH4 and the high-frequency terminal Ph, the first capacitor CH4, and the first capacitor CH4.
  • a series resonance circuit including a first transmission line LH4 and a third capacitor CH6 connected between a connection point of the second capacitor CH5 and the ground.
  • the low-frequency filter has one end connected between the second transmission line LL1 provided between the low-frequency terminal P1 and the common terminal Pc, and between the second transmission line LL1 and the low-frequency terminal P1.
  • a series resonance circuit including a third transmission line LL2 and a fourth capacitor CL1 whose ends are grounded.
  • the circuit configuration of the branching circuit, such as the low-pass filter, is not limited to that described above, and can be changed as appropriate.
  • the first transmission line LH4, the first capacitor CH4, the second capacitor CH5, and the third capacitor CH6 are configured by electrode patterns formed in a dielectric layer constituting the multilayer body.
  • the electrode 5 connected to the common terminal Pc among the counter electrodes constituting the first capacitor C H4 is opposed to the ground electrode as shown in FIG.
  • parasitic capacitance can be generated using the electrode of the capacitor that is a part of the branching circuit.
  • the electrode 5 and the ground electrode 6 constituting the first capacitor CH4 face each other on both sides of one dielectric layer.
  • the magnitude of the parasitic capacitance can be easily controlled by adjusting the thickness of the dielectric layer, the area of the ground electrode 6, and Z or the dielectric constant of the dielectric layer.
  • the other electrode of the first capacitor CH4 and the electrode of the second capacitor CH5 (on the side of the first capacitor CH4) are formed as the common electrode 4 above the electrode 5 in the laminate.
  • the other electrode 3 (connected to the high frequency terminal Ph) of the second capacitor CH5 is formed above the common electrode 4.
  • the electrode 5 and the common electrode 4 constitute the first capacitor CH4
  • the common electrode 4 and the electrode 3 constitute the second capacitor CH5, and a parasitic capacitance is generated between the ground electrode 6 and the electrode 5. .
  • parasitic capacitance is not generated in the high-pass filter part as much as possible (for example, Japanese Patent Application Laid-Open No. 2002-26677), but in the present invention, this is also used positively from the viewpoint of harmonic suppression.
  • a demultiplexing circuit is used for the antenna switch module, as shown in Fig. 8, parasitic capacitance Cp is attached to the antenna and suppresses harmonics.
  • the high-frequency circuit having the branching circuit includes a first switch circuit that switches between a transmission system and a reception system in the first frequency band on the low frequency side divided by the branching circuit, and a high-frequency side divided by the branching circuit.
  • FIG. 10 shows the low-frequency GSM850 band (transmission frequency: 824 to 849 MHz, reception frequency: 869 to 894 MHz) and the EGSM band (transmission frequency: 880 to 915).
  • FIG. 11 shows the equivalent circuit of a quad-band antenna switch circuit using ( ⁇ 1990 MHz). Since this equivalent circuit is the same as the equivalent circuit of the first embodiment except that the branching circuit of the second embodiment is used, the description thereof is omitted.
  • FIG. 12 shows a high-frequency switch module in which the antenna switch circuit shown in FIG. 10 is formed on a multilayer substrate.
  • a ground electrode is formed on almost the entire surface except the region where the through-hole electrode is formed.
  • the first and second capacitors CH4 and CH5 of the high frequency filter of the branching circuit are provided below the sixth layer provided with the ground electrode.
  • the electrode 3 (high frequency terminal Ph side) of the second capacitor CH5 is formed on the ninth layer
  • the common electrode 4 of the first and second capacitors CH4 and CH5 is formed on the tenth layer
  • the electrode 5 (common terminal Pc side) of one capacitor CH4 is formed on the eleventh layer
  • the electrode 5 faces the ground electrode formed on the back surface of the laminate. Electrodes 3, 4 and 5 are also facing each other.
  • the force that generates the parasitic capacitance by using the opposite of the ground electrode formed on the back surface is not limited to this, and the ground electrode in the stacked body may be used.
  • a ground electrode is provided directly below the mounting pad having the same potential as the antenna terminal (common terminal Pc), or a ground is provided around the mounting node.
  • Parasitic capacitance may be generated by arranging electrodes. Further, in order to add a parasitic capacitance to the antenna terminal, a mode in which a duplexer is not connected to the antenna terminal may be adopted. In either case, insertion loss will deteriorate if the parasitic capacitance is too large. Therefore, it is desirable to adjust the electrode spacing to make the parasitic capacitance about 1 pF or less.
  • a laminated module having the structure shown in Fig. 12 was produced as an antenna switch module.
  • the laminated module shown in Fig. 12 was also formed with a high-frequency amplifier.
  • the laminated module is composed of dielectric green sheets of the first to eleventh layers, and BOTTOM indicates the back side of the laminated body.
  • the dielectric green sheet used in this example is an LTCC that can be fired at a low temperature of 950 ° C or lower.
  • the dimensions and manufacturing method of the laminate are the same as in Example 1.
  • the laminated module shown in FIG. 12 was produced.
  • the thickness of the dielectric that forms the main capacitor of the demultiplexing circuit is 25 m, and the distance between the counter electrode of the first capacitor CH4 and the ground electrode on the back surface is 100 ⁇ m.
  • the high-frequency switch module of Example 2 was compared with a high-frequency switch module having a conventional branching circuit, the insertion loss was equivalent, but the attenuation was greatly improved to about 2 to 7 dB on the low-frequency side. On the high frequency side (DCS and PCS), it was found that there was a significant improvement of about 1.5 to 14 dB.
  • the high-frequency module according to the third embodiment is different from the first embodiment except for the arrangement of the transmission lines LL1, LL2, LH4, Lgl, Lg2, and Ld2 included in the branching circuit Dip and the first and second switch circuits.
  • Ldl is a transmission line through which harmonics in the second frequency band pass. Signals in the first frequency band on the low frequency side pass through transmission lines LL1, LH4, and Lg2, and signals in the second frequency band on the high frequency side pass through transmission lines LL2, Lgl, and Ld2.
  • Transmission lines LL 2 and Lgl are circuit elements on the low frequency side, but the high frequency side component leaked to the low frequency side circuit passes, and transmission line LH4 is a circuit element on the low frequency side but leaked to the high frequency side circuit. Low frequency component passes.
  • a transmission line through which a signal of the first frequency band passes in order to suppress mutual interference between the transmission and reception circuits of the first frequency band (GSM850 and EGSM) and the second frequency band (DCS and PCS) LL1, LH4, and Lg2 are provided on one side in the stacking direction of the ground electrodes in the stack, and transmission lines LL2, Lgl, and Ld2 through which signals in the second frequency band pass are provided on the other side in the stacking direction of the ground electrodes.
  • the transmission line is separated in the stacking direction by the ground electrode.
  • the second harmonic of the first frequency band, GSM850 and EGSM is almost the same as the frequency band of the second frequency band, DCS and PCS, so the second harmonic of the first frequency band is the second frequency band.
  • the influence on the frequency band is large.
  • the above configuration is particularly effective in the case of such a relationship between the first frequency band and the second frequency band.
  • the ground electrode is formed on the dielectric layer so as to at least partially separate the transmission line through which the signal in the first frequency band passes and the transmission line through which the signal in the second frequency band passes! However, it is preferred that the dielectric layer be formed wider than both transmission lines so that they are completely separated.
  • Another ground electrode may be formed between the electrode pattern of the transmission line through which the signal of the first frequency band passes or between the electrode pattern of the transmission line through which the signal of the second frequency band passes. . It is preferable to connect the ground electrodes provided in multiple layers with through-hole electrodes. ,.
  • FIG. 13 shows a high-frequency module in which the antenna switch circuit shown in FIG. 10 is formed in a laminate.
  • An antenna switch circuit is formed in the area 1 of about 1/3 on the right side of each layer, and a high-frequency amplifier circuit is formed in the area 2 of about 2/3 on the left side.
  • the high-frequency amplifier circuit is connected to, for example, the GSMZEGSM transmission terminal Tx-LB of the antenna switch circuit in FIG. 10, and sends the amplified transmission signal to the antenna switch circuit. It is preferable to connect the high-frequency amplifier and the antenna switch circuit on the upper layer side, and to avoid mutual interference, the high-frequency amplifier line and the antenna switch circuit line should be formed in different layers so as not to overlap each other.
  • FIG. 13 shows, in order from the upper left, the eleven dielectric layers on which electrode patterns are formed and the back surface BOTTOM of the laminate.
  • a ground electrode is formed on almost the entire surface except the region where the through-hole electrode is formed.
  • the transmission lines LL1, LH4, and Lg2 through which signals in the first frequency band pass are formed on the second to fifth layers above the sixth layer with the ground electrode.
  • Forces formed Transmission lines LL2, Ld2, Lgl through which signals in the second frequency band pass are formed on the 7th to 11th layers below the 6th layer where the ground electrode is provided. ing.
  • the electrode pattern of the transmission line is provided above the ground electrode,
  • the electrode pattern of the capacitor is provided on the lower side of the ground electrode.
  • a laminated module shown in FIG. 13 was produced as an antenna switch module.
  • An 11-layer dielectric green sheet made of LTCC that can be fired at a low temperature of 950 ° C or lower was laminated under the same conditions as in the first embodiment.
  • the electrode pattern constituting the antenna switch circuit was formed in the right region 1 and the electrode pattern constituting the high-frequency amplifier was formed in the left region 2.
  • the conventional high-frequency module is separated from the high-frequency module of Example 3, the transmission line through which the signal in the first frequency band passes and the transmission line through which the signal in the second frequency band passes in the stacking direction.
  • the transmission side is compared, the insertion loss is greatly improved to about 0.1 to 0.2 dB on the low frequency side (GSM and EGSM), and is greatly improved to about 0.05 to 0.2 dB on the high frequency side (DCS and PCS).
  • the amount of attenuation was greatly improved to about 3 to 12 dB on the low frequency side, and about 5 to 15 dB on the high frequency side (DC S and PCS).
  • the insertion loss was greatly improved by about 0.05 to 0.1 dB on the low frequency side (GSM and EGSM), and greatly improved by about 0.1 to 0.3 dB on the high frequency side (DCS and PCS). Since the leakage of radio waves is greater at higher frequencies! /, The effect of the present invention is greater at higher frequencies.
  • Fig. 10 shows an example of an equivalent circuit of a quad-band antenna switch circuit covering GSM and EGSM in the low frequency band and DCS and PCS in the high frequency band
  • Fig. 14 shows each dielectric layer constituting the laminate incorporating the low-pass filter.
  • the upper electrode pattern is shown. Since parts other than the low-pass filter of the antenna switch circuit are the same as those of the first embodiment, their description is omitted.
  • the low-pass filter may be a single laminated low-pass filter.
  • the configuration of the laminated module using the low-pass filter is not particularly limited, but is preferably an antenna switch module or a composite module of an antenna switch circuit and a high-frequency amplifier circuit.
  • the first and second low-pass filters LPFl and LPF2 shown in FIGS. 10 and 11 may have the same configuration.
  • FIG. 15 shows an equivalent circuit of the low-pass filter LPF (LPF1 or LPF2).
  • the first low-pass filter LPF1 is an L-type low-pass filter that also includes a transmission line LL3 and capacitors CL2 and CL3 that form an inductance. Capacitor CL3 is connected in parallel with transmission line LL3 to form a parallel resonant circuit.
  • the configuration of the low-pass filter is not limited to that shown in FIG. 15, but may be, for example, a ⁇ -type low-pass filter shown in FIG.
  • the first low-pass filter LPF1 in the multilayer body will be described with reference to FIG. 14 showing the eleven dielectric layers on which the electrode patterns are formed and the back surface BOTTOM of the multilayer body.
  • FIG. 14 shows the first to eleventh layers and the back surface in order of the upper left force.
  • the transmission line LL3 composing the low-pass filter LPF1 and the electrode patterns composing the capacitors CL2 and CL3 are also indicated by LL3, CL2 and CL3, respectively.
  • a ground electrode G1 is formed on the sixth layer, and a transmission line electrode pattern LL3 is formed on the second to fifth layers above the ground electrode G beam.
  • Capacitor electrode patterns CL2 and CL3 are formed on the ninth to eleventh layers below the ground electrode G1.
  • the plurality of capacitor electrode patterns CL2 and CL3 and the transmission line electrode pattern LL3 constituting the first low-pass filter LPF1 are separated in the stacking direction by the ground electrode G1. Both electrode patterns are preferably separated on the entire surface by the ground electrode G1. Similarly, when the low-pass filter has a plurality of transmission lines, the electrode patterns constituting the plurality of transmission lines are collectively formed on one side of the ground electrode in the stacking direction. [0074] In order to reduce the size of the multilayer body, in the configuration shown in FIG. 14, the transmission line electrode pattern LL3 and the capacitor electrode patterns CL2 and CL3 overlap in the stacking direction.
  • the transmission line and the capacitor are separated by the ground electrode, so there is no mutual interference even if the inductor and the capacitor overlap in the stacking direction.
  • the first layer, etc., outside the transmission line LL3 is provided with a ground electrode that overlaps the transmission line electrode pattern LL3 in the stacking direction, so that a ground electrode facing outside the transmission line LL3 is arranged. It is possible to avoid the formation of parasitic capacitance and the increase in insertion loss.
  • the ground electrode G1 and another ground electrode are provided on the capacitor electrode patterns CL2 and CL3 side.
  • the ground electrode G1 sandwiched between the transmission line electrode pattern LL3 and the capacitor electrode patterns CL2 and CL3 may or may not function as the opposing ground electrode of the capacitors CL2 and CL3.
  • the ground electrode G1 sandwiched between the transmission line electrode pattern LL3 and the capacitor electrode patterns CL2 and CL3 and the opposing ground electrode of the capacitors CL2 and CL3 may be constituted by a single ground electrode.
  • a ground electrode different from the ground electrode G1 is not provided outside the capacitor electrode patterns CL2 and CL3. This configuration is advantageous for downsizing.
  • the low-pass filter disclosed in Japanese Patent Application Laid-Open No. 11-27177, since the ground electrode is partially formed between the inductance and the capacitor, the electrode pattern for inductance and the electrode pattern for capacitor are not completely separated.
  • the low-pass filter according to the present embodiment is largely different in that a ground electrode exists between the inductance electrode pattern and the capacitor electrode pattern. Furthermore, since there is no other opposing ground electrode outside the transmission line electrode pattern, the formation of parasitic capacitance of the transmission line functioning as an inductance is suppressed, contributing to loss reduction.
  • a ground electrode 14 is provided between a transmission line electrode pattern 13 and a capacitor electrode pattern 15 that form an inductance in the stacking direction.
  • a ground electrode 16 is provided below 15.
  • the ground electrode 14 is disposed in a region where the transmission line electrode pattern 13 and the capacitor electrode pattern 15 are opposed to each other in the stacking direction in which the ground area is larger than the transmission line electrode pattern 13 and the capacitor electrode pattern 15 provided above and below the ground electrode 14. Ground electricity throughout Since the pole 14 is present, the ground electrode 14 prevents interference between the transmission line and the capacitor.
  • the ground electrode is not provided on the upper side of the transmission line electrode pattern 13, no parasitic capacitance is formed on the upper side of the transmission line. In this case, as long as the impedance design allows, by increasing the distance between the transmission line forming the inductance and the ground electrode, it is possible to suppress the parasitic capacitance generated below the transmission line, thereby reducing the insertion loss. .
  • the ground electrode 14 is not used as one of the counter electrodes of the capacitor, it is preferable to increase the distance between the electrode pattern on the ground electrode 14 side of the electrode pattern of the transmission line and the ground electrode to suppress the generation of parasitic capacitance. However, this does not apply when the ground electrode 14 is used as one of the counter electrodes of the capacitor.
  • a force capacitor electrode pattern in which a ground electrode 14 is provided between a transmission line electrode pattern 13 and a capacitor electrode pattern 15 forming an inductor in the stacking direction. No other ground electrode is provided below 15, and the ground electrode 14 is used as the counter electrode of the capacitor.
  • the same effect as the configuration shown in FIG. 17 (a) can be obtained.
  • the distance between the electrode pattern 15 and the ground electrode 14 is preferably set to 50 m or less.
  • the second low-pass filter shown in FIG. 10 can also be configured in the same manner as the first low-pass filter.
  • the laminated module includes a plurality of low-pass filters as described above
  • the ground electrodes of the plurality of low-pass filters are not necessarily formed on the same dielectric layer, but are preferably formed on the same dielectric layer. Such a configuration is effective in reducing the size of the stacked body and suppressing unnecessary stray capacitance.
  • the low-pass filter can be used in any of the antenna switch circuits of the first to third embodiments, and is not limited to the high-frequency module according to the first and second embodiments, but other multiband high-frequency filters. Can be widely used for modules.
  • the laminated module shown in Fig. 14 was fabricated using an 11-layer dielectric green sheet made of LTCC that can be fired at a low temperature of 950 ° C or lower.
  • the stack module also has a high frequency amplifier.
  • the dimensions and manufacturing method of the laminate are the first implementation. The form is the same.
  • the insertion loss was about 0.3 on the low-frequency side (GS M and EGSM).
  • the insertion loss was about 0.3 on the low-frequency side (GS M and EGSM).
  • a significant improvement of about 4 to 10 dB on the high frequency side (DCS and PCS) was a major factor. This is because the parasitic capacitance of the transmission line that forms the inductance is reduced, and the transmission line is shorter than the conventional design. The same improvement effect was obtained when the low-pass filter was incorporated in the high-frequency switch module.
  • the distance between the electrode of the transmission line and the Darling electrode was adjusted.
  • the distance was adjusted to 225 m for the prototype module, which is preferably set as wide as possible.
  • the insertion loss was greatly improved to about 0.2 to 0.3 dB on the low frequency side (GSM and EGSM).
  • the high frequency side (DCS and PCS) is greatly improved to about 0.2 to 0.3 dB, and the attenuation is greatly improved to about 5 to 8 dB on the low frequency side (GSM and EGSM).
  • the major improvement was about 5 to 12 dB.
  • the low-pass and high-frequency attenuation poles did not appear clearly in the conventional low-pass filter, and it was difficult to design the low-pass filter.
  • the designed low-pass filter clearly shows the designed attenuation pole and is thought to be due to interference.
  • the characteristic deterioration in the unnecessary band is eliminated.
  • the design for obtaining the desired characteristics has become simple and the design time has been shortened.
  • a high-frequency switch module was used, it had the same improvement performance.
  • the ground electrode arranged in the middle of the low-pass filter of the present invention is used as a grounded counter electrode of the low-pass filter, various characteristics are improved in the same manner as described above, and the thickness of the laminate can be reduced by about 100 m. Miniaturization is possible. Of course, this effect is a laminated module Can also be obtained.
  • the first and second switch circuits SW1, SW2 are also used as the first and second switch circuits SW1, SW2, for example, SPDT (single pole double throw type) ) GaAs switches such as switches can also be used.
  • the use of GaAs switches reduces the number of transmission lines used in the switch.
  • the arrangement of the branching circuit in the high frequency circuit is not limited to the position shown in the figure.
  • the common terminal of the switch circuits SW1 and SW2 is connected to the antenna ANT, and the branching circuit is connected to the transmission side terminal and the reception side terminal of the switch circuit. It is also possible to connect another circuit between the antenna ANT and the demultiplexing circuit.
  • the branching circuit may be replaced with an SPnT switch (n is a natural number of 2 or more) to switch between frequency band and transmission / reception.
  • the present invention is not limited to the above embodiment, and can be applied to various multiband high frequency modules.
  • the dielectric layer used in the high-frequency module of the present invention can be formed of ceramic or resin.
  • an element that cannot be formed with an electrode pattern on a multilayer substrate such as a capacitor may be a chip element mounted on the substrate.

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Abstract

A branch circuit is provided with a common terminal, a low frequency terminal, a high frequency terminal, a low frequency side path having a low frequency filter arranged between the common terminal and the low frequency terminal, and a high frequency side path having a high frequency filter arranged between the common terminal and the high frequency terminal. The low frequency filter is provided with a first transmission line connected in series to the low frequency side path, and a capacitor connected in parallel to a part of the first transmission line.

Description

明 細 書  Specification
分波回路、高周波回路及び高周波モジュール  Demultiplexing circuit, high frequency circuit and high frequency module
技術分野  Technical field
[0001] 本発明は、携帯電話等の移動体通信機器、電子機器、電気機器等の間における 無線通信装置等の通信装置に用いる分波回路、高周波回路及びそれを用いた高周 波モジュールに関する。  TECHNICAL FIELD [0001] The present invention relates to a demultiplexing circuit, a high-frequency circuit, and a high-frequency module using the demultiplexing circuit used in a communication device such as a wireless communication device between mobile communication devices such as mobile phones, electronic devices, and electric devices. .
背景技術  Background art
[0002] 携帯無線システムには、例えば主に欧州で盛んな EGSM (Extended Global System for Mobile Communications)方式及び DCS (Digital Cellular System)方式、米国で盛 んな PCS (Personal Communication Service)方式、日本で採用されている PDC (Perso nal Digital Cellular )方式等の時分割マルチプルアクセス(TDMA)を用いた様々なシ ステムがある。従来、複数のシステムに対応した小型軽量の高周波回路部品として、 例えば EGSMと DCSの 2つのシステムに対応した携帯通信機に用いられるデュアルバ ンド対応の高周波スィッチモジュールや、 EGSM、 DCS及び PCSの 3つのシステムに対 応した携帯通信機に用いられるトリプルバンド対応の高周波スィッチモジュール等が 提案されている。現在 IEEE802.i l規格に代表される無線 LANによるデータ通信が広 く一般ィ匕しているが、この無線 LANの規格には周波数帯域等の異なる複数の規格が ある。無線 LANを用いたマルチバンド通信装置にも種々の高周波回路が使用されて いる。  [0002] For example, EGSM (Extended Global System for Mobile Communications) method and DCS (Digital Cellular System) method popular in Europe, PCS (Personal Communication Service) method popular in the United States, There are various systems using time division multiple access (TDMA) such as PDC (Personal Digital Cellular). Conventionally, as a compact and lightweight high-frequency circuit component compatible with multiple systems, for example, a dual-band compatible high-frequency switch module used in portable communication devices compatible with two systems of EGSM and DCS, and three types of EGSM, DCS, and PCS A triple-band compatible high-frequency switch module, etc., used for portable communication devices compatible with the system has been proposed. Currently, data communication by wireless LAN represented by the IEEE802.il standard is widely used, but there are a plurality of standards with different frequency bands in this wireless LAN standard. Various high-frequency circuits are also used in multiband communication devices using wireless LAN.
[0003] 1台の携帯電話機を複数の周波数帯に共用する場合、アンテナで送受信される複 数の周波数帯の送受信信号を分波する回路、及び送受信経路を切り換えるスィッチ を組み込んだ高周波スィッチモジュールが必要である。マルチバンド無線通信のキ 一パーツである高周波スィッチモジュールには小型化及び高性能化の要請が強ぐ とりわけ不要帯域のノイズの除去が必須である。  [0003] When a single mobile phone is shared by a plurality of frequency bands, a high-frequency switch module incorporating a circuit for demultiplexing transmission / reception signals of a plurality of frequency bands transmitted / received by an antenna and a switch for switching transmission / reception paths is provided. is necessary. High-frequency switch modules, which are key parts of multiband wireless communication, are increasingly required to be smaller and have higher performance. In particular, it is essential to remove unwanted band noise.
[0004] このような要請に応じるために、特開平 11-27177号は、パワーアンプからの送信信 号に生じる高調波歪を除くためにアンテナとグランド間に生じる浮遊容量を利用する ことにより、フィルタの個数を減らした高周波スィッチを提案している。この高周波スィ ツチでは、アンテナ用端子、送信回路用端子及び受信回路端子とグランドとの間に 発生する浮遊容量を調整するとともに、チョーク素子である伝送線路長をほぼえ /6に 調整することにより、 3倍高調波帯域に減衰極を設けている。具体的な調整方法は明 記されていないが、これら全ての浮遊容量を調整すると同時に伝送線路を所望の長 さに調製することは非常に煩雑である。また例えば GSMシステムでは約 7倍波までの 高調波レベルを低減する必要がある力 この方法では 3倍波の減衰極のみを利用し て 、るため、このような高次の高調波レベルを低減できな 、。 [0004] In order to meet such a requirement, Japanese Patent Application Laid-Open No. 11-27177 uses a stray capacitance generated between the antenna and the ground in order to eliminate harmonic distortion generated in the transmission signal from the power amplifier. A high-frequency switch with a reduced number of filters is proposed. This high frequency switch Tsuchi adjusts the stray capacitance generated between the antenna terminal, the transmitter circuit terminal and the receiver circuit terminal and the ground, and adjusts the length of the transmission line, which is a choke element, to approximately / 6. An attenuation pole is provided in the harmonic band. Although a specific adjustment method is not described, it is very troublesome to adjust all of these stray capacitances and at the same time adjust the transmission line to a desired length. For example, in a GSM system, it is necessary to reduce the harmonic level up to about 7th harmonic. Since this method uses only the 3rd harmonic attenuation pole, this higher harmonic level is reduced. Can not ,.
[0005] 特開 2003-69362号は、 2倍の高調波を効率的に除去するために、ローパスフィルタ 端子側に 2倍波の周波数を共振周波数とする並列共振回路を設けたダイプレクサを 提案している。このダイプレクサでは、共通端子及びローパスフィルタ端子に並列共 振回路を設けることにより、信号損失を低減させるとともに、低周波側の第一の周波 数の 2倍の高調波を効率良く除去している。具体的には、ダイプレクサのローパスフィ ルタ回路は、コイルとキャパシタとにより構成された二つの並列共振回路を有し、これ らの並列共振回路の接続部とローパスフィルタ端子に接地容量が設けられている。し 力 二つの並列共振回路を接続すると、ダイプレクサが大型化するだけでなぐその 回路構成が複雑ィ匕してしまう。また多段のローパスフィルタでは挿入損失が大きくな るため、特性劣化の弊害がある。その上、このダイプレクサのローパスフィルタ回路は 、第一の周波数の 2倍又は第二の周波数を減衰するように設定されているため、 n次 高調波以外の不要帯域を十分に低減できな 、。 [0005] Japanese Patent Laid-Open No. 2003-69362 proposes a diplexer in which a parallel resonant circuit having a resonance frequency of the second harmonic is provided on the low-pass filter terminal side in order to efficiently remove the second harmonic. ing. In this diplexer, by providing parallel resonance circuits at the common terminal and low-pass filter terminal, signal loss is reduced and harmonics twice the first frequency on the low frequency side are efficiently removed. Specifically, the low-pass filter circuit of the diplexer has two parallel resonance circuits composed of a coil and a capacitor, and a grounding capacitor is provided at the connection portion of these parallel resonance circuits and the low-pass filter terminal. . However, if two parallel resonant circuits are connected, the circuit configuration becomes complicated as well as the diplexer becomes larger. In addition, multi-stage low-pass filters have a large insertion loss, which has a detrimental effect on characteristics. In addition, the low-pass filter circuit of this diplexer is set to attenuate the second frequency or twice the first frequency, so that unnecessary bands other than the nth harmonic cannot be sufficiently reduced.
[0006] EGSM及び DCSはそれぞれ 900 MHz帯及び 1800 MHz帯と異なる周波数帯を用い るが、両者の回路が混在すると干渉して信号が漏れ、アイソレーション特性が劣化す る。この問題は高周波部品の小型化に伴いいつそう顕在化する。これに対し、特開 20 01-352202号は、通過帯域の異なる複数の送受信系を扱う高周波スィッチモジユー ルにおいて、一方の送受信系と他方の送受信系とを積層体の平面方向で領域を分 けて形成する高周波スィッチモジュールを提案している。しかし、積層体の平面方向 で異なる領域を分けて形成して 、るため、一方の送受信系と他方の送受信系とのシ 一ルドは十分に取れな 、と!/、う問題があった。  [0006] EGSM and DCS use frequency bands different from the 900 MHz band and 1800 MHz band, respectively, but if both circuits are mixed, the signal leaks and the isolation characteristics deteriorate. This problem becomes apparent as the high frequency components become smaller. On the other hand, Japanese Patent Laid-Open No. 20 01-352202 divides a region in the plane direction of a laminate in one high-frequency switch module that handles a plurality of transmission / reception systems having different passbands. A high-frequency switch module is proposed. However, since different regions are formed separately in the plane direction of the laminate, there is a problem that one transmission / reception system and the other transmission / reception system cannot be shielded sufficiently.
[0007] 高周波スィッチモジュールに用いられるローパスフィルタに関して、特開 2004-3281 36号は、信号波(基本波)の 2倍波及び 3倍波の減衰量特性を向上させるために、直 列共振回路と並列共振回路を縦続したローパスフィルタであって、前記並列共振回 路の両端に接地容量が接続され、前記直列共振回路と前記並列共振回路との間に 位相調整用の伝送線路が介挿されたローパスフィルタを提案して ヽる。しかしながら 、マルチバンド化等に伴う高性能化の要請に対して、このローパスフィルタの減衰量 特性及び挿入損失は必ずしも十分ではなかった。またローノ スフィルタとノッチフィル タを複合フィルタとし、さらにそれらを接続する伝送線路を追加すると、回路間、フィ ルタを構成する伝送線路、容量間の電磁干渉や寄生容量による特性劣化が少なか らず発生する。その上、複合フィルタは特性向上のために小型化を犠牲にしている。 このように積層モジュールの高集積ィ匕が進む中で、小型化及び高性能化の要請を 満足しつつ、ローパスフィルタやそれを用いた積層モジュールを構成するインダクタ 等の素子の配置を設計することは困難であった。 発明の開示 [0007] Japanese Patent Application Laid-Open No. 2004-3281 relates to a low-pass filter used in a high-frequency switch module No. 36 is a low-pass filter in which a series resonance circuit and a parallel resonance circuit are cascaded in order to improve the attenuation characteristics of the second harmonic and the third harmonic of the signal wave (fundamental wave). A low-pass filter is proposed in which a grounding capacitor is connected to both ends, and a phase-adjustment transmission line is interposed between the series resonant circuit and the parallel resonant circuit. However, the attenuation characteristics and insertion loss of this low-pass filter were not always sufficient in response to the demand for higher performance due to the multiband and the like. If a low-pass filter and a notch filter are combined into a composite filter and a transmission line connecting them is added, characteristic degradation due to electromagnetic interference between circuits, transmission lines constituting the filter, and capacitance, and parasitic capacitance is reduced. Occur. In addition, the composite filter sacrifices downsizing to improve characteristics. In this way, with the progress of high integration of multilayer modules, the layout of low-pass filters and inductors and other elements that constitute multilayer modules using the same should be designed while satisfying the demands for miniaturization and high performance. Was difficult. Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0008] 従って、本発明の第一の目的は、回路の複雑ィ匕及び大型化、及び挿入損失の増 加を抑制しつつ、不要帯域を低減した分波回路を提供することである。 [0008] Therefore, a first object of the present invention is to provide a branching circuit that reduces the unnecessary band while suppressing the complexity and size of the circuit and the increase in insertion loss.
[0009] 本発明の第二の目的は、かかる分波回路を備えた高周波回路を提供することであ る。 [0009] A second object of the present invention is to provide a high-frequency circuit including such a branching circuit.
[0010] 本発明の第三の目的は、かかる高周波回路を多層基板に構成した高周波モジュ ールを提供することである。  A third object of the present invention is to provide a high frequency module in which such a high frequency circuit is configured on a multilayer substrate.
[0011] 本発明の第四の目的は、実装面積の増加を抑えつつ、周波数帯の異なる送受信 回路同士の相互干渉及び信号漏洩を抑制した高周波ジュールを提供することである  A fourth object of the present invention is to provide a high-frequency joule that suppresses mutual interference and signal leakage between transmission / reception circuits having different frequency bands while suppressing an increase in mounting area.
[0012] 本発明の第五の目的は、インダクタ及びキャパシタの設計が容易で、フィルタ性能 に優れたローパスフィルタを有する高周波モジュールを提供することである。 A fifth object of the present invention is to provide a high-frequency module having a low-pass filter that is easy to design an inductor and a capacitor and has excellent filter performance.
課題を解決するための手段  Means for solving the problem
[0013] 本発明の第一の分波回路は、共通端子と、低周波端子と、高周波端子と、前記共 通端子と前記低周波端子との間に設けられた低周波フィルタを有する低周波側経路 と、前記共通端子と前記高周波端子との間に設けられた高周波フィルタを有する高 周波側経路とを具備し、前記低周波フィルタは前記低周波側経路に直列に接続され た第一の伝送線路と、前記第一の伝送線路の一部に並列接続されたキャパシタとを 有することを特徴とする。この分波回路では、不要帯域を抑制する並列共振回路が 低周波側経路の第一の伝送線路の一部を用いて構成されるので、分波回路を小型 ィ匕することがでさる。 [0013] A first branching circuit of the present invention includes a common terminal, a low frequency terminal, a high frequency terminal, and a low frequency filter having a low frequency filter provided between the common terminal and the low frequency terminal. Side path And a high-frequency side path having a high-frequency filter provided between the common terminal and the high-frequency terminal, the low-frequency filter being connected in series to the low-frequency side path And a capacitor connected in parallel to a part of the first transmission line. In this branching circuit, the parallel resonant circuit that suppresses the unnecessary band is configured by using a part of the first transmission line on the low frequency side path, so that the branching circuit can be reduced in size.
[0014] 上記分波回路において、前記キャパシタは前記第一の伝送線路の低周波端子側 の一部に並列接続して並列共振回路を構成し、前記第一の伝送線路の前記一部以 外の部分はインダクタンス部を構成して ヽるのが好ま ヽ。低周波フィルタの第一の 伝送線路のうち、インダクタンス部を構成する部分を共通端子側に、前記並列共振 回路を構成する部分を前記低周波端子側に配置することにより、前記並列共振回路 の配置の自由度が向上する。キャパシタの一端を、前記第一の伝送線路の一部に並 列接続し、他端を低周波端子に接続された他の回路素子に接続しても良い。  [0014] In the branching circuit, the capacitor is connected in parallel to a part on the low frequency terminal side of the first transmission line to form a parallel resonant circuit, and the part other than the part of the first transmission line. It is preferable that this part constitutes an inductance part. Of the first transmission line of the low frequency filter, the portion constituting the inductance portion is arranged on the common terminal side, and the portion constituting the parallel resonance circuit is arranged on the low frequency terminal side, thereby arranging the parallel resonance circuit. The degree of freedom increases. One end of the capacitor may be connected in parallel to a part of the first transmission line, and the other end may be connected to another circuit element connected to the low frequency terminal.
[0015] 本発明の第二の分波回路は、共通端子と、低周波端子と、高周波端子と、前記共 通端子と前記低周波端子との間に設けられた低周波フィルタを有する低周波側経路 と、前記共通端子と前記高周波端子との間に設けられた高周波フィルタを有する高 周波側経路とを具備し、前記共通端子側に形成された寄生容量を不要波を抑制す るキャパシタとすることを特徴とする。この分波回路の共通端子を他の回路素子に接 続すれば、上記寄生容量が容量素子として機能し、設計の効率及び自由度が向上 する。例えば上記共通端子をアンテナと接続すると、アンテナ端子に上記寄生容量 を付加できるため、高調波抑制に効果を発揮する。  [0015] A second branching circuit of the present invention includes a common terminal, a low-frequency terminal, a high-frequency terminal, and a low-frequency filter having a low-frequency filter provided between the common terminal and the low-frequency terminal. A capacitor having a side path and a high-frequency side path having a high-frequency filter provided between the common terminal and the high-frequency terminal, and a parasitic capacitance formed on the common terminal side for suppressing unnecessary waves; It is characterized by doing. If the common terminal of this branching circuit is connected to other circuit elements, the parasitic capacitance functions as a capacitive element, and the design efficiency and flexibility are improved. For example, when the common terminal is connected to an antenna, the parasitic capacitance can be added to the antenna terminal, which is effective in suppressing harmonics.
[0016] 上記分波回路において、前記高周波フィルタは前記共通端子に接続された第一の キャパシタを備え、前記第一のキャパシタの前記共通端子側に前記寄生容量が形成 されていても良い。  [0016] In the branching circuit, the high frequency filter may include a first capacitor connected to the common terminal, and the parasitic capacitance may be formed on the common terminal side of the first capacitor.
[0017] 上記分波回路において、前記第一のキャパシタを構成する対向電極のうち前記共 通端子に接続された電極と、グランド電極とが対向して配置され、もって両電極の間 に前記寄生容量が形成されて 、るのが好ま 、。分波回路を構成するキャパシタのう ち共通端子に接続されたキャパシタの接続端子側の電極を利用することにより、簡単 な構造で効率的に寄生容量を形成することができ、もって回路の大型化を避けること ができる。 [0017] In the branching circuit, an electrode connected to the common terminal among the counter electrodes constituting the first capacitor and a ground electrode are arranged to face each other, and thus the parasitic is interposed between the two electrodes. It is preferable that the capacity is formed. By using the electrode on the connection terminal side of the capacitor connected to the common terminal of the capacitors that make up the demultiplexing circuit, With such a structure, parasitic capacitance can be formed efficiently, so that an increase in circuit size can be avoided.
[0018] 上記分波回路において、前記高周波フィルタは、前記共通端子に接続された第一 のキャパシタと、前記第一のキャパシタと前記高周波端子との間に接続された第二の キャパシタと、前記第一のキャパシタと前記第二のキャパシタとの間とグランドとの間 に接続された第三の伝送線路及び第三のキャパシタカ なる直列共振回路とを備え 、前記第三の伝送線路、前記第一のキャパシタ、前記第二のキャパシタ及び前記第 三のキャパシタは電極パターンが形成された誘電体層を積層してなる積層体内に構 成されており、前記積層体内で前記第一のキャパシタを構成する対向電極のうち前 記共通端子に接続された電極がグランド電極に対向して ヽるのが好ま ヽ。分波回 路を構成するキャパシタのうち共通端子に接続された電極をグランド電極に対向させ るので、効率的に寄生容量を発生させることができるだけでなぐグランド電極の面積 や、前記第一のキャパシタを構成する対向電極のうち前記共通端子に接続された電 極とグランド電極との距離等を変えることにより簡単に寄生容量を調整できる。  [0018] In the branching circuit, the high-frequency filter includes a first capacitor connected to the common terminal, a second capacitor connected between the first capacitor and the high-frequency terminal, A third transmission line connected between the first capacitor and the second capacitor and the ground, and a series resonance circuit consisting of a third capacitor, the third transmission line, The one capacitor, the second capacitor, and the third capacitor are configured in a stacked body in which dielectric layers having electrode patterns are stacked, and the first capacitor is configured in the stacked body. It is preferable that the electrode connected to the common terminal is opposed to the ground electrode. Since the electrode connected to the common terminal among the capacitors constituting the branching circuit is opposed to the ground electrode, the area of the ground electrode that can efficiently generate parasitic capacitance and the first capacitor The parasitic capacitance can be easily adjusted by changing the distance between the electrode connected to the common terminal and the ground electrode among the counter electrodes constituting the.
[0019] 本発明の第一の高周波回路は、前記第一の分波回路を備え、前記低周波端子に 接続された第二の伝送線路を有し、前記キャパシタは前記第一の伝送線路の一部と 前記第二の伝送線路の少なくとも一部に並列に接続されていることを特徴とする。第 一の伝送線路と、低周波端子に接続された他の回路の伝送線路とを用いて、不要帯 域を抑制する並列共振回路を構成するので、分波回路を小型化できる。またキャパ シタが第一の伝送線路と第二の伝送線路に跨ぐように接続されているため、この高周 波回路を多層基板に形成する場合に前記キャパシタの配置が容易である。  [0019] A first high-frequency circuit of the present invention includes the first branching circuit, includes a second transmission line connected to the low-frequency terminal, and the capacitor includes the first transmission line. A part and at least a part of the second transmission line are connected in parallel. Since the parallel resonance circuit that suppresses the unnecessary band is configured by using the first transmission line and the transmission line of another circuit connected to the low frequency terminal, the branching circuit can be reduced in size. Further, since the capacitor is connected so as to straddle the first transmission line and the second transmission line, the capacitor can be easily arranged when the high-frequency circuit is formed on the multilayer substrate.
[0020] 上記高周波回路は、前記低周波端子に接続され、前記低周波側経路の送信側経 路と受信側経路との切り替えを行うスィッチ回路を有し、前記第二の伝送線路は前記 スィッチ回路の受信側経路に設けられた伝送線路であるのが好ま 、。この構成によ り、分波回路の後段にスィッチ回路を有し、不要帯域を抑制する小型の高周波回路 が得られる。  [0020] The high-frequency circuit includes a switch circuit that is connected to the low-frequency terminal and switches between the transmission-side path and the reception-side path of the low-frequency side path, and the second transmission line is the switch It is preferable that the transmission line is provided in the circuit on the receiving side. With this configuration, a small high-frequency circuit that has a switch circuit in the subsequent stage of the branching circuit and suppresses unnecessary bands can be obtained.
[0021] 本発明の第一の高周波モジュールは、前記分波回路又は前記高周波回路が、電 極パターンが形成された誘電体層を積層してなる多層基板に構成されていることを 特徴とする。この構成により不要帯域を抑制する小型の高周波回路が得られる。 [0021] In the first high-frequency module of the present invention, the branching circuit or the high-frequency circuit is configured on a multilayer substrate formed by laminating dielectric layers on which electrode patterns are formed. Features. With this configuration, a small high-frequency circuit that suppresses unnecessary bands can be obtained.
[0022] 上記高周波モジュールにおいて、前記第一の伝送線路の一部を構成する電極パ ターン、前記第二の伝送線路の少なくとも一部を構成する電極パターン、及び前記 キャパシタの電極パターンが積層体の積層方向に重なって!/、るのが好まし!/、。この 構成は並列共振回路を小さくでき、高周波モジュールの小型化に有利である。  [0022] In the above high-frequency module, an electrode pattern constituting a part of the first transmission line, an electrode pattern constituting at least a part of the second transmission line, and an electrode pattern of the capacitor are formed of a laminate. Overlapping in the stacking direction! / This configuration can reduce the size of the parallel resonant circuit and is advantageous for downsizing the high-frequency module.
[0023] 本発明の第二の高周波モジュールは、前記第二の分波回路が、電極パターンが形 成された誘電体層を積層してなる多層基板に構成されていること特徴とする。この分 波回路の共通端子を他の回路素子に接続すれば、前記寄生容量は容量素子として 機能し、高周波モジュールの設計の効率及び自由度が向上する。  [0023] The second high-frequency module of the present invention is characterized in that the second demultiplexing circuit is configured on a multilayer substrate formed by laminating dielectric layers in which electrode patterns are formed. If the common terminal of this demultiplexing circuit is connected to other circuit elements, the parasitic capacitance functions as a capacitive element, and the design efficiency and flexibility of the high-frequency module is improved.
[0024] 上記高周波モジュールは、前記分波回路により分けられる第一の周波数帯域の送 信系と受信系を切り換える第一のスィッチ回路と、前記分波回路により分けられる第 二の周波数帯域の送信系と受信系を切り換える第二のスィッチ回路とを備えるのが 好ま 、。力かる構成の高周波アンテナスィッチモジュールの分波回路をアンテナと 接続すると、前記分波回路に発生する寄生容量をアンテナ端子に付加でき、高調波 が抑制される。  [0024] The high frequency module includes a first switch circuit that switches between a transmission system and a reception system in a first frequency band divided by the branching circuit, and a transmission in a second frequency band divided by the branching circuit. It is preferable to have a second switch circuit that switches between the system and the receiving system. When the demultiplexing circuit of the high-frequency antenna switch module having a powerful structure is connected to the antenna, the parasitic capacitance generated in the demultiplexing circuit can be added to the antenna terminal, and harmonics are suppressed.
[0025] 本発明の第三の高周波モジュールは、少なくとも第一の周波数帯域と、前記第一 の周波数帯域より高い第二の周波数帯域を選択的に用いるマルチバンド無線通信 装置に用いるもので、前記第一の周波数帯域における第一の送受信系と前記第二 の周波数帯域における第二の送受信系とを分ける分波回路と、前記分波回路に接 続され、前記第一の送受信系の送信系と受信系を切り換える第一のスィッチ回路と、 前記分波回路に接続され、前記第二の送受信系の送信系と受信系を切り換える第 二のスィッチ回路とを有し、前記分波回路、前記第一のスィッチ回路及び前記第二 のスィッチ回路は電極パターンが形成された誘電体層を積層してなる積層体に構成 されており、前記分波回路、前記第一のスィッチ回路及び前記第二のスィッチ回路 が有する伝送線路のうち、前記第一の周波数帯域の信号が通る伝送線路は前記積 層体内の誘電体層に設けられたグランド電極の積層方向一方の側に形成されており 、前記第二の週波数帯域の信号が通る伝送線路は前記グランド電極の積層方向他 方の側に形成されて 、ることを特徴とする。 [0026] 前記分波回路等が有する第一の周波数帯域の信号が通る伝送線路と第二の周波 数帯域の信号が通る伝送線路とをグランド電極により積層方向に分離するので、両 送受信回路間での相互干渉や、信号及び不要高調波の漏洩を抑制することができ る。前記第一の周波数帯域の信号が通る伝送線路と前記第二の周波数帯域の信号 が通る伝送線路とを積層方向に分離しているため、両回路の分離のために平面寸法 が増大するのを回避できる。 [0025] A third high-frequency module of the present invention is used for a multiband radio communication device that selectively uses at least a first frequency band and a second frequency band higher than the first frequency band. A demultiplexing circuit that separates a first transmission / reception system in the first frequency band and a second transmission / reception system in the second frequency band; and a transmission system connected to the demultiplexing circuit and connected to the first transmission / reception system And a first switch circuit for switching the reception system, and a second switch circuit connected to the branching circuit and for switching the transmission system and the reception system of the second transmission / reception system, the branching circuit, The first switch circuit and the second switch circuit are configured as a laminate formed by laminating dielectric layers on which electrode patterns are formed, and the branching circuit, the first switch circuit, and the second switch circuit are formed. Switch times The transmission line through which the signal in the first frequency band passes is formed on one side in the stacking direction of the ground electrode provided in the dielectric layer in the stack, A transmission line through which a signal in a frequency band passes is formed on the other side in the stacking direction of the ground electrode. [0026] Since the transmission line through which the signal in the first frequency band and the transmission line through which the signal in the second frequency band have are separated in the stacking direction by the ground electrode, It is possible to suppress mutual interference and leakage of signals and unwanted harmonics. Since the transmission line through which the signal in the first frequency band passes and the transmission line through which the signal in the second frequency band pass are separated in the stacking direction, the plane dimension increases due to the separation of both circuits. Can be avoided.
[0027] 第一及び第二の周波数帯域の他に、周波数帯域の異なる第三の周波数帯域等の 送受信回路を設けても良い。この場合、第三又は第四の周波数帯域の信号が通る 伝送線路は前記グランド電極の片側にまとめて形成するのが好ましい。  [0027] In addition to the first and second frequency bands, a transmission / reception circuit for a third frequency band or the like having a different frequency band may be provided. In this case, it is preferable that transmission lines through which signals in the third or fourth frequency band pass are formed collectively on one side of the ground electrode.
[0028] 第三の高周波モジュールにお 、て、前記第二の周波数帯域と前記第一の周波数 帯域の二倍波の周波数帯域とはほぼ同じであるのが好ましい。第二の周波数帯域と 第一の周波数帯域の二倍波の周波数帯域とが同じであると、第一の周波数帯域の 不要高調波の漏洩等が第二の周波数帯域の信号に与える影響が大き 、ので、第一 の周波数帯域と第二の周波数帯域とのシールドを確実に行う第三の高周波モジユー ルは、特に効果的である。  [0028] In the third high-frequency module, it is preferable that the second frequency band and the frequency band of the second harmonic of the first frequency band are substantially the same. If the frequency band of the second frequency band and the double frequency band of the first frequency band are the same, the leakage of unwanted harmonics in the first frequency band has a significant effect on the signal in the second frequency band. Therefore, the third high-frequency module that reliably shields the first frequency band and the second frequency band is particularly effective.
[0029] 第三の高周波モジュールは、高調波の抑制を図るために、インダクタンスを形成す る伝送線路とキャパシタとを備えたローノ スフィルタを有し、前記伝送線路を構成す る電極パターンが形成された誘電体層と前記キャパシタを構成する電極パターンが 形成された誘電体層とはグランド電極により積層方向に分離されており、かつ前記伝 送線路を構成する電極パターンに関して前記グランド電極の積層方向反対側に対 向するグランド電極を具備しないのが好ましい。この場合、前記グランド電極の積層 方向の片側はインダクタンス形成部、反対側はキャパシタ形成部となっている。この 構成では、伝送線路とキャパシタの間にグランド電極が配置されているため、伝送線 路及びキャパシタの干渉が防止されてフィルタ性能が向上するとともに、伝送線路及 びキャパシタの設計も容易になる。  [0029] The third high-frequency module includes a low-pass filter including a transmission line that forms an inductance and a capacitor in order to suppress harmonics, and an electrode pattern that forms the transmission line is formed. The dielectric layer on which the electrode pattern constituting the capacitor is formed is separated in the laminating direction by a ground electrode, and the direction in which the ground electrode is laminated with respect to the electrode pattern constituting the transmission line It is preferable not to have a ground electrode facing the opposite side. In this case, one side of the ground electrode in the stacking direction is an inductance forming part, and the other side is a capacitor forming part. In this configuration, since the ground electrode is disposed between the transmission line and the capacitor, interference between the transmission line and the capacitor is prevented, the filter performance is improved, and the transmission line and the capacitor are easily designed.
[0030] 第三の高周波モジュールは、前記キャパシタを構成する電極パターンに関して前 記グランド電極の積層方向反対側に対向するグランド電極を具備しないのが好まし い。この構成によれば、ローパスフィルタを小型化できる。 [0031] 上記高周波モジュールは前記キャパシタを複数有するのが好ましい。 π型や梯子 型のローパスフィルタ等のように複数のキャパシタを有する場合、キャパシタをインダ クタンスに近接して配置すると干渉が起こりやすくなる。これに対して、複数の前記キ ャパシタをグランド電極の積層方向片側にまとめて形成することにより、インダクタンス を形成する伝送線路とキャパシタの干渉を効果的に抑制できる。梯子型のローパス フィルタのようにインダクタンスを形成する伝送線路も複数で良い。この場合、前記伝 送線路をグランド電極に関してキャパシタの反対側にまとめて形成する。 [0030] Preferably, the third high-frequency module does not include a ground electrode facing the opposite side of the ground electrode in the stacking direction with respect to the electrode pattern constituting the capacitor. According to this configuration, the low-pass filter can be reduced in size. [0031] The high-frequency module preferably includes a plurality of the capacitors. In the case of having a plurality of capacitors such as a π-type or ladder-type low-pass filter, interference is likely to occur if the capacitors are arranged close to the inductance. On the other hand, by forming the plurality of capacitors together on one side in the stacking direction of the ground electrode, interference between the transmission line forming the inductance and the capacitor can be effectively suppressed. There may be a plurality of transmission lines forming an inductance, such as a ladder-type low-pass filter. In this case, the transmission line is formed collectively on the opposite side of the capacitor with respect to the ground electrode.
[0032] 上記高周波モジュールにおいて、前記キャパシタの少なくとも一つは前記伝送線 路に並列に接続されても良い。この構成でも伝送線路とキャパシタとの干渉が効果的 に抑制される。 [0032] In the high-frequency module, at least one of the capacitors may be connected in parallel to the transmission line. Even with this configuration, the interference between the transmission line and the capacitor is effectively suppressed.
発明の効果  The invention's effect
[0033] 本発明の分波回路は、低周波フィルタが低周波側経路に直列に接続された第一の 伝送線路と、第一の伝送線路の一部に並列接続されたキャパシタとを有する構成を 有するので、小型及び低損失でありながら不要帯域を効果的に抑制することができる 。また本発明の高周波モジュールは、小型を維持しつつ、周波数帯の異なる送受信 系同士の信号の漏洩及び干渉を抑制できる。  [0033] The branching circuit of the present invention includes a first transmission line in which a low-frequency filter is connected in series to the low-frequency side path, and a capacitor connected in parallel to a part of the first transmission line. Therefore, the unnecessary band can be effectively suppressed while being small in size and low loss. The high-frequency module of the present invention can suppress signal leakage and interference between transmission / reception systems having different frequency bands while maintaining a small size.
図面の簡単な説明  Brief Description of Drawings
[0034] [図 1]本発明の一実施形態による分波回路の等価回路を示す図である。 FIG. 1 is a diagram showing an equivalent circuit of a branching circuit according to an embodiment of the present invention.
[図 2]本発明の他の実施形態による高周波回路の等価回路を示す図である。  FIG. 2 is a diagram showing an equivalent circuit of a high-frequency circuit according to another embodiment of the present invention.
[図 3]本発明のクヮッドバンド用アンテナスィッチ回路の等価回路を示す図である。  FIG. 3 is a diagram showing an equivalent circuit of the quad-band antenna switch circuit of the present invention.
[図 4]本発明の一実施形態による高周波モジュールを構成する電極パターン付き誘 電体層を示す部分展開図である。  FIG. 4 is a partial development view showing an electrode layer with an electrode pattern constituting the high-frequency module according to one embodiment of the present invention.
[図 5]本発明の一実施形態による高周波モジュールの通過特性を示すグラフである。  FIG. 5 is a graph showing pass characteristics of a high-frequency module according to an embodiment of the present invention.
[図 6]比較例の高周波スィッチモジュールの通過特性を示すグラフである。  FIG. 6 is a graph showing pass characteristics of a high-frequency switch module of a comparative example.
[図 7]本発明の他の実施形態による分波回路の等価回路を示す図である。  FIG. 7 is a diagram showing an equivalent circuit of a branching circuit according to another embodiment of the present invention.
[図 8]本発明の他の実施形態による分波回路の等価回路における寄生容量を示す 図である。  FIG. 8 is a diagram showing parasitic capacitance in an equivalent circuit of a branching circuit according to another embodiment of the present invention.
[図 9]本発明の他の実施形態による高周波モジュールの積層体の一部を概略的に示 す断面図である。 FIG. 9 schematically shows a part of a laminate of a high-frequency module according to another embodiment of the present invention. FIG.
[図 10]本発明の他の実施形態によるクヮッドバンド用アンテナスィッチ回路の等価回 路を示す図である。  FIG. 10 is a diagram showing an equivalent circuit of a quad-band antenna switch circuit according to another embodiment of the present invention.
[図 11]本発明のさらに他の実施形態による高周波モジュールを示すブロック図である  FIG. 11 is a block diagram showing a high-frequency module according to still another embodiment of the present invention.
[図 12]本発明のさらに他の実施形態による高周波モジュールを構成する電極パター ン付き誘電体層を示す部分展開図である。 FIG. 12 is a partial development view showing a dielectric layer with an electrode pattern constituting a high-frequency module according to still another embodiment of the present invention.
[図 13]本発明のさらに他の高周波スィッチモジュールを構成する電極パターン付き 誘電体層を示す部分展開図である。  FIG. 13 is a partial development view showing a dielectric layer with an electrode pattern constituting still another high-frequency switch module of the present invention.
[図 14]本発明の一実施形態によるローパスフィルタを用いた積層高周波モジュール を構成する電極パターン付き誘電体層を示す部分展開図である。  FIG. 14 is a partial development view showing a dielectric layer with an electrode pattern constituting a laminated high-frequency module using a low-pass filter according to an embodiment of the present invention.
[図 15]本発明の一実施形態によるローパスフィルタの等価回路を示す図である。  FIG. 15 is a diagram showing an equivalent circuit of a low-pass filter according to one embodiment of the present invention.
[図 16]本発明の他の実施形態によるローパスフィルタの等価回路を示す図である。  FIG. 16 is a diagram showing an equivalent circuit of a low-pass filter according to another embodiment of the present invention.
[図 17(a)]本発明に用いるローパスフィルタの一例を概略的に示す断面図である。  FIG. 17 (a) is a cross-sectional view schematically showing an example of a low-pass filter used in the present invention.
[図 17(b)]本発明に用いるローパスフィルタの他の例を概略的に示す断面図である。 発明を実施するための最良の形態  FIG. 17 (b) is a cross-sectional view schematically showing another example of the low-pass filter used in the present invention. BEST MODE FOR CARRYING OUT THE INVENTION
[0035] [1]第一の実施形態 [0035] [1] First embodiment
(A)分波回路  (A) Demultiplexer circuit
図 1は本発明の一実施形態による分波回路の等価回路を示す。分波回路は、送信 時には高周波側送信回路又は低周波側送信回路の送信信号を通過させ、受信時 には周波数の異なる受信信号を分波して高周波側受信回路又は低周波側受信回 路に分配する機能を有する。図 1に示す分波回路は、共通端子 Pc、低周波端子 PI及 び高周波端子 Phを有し、低周波フィルタ及び高周波フィルタを有し、これらのフィルタ を用いて、共通端子 Pcに接続する信号経路を共通端子 Pcと低周波端子 P1を接続す る低周波側経路と、共通端子 Pcと高周波端子 Phを接続する高周波側経路とに分岐 する。  FIG. 1 shows an equivalent circuit of a branching circuit according to an embodiment of the present invention. The demultiplexing circuit passes the transmission signal of the high-frequency side transmission circuit or the low-frequency side transmission circuit during transmission, and demultiplexes the reception signals with different frequencies during reception to the high-frequency side reception circuit or low-frequency side reception circuit. Has the function of distributing. The branching circuit shown in FIG. 1 has a common terminal Pc, a low-frequency terminal PI, and a high-frequency terminal Ph, and has a low-frequency filter and a high-frequency filter, and signals connected to the common terminal Pc using these filters. The path is branched into a low-frequency path that connects the common terminal Pc and the low-frequency terminal P1, and a high-frequency path that connects the common terminal Pc and the high-frequency terminal Ph.
[0036] 低周波フィルタは、共通端子 Pcと低周波端子 P1との間の設けられた第一の伝送線 路 LL1と、第一の伝送線路 LL1と低周波端子 P1との間に一端が接続され他端が接地 された伝送線路 LL2と第一のキャパシタ CL1との直列共振回路とからなる。伝送線路 LL2と第一のキャパシタ CL1の直列共振回路の共振周波数を例えば高周波側の信 号周波数と同じに設定することにより、高周波側の信号が低周波側に回り込むのを 防ぐことができる。本実施形態では、低周波フィルタの第一の伝送線路 LL1の一部( 低周波端子 P1側)にキャパシタ Cが並列接続し、並列共振回路を構成している。第一 の伝送線路 LL1の残部(共通端子 Pc側)はインダクタを構成している。第一の伝送線 路 LL1の一部がキャパシタ Cと並列共振回路を構成しているため、並列共振回路の 付カ卩に伴う低周波フィルタ回路の大型化を回避することができる。図 1に示す例では キャパシタ Cは第一の伝送線路 LL1の一部と並列に接続している力 この構成に限ら ず、キャパシタ Cは第一の伝送線路 LL1と直列に接続される他の回路素子も含む部 分に対して並列に接続しても良い。前記直列共振回路、及び第一の伝送線路 LL1の 一部とキャパシタ Cとの並列共振回路以外については、図 1に示す構成に限られず、 他の構成でも良い。 [0036] The low frequency filter has one end connected between the first transmission line LL1 provided between the common terminal Pc and the low frequency terminal P1, and between the first transmission line LL1 and the low frequency terminal P1. The other end is grounded The transmission line LL2 is composed of a series resonant circuit of the first capacitor CL1. By setting the resonance frequency of the series resonance circuit of the transmission line LL2 and the first capacitor CL1 to be the same as the signal frequency on the high frequency side, for example, it is possible to prevent the high frequency side signal from wrapping around to the low frequency side. In this embodiment, a capacitor C is connected in parallel to a part of the first transmission line LL1 (low frequency terminal P1 side) of the low frequency filter, thereby forming a parallel resonance circuit. The remaining part of the first transmission line LL1 (common terminal Pc side) constitutes an inductor. Since part of the first transmission line LL1 forms a parallel resonant circuit with the capacitor C, it is possible to avoid an increase in the size of the low frequency filter circuit due to the addition of the parallel resonant circuit. In the example shown in FIG. 1, the capacitor C is connected in parallel with a part of the first transmission line LL1, not limited to this configuration, and the capacitor C is another circuit connected in series with the first transmission line LL1. It may be connected in parallel to the part including the element. Except for the series resonant circuit and the parallel resonant circuit of a part of the first transmission line LL1 and the capacitor C, the configuration is not limited to that shown in FIG.
[0037] 高周波フィルタは、共通端子 Pcと高周波端子 Phとの間に接続された第二及び第三 のキャパシタ CH4, CH5と、第二及び第三のキャパシタ CH4, CH5の接続点とグランド との間に接続された伝送線路 LH4及び第四のキャパシタ CH6からなる直列共振回路 とを備えている。し力し高周波フィルタの回路構成はこの構成に限らず、適宜変更す ることがでさる。  [0037] The high frequency filter includes the second and third capacitors CH4 and CH5 connected between the common terminal Pc and the high frequency terminal Ph, and the connection point between the second and third capacitors CH4 and CH5 and the ground. A series resonance circuit including a transmission line LH4 and a fourth capacitor CH6 connected between them. However, the circuit configuration of the high-frequency filter is not limited to this configuration, and can be changed as appropriate.
[0038] 第一の伝送線路 LL1の一部とキャパシタ Cを並列接続する構成を有する分波回路 は、電極パターンを有する誘電体層からなる多層基板中で下記のように構成すること ができる。例えば、誘電体層に形成された第一の伝送線路 LL1の電極パターンの一 部に対向するように、隣接する誘電体層にキャパシタ Cの電極パターンを形成し、こ れらの電極パターンの一端を低周波端子 P1に接続する。第一の伝送線路 LL1の一部 の幅を他の部分より大きくしても良い。  [0038] A branching circuit having a configuration in which a part of the first transmission line LL1 and the capacitor C are connected in parallel can be configured as follows in a multilayer substrate including a dielectric layer having an electrode pattern. For example, the electrode pattern of the capacitor C is formed on the adjacent dielectric layer so as to face a part of the electrode pattern of the first transmission line LL1 formed on the dielectric layer, and one end of these electrode patterns is formed. To the low frequency terminal P1. The width of a part of the first transmission line LL1 may be made larger than the other part.
[0039] (B)高周波回路  [0039] (B) High frequency circuit
図 2は本発明の一実施形態による高周波回路の等価回路を示す。この高周波回路 は、分波回路を備えるとともに、分波回路の低周波端子 P1に接続される後段の回路 に設けられた第二の伝送線路 Lg2を有し、第一の伝送線路 LL1の低周波端子 P1側の 一部と、第二の伝送線路 Lg2の低周波端子 PI側の少なくとも一部とにキャパシタじが 並列に接続されている。図 2に示す例では、後段の回路は低周波側経路の送信側経 路と受信側経路との切り替えを行うスィッチ回路(回路構成は後述する)である。第二 の伝送線路 Lg2はスィッチ回路の受信側経路に設けられている。図 2は、低周波端子 P1に接続されたスィッチ回路のダイオード Dglも示す。 FIG. 2 shows an equivalent circuit of a high-frequency circuit according to an embodiment of the present invention. This high-frequency circuit includes a demultiplexing circuit and has a second transmission line Lg2 provided in a subsequent circuit connected to the low-frequency terminal P1 of the demultiplexing circuit, and the low-frequency of the first transmission line LL1. Terminal P1 side A capacitor is connected in parallel to a part and at least a part of the second transmission line Lg2 on the low frequency terminal PI side. In the example shown in FIG. 2, the subsequent circuit is a switch circuit (circuit configuration will be described later) that switches between the transmission side path and the reception side path of the low frequency side path. The second transmission line Lg2 is provided in the receiving side path of the switch circuit. Figure 2 also shows the diode Dgl of the switch circuit connected to the low frequency terminal P1.
[0040] このように分波回路の低周波フィルタの第一の伝送線路 LL1と、スィッチ回路の受 信側経路に設けられた第二の伝送線路 Lg2と、これらに並列に接続されたキャパシタ Cとにより並列共振回路を構成しているため、回路が大型化することがない。この並列 共振回路の共振周波数を受信信号の周波数以外の帯域に調整することにより、広く 不要帯域の減衰を図ることができる。なお高周波フィルタ等、他の回路構成は図 1に 示すものと同じであるので、その説明を省略する。またキャパシタ Cは、第二の伝送線 路 Lg2の一部と並列に接続しても良 ヽし、第二の伝送線路 Lg2の全体と並列に接続し ても良い。 [0040] Thus, the first transmission line LL1 of the low-frequency filter of the branching circuit, the second transmission line Lg2 provided in the receiving side path of the switch circuit, and the capacitor C connected in parallel to these Since the parallel resonant circuit is configured as described above, the circuit does not increase in size. By adjusting the resonant frequency of this parallel resonant circuit to a band other than the frequency of the received signal, it is possible to widely attenuate the unnecessary band. The other circuit configurations such as the high frequency filter are the same as those shown in FIG. The capacitor C may be connected in parallel with a part of the second transmission line Lg2, or may be connected in parallel with the entire second transmission line Lg2.
[0041] 図 2に示す高周波回路を、電極パターンが形成された誘電体層力もなる多層基板 に構成し、高周波モジュールとすることができる。高周波モジュールの例としては、ァ ンテナに接続される送信系と受信系の信号経路を切り換えるアンテナスィッチモジュ ールや、送信信号を増幅する高周波増幅器回路を有する高周波増幅器モジュール と前記アンテナスィッチモジュールとを一体ィ匕した複合モジュール等が挙げられるが 、これに限定されない。  [0041] The high-frequency circuit shown in FIG. 2 can be configured as a high-frequency module by forming it on a multilayer substrate having a dielectric layer force on which an electrode pattern is formed. Examples of the high-frequency module include an antenna switch module that switches a signal path between a transmission system and a reception system connected to an antenna, a high-frequency amplifier module that includes a high-frequency amplifier circuit that amplifies a transmission signal, and the antenna switch module. Examples of the integrated module include, but are not limited to.
[0042] 本発明の一実施形態である高周波モジュールとして、図 3は、低周波帯の GSM850 帯域 (送信周波数: 824〜849 MHz,受信周波数: 869〜894 MHz)及び EGSM帯域 (送 信周波数: 880〜915 MHz,受信周波数: 925〜960 MHz),及び高周波帯の DCS帯 域(送信周波数: 1710〜1785 MHz,受信周波数: 1805〜1880 MHz)及び PCS帯域( 送信周波数: 1850〜1910 MHz,受信周波数: 1930〜1990 MHz)を用いるクヮッドバ ンド用アンテナスィッチ回路の等価回路を示す。このアンテナスィッチ回路は、低周 波フィルタ及び高周波フィルタ力 なる分波回路 Dipと、分波回路の低周波フィルタの 後段に配置され、制御端子 Vcから供給される電圧により送信端子 Tx-LBと受信端子 Rx-LBとを切り換える第一のスィッチ回路 SW1と、分波回路の高周波フィルタの後段 に配置され、制御端子 Vcから供給される電圧により送信端子 Tx-HBと受信端子 Rx- HBとを切り換える第二のスィッチ回路 SW2とを具備する。低周波側の送信端子 Tx-L B及び受信端子 Rx-LBは GSM及び EGSMで共用しており、高周波側の送信端子 Tx- HB及び受信端子 Rx-HBは DCS及び PCSで共用して 、る。低周波側の受信端子 Rx- LB及び高周波側の受信端子 Rx-HBは本モジュールが搭載される携帯端末が使用さ れる地域により選択的に使用し、例えば、欧州では Rx-LBを EGSM、 Rx-HBを DCSに 割り当て、米国では Rx-LBを GSM、 Rx-HBを PCSに割り当てる。このとき、各送受信端 子では低周波帯である GSM850及び EGSMの帯域、高周波帯である DCS及び PCSの 帯域で所望特性を有する広帯域設計が必要となる。また低周波側の受信端子 Rx-L B及び高周波側の受信端子 Rx-HBの後段はスィッチ回路(図示せず)とし、 4つの受 信端子を設けても良い。 As a high-frequency module according to an embodiment of the present invention, FIG. 3 shows a low-frequency GSM850 band (transmission frequency: 824 to 849 MHz, reception frequency: 869 to 894 MHz) and an EGSM band (transmission frequency: 880 to 915 MHz, reception frequency: 925 to 960 MHz), and high frequency DCS band (transmission frequency: 1710 to 1785 MHz, reception frequency: 1805 to 1880 MHz) and PCS band (transmission frequency: 1850 to 1910 MHz, An equivalent circuit of a quad-band antenna switch circuit using a reception frequency of 1930 to 1990 MHz) is shown. This antenna switch circuit is disposed after the demultiplexing circuit Dip, which is a low-frequency filter and a high-frequency filter power, and the low-frequency filter of the demultiplexing circuit. The first switch circuit SW1 that switches between terminals Rx-LB and the high-frequency filter of the demultiplexing circuit And a second switch circuit SW2 that switches between the transmission terminal Tx-HB and the reception terminal Rx-HB by a voltage supplied from the control terminal Vc. The low frequency transmission terminal Tx-LB and the reception terminal Rx-LB are shared by GSM and EGSM, and the high frequency transmission terminal Tx-HB and the reception terminal Rx-HB are shared by DCS and PCS. . The low-frequency side receiving terminal Rx-LB and the high-frequency side receiving terminal Rx-HB are selectively used depending on the region where the mobile terminal in which this module is installed is used. For example, in Europe, Rx-LB is used as EGSM, Rx. -HB is assigned to DCS. In the US, Rx-LB is assigned to GSM and Rx-HB is assigned to PCS. At this time, each transmitter / receiver terminal needs to have a broadband design with desired characteristics in the GSM850 and EGSM bands, which are low frequency bands, and the DCS and PCS bands, which are high frequency bands. Further, a low-frequency receiving terminal Rx-LB and a high-frequency receiving terminal Rx-HB may be followed by a switch circuit (not shown) and provided with four receiving terminals.
[0043] 高周波モジュールを、クヮッドバンドに限らず、トリプルバンド又はデュアルバンドの 高周波スィッチモジュールとしても良い。例えば、低周波帯の GSM850及び EGSMの 一方を第一の周波数帯域とし、高周波帯の DCS及び PCSの一方を第二の周波数帯 域としても良い。さらに、高周波モジュールは携帯電話の通信システム用に限らず、 無線 LAN等他の通信システム用でも良い。高周波回路及び高周波モジュールに用 いるフィルタ回路、スィッチ回路、検波回路、平衡不平衡回路等の回路素子の数及 び配置は、必要に応じて変更しても良い。  [0043] The high frequency module is not limited to the quad band, and may be a triple band or dual band high frequency switch module. For example, one of the low frequency band GSM850 and EGSM may be the first frequency band, and one of the high frequency band DCS and PCS may be the second frequency band. Furthermore, the high-frequency module is not limited to a mobile phone communication system, but may be used for another communication system such as a wireless LAN. The number and arrangement of circuit elements such as filter circuits, switch circuits, detector circuits, balanced / unbalanced circuits, etc. used in the high-frequency circuit and the high-frequency module may be changed as necessary.
[0044] 図 3に示すアンテナスィッチ回路において、第一の周波数帯域の送受信系と第二 の周波数帯域の送受信系とを分けるために低周波フィルタ及び高周波フィルタから なる分波回路 (ダイプレクサ) Dipは、 GSM及び EGSMの送受信信号を通過させるとと もに DCS及び PCSの送受信信号を減衰させる低周波側(GSMZEGSM Side)フィルタ としてローパスフィルタを備え、 DCS及び PCSの送受信信号を通過させるとともに GSM 及び EGSMの送受信信号を減衰させる高周波側(DCSZPCS Side)フィルタとしてハ ィパスフィルタを備えて ヽる。共通端子であるアンテナ端子 Antに接続されて ヽる低 周波フィルタ及び高周波フィルタは、それぞれ伝送線路とキャパシタにより構成され て!、るが、バンドパスフィルタ又はノッチフィルタで構成することもできる。  In the antenna switch circuit shown in FIG. 3, a branching circuit (diplexer) Dip composed of a low-frequency filter and a high-frequency filter is used to separate the transmission / reception system in the first frequency band from the transmission / reception system in the second frequency band. A low-pass filter is provided as a low-frequency filter (GSMZEGSM Side) that passes the GSM and EGSM transmission and reception signals and attenuates the DCS and PCS transmission and reception signals, and passes the GSM and EGSM transmission signals. A high-pass filter is provided as a high-frequency (DCSZPCS Side) filter that attenuates the transmitted and received signals. The low-frequency filter and high-frequency filter connected to the antenna terminal Ant, which is a common terminal, are each composed of a transmission line and a capacitor! However, they can also be composed of a band-pass filter or a notch filter.
[0045] 低周波側(GSMZEGSM Side)フィルタとしてのローパスフィルタにお 、て、伝送線 路 LL1は、低周波帯域 (GSM及び EGSM)の信号を低損失で通過させる力 高周波帯 域 (DCS及び PCS)の信号に対して高インピーダンスとなり、 DCS及び PCS帯域の信号 の回り込みを防止する。伝送線路 LL1は、 DCS及び PCS帯域の信号が GSM系の経路 へ伝送されな 、ように、 DCS及び PCS帯域の信号の周波数で高インピーダンスとなる 長さに設定するのが好ましい。伝送線路 LL2及びキャパシタ CL1は、 DCS及び PCS帯 域に共振周波数を有する直列共振回路を構成し、 DCS及び PCS帯域の信号をグラン ドに落とし、回り込みを防止する。高周波側(DCSZPCS Side)フィルタとしてのハイパ スフィルタにおいて、キャパシタ CH4、 CH5は、高周波帯域(DCS及び PCS)の信号を 低損失で通過させるが、低周波帯域 (GSM及び EGSM)の信号に対して高インピーダ ンスとなり、 GSM及び EGSM帯域の信号の回り込みを防止する。伝送線路 LH4及びキ ャパシタ CH4は、 GSM及び EGSM帯域に共振周波数を有する直列共振回路を構成し 、 GSM及び EGSM帯域の信号をグランドに落とし、回り込みを防止する。 [0045] In a low-pass filter as a low frequency side (GSMZEGSM Side) filter, a transmission line Route LL1 has a high impedance to the signal in the high frequency band (DCS and PCS) that allows low frequency band (GSM and EGSM) signals to pass through with low loss, and prevents the DCS and PCS band signals from wrapping around. The transmission line LL1 is preferably set to a length that provides high impedance at the frequency of the DCS and PCS band signals so that signals in the DCS and PCS bands are not transmitted to the GSM system path. Transmission line LL2 and capacitor CL1 form a series resonant circuit with resonant frequencies in the DCS and PCS bands, and drop signals in the DCS and PCS bands to ground to prevent wraparound. In a high-pass filter as a high-frequency side (DCSZPCS Side) filter, capacitors CH4 and CH5 allow high-frequency band (DCS and PCS) signals to pass through with low loss, but for low-frequency band (GSM and EGSM) signals. High impedance prevents wraparound of GSM and EGSM band signals. The transmission line LH4 and the capacitor CH4 constitute a series resonance circuit having a resonance frequency in the GSM and EGSM bands, and drop signals in the GSM and EGSM bands to the ground to prevent wraparound.
[0046] 図 3に示すスィッチ回路は、前記分波回路に接続されて第一の送受信系の送信系  The switch circuit shown in FIG. 3 is connected to the branching circuit and is connected to the first transmission / reception system.
(送信端子 Tx-LB)と受信系(受信端子 Rx-LB)を切り換える第一のスィッチ回路 SW1 と、前記分波回路に接続されて第二の送受信系の送信系(送信端子 Tx-HB)と受信 系(受信端子 Rx-HB)を切り換える第二のスィッチ回路 SW2とを有する。第一及び第 二のスィッチ回路 SW1, SW2は!ヽずれもスィッチ素子及び伝送線路を主要素子とす る。スィッチ素子としては PINダイオードが好適である力 GaAsスィッチも使用できる。 PINダイオードを使用したスィッチ回路は GaAsスィッチを使用したスィッチ回路より低 コストである力 GaAsスィッチは PINダイオードを使用したスィッチ回路より低消費電 力化が可能であるので、これらの特徴を生かすように選択する。  The first switch circuit SW1 that switches between the (transmission terminal Tx-LB) and the reception system (reception terminal Rx-LB), and the second transmission / reception system transmission system (transmission terminal Tx-HB) connected to the demultiplexing circuit And a second switch circuit SW2 for switching the receiving system (receiving terminal Rx-HB). The first and second switch circuits SW1 and SW2 have a switch element and a transmission line as main elements. As the switch element, a force GaAs switch for which a PIN diode is suitable can be used. Switch circuits using PIN diodes are less expensive than switch circuits using GaAs switches. GaAs switches can consume less power than switch circuits using PIN diodes. select.
[0047] GSMZEGSMの送信端子 Tx-LBと受信端子 Rx-LBを切り換える第一のスィッチ回路 SW1 (図 3の上段にある)は、 2つのダイオード Dgl、 Dg2及び 2つの伝送線路 Lgl、 Lg2 を主要素子とする。ダイオード Dglは、分波回路の低周波フィルタと送信端子 Tx-LB との間に介挿され、ダイオード Dglのアノードは分波回路の低周波フィルタに接続さ れ、ダイオード Dglの力ソードは、伝送線路 LL3とキャパシタ CL2, CL3とにより構成さ れた L型のローパスフィルタ LPF1に接続されて!、る。ローパスフィルタ LPF1を構成す る伝送線路 LL3の他端とグランドとの間には伝送線路 Lglが接続されている。ローバ スフィルタ LPF1は、 GSMZEGSM側のパワーアンプ(図示せず)から入力される送信 信号に含まれる高次の高調波歪みを抑制するため、 GSMZEGSM送信信号を通過さ せるが、 GSMZEGSM送信信号の 2倍以上の周波数を十分に減衰させる特性を有す るのが好まし 、。パワーアンプ力 入力される GSMZEGSM送信信号に含まれる高調 波歪みを十分に減衰せるために、インダクタンスを形成する伝送線路 LL3とキャパシ タ CL3は、 GSMZEGSMの送信周波数の 2倍又は 3倍の共振周波数を有する並列共 振回路を構成する。 [0047] The first switch circuit SW1 (in the upper part of Fig. 3) that switches between the transmitting terminal Tx-LB and the receiving terminal Rx-LB of GSMZEGSM mainly consists of two diodes Dgl and Dg2 and two transmission lines Lgl and Lg2. Element. The diode Dgl is inserted between the low frequency filter of the demultiplexing circuit and the transmission terminal Tx-LB, the anode of the diode Dgl is connected to the low frequency filter of the demultiplexing circuit, and the power sword of the diode Dgl is transmitted It is connected to an L-type low-pass filter LPF1 composed of line LL3 and capacitors CL2 and CL3. A transmission line Lgl is connected between the other end of the transmission line LL3 constituting the low-pass filter LPF1 and the ground. Rover The filter LPF1 passes the GSMZEGSM transmission signal in order to suppress high-order harmonic distortion contained in the transmission signal input from the power amplifier (not shown) on the GSMZEGSM side, but it is twice the GSMZEGSM transmission signal. It is preferable to have a characteristic that sufficiently attenuates the above frequencies. Power amplifier force In order to sufficiently attenuate the harmonic distortion contained in the input GSMZEGSM transmission signal, the transmission line LL3 and capacitor CL3 that form an inductance have a resonance frequency that is twice or three times the transmission frequency of GSMZEGSM. A parallel resonance circuit is configured.
[0048] キャパシタ Cg6、 Cg2、 Cglは、直流分を除去してダイオード Dgl及び Dg2を含む回 路に制御用の直流電圧を印加する DCカットキャパシタとして機能するとともに、位相 調整回路の一部としても機能する。ダイオード Dglのアノードと受信端子 Rx-LBとの間 には伝送線路 Lg2が介挿され、伝送線路 Lg2の一端とグランドとの間にダイオード Dg2 が接続され、ダイオード Dg2のアノードとグランドとの間にキャパシタ Cglが接続されて いる。またダイオード Dg2のアノードと制御端子 Vcとの間には抵抗 Rgが直列に接続さ れている。制御端子 Vcとグランドとの間に接続されたキャパシタ Cvgは、制御用の電 源へのノイズ混入を阻止して、制御を安定化する。伝送線路 Lgl及び伝送線路 Lg2は 、 λ /4線路であり、いずれも共振周波数が GSMZEGSMの送信信号の周波数帯域内 となるような線路長を有するのが好ましい。例えば、それぞれの共振周波数を GSMの 送信信号周波数のほぼ中間の周波数 (869.5 MHz)とすると、所望の周波数帯域内 で優れた挿入損失特性を得ることができる。  [0048] The capacitors Cg6, Cg2, and Cgl function as a DC cut capacitor that removes the DC component and applies a control DC voltage to the circuit including the diodes Dgl and Dg2, and also functions as a part of the phase adjustment circuit. Function. A transmission line Lg2 is inserted between the anode of the diode Dgl and the receiving terminal Rx-LB. The diode Dg2 is connected between one end of the transmission line Lg2 and the ground, and between the anode of the diode Dg2 and the ground. Capacitor Cgl is connected. A resistor Rg is connected in series between the anode of the diode Dg2 and the control terminal Vc. The capacitor Cvg connected between the control terminal Vc and the ground prevents noise from entering the control power supply and stabilizes the control. The transmission line Lgl and the transmission line Lg2 are λ / 4 lines, and preferably both have a line length such that the resonance frequency is within the frequency band of the transmission signal of GSMZEGSM. For example, if each resonance frequency is set to a frequency (869.5 MHz) approximately in the middle of the GSM transmission signal frequency, excellent insertion loss characteristics can be obtained within the desired frequency band.
[0049] 第二のスィッチ回路 SW2 (図 3の下段にある)は、 DCS及び PCS共通の受信端子 Rx- HBと、 DCS及び PCS共通の送信端子 Tx-HBとを切り換える。第二のスィッチ回路 SW2 は、 2つのダイオード Ddl及び Dd2と、 2つの伝送線路 Ldl及び Ld2とを主要素子とする 。ダイオード Ddlは、分波回路の高周波フィルタと送信端子 Tx-HBとの間に介挿され 、ダイオード Ddlのアノードは分波回路の高周波フィルタに接続され、ダイオード Ddl の力ソードは伝送線路 LH5及びキャパシタ CH7、 CH8により構成された L型のローバ スフィルタ LPF2に接続されて!、る。ローパスフィルタ LPF2を構成する伝送線路 LH5の 他端とグランドとの間には伝送線路 Ldlが接続されている。ローノ スフィルタ LPF2は、 DCS及び PCS側のパワーアンプ(図示せず)から入力される送信信号に含まれる高次 高調波歪みを抑制するため、 DCS又は PCS送信信号を通過させる力 DCS又は PCS 送信信号の 2倍以上の周波数を十分に減衰させる特性を有するのが好ま ヽ。ダイ オード Ddlの OFF時に送信端子 Tx-HBとアンテナ端子 Antとの間、及び送信端子 Tx- ΗΒと受信端子 Rx-HBとの間のアイソレーションを確保するため、インダクタ Ls及びキ ャパシタ Csの直列回路がダイオード Ddlに並列に接続され、 OFF時のダイオードの 容量成分を相殺する。 [0049] The second switch circuit SW2 (in the lower part of Fig. 3) switches between the reception terminal Rx-HB common to DCS and PCS and the transmission terminal Tx-HB common to DCS and PCS. The second switch circuit SW2 includes two diodes Ddl and Dd2 and two transmission lines Ldl and Ld2 as main elements. The diode Ddl is inserted between the high frequency filter of the branching circuit and the transmission terminal Tx-HB, the anode of the diode Ddl is connected to the high frequency filter of the branching circuit, and the power sword of the diode Ddl is composed of the transmission line LH5 and the capacitor. Connected to L-type lowpass filter LPF2 composed of CH7 and CH8. A transmission line Ldl is connected between the other end of the transmission line LH5 constituting the low-pass filter LPF2 and the ground. The low-pass filter LPF2 is a high-order filter included in the transmission signal input from the DCS and PCS side power amplifiers (not shown). In order to suppress harmonic distortion, it is preferable that the DCS or PCS transmission signal has a characteristic that sufficiently attenuates a frequency that is at least twice that of the DCS or PCS transmission signal. In order to ensure isolation between the transmitting terminal Tx-HB and the antenna terminal Ant and between the transmitting terminal Tx-- and the receiving terminal Rx-HB when the diode Ddl is OFF, the inductor Ls and the capacitor Cs are connected in series. A circuit is connected in parallel with the diode Ddl to cancel the capacitance component of the diode when OFF.
[0050] 伝送線路 Ldl及び Ld2は λ Ζ4線路であり、いずれも共振周波数力 ¾CSと PCSの送 受信系の送信信号の周波数帯域内に入るような線路長を有するのが好ましぐ特に 前記周波数帯域の中間の周波数となる線路長を有するのが好ましい。例えば、伝送 線路 Ldl及び Ld2の共振周波数を DCS帯域及び PCS帯域の送信信号のほぼ中間の 周波数(1810 MHz)とすると、それぞれのモードにおいて優れた電気的特性を得るこ とができ、 2つの送信信号を 1つの回路で扱うことができる。キャパシタ Cd2は、直流分 を除去してダイオード Ddl及び Dd2を含む回路に制御用の直流電圧を印加する DC カットキャパシタとして機能するとともに、位相調整回路の一部としても機能する。伝 送線路 Ld2の一端は分波回路の高周波フィルタを構成するキャパシタ CH5に接続さ れており、伝送線路 Ld2の他端はグランドに接続されたダイオード Dd2及びキャパシタ Cdlに接続されて!、る。ダイオード Dd2のアノードには抵抗 Rdを介して制御端子 Vcが 接続されている。キャパシタ Cvdは、制御用の電源へのノイズ混入を阻止して制御を 安定化する。キャパシタ Cd5は DCカット用のキャパシタである。  [0050] The transmission lines Ldl and Ld2 are λΖ4 lines, both of which preferably have a line length that falls within the frequency band of the transmission signal of the transmission / reception system of the resonance frequency force ¾CS and PCS, particularly the frequency It is preferable to have a line length that is an intermediate frequency in the band. For example, if the resonance frequency of the transmission lines Ldl and Ld2 is set to a frequency (1810 MHz) approximately halfway between the transmission signals in the DCS band and the PCS band, excellent electrical characteristics can be obtained in each mode. The signal can be handled by one circuit. The capacitor Cd2 functions as a DC cut capacitor that removes the DC component and applies a control DC voltage to the circuit including the diodes Ddl and Dd2, and also functions as a part of the phase adjustment circuit. One end of the transmission line Ld2 is connected to the capacitor CH5 constituting the high-frequency filter of the branching circuit, and the other end of the transmission line Ld2 is connected to the diode Dd2 and the capacitor Cdl connected to the ground. The control terminal Vc is connected to the anode of the diode Dd2 via the resistor Rd. Capacitor Cvd stabilizes control by preventing noise from entering the control power supply. Capacitor Cd5 is a DC cut capacitor.
[0051] インダクタ L1は、アンテナ端子に静電気、落雷等による過電流が印加された際、そ れをグランド GNDに逃がし、モジュールの破壊を防止する機能を果たす。インダクタ L 2と Cg2、及びインダクタ L5と Cd2はそれぞれ接続位相を調整するハイパス型位相調 整回路として機能し、高周波増幅器回路 HPAから漏れる高調波を抑制する。アンテ ナスイッチ側インピーダンスとの関係を、基本波では共役整合となり、不要な n倍波で は非共役整合となるように調整する。 L3、 C2、 L4、 CIは、 LC共振回路と LCハイパス 回路を構成し、 250 MHz付近に共振点を持たせて静電パルスを減衰させ、静電パル スの受信端子後方への漏れ防止し、後方にある帯域通過フィルタの破壊を防止する 。 C3は整合調整用のキャパシタである。 [0052] (C)高周波モジュール [0051] Inductor L1 functions to prevent destruction of the module when an overcurrent is applied to the antenna terminal due to static electricity, lightning strikes, etc., to ground GND. Inductors L2 and Cg2 and inductors L5 and Cd2 function as a high-pass phase adjustment circuit that adjusts the connection phase, respectively, and suppress harmonics that leak from the high-frequency amplifier circuit HPA. The relationship with the antenna switch side impedance is adjusted so that it becomes conjugate matching for the fundamental wave and non-conjugated matching for the unnecessary n-th harmonic wave. L3, C2, L4, and CI constitute an LC resonant circuit and an LC high-pass circuit, and have a resonance point near 250 MHz to attenuate electrostatic pulses and prevent leakage of electrostatic pulses to the back of the receiving terminal. , Preventing the destruction of the bandpass filter behind. C3 is a matching adjustment capacitor. [0052] (C) High frequency module
図 4は、図 3に示すアンテナスィッチ回路を 11層の多層基板に形成してなる高周波 モジュールを示す。 BOTTOMは多層基板の裏面を示す。各層の右側約 1/3の領域 1 にアンテナスィッチ回路が形成されており、左側約 2/3の領域 2に高周波増幅器回路 (図示せず)が形成されている。分波回路は図 2に示す構成を有する。高周波増幅器 回路は、例えばアンテナスィッチ回路の GSMZEGSMの送信端子 Tx-LBに接続され 、増幅した送信信号をアンテナスィッチ回路に送る。高周波増幅器とアンテナスイツ チ回路の接続を上層側に設け、かつ相互干渉を避けるために高周波増幅器の線路 とアンテナスィッチ回路の線路を異なる層で上下に重ならない位置に形成するのが 好ましい。  Fig. 4 shows a high-frequency module in which the antenna switch circuit shown in Fig. 3 is formed on an 11-layer multilayer board. BOTTOM indicates the back side of the multilayer substrate. An antenna switch circuit is formed in the region 1 of about 1/3 on the right side of each layer, and a high-frequency amplifier circuit (not shown) is formed in the region 2 of about 2/3 on the left side. The branching circuit has the configuration shown in FIG. The high-frequency amplifier circuit is connected to the transmission terminal Tx-LB of the GSMZEGSM of the antenna switch circuit, for example, and sends the amplified transmission signal to the antenna switch circuit. It is preferable that the connection between the high-frequency amplifier and the antenna switch circuit is provided on the upper layer side, and the line of the high-frequency amplifier and the line of the antenna switch circuit are formed in different layers so as not to overlap each other in order to avoid mutual interference.
[0053] 図 4において、図 2及び図 3に示す伝送線路及びキャパシタに対応する電極パター ンには同じ符号を付してある。分波回路の高周波フィルタの第二のキャパシタ CH4と 第三のキャパシタ CH5、及び低周波フィルタの第一のキャパシタ CL1はグランド電極 が設けられた第 6の誘電体層の下側に設けられている。直列共振回路を構成する伝 送線路 LL2と第一のキャパシタ CL1の電極パターンは積層方向に重なるように形成さ れて 、る。同様に直列共振回路を構成する伝送線路 LH4と第四のキャパシタ CH6の 電極パターンも積層方向に重なるように形成されて 、る。低周波フィルタの第一の伝 送線路 LL1の電極パターンは、コイル状となるように第 2層〜第 5層に形成されて!、る 。また第一のスィッチ回路 SW1の第二の伝送線路 Lg2の電極パターンは、コイル状と なるように第 5層、第 7層〜第 11層に形成されている。  In FIG. 4, the electrode patterns corresponding to the transmission lines and capacitors shown in FIGS. 2 and 3 are denoted by the same reference numerals. The second capacitor CH4 and third capacitor CH5 of the high frequency filter of the branching circuit and the first capacitor CL1 of the low frequency filter are provided below the sixth dielectric layer provided with the ground electrode. . The electrode patterns of the transmission line LL2 and the first capacitor CL1 constituting the series resonant circuit are formed so as to overlap in the stacking direction. Similarly, the electrode patterns of the transmission line LH4 and the fourth capacitor CH6 constituting the series resonant circuit are formed so as to overlap in the stacking direction. The electrode pattern of the first transmission line LL1 of the low-frequency filter is formed on the second to fifth layers so as to form a coil shape. The electrode pattern of the second transmission line Lg2 of the first switch circuit SW1 is formed on the fifth layer, the seventh layer to the eleventh layer so as to be coiled.
[0054] 第 2層に形成された第一の伝送線路 LL1の電極パターンの端部はスルーホール電 極を介して第三層に形成されたキャパシタ Cの電極パターンに接続されて 、る。キヤ パシタ Cの電極パターンは、第 5層に形成された第二の伝送線路 Lg2の電極パターン の端部と対向し、キャパシタを構成している。また第 2層に形成された第一の伝送線 路 LL1の電極パターンの端部と第 7層に形成された第二の伝送線路 Lg2の電極パタ 一ンの端部とは、最上層に搭載されるキャパシタ Cg6にスルーホール電極を介して接 続されている。力かる電極パターンの配置により、キャパシタ Cが第一の伝送線路 LL1 の一部と第二の伝送線路 Lg2の一部に並列に接続された構成が得られる。上述のよ うに図 4に示す実施形態では、第一の伝送線路 LL1の一部を構成する電極パターン 、第二の伝送線路 Lg2の一部を構成する電極パターン、及びキャパシタ Cの電極パタ 一ンが積層方向に重なる部分を有して 、る。 [0054] The end of the electrode pattern of the first transmission line LL1 formed in the second layer is connected to the electrode pattern of the capacitor C formed in the third layer via a through-hole electrode. The electrode pattern of capacitor C is opposed to the end of the electrode pattern of the second transmission line Lg2 formed in the fifth layer, and constitutes a capacitor. The end of the electrode pattern of the first transmission line LL1 formed on the second layer and the end of the electrode pattern of the second transmission line Lg2 formed on the seventh layer are mounted on the top layer. Is connected to the capacitor Cg6 via a through-hole electrode. With the arrangement of the electrode pattern, the capacitor C is connected in parallel to a part of the first transmission line LL1 and a part of the second transmission line Lg2. Above In the embodiment shown in FIG. 4, the electrode pattern that forms part of the first transmission line LL1, the electrode pattern that forms part of the second transmission line Lg2, and the electrode pattern of the capacitor C are stacked in the stacking direction. It has a part that overlaps.
[0055] 実施例 1 [0055] Example 1
図 4に示す高周波モジュールを、 950°C以下の低温焼成が可能な LTCCからなる 11 層の誘電体グリーンシートにより作製した。グリーンシートの厚さは、伝送線路及びキ ャパシタを形成しやすいように 40〜200 μ mであるのが好ましい。電極パターンは銀系 の導電ペーストにより形成するのが好ましい。各グリーンシートに伝送線路及びキヤ パシタ用の電極パターンを形成し、適宜スルーホールを設け、積層した後で圧着し、 950°Cで焼成し、約 10 mm X約 8 mm X約 0.65 mmの積層体を得る。積層体の上面に ダイオード、トランジスタ、チップインダクタ、チップキャパシタ、抵抗等を搭載し、高周 波モジュールを得る。高周波モジュールの上には通常高さ約 1.6 mmの金属ケース( 図示せず)を被せる。金属ケースの代わりに、榭脂封止パッケージとしても良ぐこの 場合高さは約 1.5 mmとなる。  The high-frequency module shown in Fig. 4 was fabricated using an 11-layer dielectric green sheet made of LTCC that can be fired at low temperatures below 950 ° C. The thickness of the green sheet is preferably 40 to 200 μm so that the transmission line and the capacitor can be easily formed. The electrode pattern is preferably formed of a silver-based conductive paste. Electrode patterns for transmission lines and capacitor are formed on each green sheet, and through holes are provided as appropriate. After lamination, pressure bonding is performed, and firing is performed at 950 ° C. Lamination of approximately 10 mm x approximately 8 mm x approximately 0.65 mm Get the body. A diode, transistor, chip inductor, chip capacitor, resistor, etc. are mounted on the top surface of the laminate to obtain a high-frequency module. A high-frequency module is usually covered with a metal case (not shown) with a height of about 1.6 mm. Instead of a metal case, it may be a resin-sealed package. In this case, the height is about 1.5 mm.
[0056] 実施例 1の高周波モジュールの通過特性を図 5に示し、従来の回路構造を有する 高周波モジュールの通過特性を図 6に示す。従来の特性は 3 GHz付近の不要帯域 に約 15 dBの大きな盛り上がりがあり、製造ばらつきによっては、約 10 dBを超え ることもあり、受信特性に不具合が生じるおそれがある。一方、実施例 1の高周波モジ ユールでは、 3 GHz付近が約— 25 dB以下に抑制でき、受信特性への悪影響が排除 されている。また実施例 1の高周波モジュールの通過損失は約 1.0 dBであり、不要 波抑制用キャパシタが設けられていない従来の高周波モジュールと同程度であった FIG. 5 shows the pass characteristics of the high-frequency module of Example 1, and FIG. 6 shows the pass characteristics of the high-frequency module having a conventional circuit structure. The conventional characteristics have a large rise of about 15 dB in the unnecessary band near 3 GHz. Depending on manufacturing variations, it may exceed about 10 dB, which may cause problems in the reception characteristics. On the other hand, in the high-frequency module of Example 1, the vicinity of 3 GHz can be suppressed to about −25 dB or less, and adverse effects on the reception characteristics are eliminated. In addition, the passage loss of the high-frequency module of Example 1 is about 1.0 dB, which is about the same as the conventional high-frequency module that does not include a capacitor for suppressing unnecessary waves.
[0057] [2]第二の実施形態 [0057] [2] Second embodiment
(A)分波回路  (A) Demultiplexer circuit
図 7は、本発明の第二の実施形態による分波回路の等価回路を示す。分波回路は 、送信時には高周波側送信回路又は低周波側送信回路の送信信号を通過させ、受 信時には周波数の異なる信号を分波し、高周波側受信回路又は低周波側受信回路 に受信信号を分配する機能を有する。低周波フィルタ及び高周波フィルタからなる図 7に示す分波回路は、共通端子 Pc、低周波端子 PI及び高周波端子 Phを有する。高周 波フィルタは、共通端子 Pcに接続された第一のキャパシタ CH4と、第一のキャパシタ CH4と高周波端子 Phとの間に接続された第二のキャパシタ CH5と、第一のキャパシタ CH4と第二のキャパシタ CH5との接続点とグランドとの間に接続された第一の伝送線 路 LH4及び第三のキャパシタ CH6からなる直列共振回路とを具備する。低周波フィル タは、低周波端子 P1と共通端子 Pcとの間に設けられた第二の伝送線路 LL1と、第二 の伝送線路 LL1と低周波端子 P1との間に一端が接続され、他端が接地された第三の 伝送線路 LL2及び第四のキャパシタ CL1からなる直列共振回路とを具備する。なお 分波回路が有するローパスフィルタ等の回路構成は前記のものに限定されず、適宜 変更可能である。 FIG. 7 shows an equivalent circuit of the branching circuit according to the second embodiment of the present invention. The demultiplexing circuit passes the transmission signal of the high frequency side transmission circuit or the low frequency side transmission circuit during transmission, demultiplexes signals having different frequencies during reception, and sends the reception signal to the high frequency side reception circuit or low frequency side reception circuit. Has the function of distributing. Diagram consisting of low frequency filter and high frequency filter 7 includes a common terminal Pc, a low frequency terminal PI, and a high frequency terminal Ph. The high-frequency filter includes a first capacitor CH4 connected to the common terminal Pc, a second capacitor CH5 connected between the first capacitor CH4 and the high-frequency terminal Ph, the first capacitor CH4, and the first capacitor CH4. A series resonance circuit including a first transmission line LH4 and a third capacitor CH6 connected between a connection point of the second capacitor CH5 and the ground. The low-frequency filter has one end connected between the second transmission line LL1 provided between the low-frequency terminal P1 and the common terminal Pc, and between the second transmission line LL1 and the low-frequency terminal P1. A series resonance circuit including a third transmission line LL2 and a fourth capacitor CL1 whose ends are grounded. The circuit configuration of the branching circuit, such as the low-pass filter, is not limited to that described above, and can be changed as appropriate.
分波回路のうち第一の伝送線路 LH4、第一のキャパシタ CH4、第二のキャパシタ C H5及び第三のキャパシタ CH6は、積層体を構成する誘電体層に形成された電極パ ターンにより構成される。誘電体層 7を積層した積層体において、第一のキャパシタ C H4を構成する対向電極のうち共通端子 Pcに接続される電極 5は、図 9に示すように、 グランド電極に対向している。これにより、分波回路の一部であるキャパシタの電極を 用いて寄生容量を発生させることができる。図 9の構成では、一層の誘電体層の両側 に第一のキャパシタ CH4を構成する電極 5とグランド電極 6が対向して 、る。寄生容量 の大きさは、誘電体層の厚さ、グランド電極 6の面積、及び Z又は誘電体層の誘電率 を調整することにより容易に制御することができる。第一のキャパシタ CH4の他方の電 極と、第二のキャパシタ CH5の電極(第一のキャパシタ CH4の側)は、共通電極 4とし て積層体内において電極 5の上側に形成されている。第二のキャパシタ CH5の他方 の電極 3 (高周波端子 Phに接続)は共通電極 4の上側に形成されている。このように電 極 5と共通電極 4で第一のキャパシタ CH4を構成し、共通電極 4と電極 3で第二のキヤ パシタ CH5を構成するとともに、グランド電極 6との間で寄生容量を発生させる。従来 ハイパスフィルタ部に寄生容量ができるだけ生じな 、ようにしてきたが(例えば特開 20 02-26677号)、本発明では高調波抑制の観点力もこれを積極的に利用する。分波回 路をアンテナスィッチモジュールに使用する場合、図 8に示すように、寄生容量 Cpは アンテナに付属し、高調波を抑制する。 [0059] (B)高周波回路 In the branching circuit, the first transmission line LH4, the first capacitor CH4, the second capacitor CH5, and the third capacitor CH6 are configured by electrode patterns formed in a dielectric layer constituting the multilayer body. The In the stacked body in which the dielectric layers 7 are stacked, the electrode 5 connected to the common terminal Pc among the counter electrodes constituting the first capacitor C H4 is opposed to the ground electrode as shown in FIG. Thus, parasitic capacitance can be generated using the electrode of the capacitor that is a part of the branching circuit. In the configuration of FIG. 9, the electrode 5 and the ground electrode 6 constituting the first capacitor CH4 face each other on both sides of one dielectric layer. The magnitude of the parasitic capacitance can be easily controlled by adjusting the thickness of the dielectric layer, the area of the ground electrode 6, and Z or the dielectric constant of the dielectric layer. The other electrode of the first capacitor CH4 and the electrode of the second capacitor CH5 (on the side of the first capacitor CH4) are formed as the common electrode 4 above the electrode 5 in the laminate. The other electrode 3 (connected to the high frequency terminal Ph) of the second capacitor CH5 is formed above the common electrode 4. Thus, the electrode 5 and the common electrode 4 constitute the first capacitor CH4, the common electrode 4 and the electrode 3 constitute the second capacitor CH5, and a parasitic capacitance is generated between the ground electrode 6 and the electrode 5. . Conventionally, parasitic capacitance is not generated in the high-pass filter part as much as possible (for example, Japanese Patent Application Laid-Open No. 2002-26677), but in the present invention, this is also used positively from the viewpoint of harmonic suppression. When a demultiplexing circuit is used for the antenna switch module, as shown in Fig. 8, parasitic capacitance Cp is attached to the antenna and suppresses harmonics. [0059] (B) High frequency circuit
上記分波回路を有する高周波回路は、分波回路により分けられた低周波側の第一 の周波数帯域の送信系と受信系を切り換える第一のスィッチ回路と、分波回路により 分けられる高周波側の第二の周波数帯域の送信系と受信系を切り換える第二のスィ ツチ回路とを具備する。本実施形態の高周波回路の等価回路として、図 10は、低周 波帯の GSM850帯域 (送信周波数: 824〜849 MHz,受信周波数: 869〜894 MHz)及 び EGSM帯域 (送信周波数: 880〜915 MHz,受信周波数: 925〜960 MHz),高周波 帯の DCS帯域 (送信周波数: 1710〜1785 MHz,受信周波数: 1805〜1880 MHz)及 び PCS帯域(送信周波数: 1850〜1910 MHz,受信周波数: 1930〜1990 MHz)を用い たクヮッドバンド用アンテナスィッチ回路の等価回路を示し、図 11はそのブロック図を 示す。この等価回路は第二の実施形態の分波回路を用いた以外第一の実施形態の 等価回路と同じであるので、その説明を省略する。  The high-frequency circuit having the branching circuit includes a first switch circuit that switches between a transmission system and a reception system in the first frequency band on the low frequency side divided by the branching circuit, and a high-frequency side divided by the branching circuit. A second switch circuit for switching between a transmission system and a reception system in the second frequency band; As an equivalent circuit of the high-frequency circuit of this embodiment, FIG. 10 shows the low-frequency GSM850 band (transmission frequency: 824 to 849 MHz, reception frequency: 869 to 894 MHz) and the EGSM band (transmission frequency: 880 to 915). MHz, reception frequency: 925 to 960 MHz), high frequency DCS band (transmission frequency: 1710 to 1785 MHz, reception frequency: 1805 to 1880 MHz) and PCS band (transmission frequency: 1850 to 1910 MHz, reception frequency: 1930 Fig. 11 shows the equivalent circuit of a quad-band antenna switch circuit using (~ 1990 MHz). Since this equivalent circuit is the same as the equivalent circuit of the first embodiment except that the branching circuit of the second embodiment is used, the description thereof is omitted.
(C)高周波モジュール  (C) High frequency module
図 12は、図 10に示すアンテナスィッチ回路を多層基板に形成した高周波スィッチモ ジュールを示す。第 6層には、スルーホール電極が形成された領域以外ほぼ全面に グランド電極が形成されて 、る。分波回路の高周波フィルタの第一及び第二のキヤ パシタ CH4, CH5はグランド電極が設けられた第 6層の下側に設けられている。具体 的には、第二のキャパシタ CH5の電極 3 (高周波端子 Ph側)は第 9層に形成され、第 一及び第二のキャパシタ CH4, CH5の共通電極 4は第 10層に形成され、第一のキヤ パシタ CH4の電極 5 (共通端子 Pc側)は第 11層に形成され、電極 5は積層体の裏面に 形成されたグランド電極に対向している。電極 3、 4及び 5同士も対向している。本実施 例では裏面に形成されたグランド電極との対向を利用して寄生容量を発生させてい る力 これに限られず、積層体内のグランド電極を利用しても良い。  FIG. 12 shows a high-frequency switch module in which the antenna switch circuit shown in FIG. 10 is formed on a multilayer substrate. In the sixth layer, a ground electrode is formed on almost the entire surface except the region where the through-hole electrode is formed. The first and second capacitors CH4 and CH5 of the high frequency filter of the branching circuit are provided below the sixth layer provided with the ground electrode. Specifically, the electrode 3 (high frequency terminal Ph side) of the second capacitor CH5 is formed on the ninth layer, the common electrode 4 of the first and second capacitors CH4 and CH5 is formed on the tenth layer, The electrode 5 (common terminal Pc side) of one capacitor CH4 is formed on the eleventh layer, and the electrode 5 faces the ground electrode formed on the back surface of the laminate. Electrodes 3, 4 and 5 are also facing each other. In this embodiment, the force that generates the parasitic capacitance by using the opposite of the ground electrode formed on the back surface is not limited to this, and the ground electrode in the stacked body may be used.
[0060] 分波回路にチップキャパシタ、チップインダクタ等の個別部品を用いる場合、アンテ ナ端子 (共通端子 Pc)と同電位の搭載パッドの直下にグランド電極を設けたり、搭載 ノ^ド周辺にグランド電極を配置したりすることにより、寄生容量を発生させても良い。 またアンテナ端子に寄生容量を付加させるために、アンテナ端子に分波器を接続し ない形態としても良い。いずれの場合も、寄生容量が大きすぎると挿入損失が劣化 するため、電極間隔等を調整して寄生容量を約 1 pF以下とするのが望ましい。 [0060] When using individual components such as chip capacitors and chip inductors in the branching circuit, a ground electrode is provided directly below the mounting pad having the same potential as the antenna terminal (common terminal Pc), or a ground is provided around the mounting node. Parasitic capacitance may be generated by arranging electrodes. Further, in order to add a parasitic capacitance to the antenna terminal, a mode in which a duplexer is not connected to the antenna terminal may be adopted. In either case, insertion loss will deteriorate if the parasitic capacitance is too large. Therefore, it is desirable to adjust the electrode spacing to make the parasitic capacitance about 1 pF or less.
[0061] 実施例 2 [0061] Example 2
アンテナスィッチモジュールとして、図 12に示す構造を有する積層モジュールを作 製した。図 12に示す積層モジュールには高周波増幅器も併せて形成した。積層モジ ユールは第 1層〜第 11層の誘電体グリーンシートで構成され、 BOTTOMは積層体の 裏面を示す。本実施例で使用した誘電体グリーンシートは 950°C以下の低温焼成が 可能な LTCCである。積層体の寸法及び作製方法は実施例 1と同じである。  A laminated module having the structure shown in Fig. 12 was produced as an antenna switch module. The laminated module shown in Fig. 12 was also formed with a high-frequency amplifier. The laminated module is composed of dielectric green sheets of the first to eleventh layers, and BOTTOM indicates the back side of the laminated body. The dielectric green sheet used in this example is an LTCC that can be fired at a low temperature of 950 ° C or lower. The dimensions and manufacturing method of the laminate are the same as in Example 1.
[0062] 実施例 2の分波回路と、第一のキャパシタ CH4の電極 (共通端子 Pcに接続)がダラ ンド電極に対向していない従来の分波回路とを比較したところ、挿入損失はほぼ同 等である力 減衰量は低周波側(GSM及び EGSM)で約 1.5〜7 dBと大きく改善され、 高周波側(DCS及び PCS)で約 1.5〜3 dBと大きく改善されたことが分力つた。  [0062] When the branching circuit of Example 2 was compared with the conventional branching circuit in which the electrode of the first capacitor CH4 (connected to the common terminal Pc) was not opposed to the Dutch electrode, the insertion loss was almost the same. The same amount of force attenuation has been greatly improved by about 1.5 to 7 dB on the low frequency side (GSM and EGSM), and greatly improved by about 1.5 to 3 dB on the high frequency side (DCS and PCS). .
[0063] 実施例 2の分波回路を有する高周波スィッチモジュールとして、図 12に示す積層モ ジュールを作製した。分波回路の主要キャパシタを形成する誘電体の厚さを 25 mと し、第一のキャパシタ CH4の対向電極と裏面のグランド電極との距離を 100 μ mとする ことにより、積層モジュールにおける寄生容量を約 0.5 pFに調整した。実施例 2の高 周波スィッチモジュールを従来の分波回路を有する高周波スィッチモジュールと比 較したところ、挿入損失は同等であつたが、減衰量は低周波側で約 2〜7 dBと大きく 改善され、高周波側(DCS及び PCS)で約 1.5〜14 dBと大きく改善されたことが分かつ た。  As the high-frequency switch module having the branching circuit of Example 2, the laminated module shown in FIG. 12 was produced. The thickness of the dielectric that forms the main capacitor of the demultiplexing circuit is 25 m, and the distance between the counter electrode of the first capacitor CH4 and the ground electrode on the back surface is 100 μm. Was adjusted to about 0.5 pF. When the high-frequency switch module of Example 2 was compared with a high-frequency switch module having a conventional branching circuit, the insertion loss was equivalent, but the attenuation was greatly improved to about 2 to 7 dB on the low-frequency side. On the high frequency side (DCS and PCS), it was found that there was a significant improvement of about 1.5 to 14 dB.
[0064] [3]第三の実施形態  [0064] [3] Third embodiment
第三の実施形態による高周波モジュールは、分波回路 Dip及び第一及び第二のス イッチ回路が有する伝送線路 LL1、 LL2、 LH4、 Lgl、 Lg2、 Ld2の配置以外、第一の実 施形態と同じである。 Ldlは第二の周波数帯域の高調波が通る伝送線路である。伝 送線路 LL1、 LH4及び Lg2には低周波側の第一の周波数帯域の信号が通り、伝送線 路 LL2、 Lgl及び Ld2には高周波側の第二の周波数帯域の信号が通る。伝送線路 LL 2, Lglは低周波側の回路要素であるが、低周波側回路に漏洩した高周波側成分が 通り、伝送線路 LH4は低周波側の回路要素であるが、高周波側回路に漏洩した低周 波成分が通る。 [0065] 第一の周波数帯域 (GSM850及び EGSM)と第二の周波数帯域 (DCS及び PCS)の 送受信回路間での相互干渉を抑制するために、第一の周波数帯域の信号が通る伝 送線路 LL1, LH4, Lg2を積層体内のグランド電極の積層方向一方の側に設け、第二 の周波数帯域の信号が通る伝送線路 LL2, Lgl, Ld2を前記グランド電極の積層方向 他方の側に設ける。すなわち、前記伝送線路をグランド電極で積層方向に分離する 。第一の周波数帯域である GSM850及び EGSMの二倍波は、第二の周波数帯域であ る DCS及び PCSの周波数帯域とほぼ同じであるため、第一の周波数帯域の二倍波が 第二の周波数帯域に与える影響は大きい。上記構成は、このような第一の周波数帯 域と第二の周波数帯域との関係の場合に特に有効である。グランド電極は、第一の 周波数帯域の信号が通る伝送線路と第二の周波数帯域の信号が通る伝送線路とを 少なくとも部分的に分離するように誘電体層に形成されて!、れば良!、が、完全に分 離するように両伝送線路より広く誘電体層に形成されて!ヽる方が好ま ヽ。第一の周 波数帯域の信号が通る伝送線路の電極パターンの間や、第二の周波数帯域の信号 が通る伝送線路の電極パターンの間に、他のグランド電極が形成されて ヽても良 、。 複数層に設けられたグランド電極はスルーホール電極で接続するのが好ましぐスル 一ホール電極数は多 、ほど良!、。 The high-frequency module according to the third embodiment is different from the first embodiment except for the arrangement of the transmission lines LL1, LL2, LH4, Lgl, Lg2, and Ld2 included in the branching circuit Dip and the first and second switch circuits. The same. Ldl is a transmission line through which harmonics in the second frequency band pass. Signals in the first frequency band on the low frequency side pass through transmission lines LL1, LH4, and Lg2, and signals in the second frequency band on the high frequency side pass through transmission lines LL2, Lgl, and Ld2. Transmission lines LL 2 and Lgl are circuit elements on the low frequency side, but the high frequency side component leaked to the low frequency side circuit passes, and transmission line LH4 is a circuit element on the low frequency side but leaked to the high frequency side circuit. Low frequency component passes. [0065] A transmission line through which a signal of the first frequency band passes in order to suppress mutual interference between the transmission and reception circuits of the first frequency band (GSM850 and EGSM) and the second frequency band (DCS and PCS) LL1, LH4, and Lg2 are provided on one side in the stacking direction of the ground electrodes in the stack, and transmission lines LL2, Lgl, and Ld2 through which signals in the second frequency band pass are provided on the other side in the stacking direction of the ground electrodes. That is, the transmission line is separated in the stacking direction by the ground electrode. The second harmonic of the first frequency band, GSM850 and EGSM, is almost the same as the frequency band of the second frequency band, DCS and PCS, so the second harmonic of the first frequency band is the second frequency band. The influence on the frequency band is large. The above configuration is particularly effective in the case of such a relationship between the first frequency band and the second frequency band. The ground electrode is formed on the dielectric layer so as to at least partially separate the transmission line through which the signal in the first frequency band passes and the transmission line through which the signal in the second frequency band passes! However, it is preferred that the dielectric layer be formed wider than both transmission lines so that they are completely separated. Another ground electrode may be formed between the electrode pattern of the transmission line through which the signal of the first frequency band passes or between the electrode pattern of the transmission line through which the signal of the second frequency band passes. . It is preferable to connect the ground electrodes provided in multiple layers with through-hole electrodes. ,.
[0066] 図 13は、図 10に示すアンテナスィッチ回路を積層体に形成した高周波モジュール を示す。各層の右側約 1/3の領域 1にアンテナスィッチ回路が形成されており、左側 約 2/3の領域 2に高周波増幅器回路が形成されている。高周波増幅器回路は、図 10 のアンテナスィッチ回路の例えば GSMZEGSMの送信端子 Tx-LBに接続し、増幅し た送信信号をアンテナスィッチ回路に送る。高周波増幅器とアンテナスィッチモ回路 の接続を上層側に設け、かつ相互干渉を避けるために高周波増幅器の線路とアンテ ナスイッチ回路の線路を異なる層で上下に重ならない位置に形成するのが好ましい  FIG. 13 shows a high-frequency module in which the antenna switch circuit shown in FIG. 10 is formed in a laminate. An antenna switch circuit is formed in the area 1 of about 1/3 on the right side of each layer, and a high-frequency amplifier circuit is formed in the area 2 of about 2/3 on the left side. The high-frequency amplifier circuit is connected to, for example, the GSMZEGSM transmission terminal Tx-LB of the antenna switch circuit in FIG. 10, and sends the amplified transmission signal to the antenna switch circuit. It is preferable to connect the high-frequency amplifier and the antenna switch circuit on the upper layer side, and to avoid mutual interference, the high-frequency amplifier line and the antenna switch circuit line should be formed in different layers so as not to overlap each other.
[0067] 図 13は左上カゝら順に、電極パターンを形成した 11層の誘電体層と積層体の裏面 B OTTOMを示す。第 6層には、スルーホール電極が形成された領域以外ほぼ全面に グランド電極が形成されている。第一の周波数帯域の信号が通る伝送線路 LL1, LH 4, Lg2の電極パターンは、グランド電極を設けた第 6層の上側の第 2層〜第 5層に形 成されている力 第二の周波数帯域の信号が通る伝送線路 LL2, Ld2, Lglの電極パ ターンは、グランド電極が設けられた第 6層の下側の第 7層〜第 11層に形成されてい る。第一及び第二の周波数帯域の送受信系で用いられるローパスフィルタ LPF1, LP F2を構成する伝送線路及びキャパシタの電極パターンうち、伝送線路の前記電極パ ターンはグランド電極の上側の設けられており、キャパシタの電極パターンは前記グ ランド電極の下側に設けられている。 FIG. 13 shows, in order from the upper left, the eleven dielectric layers on which electrode patterns are formed and the back surface BOTTOM of the laminate. In the sixth layer, a ground electrode is formed on almost the entire surface except the region where the through-hole electrode is formed. The transmission lines LL1, LH4, and Lg2 through which signals in the first frequency band pass are formed on the second to fifth layers above the sixth layer with the ground electrode. Forces formed Transmission lines LL2, Ld2, Lgl through which signals in the second frequency band pass are formed on the 7th to 11th layers below the 6th layer where the ground electrode is provided. ing. Of the transmission line and capacitor electrode patterns constituting the low-pass filters LPF1 and LPF2 used in the transmission system of the first and second frequency bands, the electrode pattern of the transmission line is provided above the ground electrode, The electrode pattern of the capacitor is provided on the lower side of the ground electrode.
[0068] 実施例 3 [0068] Example 3
アンテナスィッチモジュールとして、図 13に示す積層モジュールを作製した。 950°C 以下の低温焼成が可能な LTCCからなる 11層の誘電体グリーンシートを第一の実施 形態と同じ条件で積層した。積層モジュールを構成する全ての層において、アンテ ナスイッチ回路を構成する電極パターンは右側領域 1に形成し、高周波増幅器を構 成する電極パターンは左側領域 2に形成した。  A laminated module shown in FIG. 13 was produced as an antenna switch module. An 11-layer dielectric green sheet made of LTCC that can be fired at a low temperature of 950 ° C or lower was laminated under the same conditions as in the first embodiment. In all layers constituting the laminated module, the electrode pattern constituting the antenna switch circuit was formed in the right region 1 and the electrode pattern constituting the high-frequency amplifier was formed in the left region 2.
[0069] 実施例 3の高周波モジュールと、第一の周波数帯域の信号が通る伝送線路と第二 の周波数帯域の信号が通る伝送線路とを積層方向に分離して 、な 、従来の高周波 モジュールとを比較したところ、送信側では挿入損失が低周波側(GSM及び EGSM) で約 0.1〜0.2 dBと大きく改善され、高周波側(DCS及び PCS)で約 0.05〜0.2 dBと大 きく改善され、また減衰量が低周波側で約 3〜12 dBと大きく改善され、高周波側 (DC S及び PCS)で約 5〜15 dBと大きく改善されたことが分力つた。受信側では、挿入損失 が低周波側(GSM及び EGSM)で約 0.05〜0.1 dBと大きく改善され、高周波側(DCS 及び PCS)で約 0.1〜0.3 dBと大きく改善されたことが分力つた。電波の漏洩は高周波 ほど大き!/、ので、本発明の効果は高周波側ほど大き 、。  [0069] The conventional high-frequency module is separated from the high-frequency module of Example 3, the transmission line through which the signal in the first frequency band passes and the transmission line through which the signal in the second frequency band passes in the stacking direction. When the transmission side is compared, the insertion loss is greatly improved to about 0.1 to 0.2 dB on the low frequency side (GSM and EGSM), and is greatly improved to about 0.05 to 0.2 dB on the high frequency side (DCS and PCS). The amount of attenuation was greatly improved to about 3 to 12 dB on the low frequency side, and about 5 to 15 dB on the high frequency side (DC S and PCS). On the receiving side, the insertion loss was greatly improved by about 0.05 to 0.1 dB on the low frequency side (GSM and EGSM), and greatly improved by about 0.1 to 0.3 dB on the high frequency side (DCS and PCS). Since the leakage of radio waves is greater at higher frequencies! /, The effect of the present invention is greater at higher frequencies.
[0070] 干渉によると考えられる不要帯域での特性劣化も解消された。この効果は、受信間 アイソレーション特性 (低周波側受信端子と高周波側受信端子との間の通過特性)か ら明確に確認できた。アイソレーション改善効果は、低周波帯域では約 5 dBであり、 高周波帯域では約 2 dBであり、各 n倍波帯域では約 3〜20 dBであった。このような挿 入損失及び減衰量の改善効果が得られたのは、低周波側と高周波側のシールド効 果によると考えられる。なお GaAsスィッチを使用する場合、低周波側ラインと高周波 側ラインとをグランド電極で分離することにより、同じ効果を得ることができる。 [4]第四の実施形態 [0070] Characteristic deterioration in an unnecessary band considered to be due to interference was also eliminated. This effect can be clearly confirmed from the isolation characteristics between the reception (passage characteristics between the low-frequency receiving terminal and the high-frequency receiving terminal). The isolation improvement effect was about 5 dB in the low frequency band, about 2 dB in the high frequency band, and about 3 to 20 dB in each nth harmonic band. The effect of improving the insertion loss and attenuation is considered to be due to the shielding effect on the low frequency side and the high frequency side. When a GaAs switch is used, the same effect can be obtained by separating the low frequency side line and the high frequency side line with a ground electrode. [4] Fourth embodiment
本発明の高周波回路及び高周波モジュールに好適なローパスフィルタについて以 下詳細に説明する。図 10は低周波帯の GSM及び EGSMと高周波帯の DCS及び PCS をカバーするクヮッドバンド用アンテナスィッチ回路の等価回路の一例を示し、図 14 はローパスフィルタを組み込んだ積層体を構成する各誘電体層上の電極パターンを 示す。アンテナスィッチ回路のローパスフィルタ以外の部分は第一の実施形態と同じ なので、それらの説明を省略する。  The low-pass filter suitable for the high-frequency circuit and high-frequency module of the present invention will be described in detail below. Fig. 10 shows an example of an equivalent circuit of a quad-band antenna switch circuit covering GSM and EGSM in the low frequency band and DCS and PCS in the high frequency band, and Fig. 14 shows each dielectric layer constituting the laminate incorporating the low-pass filter. The upper electrode pattern is shown. Since parts other than the low-pass filter of the antenna switch circuit are the same as those of the first embodiment, their description is omitted.
[0071] ローパスフィルタは単体の積層ローパスフィルタでも良い。ローパスフィルタを用い た積層モジュールの構成は特に限定されないが、アンテナスィッチモジュール、又は アンテナスィッチ回路と高周波増幅器回路との複合モジュールとするのが好ましい。  [0071] The low-pass filter may be a single laminated low-pass filter. The configuration of the laminated module using the low-pass filter is not particularly limited, but is preferably an antenna switch module or a composite module of an antenna switch circuit and a high-frequency amplifier circuit.
[0072] 図 10及び図 11に示す第一及び第二のローパスフィルタ LPFl, LPF2は同じ構成で 良い。図 15はローパスフィルタ LPF (LPF1又は LPF2)の等価回路を示す。第一のロー パスフィルタ LPF1は、インダクタンスを形成する伝送線路 LL3とキャパシタ CL2, CL3 力もなる L型ローパスフィルタである。キャパシタ CL3は伝送線路 LL3に並列に接続さ れ、並列共振回路を構成している。ローパスフィルタの構成は図 15に示すものに限ら ず、例えば図 16に示す π型ローパスフィルタでも良い。  [0072] The first and second low-pass filters LPFl and LPF2 shown in FIGS. 10 and 11 may have the same configuration. FIG. 15 shows an equivalent circuit of the low-pass filter LPF (LPF1 or LPF2). The first low-pass filter LPF1 is an L-type low-pass filter that also includes a transmission line LL3 and capacitors CL2 and CL3 that form an inductance. Capacitor CL3 is connected in parallel with transmission line LL3 to form a parallel resonant circuit. The configuration of the low-pass filter is not limited to that shown in FIG. 15, but may be, for example, a π-type low-pass filter shown in FIG.
[0073] 電極パターンを形成した 11層の誘電体層と積層体の裏面 BOTTOMを示す図 14に より、積層体における第一のローパスフィルタ LPF1を説明する。図 14は左上力も順に 第 1層〜第 11層及び裏面を示す。ローパスフィルタ LPF1を構成する伝送線路 LL3及 びキャパシタ CL2, CL3を構成する電極パターンもそれぞれ LL3, CL2, CL3で示す。 第 6層にはグランド電極 G1が形成されており、グランド電極 Gはり上側の第 2層〜第 5 層に伝送線路用電極パターン LL3が形成されて 、る。キャパシタ用電極パターン CL 2, CL3はグランド電極 G1の下側の第 9層〜第 11層に形成されている。すなわち、第 一のローパスフィルタ LPF1を構成する複数のキャパシタ用電極パターン CL2, CL3と 伝送線路用電極パターン LL3とはグランド電極 G1により積層方向に分離されて!ヽる。 両電極パターンはグランド電極 G1により全面で分離されて 、るのが好まし 、。ローバ スフィルタが複数の伝送線路を有する場合も同様に、複数の伝送線路を構成する電 極パターンは、グランド電極の積層方向片側にまとめて形成する。 [0074] 積層体の小型化のため、図 14に示す構成では、伝送線路用電極パターン LL3とキ ャパシタ用電極パターン CL2, CL3とは積層方向に重なりを有する。本発明のローバ スフィルタでは伝送線路とキャパシタがグランド電極で分離されて ヽるため、インダク タとキャパシタが積層方向に重なりを有しても相互干渉がない。伝送線路 LL3より外 側の第 1層等には、伝送線路用電極パターン LL3と積層方向で重なるグランド電極は 設けられて 、な 、ので、伝送線路 LL3より外側に対向するグランド電極を配置した場 合に生じる寄生容量の形成や、挿入損失の増加を回避することができる。 [0073] The first low-pass filter LPF1 in the multilayer body will be described with reference to FIG. 14 showing the eleven dielectric layers on which the electrode patterns are formed and the back surface BOTTOM of the multilayer body. FIG. 14 shows the first to eleventh layers and the back surface in order of the upper left force. The transmission line LL3 composing the low-pass filter LPF1 and the electrode patterns composing the capacitors CL2 and CL3 are also indicated by LL3, CL2 and CL3, respectively. A ground electrode G1 is formed on the sixth layer, and a transmission line electrode pattern LL3 is formed on the second to fifth layers above the ground electrode G beam. Capacitor electrode patterns CL2 and CL3 are formed on the ninth to eleventh layers below the ground electrode G1. That is, the plurality of capacitor electrode patterns CL2 and CL3 and the transmission line electrode pattern LL3 constituting the first low-pass filter LPF1 are separated in the stacking direction by the ground electrode G1. Both electrode patterns are preferably separated on the entire surface by the ground electrode G1. Similarly, when the low-pass filter has a plurality of transmission lines, the electrode patterns constituting the plurality of transmission lines are collectively formed on one side of the ground electrode in the stacking direction. [0074] In order to reduce the size of the multilayer body, in the configuration shown in FIG. 14, the transmission line electrode pattern LL3 and the capacitor electrode patterns CL2 and CL3 overlap in the stacking direction. In the lowpass filter of the present invention, the transmission line and the capacitor are separated by the ground electrode, so there is no mutual interference even if the inductor and the capacitor overlap in the stacking direction. The first layer, etc., outside the transmission line LL3 is provided with a ground electrode that overlaps the transmission line electrode pattern LL3 in the stacking direction, so that a ground electrode facing outside the transmission line LL3 is arranged. It is possible to avoid the formation of parasitic capacitance and the increase in insertion loss.
[0075] 図 14に示す構成では、キャパシタ用電極パターン CL2, CL3側にグランド電極 G1と 別のグランド電極 (キャパシタ CL2の対向グランド電極)を設けている。この場合、伝送 線路用電極パターン LL3とキャパシタ用電極パターン CL2, CL3に挟まれるグランド電 極 G1は、キャパシタ CL2, CL3の対向グランド電極として機能してもしなくても良い。 伝送線路用電極パターン LL3とキャパシタ用電極パターン CL2, CL3に挟まれたダラ ンド電極 G1とキャパシタ CL2, CL3の対向グランド電極を単一のグランド電極で構成し ても良い。この場合、グランド電極 G1と別のグランド電極をキャパシタ用電極パターン CL2, CL3の外側に具備しない。この構成は小型化に有利である。  In the configuration shown in FIG. 14, the ground electrode G1 and another ground electrode (counter ground electrode of the capacitor CL2) are provided on the capacitor electrode patterns CL2 and CL3 side. In this case, the ground electrode G1 sandwiched between the transmission line electrode pattern LL3 and the capacitor electrode patterns CL2 and CL3 may or may not function as the opposing ground electrode of the capacitors CL2 and CL3. The ground electrode G1 sandwiched between the transmission line electrode pattern LL3 and the capacitor electrode patterns CL2 and CL3 and the opposing ground electrode of the capacitors CL2 and CL3 may be constituted by a single ground electrode. In this case, a ground electrode different from the ground electrode G1 is not provided outside the capacitor electrode patterns CL2 and CL3. This configuration is advantageous for downsizing.
[0076] 特開平 11-27177号のローパスフィルタでは、インダクタンスとキャパシタの間にグラ ンド電極が部分的に形成されているため、インダクタンス用電極パターンとキャパシタ 用電極パターンとは完全に分離されていないが、本実施形態のローノ スフィルタで は、インダクタンス用電極パターンとキャパシタ用電極パターンとの間にグランド電極 が存在している点で、両者は大きく異なる。さらに伝送線路用電極パターンの外側に 別の対向するグランド電極を有しな 、ため、インダクタンスとして機能する伝送線路の 寄生容量の形成が抑制され、損失低減に寄与する。  [0076] In the low-pass filter disclosed in Japanese Patent Application Laid-Open No. 11-27177, since the ground electrode is partially formed between the inductance and the capacitor, the electrode pattern for inductance and the electrode pattern for capacitor are not completely separated. However, the low-pass filter according to the present embodiment is largely different in that a ground electrode exists between the inductance electrode pattern and the capacitor electrode pattern. Furthermore, since there is no other opposing ground electrode outside the transmission line electrode pattern, the formation of parasitic capacitance of the transmission line functioning as an inductance is suppressed, contributing to loss reduction.
[0077] 図 17(a)に示すローパスフィルタにおいて、積層方向においてインダクタンスを形成 する伝送線路の電極パターン 13とキャパシタ用電極パターン 15との間にグランド電極 14が設けられており、キャパシタ用電極パターン 15の下側にはグランド電極 16が設け られている。グランド電極 14はその上下に設けられた伝送線路用電極パターン 13とキ ャパシタ用電極パターン 15より接地面積が大きぐ積層方向において伝送線路用電 極パターン 13とキャパシタ用電極パターン 15が対向する領域に全面的にグランド電 極 14が存在するため、グランド電極 14は伝送線路とキャパシタとの干渉を防ぐ。 In the low-pass filter shown in FIG. 17 (a), a ground electrode 14 is provided between a transmission line electrode pattern 13 and a capacitor electrode pattern 15 that form an inductance in the stacking direction. A ground electrode 16 is provided below 15. The ground electrode 14 is disposed in a region where the transmission line electrode pattern 13 and the capacitor electrode pattern 15 are opposed to each other in the stacking direction in which the ground area is larger than the transmission line electrode pattern 13 and the capacitor electrode pattern 15 provided above and below the ground electrode 14. Ground electricity throughout Since the pole 14 is present, the ground electrode 14 prevents interference between the transmission line and the capacitor.
[0078] 伝送線路用電極パターン 13の上側にグランド電極が設けられていないため、伝送 線路の上側に寄生容量が形成されることがない。この場合、インピーダンス設計が許 す限り、インダクタンスを形成する伝送線路とグランド電極との距離を広げることにより 、伝送線路の下側に発生する寄生容量を抑制し、もって挿入損失を低減することが できる。グランド電極 14をキャパシタの対向電極の 1つとして使用しない場合、伝送線 路の電極パターンのうちグランド電極 14側の電極パターンとグランド電極との距離を 広げて寄生容量の発生を抑制するのが好ましいが、グランド電極 14をキャパシタの対 向電極の 1つとして使用する場合はこの限りでない。 [0078] Since the ground electrode is not provided on the upper side of the transmission line electrode pattern 13, no parasitic capacitance is formed on the upper side of the transmission line. In this case, as long as the impedance design allows, by increasing the distance between the transmission line forming the inductance and the ground electrode, it is possible to suppress the parasitic capacitance generated below the transmission line, thereby reducing the insertion loss. . When the ground electrode 14 is not used as one of the counter electrodes of the capacitor, it is preferable to increase the distance between the electrode pattern on the ground electrode 14 side of the electrode pattern of the transmission line and the ground electrode to suppress the generation of parasitic capacitance. However, this does not apply when the ground electrode 14 is used as one of the counter electrodes of the capacitor.
[0079] 図 17(b)に示す構成では、積層方向においてインダクタを形成する伝送線路の電 極パターン 13とキャパシタの電極パターン 15との間にグランド電極 14が設けられてい る力 キャパシタ用電極パターン 15の下側に別のグランド電極が設けられておらず、 グランド電極 14をキャパシタの対向電極として用いている。この構成でも図 17(a)に示 す構成と同じ効果が得られる。この構成では、グランド電極 14を対向電極の 1つとして 使用するため、電極パターン 15とグランド電極 14との距離は 50 m以下に設定するの が好ましい。 In the configuration shown in FIG. 17 (b), a force capacitor electrode pattern in which a ground electrode 14 is provided between a transmission line electrode pattern 13 and a capacitor electrode pattern 15 forming an inductor in the stacking direction. No other ground electrode is provided below 15, and the ground electrode 14 is used as the counter electrode of the capacitor. With this configuration, the same effect as the configuration shown in FIG. 17 (a) can be obtained. In this configuration, since the ground electrode 14 is used as one of the counter electrodes, the distance between the electrode pattern 15 and the ground electrode 14 is preferably set to 50 m or less.
[0080] 図 10に示す第二のローパスフィルタも第一のローパスフィルタと同様にして構成す ることができる。このように積層モジュールが複数のローパスフィルタを備える場合、 複数のローパスフィルタのグランド電極を必ずしも同じ誘電体層に形成する必要はな いが、同じ誘電体層上に形成するのが好ましい。このような構成は、積層体の小型化 、及び不要な浮遊容量の抑制に効果的である。  The second low-pass filter shown in FIG. 10 can also be configured in the same manner as the first low-pass filter. When the laminated module includes a plurality of low-pass filters as described above, the ground electrodes of the plurality of low-pass filters are not necessarily formed on the same dielectric layer, but are preferably formed on the same dielectric layer. Such a configuration is effective in reducing the size of the stacked body and suppressing unnecessary stray capacitance.
[0081] 上記ローパスフィルタは、第一〜第三の実施形態のいずれのアンテナスィッチ回路 にも用いることができ、また第一及び第二の実施形態による高周波モジュールに限ら ず、他のマルチバンド高周波モジュールにも広く使用できる。  [0081] The low-pass filter can be used in any of the antenna switch circuits of the first to third embodiments, and is not limited to the high-frequency module according to the first and second embodiments, but other multiband high-frequency filters. Can be widely used for modules.
[0082] 実施例 4  [0082] Example 4
アンテナスィッチモジュールとして、図 14に示す積層モジュールを、 950°C以下の低 温焼成が可能な LTCCからなる 11層の誘電体グリーンシートにより作製した。この積 層モジュールは高周波増幅器も有する。積層体の寸法及び作製方法は第一の実施 形態と同じである。 As an antenna switch module, the laminated module shown in Fig. 14 was fabricated using an 11-layer dielectric green sheet made of LTCC that can be fired at a low temperature of 950 ° C or lower. The stack module also has a high frequency amplifier. The dimensions and manufacturing method of the laminate are the first implementation. The form is the same.
[0083] 実施例 4のローパスフィルタと、インダクタンスを形成する伝送線路の上側にグランド 電極を有する従来のローノ スフィルタとを比較したところ、挿入損失が低周波側 (GS M及び EGSM)で約 0.3〜0.35 dBと大きく改善し、高周波側(DCS及び PCS)で約 0.2〜 0.3 dBと大きく改善し、また減衰量が低周波側(GSM及び EGSM)で約 2〜5 dBと大き く改善し、高周波側(DCS及び PCS)で約 4〜10 dBと大きく改善したことが分力つた。こ れは、インダクタンスを形成する伝送線路の寄生容量が減少したため、従来設計より 伝送線路が短く済んだためである。ローパスフィルタを高周波スィッチモジュールに 組み込んだ場合も、同様の改善効果が得られた。  [0083] When the low-pass filter of Example 4 was compared with the conventional low-pass filter having the ground electrode above the transmission line forming the inductance, the insertion loss was about 0.3 on the low-frequency side (GS M and EGSM). Greatly improved to ˜0.35 dB, greatly improved by about 0.2 to 0.3 dB on the high frequency side (DCS and PCS), and greatly improved to about 2 to 5 dB on the low frequency side (GSM and EGSM) A significant improvement of about 4 to 10 dB on the high frequency side (DCS and PCS) was a major factor. This is because the parasitic capacitance of the transmission line that forms the inductance is reduced, and the transmission line is shorter than the conventional design. The same improvement effect was obtained when the low-pass filter was incorporated in the high-frequency switch module.
[0084] 伝送線路の寄生容量が大きいと挿入損失が劣化するため、伝送線路の電極とダラ ンド電極との距離は可能な限り広く設定するのが好ましぐ試作した積層モジュール では 100 /z mに調整した。一方、試作した回路構成ではキャパシタ側の寄生容量が大 きいとインピーダンスを 50 Ωに設計するのが困難となり、ローパスフィルタと他回路と の整合が困難になるため、キャパシタの電極とグランド電極との距離は可能な限り広 く設定するのが好ましぐ試作した積層モジュールでは 225 mに調整した。  [0084] Since the insertion loss deteriorates when the parasitic capacitance of the transmission line is large, it is preferable to set the distance between the electrode of the transmission line and the Darling electrode as wide as possible. It was adjusted. On the other hand, in the prototype circuit configuration, if the parasitic capacitance on the capacitor side is large, it becomes difficult to design the impedance to 50 Ω, and matching between the low-pass filter and other circuits becomes difficult. The distance was adjusted to 225 m for the prototype module, which is preferably set as wide as possible.
[0085] 実施例 4のローパスフィルタと、中間のグランド電極を有さない従来のローパスフィ ルタとを比較したところ、挿入損失が低周波側(GSM及び EGSM)で約 0.2〜0.3 dBと 大きく改善し、高周波側(DCS及び PCS)で約 0.2〜0.3 dBと大きく改善し、また減衰量 が低周波側(GSM及び EGSM)で約 5〜8 dBと大きく改善し、高周波側(DCS及び PCS )で約 5〜12 dBと大きく改善したことが分力つた。また従来のローパスフィルタでは低 周波側及び高周波側の減衰極が明確に現れず、設計しにくかったが、本発明のロー パスフィルタには設計された減衰極が明確に現れ、さらに干渉によると考えられる不 要帯域での特性劣化が解消された。このように所望の特性を得るための設計が簡便 となり、設計時間が短縮された。さらに高周波スィッチモジュールにした場合、同等の 改善性能を有した。  [0085] When the low-pass filter of Example 4 was compared with the conventional low-pass filter having no intermediate ground electrode, the insertion loss was greatly improved to about 0.2 to 0.3 dB on the low frequency side (GSM and EGSM). The high frequency side (DCS and PCS) is greatly improved to about 0.2 to 0.3 dB, and the attenuation is greatly improved to about 5 to 8 dB on the low frequency side (GSM and EGSM). The major improvement was about 5 to 12 dB. In addition, the low-pass and high-frequency attenuation poles did not appear clearly in the conventional low-pass filter, and it was difficult to design the low-pass filter. However, the designed low-pass filter clearly shows the designed attenuation pole and is thought to be due to interference. The characteristic deterioration in the unnecessary band is eliminated. Thus, the design for obtaining the desired characteristics has become simple and the design time has been shortened. Furthermore, when a high-frequency switch module was used, it had the same improvement performance.
[0086] 本発明のローパスフィルタの中間に配置したグランド電極をローパスフィルタの接地 した対向電極として利用した場合、諸特性は上記と同様に改善され、積層体の厚さ を約 100 m削減でき、小型化が可能となった。もちろん、この効果は積層モジュール とした場合にも得られる。 [0086] When the ground electrode arranged in the middle of the low-pass filter of the present invention is used as a grounded counter electrode of the low-pass filter, various characteristics are improved in the same manner as described above, and the thickness of the laminate can be reduced by about 100 m. Miniaturization is possible. Of course, this effect is a laminated module Can also be obtained.
[0087] スィッチ回路の伝送線路を必須の構成とする場合を除き、 Vヽずれの実施形態にお いても、第一及び第二のスィッチ回路 SW1, SW2として、例えば SPDT (単極双投型) スィッチのような GaAsスィッチを用いることもできる。 GaAsスィッチの使用によりスイツ チに用いる伝送線路が減る。また高周波回路における分波回路の配置は図示の位 置に限られず、例えば、スィッチ回路 SW1, SW2の共通端子をアンテナ ANTに接続し て、スィッチ回路の送信側端子及び受信側端子に分波回路を接続しても良ぐまた アンテナ ANTと分波回路の間に他の回路を設けても良い。さらに分波回路を SPnTス イッチ (nは 2以上の自然数)で置き換え、周波数帯と送受信の切り替えを行っても良 い。  [0087] Except in the case where the transmission line of the switch circuit is an indispensable configuration, the first and second switch circuits SW1, SW2 are also used as the first and second switch circuits SW1, SW2, for example, SPDT (single pole double throw type) ) GaAs switches such as switches can also be used. The use of GaAs switches reduces the number of transmission lines used in the switch. In addition, the arrangement of the branching circuit in the high frequency circuit is not limited to the position shown in the figure. For example, the common terminal of the switch circuits SW1 and SW2 is connected to the antenna ANT, and the branching circuit is connected to the transmission side terminal and the reception side terminal of the switch circuit. It is also possible to connect another circuit between the antenna ANT and the demultiplexing circuit. Furthermore, the branching circuit may be replaced with an SPnT switch (n is a natural number of 2 or more) to switch between frequency band and transmission / reception.
[0088] 本発明は上記実施形態に限定されず、種々のマルチバンド高周波モジュールに適 用できる。  The present invention is not limited to the above embodiment, and can be applied to various multiband high frequency modules.
[0089] 本発明の高周波モジュールに用いる誘電体層はセラミック又は榭脂により形成する ことができる。榭脂を基板としてを用いる場合、キャパシタ等の多層基板に電極バタ ーンで形成できない素子は、基板上に搭載するチップ素子としても良い。  [0089] The dielectric layer used in the high-frequency module of the present invention can be formed of ceramic or resin. When the resin is used as a substrate, an element that cannot be formed with an electrode pattern on a multilayer substrate such as a capacitor may be a chip element mounted on the substrate.

Claims

請求の範囲 The scope of the claims
[1] 共通端子と、低周波端子と、高周波端子と、前記共通端子と前記低周波端子との 間に設けられた低周波フィルタを有する低周波側経路と、前記共通端子と前記高周 波端子との間に設けられた高周波フィルタを有する高周波側経路とを具備する分波 回路であって、前記低周波フィルタは前記低周波側経路に直列に接続された第一 の伝送線路と、前記第一の伝送線路の一部に並列接続されたキャパシタとを有する ことを特徴とする分波回路。  [1] A common terminal, a low frequency terminal, a high frequency terminal, a low frequency side path having a low frequency filter provided between the common terminal and the low frequency terminal, the common terminal and the high frequency A branching circuit having a high-frequency side path having a high-frequency filter provided between the terminal and the low-frequency filter, the first transmission line connected in series to the low-frequency side path; A branching circuit comprising a capacitor connected in parallel to a part of the first transmission line.
[2] 請求項 1に記載の分波回路において、前記キャパシタは前記第一の伝送線路の低 周波端子側の一部に並列接続して並列共振回路を構成し、前記第一の伝送線路の 前記一部以外の部分はインダクタンス部を構成していることを特徴とする分波回路。  [2] In the branching circuit according to claim 1, the capacitor is connected in parallel to a part on the low frequency terminal side of the first transmission line to form a parallel resonance circuit, and the first transmission line A part other than the part constitutes an inductance part.
[3] 共通端子と、低周波端子と、高周波端子と、前記共通端子と前記低周波端子との 間に設けられた低周波フィルタを有する低周波側経路と、前記共通端子と前記高周 波端子との間に設けられた高周波フィルタを有する高周波側経路とを具備する分波 回路であって、前記共通端子側に形成された寄生容量を不要波を抑制するキャパシ タとして用いることを特徴とする分波回路。  [3] a common terminal, a low frequency terminal, a high frequency terminal, a low frequency side path having a low frequency filter provided between the common terminal and the low frequency terminal, the common terminal and the high frequency A demultiplexing circuit including a high-frequency side path having a high-frequency filter provided between the terminals, wherein the parasitic capacitance formed on the common terminal side is used as a capacitor for suppressing unnecessary waves. Demultiplexing circuit.
[4] 請求項 3に記載の分波回路において、前記高周波フィルタは前記共通端子に接続 された第一のキャパシタを備え、前記第一のキャパシタの前記共通端子側に前記寄 生容量が形成されていることを特徴とする分波回路。  [4] The branching circuit according to claim 3, wherein the high frequency filter includes a first capacitor connected to the common terminal, and the parasitic capacitor is formed on the common terminal side of the first capacitor. A demultiplexer circuit characterized by having
[5] 請求項 4に記載の分波回路において、前記第一のキャパシタを構成する対向電極 のうち前記共通端子に接続された電極と、グランド電極とが対向して配置され、もって 両電極の間に前記寄生容量が形成されていることを特徴とする分波回路。  [5] The branching circuit according to claim 4, wherein an electrode connected to the common terminal and a ground electrode among the counter electrodes constituting the first capacitor are arranged to face each other, so that both electrodes A branching circuit having the parasitic capacitance formed therebetween.
[6] 請求項 4に記載の分波回路において、前記高周波フィルタは、前記共通端子に接 続された第一のキャパシタと、前記第一のキャパシタと前記高周波端子との間に接続 された第二のキャパシタと、前記第一のキャパシタと前記第二のキャパシタとの間とグ ランドとの間に接続された第三の伝送線路及び第三のキャパシタカ なる直列共振 回路とを備え、前記第三の伝送線路、前記第一のキャパシタ、前記第二のキャパシ タ及び前記第三のキャパシタは電極パターンが形成された誘電体層を積層してなる 積層体内に構成されており、前記積層体内で前記第一のキャパシタを構成する対向 電極のうち前記共通端子に接続された電極がグランド電極に対向していることを特徴 とする分波回路。 [6] In the branching circuit according to claim 4, the high frequency filter includes a first capacitor connected to the common terminal, and a first capacitor connected between the first capacitor and the high frequency terminal. A second resonance capacitor, a third transmission line connected between the first capacitor and the second capacitor, and a ground, and a series resonance circuit consisting of a third capacitor. The three transmission lines, the first capacitor, the second capacitor, and the third capacitor are configured in a stacked body formed by stacking dielectric layers on which electrode patterns are formed. Opposing the first capacitor A branching circuit characterized in that an electrode connected to the common terminal among the electrodes faces a ground electrode.
[7] 請求項 1又は 2に記載の分波回路を備えた高周波回路において、前記低周波端子 に接続された第二の伝送線路を有し、前記キャパシタは前記第一の伝送線路の一 部と前記第二の伝送線路の少なくとも一部に並列に接続されていることを特徴とする 高周波回路。  [7] A high-frequency circuit comprising the branching circuit according to claim 1 or 2, further comprising a second transmission line connected to the low-frequency terminal, wherein the capacitor is a part of the first transmission line. And a high-frequency circuit connected in parallel to at least a part of the second transmission line.
[8] 請求項 7に記載の高周波回路において、前記低周波端子に接続され、前記低周波 側経路の送信側経路と受信側経路との切り替えを行うスィッチ回路を有し、前記第二 の伝送線路は前記スィッチ回路の受信側経路に設けられた伝送線路であることを特 徴とする高周波回路。  [8] The high-frequency circuit according to claim 7, further comprising a switch circuit that is connected to the low-frequency terminal and performs switching between a transmission-side path and a reception-side path of the low-frequency side path, and the second transmission A high-frequency circuit characterized in that the line is a transmission line provided in a receiving-side path of the switch circuit.
[9] 請求項 1又は 2に記載の分波回路が、電極パターンが形成された誘電体層を積層 してなる多層基板に構成されていることを特徴とする高周波モジュール。  [9] A high-frequency module, wherein the branching circuit according to claim 1 or 2 is configured on a multilayer substrate formed by laminating dielectric layers on which electrode patterns are formed.
[10] 請求項 7又は 8に記載の高周波回路が、電極パターンが形成された誘電体層を積 層してなる多層基板に構成されていることを特徴とする高周波モジュール。 [10] A high-frequency module according to claim 7 or 8, wherein the high-frequency circuit is configured on a multilayer substrate formed by stacking dielectric layers on which electrode patterns are formed.
[11] 請求項 10に記載の高周波モジュールにおいて、前記第一の伝送線路の一部を構 成する電極パターン、前記第二の伝送線路の少なくとも一部を構成する電極パター ン、及び前記キャパシタの電極パターンが積層体の積層方向に重なって 、ることを 特徴とする高周波モジュール。 [11] The high-frequency module according to claim 10, wherein an electrode pattern constituting a part of the first transmission line, an electrode pattern constituting at least a part of the second transmission line, and the capacitor A high-frequency module, characterized in that the electrode pattern overlaps in the stacking direction of the stack.
[12] 請求項 3〜6のいずれかに記載の分波回路力 電極パターンが形成された誘電体 層を積層してなる多層基板に構成されていること特徴とする高周波モジュール。 [12] A high-frequency module comprising a multi-layer substrate formed by laminating dielectric layers on which the branch circuit power electrode pattern according to any one of claims 3 to 6 is formed.
[13] 請求項 12に記載の高周波モジュールにおいて、前記分波回路により分けられる第 一の周波数帯域の送信系と受信系を切り換える第一のスィッチ回路と、前記分波回 路により分けられる第二の周波数帯域の送信系と受信系を切り換える第二のスィッチ 回路とを備えることを特徴とする高周波モジュール。 [13] The high-frequency module according to claim 12, wherein the first switch circuit that switches between the transmission system and the reception system in the first frequency band divided by the branching circuit, and the second switch that is divided by the branching circuit. A high-frequency module comprising: a second switch circuit that switches between a transmission system and a reception system in the frequency band.
[14] 少なくとも第一の周波数帯域と、前記第一の周波数帯域より高い第二の周波数帯 域を選択的に用いるマルチバンド無線通信装置に用いる高周波モジュールであって 前記第一の周波数帯域における第一の送受信系と前記第二の周波数帯域におけ る第二の送受信系とを分ける分波回路と、前記分波回路に接続され、前記第一の送 受信系の送信系と受信系を切り換える第一のスィッチ回路と、前記分波回路に接続 され、前記第二の送受信系の送信系と受信系を切り換える第二のスィッチ回路とを 有し、 [14] A high-frequency module used in a multiband wireless communication apparatus that selectively uses at least a first frequency band and a second frequency band higher than the first frequency band, In one transmission / reception system and the second frequency band. A demultiplexing circuit that separates the second transmission / reception system, a first switch circuit that is connected to the demultiplexing circuit and switches between the transmission system and the reception system of the first transmission / reception system, and is connected to the demultiplexing circuit A second switch circuit for switching between the transmission system and the reception system of the second transmission / reception system,
前記分波回路、前記第一のスィッチ回路及び前記第二のスィッチ回路は電極バタ ーンが形成された誘電体層を積層してなる積層体に構成されており、  The branching circuit, the first switch circuit, and the second switch circuit are each configured as a laminate formed by laminating dielectric layers on which electrode patterns are formed,
前記分波回路、前記第一のスィッチ回路及び前記第二のスィッチ回路が有する伝 送線路のうち、前記第一の周波数帯域の信号が通る伝送線路は前記積層体内の誘 電体層に設けられたグランド電極の積層方向一方の側に形成されており、前記第二 の週波数帯域の信号が通る伝送線路は前記グランド電極の積層方向他方の側に形 成されて!/ヽることを特徴とする高周波モジュール。  Of the transmission lines of the branching circuit, the first switch circuit, and the second switch circuit, the transmission line through which the signal of the first frequency band passes is provided in the dielectric layer in the laminate. Formed on one side of the ground electrode in the stacking direction, and the transmission line through which the second frequency band signal passes is formed on the other side of the ground electrode in the stacking direction! High frequency module.
[15] 請求項 14に記載の高周波モジュールにおいて、前記第二の周波数帯域と前記第 一の周波数帯域の二倍波の周波数帯域とがほぼ同じであることを特徴とする高周波 モジユーノレ。  15. The high frequency module according to claim 14, wherein the second frequency band and a frequency band of a second harmonic of the first frequency band are substantially the same.
[16] 請求項 14に記載の高周波モジュールにおいて、インダクタンスを形成する伝送線 路とキャパシタとを備えたローパスフィルタを有し、前記伝送線路を構成する電極パ ターンが形成された誘電体層と前記キャパシタを構成する電極パターンが形成され た誘電体層とはグランド電極により積層方向に分離されており、かつ前記伝送線路を 構成する電極パターンに関して前記グランド電極の積層方向反対側に対向するダラ ンド電極を具備しないことを特徴とする高周波モジュール。  [16] The high-frequency module according to claim 14, wherein the dielectric layer includes a low-pass filter including a transmission line that forms an inductance and a capacitor, and the electrode layer that forms the transmission line is formed. A dielectric electrode separated from the dielectric layer on which the electrode pattern constituting the capacitor is formed by a ground electrode in the stacking direction, and facing the opposite side of the ground electrode in the stacking direction with respect to the electrode pattern forming the transmission line. The high frequency module characterized by not having.
[17] 請求項 16に記載の高周波モジュールにおいて、前記キャパシタを構成する電極パ ターンに関して前記グランド電極の積層方向反対側に対向するグランド電極を具備 しな 、ことを特徴とする高周波モジュール。  17. The high-frequency module according to claim 16, further comprising a ground electrode facing the opposite side of the ground electrode in the stacking direction with respect to the electrode pattern constituting the capacitor.
[18] 請求項 17に記載の高周波モジュールにおいて、前記キャパシタを複数有することを 特徴とする高周波モジュール。  18. The high-frequency module according to claim 17, comprising a plurality of the capacitors.
[19] 請求項 17に記載の高周波モジュールにおいて、前記キャパシタの少なくとも一つが 前記伝送線路に並列に接続されていることを特徴とする高周波モジュール。  19. The high frequency module according to claim 17, wherein at least one of the capacitors is connected in parallel to the transmission line.
PCT/JP2007/063323 2006-07-03 2007-07-03 Branch circuit, high frequency circuit and high frequency module WO2008004557A1 (en)

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US12/304,898 US8183956B2 (en) 2006-07-03 2007-07-03 Diplexer circuit, high-frequency circuit and high-frequency module
EP07768093.2A EP2040377B1 (en) 2006-07-03 2007-07-03 Branch circuit, high frequency circuit and high frequency module
KR1020087029504A KR101421452B1 (en) 2006-07-03 2007-07-03 Branch circuit, high frequency circuit and high frequency module
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010101130A1 (en) * 2009-03-03 2010-09-10 株式会社村田製作所 High frequency module
WO2011152256A1 (en) * 2010-06-01 2011-12-08 株式会社村田製作所 High frequency module
WO2013118664A1 (en) * 2012-02-06 2013-08-15 株式会社村田製作所 High-frequency module
JP5800113B2 (en) * 2013-05-29 2015-10-28 株式会社村田製作所 High frequency module parts
WO2019188968A1 (en) * 2018-03-30 2019-10-03 株式会社村田製作所 High-frequency module and communication device provided with high-frequency module
WO2023013267A1 (en) * 2021-08-04 2023-02-09 株式会社村田製作所 Filter device

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090219908A1 (en) * 2008-02-29 2009-09-03 Ahmadreza Rofougaran Method and system for processing signals via diplexers embedded in an integrated circuit package
JP5837045B2 (en) * 2011-03-04 2015-12-24 株式会社村田製作所 High frequency switch module
WO2012127952A1 (en) * 2011-03-18 2012-09-27 株式会社村田製作所 Electronic component
CN105553438B (en) * 2011-05-09 2019-02-12 株式会社村田制作所 Communication terminal
KR101305894B1 (en) * 2011-10-14 2013-09-06 엘지이노텍 주식회사 Apparatus for matching impedence and method thereof
US9257221B2 (en) * 2012-04-13 2016-02-09 Cyntec Co., Ltd. Through-hole via inductor in a high-frequency device
US8884717B2 (en) * 2012-04-13 2014-11-11 Cyntec Co., Ltd. Diplexer
US9692392B2 (en) 2012-09-11 2017-06-27 Qualcomm Incorporated Filters for multi-band wireless device
TWI531108B (en) * 2013-01-18 2016-04-21 矽品精密工業股份有限公司 A duplexer and a circuit structure of the same and a radio frequency transceiver device
CN104242975B (en) * 2013-06-09 2018-04-10 中兴通讯股份有限公司 Communication terminal and the method for reducing communication terminal interference
KR20150035279A (en) * 2013-09-27 2015-04-06 삼성전기주식회사 Diplexer and control manufacturing method thereof
US9543660B2 (en) * 2014-10-09 2017-01-10 Apple Inc. Electronic device cavity antennas with slots and monopoles
CN104682992B (en) * 2015-01-22 2017-06-20 络达科技股份有限公司 The circuit of radio transmitting and receiving chip
WO2016125530A1 (en) * 2015-02-06 2016-08-11 株式会社村田製作所 Switch circuit and high-frequency module
CN105991152B (en) * 2015-03-06 2018-11-06 神讯电脑(昆山)有限公司 Electronic device
KR20160112117A (en) * 2015-03-18 2016-09-28 (주)파트론 Dielectric diplxer
US9712196B2 (en) * 2015-08-28 2017-07-18 Skyworks Solutions, Inc. Tunable notch filter
WO2017040223A1 (en) 2015-08-28 2017-03-09 Skyworks Solutions, Inc. Tunable notch filter and contour tuning circuit
CN106797222B (en) 2015-09-02 2018-10-23 天工方案公司 profile tuning circuit
CN106291183A (en) * 2016-08-04 2017-01-04 国网天津市电力公司 A kind of anti-interference multi-band signal harvester
WO2018051640A1 (en) * 2016-09-14 2018-03-22 ソニーモバイルコミュニケーションズ株式会社 Electrode for intra-body communication and wearable device
US10382932B2 (en) * 2017-07-13 2019-08-13 GM Global Technology Operations LLC High frequency communication alternative
EP3767742B1 (en) * 2018-05-08 2023-11-22 Huawei Technologies Co., Ltd. Antenna device and mobile terminal
CN111856251A (en) * 2020-08-03 2020-10-30 泰州市博泰电子有限公司 Mobile communication circuit board test system
WO2022039304A1 (en) * 2020-08-20 2022-02-24 엘지전자 주식회사 Method and apparatus for terminal and base station to generate signal in wireless communication system

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09153840A (en) * 1995-11-30 1997-06-10 Murata Mfg Co Ltd High frequency component
JPH1155058A (en) 1997-08-06 1999-02-26 Murata Mfg Co Ltd Layered ceramic composite part
JP2000349581A (en) 1999-06-02 2000-12-15 Murata Mfg Co Ltd Diplexer and mobile communication equipment using it
JP2001217601A (en) 2000-01-31 2001-08-10 Kyocera Corp Module substrate
JP2003069362A (en) 2001-08-27 2003-03-07 Kyocera Corp Diplexer
JP2003168934A (en) * 2001-11-29 2003-06-13 Toko Inc Bias circuit
JP2004328136A (en) 2003-04-22 2004-11-18 Hitachi Metals Ltd Low pass filter and high frequency switch using the same
JP2005080109A (en) * 2003-09-02 2005-03-24 Murata Mfg Co Ltd High frequency switching circuit
JP2005323063A (en) 2004-05-07 2005-11-17 Hitachi Metals Ltd Branching filter circuit

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB614720A (en) * 1946-07-22 1948-12-22 Gen Electric Co Ltd Improvements in and relating to electric filter circuits
JPS59144918U (en) * 1983-03-16 1984-09-27 株式会社村田製作所 LC filter element
JP2978553B2 (en) * 1990-10-29 1999-11-15 ティーディーケイ株式会社 Capacitor block
JP3478515B2 (en) * 1995-02-09 2003-12-15 松下電器産業株式会社 Apparatus and method for recording and reproducing data
JP3292095B2 (en) * 1997-07-07 2002-06-17 株式会社村田製作所 High frequency switch
CN1262534A (en) 1998-11-03 2000-08-09 三星电机株式会社 Duplexer wave filter
JP2000183606A (en) * 1998-12-18 2000-06-30 Ngk Spark Plug Co Ltd Dielectric duplexer
JP4596300B2 (en) * 2000-06-09 2010-12-08 日立金属株式会社 High frequency switch module
JP2001352202A (en) 2000-06-09 2001-12-21 Hitachi Metals Ltd High-frequency switch module
JP4635302B2 (en) * 2000-07-03 2011-02-23 Tdk株式会社 Multilayer LC high-pass filter, frequency demultiplexing circuit and front-end module for mobile communications
JP2002280862A (en) * 2001-03-19 2002-09-27 Murata Mfg Co Ltd Composite lc filter circuit and composite lc filter component
US6683512B2 (en) * 2001-06-21 2004-01-27 Kyocera Corporation High frequency module having a laminate board with a plurality of dielectric layers
JP2003124769A (en) * 2001-08-09 2003-04-25 Murata Mfg Co Ltd Lc filter circuit, laminated lc filter, multiplexer and radio communication device
US6985712B2 (en) * 2001-08-27 2006-01-10 Matsushita Electric Industrial Co., Ltd. RF device and communication apparatus using the same
US6975841B2 (en) * 2001-11-12 2005-12-13 Matsushita Electric Industrial Co., Ltd. Diplexer, and high-frequency switch and antenna duplexer using the same
JP4221205B2 (en) * 2001-11-12 2009-02-12 パナソニック株式会社 Diplexer and high-frequency switch using the same
WO2003065604A1 (en) * 2002-01-31 2003-08-07 Hitachi Metals, Ltd. Switch circuit and composite high-frequency part

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09153840A (en) * 1995-11-30 1997-06-10 Murata Mfg Co Ltd High frequency component
JPH1155058A (en) 1997-08-06 1999-02-26 Murata Mfg Co Ltd Layered ceramic composite part
JP2000349581A (en) 1999-06-02 2000-12-15 Murata Mfg Co Ltd Diplexer and mobile communication equipment using it
JP2001217601A (en) 2000-01-31 2001-08-10 Kyocera Corp Module substrate
JP2003069362A (en) 2001-08-27 2003-03-07 Kyocera Corp Diplexer
JP2003168934A (en) * 2001-11-29 2003-06-13 Toko Inc Bias circuit
JP2004328136A (en) 2003-04-22 2004-11-18 Hitachi Metals Ltd Low pass filter and high frequency switch using the same
JP2005080109A (en) * 2003-09-02 2005-03-24 Murata Mfg Co Ltd High frequency switching circuit
JP2005323063A (en) 2004-05-07 2005-11-17 Hitachi Metals Ltd Branching filter circuit

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010101130A1 (en) * 2009-03-03 2010-09-10 株式会社村田製作所 High frequency module
JP5201260B2 (en) * 2009-03-03 2013-06-05 株式会社村田製作所 High frequency module
WO2011152256A1 (en) * 2010-06-01 2011-12-08 株式会社村田製作所 High frequency module
JPWO2011152256A1 (en) * 2010-06-01 2013-07-25 株式会社村田製作所 High frequency module
WO2013118664A1 (en) * 2012-02-06 2013-08-15 株式会社村田製作所 High-frequency module
CN104094527A (en) * 2012-02-06 2014-10-08 株式会社村田制作所 High-frequency module
JPWO2013118664A1 (en) * 2012-02-06 2015-05-11 株式会社村田製作所 High frequency module
JP5800113B2 (en) * 2013-05-29 2015-10-28 株式会社村田製作所 High frequency module parts
WO2019188968A1 (en) * 2018-03-30 2019-10-03 株式会社村田製作所 High-frequency module and communication device provided with high-frequency module
US11043983B2 (en) 2018-03-30 2021-06-22 Murata Manufacturing Co., Ltd. Radio frequency module and communication device including the same
WO2023013267A1 (en) * 2021-08-04 2023-02-09 株式会社村田製作所 Filter device

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US8183956B2 (en) 2012-05-22
TW200816664A (en) 2008-04-01

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