JP2005136888A - High frequency demultiplexer circuit, a high frequency component with the same packaged therein, high frequency module and radio communication apparatus - Google Patents

High frequency demultiplexer circuit, a high frequency component with the same packaged therein, high frequency module and radio communication apparatus Download PDF

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JP2005136888A
JP2005136888A JP2003373160A JP2003373160A JP2005136888A JP 2005136888 A JP2005136888 A JP 2005136888A JP 2003373160 A JP2003373160 A JP 2003373160A JP 2003373160 A JP2003373160 A JP 2003373160A JP 2005136888 A JP2005136888 A JP 2005136888A
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frequency
low
circuit
pass filter
filter
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Sotaro Kukida
壮太郎 久木田
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Kyocera Corp
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Kyocera Corp
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<P>PROBLEM TO BE SOLVED: To make a high frequency demultiplexer circuit low in loss and small in size by replacing a phase shift circuit PSC of the high frequency demultiplexer circuit with other small circuit. <P>SOLUTION: This circuit is provided with a low-pass filter and a high-pass filter HPF1 each including an inductance element and a capacitance element. The low-pass filter is configured by cascading a first low-pass filter circuit LPF1 with a ground capacitor C3 formed in one end of a notch circuit configured by parallel connecting a transmission line L1 comprising the inductance element and the capacitance element C1, and a second low-pass filter circuit LPF2 including the same configuration. An attenuation pole of one low-pass filter circuit is set to a frequency that is approximately the double of a pass frequency band of the low-pass filter, and an attenuation pole of the other low-pass filter is set to a frequency that is approximately (n) (n≥) times of the passing frequency band of the low-pass filter. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は高周波分波回路、高周波部品、高周波モジュール及びその高周波モジュールを搭載した携帯電話機などの無線通信機器に関するものである。   The present invention relates to a high-frequency branching circuit, a high-frequency component, a high-frequency module, and a wireless communication device such as a mobile phone equipped with the high-frequency module.

近年、携帯電話機の普及が進みつつあり、携帯電話機の機能、サービスの向上が図られている。このような携帯電話機では送受信系の構成に必要な高周波回路を基板に搭載する必要がある。
一方、1台の携帯電話機内に、2つ以上の送受信系を搭載するマルチバンド方式を採用した携帯電話機が提案されている。マルチバンド方式の携帯電話機は、高周波分波回路を用いて、地域性や使用目的等に合った送受信系を選択して送受信することができる利便性の高い機器として期待されている。
In recent years, cellular phones have been widely used, and functions and services of cellular phones have been improved. In such a cellular phone, it is necessary to mount a high-frequency circuit necessary for the configuration of the transmission / reception system on the substrate.
On the other hand, a mobile phone adopting a multiband system in which two or more transmission / reception systems are mounted in one mobile phone has been proposed. A multi-band mobile phone is expected as a highly convenient device that uses a high-frequency branching circuit to select and transmit / receive a transmission / reception system suitable for regional characteristics and intended use.

例えば、通信帯域の異なる複数の送受信系として、GSM850系(850MHz帯)/GSM900系(900MHz帯)、及びDCS系(1800MHz帯)/PCS系(1900MHz帯)の2ないし4送受信系を搭載したマルチバンド方式の携帯電話機が提案されている。
携帯電話機では、多機能化、小型化、薄型化が進むにつれて、内部の高周波部品に低損失、小型化、薄型化の要求が高まっている。
For example, as a plurality of transmission / reception systems having different communication bands, a multi-function equipped with 2 to 4 transmission / reception systems of GSM850 system (850 MHz band) / GSM900 system (900 MHz band) and DCS system (1800 MHz band) / PCS system (1900 MHz band). Band-type mobile phones have been proposed.
As mobile phones become more multifunctional, smaller, and thinner, there is an increasing demand for low-loss, smaller, and thinner internal high-frequency components.

ところが、マルチバンド方式の携帯電話機は、部品点数が多く、それぞれ個別の専用部品を用いて回路を構成すれば、機器の大型化、高コスト化を招来することとなる。そこで、共通可能な回路部分は、可及的に共通化するようにして機器の小型化、低コスト化を有利に展開することが要請されている。
図14に、従来の高周波部品の一例である高周波分波回路の回路図を示す。
However, a multiband mobile phone has a large number of parts, and if a circuit is configured using individual dedicated parts, the size and cost of the equipment will increase. Therefore, it is required to advantageously develop the downsizing and cost reduction of the equipment by sharing the common circuit portion as much as possible.
FIG. 14 shows a circuit diagram of a high frequency demultiplexing circuit which is an example of a conventional high frequency component.

この高周波分波回路は、通過周波数帯域の異なる複数の送受信系を各送受信系に分ける機能を持つ回路である。図14おいて、P1はアンテナと接続される端子、P2は800〜900MHz帯(以下「低周波帯」という)の入出力端子で、P3は1800〜1900MHz帯(以下「高周波側」という)の入出力端子である。
端子P1−P2間の回路構成は、P1側から移相回路PSC、低域通過フィルタLPF3の順に縦続接続されている。
This high-frequency branching circuit is a circuit having a function of dividing a plurality of transmission / reception systems having different pass frequency bands into the respective transmission / reception systems. In FIG. 14, P1 is a terminal connected to the antenna, P2 is an input / output terminal in the 800 to 900 MHz band (hereinafter referred to as “low frequency band”), and P3 is in the 1800 to 1900 MHz band (hereinafter referred to as “high frequency side”). Input / output terminal.
The circuit configuration between the terminals P1 and P2 is cascaded from the P1 side in the order of the phase shift circuit PSC and the low-pass filter LPF3.

移相回路PSCは、移相線路L4と移相用接地容量C8から構成されている。移相線路L4はストリップ線路などの伝送線路を用いている。
LPF3はインダクタンス素子を構成する伝送線路L5とキャパシタンス素子C9、C10で構成される。
端子P1−P3間には、高域通過フィルタHPF2が接続される。HPF2はキャパシタンス素子C11、C12、C13とインダクタンス素子を構成する伝送線路L6で構成される。
The phase shift circuit PSC is composed of a phase shift line L4 and a phase shift grounding capacitor C8. The phase shift line L4 uses a transmission line such as a strip line.
The LPF 3 includes a transmission line L5 and capacitance elements C9 and C10 that constitute an inductance element.
A high-pass filter HPF2 is connected between the terminals P1 and P3. The HPF 2 includes capacitance elements C11, C12, and C13 and a transmission line L6 that forms an inductance element.

LPF3とHPF2を接続しただけでは、端子P1において通過域及び阻止域でともにインピーダンス不整合となり高周波分波回路として機能しないので、移相回路PSCを、LPF3とP1の間に挿入し、低域通過フィルタLPF3の阻止域を開放状態まで位相回転させることで、端子P1における整合状態を良好に確保している。
図15に、P1側から見たLPF3のみの位相特性を、図16にLPF3の前段に移相回路PSCを挿入した場合のP1側から見た位相特性を示し、図17にP1側から見たHPF2の位相特性を示す。黒い三角は低周波帯、黒丸は高周波帯を表す。図15、図16の場合、黒い三角が通過域、黒丸が阻止域となり、図17の場合この逆となる。
If only LPF3 and HPF2 are connected, impedance mismatching occurs at both the pass band and the stop band at terminal P1, and it does not function as a high-frequency branching circuit. Therefore, a phase shift circuit PSC is inserted between LPF 3 and P1, and low-pass By matching the phase of the blocking region of the filter LPF3 to the open state, the matching state at the terminal P1 is ensured satisfactorily.
FIG. 15 shows the phase characteristics of only the LPF 3 viewed from the P1 side, FIG. 16 shows the phase characteristics viewed from the P1 side when the phase shift circuit PSC is inserted in the previous stage of the LPF 3, and FIG. 17 viewed from the P1 side. The phase characteristic of HPF2 is shown. The black triangle represents the low frequency band, and the black circle represents the high frequency band. In the case of FIGS. 15 and 16, the black triangle is the pass band and the black circle is the stop band, and in the case of FIG.

図15では阻止域のインピーダンスが開放状態(抵抗無限大)からずれているが、図16では移相回路PSCにより阻止域が開放状態に近い位置に配置できていることが分かる。
また、高周波分波回路の誘電体基板の厚みが薄い場合は、移相線路L4のインピーダンスが低くなり、通過域の整合性が悪化するので、移相用接地容量C8で調整することにより対処している。
In FIG. 15, the impedance of the stop band is deviated from the open state (resistance infinite), but in FIG. 16, it can be seen that the stop band can be arranged at a position close to the open state by the phase shift circuit PSC.
Further, when the thickness of the dielectric substrate of the high-frequency branching circuit is thin, the impedance of the phase shift line L4 becomes low and the passband consistency deteriorates. ing.

また、図18は、この高周波分波回路の伝送特性を示すグラフである。図18で実線は、移相回路PSCの挿入された低域通過フィルタLPF3の伝送特性を示し、破線は高域通過フィルタHPF2の伝送特性を示している。
特開平11−225088号公報 特開2001−285112号公報
FIG. 18 is a graph showing the transmission characteristics of this high-frequency branching circuit. In FIG. 18, the solid line shows the transmission characteristic of the low-pass filter LPF3 in which the phase shift circuit PSC is inserted, and the broken line shows the transmission characteristic of the high-pass filter HPF2.
Japanese Patent Laid-Open No. 11-225088 JP 2001-285112 A

図14の従来回路では、LPF3とHPF2の整合を合わせるための移相回路PSCの移相線路L4のインダクタンスを大きくとる必要があり、その長さが長くなっていた。また、キャパシタンス素子C8の容量も大きくする必要があり、その面積が大きくなっていた。移相線路L4の線路長が長いため高周波分波回路の挿入損失が大きくなり、占有面積も大きくなるので低損失、小型化が困難である。またキャパシタンス素子C8の面積が大きいために小型化が困難である。   In the conventional circuit of FIG. 14, it is necessary to increase the inductance of the phase shift line L4 of the phase shift circuit PSC for matching the LPF 3 and the HPF 2, and the length thereof is long. In addition, the capacitance of the capacitance element C8 needs to be increased, and the area thereof is increased. Since the line length of the phase shift line L4 is long, the insertion loss of the high-frequency branching circuit is increased and the occupied area is also increased, so that it is difficult to reduce the loss and reduce the size. Further, since the area of the capacitance element C8 is large, it is difficult to reduce the size.

このため、上記の構成では移相回路PSCが低損失、小型化の要求に応える際の大きな弊害となっている。
本発明は、かかる課題を解決するためになされたもので、高周波分波回路の回路構成を従来から変更して、移相回路PSCを他の小さな回路に置き換えることにより、低損失、小型化を実現する高周波分波回路、並びにそれを搭載した高周波部品、高周波モジュール及び無線通信機器を提供することを目的とする。
For this reason, in the above configuration, the phase shift circuit PSC is a serious problem when it meets the demand for low loss and downsizing.
The present invention has been made in order to solve the above-described problems. By changing the circuit configuration of the high-frequency branching circuit from the prior art and replacing the phase shift circuit PSC with another small circuit, low loss and downsizing can be achieved. An object of the present invention is to provide a high-frequency demultiplexing circuit to be realized, and a high-frequency component, a high-frequency module, and a wireless communication device on which the high-frequency demultiplexing circuit is mounted.

本発明の高周波分波回路は、インダクタンス素子とキャパシタンス素子とを含む低周波帯用フィルタ及び高周波帯用フィルタを備え、前記低周波帯用フィルタは、インダクタンス素子を構成する伝送線路とキャパシタンス素子とを並列接続してなるノッチ回路の一端に接地間容量を形成した第1の低域通過フィルタ回路と、同じ構成を有する第2の低域通過フィルタ回路とを縦続接続して構成したものであり、前記第1、第2の低域通過フィルタ回路のうち、一方の低域通過フィルタ回路の減衰極を、当該低周波帯用のフィルタの通過周波数帯域よりも高周波側に配し、他方の低域通過フィルタの減衰極を、当該低周波帯用のフィルタの通過周波数帯域の約n倍(n≧3)の周波数に配したものである。   The high-frequency branching circuit of the present invention includes a low-frequency band filter and a high-frequency band filter including an inductance element and a capacitance element, and the low-frequency band filter includes a transmission line and a capacitance element constituting the inductance element. A first low-pass filter circuit in which a ground-to-ground capacitance is formed at one end of a notch circuit connected in parallel and a second low-pass filter circuit having the same configuration are connected in cascade, Of the first and second low-pass filter circuits, the attenuation pole of one low-pass filter circuit is arranged on the higher frequency side than the pass frequency band of the low-frequency band filter, and the other low-pass filter circuit The attenuation pole of the pass filter is arranged at a frequency about n times (n ≧ 3) the pass frequency band of the low frequency band filter.

このように低周波帯用フィルタを、インダクタンス素子とキャパシタンス素子とを含む2段接続フィルタで構成し、それらの減衰極を調整することで、前記移相回路PSCがなくても、低域通過フィルタと高域通過フィルタの整合を合わせることができる。また、移相回路PSCをなくすことが出来たため、面積で約40パーセントの削減、挿入損失で0.3dBの改善ができ、低損失で小型の高周波部品を製作することが出来る。   In this way, the low-frequency band filter is constituted by a two-stage connection filter including an inductance element and a capacitance element, and by adjusting the attenuation poles thereof, the low-pass filter can be obtained without the phase shift circuit PSC. And the high-pass filter can be matched. Further, since the phase shift circuit PSC can be eliminated, the area can be reduced by about 40%, the insertion loss can be improved by 0.3 dB, and a small high-frequency component can be manufactured with low loss.

前記高周波帯用フィルタは、少なくとも2個のキャパシタンス素子を直列接続して、一端を接地したインダクタンス素子を構成する伝送線路を前記少なくとも2個のキャパシタンス素子の接続点に接続し、前記直列接続したキャパシタンス素子の両端にさらにキャパシタンス素子を接続したものを使用することができる。
また、本発明の高周波部品は、複数の誘電体層が積層されてなる誘電体多層基板の表面および/または内部に、前記高周波分波回路を形成してなるものである。
In the high frequency band filter, at least two capacitance elements are connected in series, a transmission line constituting an inductance element having one end grounded is connected to a connection point of the at least two capacitance elements, and the series connected capacitances are connected. A device in which a capacitance element is further connected to both ends of the element can be used.
The high-frequency component of the present invention is obtained by forming the high-frequency branching circuit on the surface and / or inside of a dielectric multilayer substrate in which a plurality of dielectric layers are laminated.

この高周波部品は、一方の低域通過フィルタの構成要素であるノッチ回路を、誘電体多層基板裏面の接地電極のない領域の上部に形成したものであることが好ましい。これにより、前記ノッチ回路と接地との間の不要な寄生容量を低減できるので、低域通過周波数特性を良好に保つことが出来る。
また、前記他方の低域通過フィルタを、前記一方の低域通過フィルタの構成要素である接地間容量を形成する接地対向電極の上部に配することが好ましい。これにより、前記他方の低域通過フィルタのノッチ回路と接地間に生じる不要な寄生容量を低減できるので低域通過周波数特性を良好に保つことが出来る。
In this high-frequency component, it is preferable that a notch circuit, which is a component of one of the low-pass filters, is formed on an upper portion of a region having no ground electrode on the back surface of the dielectric multilayer substrate. As a result, unnecessary parasitic capacitance between the notch circuit and the ground can be reduced, so that the low-pass frequency characteristics can be kept good.
Further, it is preferable that the other low-pass filter is disposed on an upper portion of a grounding counter electrode that forms an inter-ground capacitance that is a component of the one low-pass filter. As a result, unnecessary parasitic capacitance generated between the notch circuit of the other low-pass filter and the ground can be reduced, so that the low-pass frequency characteristic can be kept good.

本発明の高周波モジュールは、前記高周波分波回路を、複数の誘電体層が積層されてなる誘電体多層基板の表面および/または内部に形成し、高周波スイッチ回路、高周波電力増幅回路、弾性表面波フィルタ、FBARフィルタ、デュープレクサの少なくとも1つを当該誘電体多層基板の表面に搭載してなるものである。
また、本発明の無線通信機器は、前記高周波モジュールを搭載してなることによって、無線通信機器の小型化を図るとともに、通信性能を向上させることができる。
In the high frequency module of the present invention, the high frequency demultiplexing circuit is formed on the surface and / or inside of a dielectric multilayer substrate formed by laminating a plurality of dielectric layers, and a high frequency switch circuit, a high frequency power amplifier circuit, a surface acoustic wave is formed. At least one of a filter, an FBAR filter, and a duplexer is mounted on the surface of the dielectric multilayer substrate.
In addition, the wireless communication device of the present invention can reduce the size of the wireless communication device and improve the communication performance by mounting the high-frequency module.

以下、本発明の実施の形態を、添付図面を参照しながら詳細に説明する。
図1は、本発明に係る高周波分波回路DIP10を含む高周波回路の構成例を示すブロック図である。高周波回路は、GSM850方式(850MHz帯)、GSM900方式(900MHz帯)、DCS方式(1800MHz帯)、PCS方式(1900MHz帯)の4つの通過周波数帯域の異なる送受信系を取り扱う。
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 is a block diagram showing a configuration example of a high-frequency circuit including a high-frequency branching circuit DIP10 according to the present invention. The high-frequency circuit handles a transmission / reception system having different four pass frequency bands of the GSM850 system (850 MHz band), the GSM900 system (900 MHz band), the DCS system (1800 MHz band), and the PCS system (1900 MHz band).

高周波回路は、1つの共通のアンテナ端子P1と、そのアンテナ端子P1に接続され、複数の送受信系を2系統GSM850/GSM900とDCS/PCSに分ける高周波分波回路DIP10と、各送受信系GSM850/GSM900とDCS/PCSを、それぞれアンテナから入力された受信信号とアンテナに給電する送信信号とに切り替える高周波スイッチSW110、SW120と、前記高周波スイッチの状態を制御するデコーダDEC10と、高周波スイッチSW110、SW120に接続されGSM850/GSM900、DCS/PCSの各送信系の送信信号の高調波成分を減衰する低域通過フィルタLPF30、LPF40とを備えている。   The high-frequency circuit is connected to one common antenna terminal P1, the high-frequency demultiplexing circuit DIP10 that is connected to the antenna terminal P1, and divides a plurality of transmission / reception systems into two systems GSM850 / GSM900 and DCS / PCS, and each transmission / reception system GSM850 / GSM900. And DCS / PCS are connected to high-frequency switches SW110 and SW120 that switch between a reception signal input from the antenna and a transmission signal that feeds the antenna, a decoder DEC10 that controls the state of the high-frequency switch, and high-frequency switches SW110 and SW120, respectively. And low pass filters LPF30 and LPF40 for attenuating harmonic components of transmission signals of the transmission systems of GSM850 / GSM900 and DCS / PCS.

アンテナから入ってきた無線信号は、高周波分波回路DIP10に入力され、ここで特定周波数帯域の受信信号が選択的に通過される。受信信号は、高周波スイッチSW110、SW120を通過し、低雑音増幅器(図示せず)で増幅され、受信信号処理回路(図示せず)に供給される。
一方、送信信号は、所定の周波数帯域内の送信信号を通過させる高周波フィルタ(図示せず)を通ってノイズを落とされ、高周波電力増幅回路(図示せず)に供給される。高周波電力増幅回路は、この送信信号を電力増幅して前記低域通過フィルタLPF30、LPF40、高周波スイッチSW110、SW120を介して高周波分波回路DIP10に供給される。
The radio signal that has entered from the antenna is input to the high-frequency demultiplexing circuit DIP10, where a received signal in a specific frequency band is selectively passed. The received signal passes through the high frequency switches SW110 and SW120, is amplified by a low noise amplifier (not shown), and is supplied to a received signal processing circuit (not shown).
On the other hand, the transmission signal is subjected to noise reduction through a high frequency filter (not shown) that allows transmission signals in a predetermined frequency band to pass through, and is supplied to a high frequency power amplifier circuit (not shown). The high frequency power amplifier circuit amplifies the transmission signal and supplies the amplified signal to the high frequency branching circuit DIP10 via the low pass filters LPF30 and LPF40 and the high frequency switches SW110 and SW120.

図2は、図1に示す高周波分波回路DIP10の回路図である。高周波分波回路DIP10は、端子P1を介してアンテナに接続され、端子P2,P3を介して高周波スイッチSW110、SW120に接続される。
アンテナ端子P1から受信されたGSM850/GSM900方式の受信信号は、端子P2を経てGSM850/GSM900側の送受信系へ導かれ、DCS/PCS方式の受信信号は端子P3を経てDCS/PCS側の送受信系に導かれる。
FIG. 2 is a circuit diagram of the high frequency demultiplexing circuit DIP10 shown in FIG. The high-frequency branching circuit DIP10 is connected to the antenna via the terminal P1, and is connected to the high-frequency switches SW110 and SW120 via the terminals P2 and P3.
The GSM850 / GSM900 reception signal received from the antenna terminal P1 is guided to the GSM850 / GSM900 transmission / reception system via the terminal P2, and the DCS / PCS reception signal is transmitted to the DCS / PCS side transmission / reception system via the terminal P3. Led to.

まず、GSM850/GSM900側の回路について説明する。高周波分波回路DIP10は、直列に接続された2つの低域通過フィルタLPF1,LPF2を備えている。
低域通過フィルタLPF1は、インダクタンス素子を構成する伝送線路L1と、この伝送線路L1に並列に配置されたキャパシタンス素子C1と、分布定数線路L1とグランドとの間に形成されたキャパシタンス素子C3で構成されている。
First, the circuit on the GSM850 / GSM900 side will be described. The high-frequency branching circuit DIP10 includes two low-pass filters LPF1 and LPF2 connected in series.
The low-pass filter LPF1 includes a transmission line L1 constituting an inductance element, a capacitance element C1 arranged in parallel to the transmission line L1, and a capacitance element C3 formed between the distributed constant line L1 and the ground. Has been.

低域通過フィルタLPF2はインダクタンス素子を構成する伝送線路L2と、この伝送線路L2に並列に配置されたキャパシタンス素子C2と、分布定数線路L1とグランドとの間に形成されたキャパシタンス素子C4で構成されている。低域通過フィルタLPF1とLPF2は基本的な回路構成は同じであるが、各素子値が異なる。
これらの低域通過フィルタLPF1,2は、端子P2を介して入力された送信信号の高調波成分を低減させるとともに、アンテナ端子P1の受信信号の中から送受信系GSM850/GSM900の周波数帯の受信信号を選択する機能を有する。
The low-pass filter LPF2 includes a transmission line L2 constituting an inductance element, a capacitance element C2 arranged in parallel to the transmission line L2, and a capacitance element C4 formed between the distributed constant line L1 and the ground. ing. The low-pass filters LPF1 and LPF2 have the same basic circuit configuration but different element values.
These low-pass filters LPF1 and LPF2 reduce harmonic components of the transmission signal input via the terminal P2, and receive signals in the frequency band of the transmission / reception system GSM850 / GSM900 from the reception signals of the antenna terminal P1. It has a function to select.

次に、DCS/PCS側の回路は、高域通過フィルタHPF1で構成されている。HPF1は直列に接続されたキャパシタンス素子C5、C6と、これらのコンデンサ間とグランドとの間に形成された伝送線路L3と、キャパシタンス素子C5、C6に並列に接続されたキャパシタンス素子C7とで構成されている。この高域通過フィルタHPF1は、端子P3を介して入力された送信信号の低周波成分を減衰させるとともに、アンテナ端子P1から入力された受信信号の中から送受信系DCS/PCS側の周波数帯の受信信号を選択して通過させる機能を有する。さらに高域通過フィルタHPF1は、ANT端子P1に入力したESDなどのサージから高周波スイッチSW120を保護する機能を有する。   Next, the DCS / PCS side circuit is composed of a high-pass filter HPF1. The HPF 1 includes capacitance elements C5 and C6 connected in series, a transmission line L3 formed between these capacitors and the ground, and a capacitance element C7 connected in parallel to the capacitance elements C5 and C6. ing. The high-pass filter HPF1 attenuates the low-frequency component of the transmission signal input via the terminal P3, and receives a frequency band on the transmission / reception system DCS / PCS side from the reception signal input from the antenna terminal P1. It has a function to select and pass signals. Further, the high-pass filter HPF1 has a function of protecting the high-frequency switch SW120 from a surge such as ESD input to the ANT terminal P1.

本発明例では、LPF1の減衰極を低周波帯基本波の約3倍に配し、LPF2の減衰極を阻止域すなわち高周波帯に配した。
図3にP1側から見たLPF1単独の位相特性を、図4にP1側から見たLPF2単独の位相特性を、図5にLPF1とLPF2を縦続接続した場合(LPF1+LPF2と書く)のP1側から見たLPF1+LPF2の位相特性を示す。また図6にP1側から見たHPF1の位相特性を示す。
In the example of the present invention, the attenuation pole of LPF1 is arranged about three times the fundamental frequency of the low frequency band, and the attenuation pole of LPF2 is arranged in the stop band, that is, the high frequency band.
3 shows the phase characteristics of LPF1 alone viewed from the P1 side, FIG. 4 shows the phase characteristics of LPF2 alone viewed from the P1 side, and FIG. 5 shows from the P1 side when LPF1 and LPF2 are connected in cascade (LPF1 + LPF2). The phase characteristics of the viewed LPF1 + LPF2 are shown. FIG. 6 shows the phase characteristics of HPF 1 viewed from the P1 side.

黒い三角は低周波帯、黒丸は高周波帯を表す。図3〜図5の場合、黒い三角が通過域、黒丸が阻止域となり、図6の場合この逆となる。
図4ではLPF2の阻止域のインピーダンスが開放状態からずれているが、図5より、LPF1+LPF2の合成インピーダンスが、低周波帯の信号の通過域は整合状態で、阻止域が開放状態に近いインピーダンスに配置できていることが分かる。
The black triangle represents the low frequency band, and the black circle represents the high frequency band. In the case of FIGS. 3 to 5, the black triangle is the pass band and the black circle is the stop band, and the reverse is the case in FIG.
In FIG. 4, the impedance of the stop band of LPF2 deviates from the open state, but from FIG. 5, the combined impedance of LPF1 + LPF2 is a matched state in the low-frequency band signal pass band and the stop band is close to the open state. It can be seen that they are arranged.

このような状態にするためにはLPF1+LPF2の合成インピーダンスが所望の位相特性になるように、LPF1とLPF2を構成するインダクタ素子及びキャパシタンス素子の値を調整する必要がある。
低周波帯の信号、すなわち通過域を整合させるのは、LPF1とLPF2ともに通過域付近(図3、図4参照)にあるので容易である。
In order to achieve such a state, it is necessary to adjust the values of the inductor elements and the capacitance elements that constitute LPF1 and LPF2 so that the combined impedance of LPF1 + LPF2 has a desired phase characteristic.
It is easy to match the low frequency band signal, that is, the pass band, because both LPF 1 and LPF 2 are in the vicinity of the pass band (see FIGS. 3 and 4).

阻止域を開放状態の近くに合わせるためには、LPF1とLPF2のバランスを調整する必要がある。具体的には、阻止域におけるLPF1のインピーダンスを誘導性にして、阻止域におけるLPF2のインピーダンスを容量性にする。その後、LPF1、LPF2を構成するキャパシタンス素子やインダクタンス素子を微調整して所望の合成インピーダンスに合わせる。   In order to make the stop band close to the open state, it is necessary to adjust the balance of LPF1 and LPF2. Specifically, the impedance of LPF1 in the stop band is made inductive, and the impedance of LPF2 in the stop band is made capacitive. Thereafter, the capacitance elements and the inductance elements constituting the LPF 1 and LPF 2 are finely adjusted to a desired combined impedance.

本発明例では低域通過フィルタLPF1+LPF2の阻止域を誘導性にする手段として、その減衰極を低周波帯の基本波の約3倍に配した低域通過フィルタLPF1+LPF2とすることで実現した。
図7は、この低域通過フィルタLPF1+LPF2の伝送特性を示すグラフである。図7で実線は低域通過フィルタLPF1+LPF2の伝送特性を示し、破線は高域通過フィルタHPF1の伝送特性を示している。
In the present invention, the low-pass filter LPF1 + LPF2 is realized as a means for making the stop band of the low-pass filter LPF1 + LPF2 inductive by using a low-pass filter LPF1 + LPF2 whose attenuation pole is arranged about three times the fundamental wave of the low frequency band.
FIG. 7 is a graph showing the transmission characteristics of the low-pass filter LPF1 + LPF2. In FIG. 7, the solid line indicates the transmission characteristic of the low-pass filter LPF1 + LPF2, and the broken line indicates the transmission characteristic of the high-pass filter HPF1.

図18の従来の低域通過フィルタLPF3の伝送特性(実線)と比較すると、従来の低域通過フィルタPSC+LPF3では、GSM850/GSM900帯である基本波周波数(約800MHz)の2倍の周波数すなわちDCS/PCS帯の周波数(約1.6GMHz)に減衰極ができているのに対して、本発明の低域通過フィルタLPF1+LPF2では、基本波の2倍及び3倍の周波数(1.6GMHzと2.6GHz)に減衰極ができていることがわかる。   Compared with the transmission characteristic (solid line) of the conventional low-pass filter LPF3 of FIG. 18, the conventional low-pass filter PSC + LPF3 has a frequency twice the fundamental frequency (about 800 MHz) in the GSM850 / GSM900 band, that is, DCS / While the attenuation pole is formed at the frequency of the PCS band (about 1.6 GHz), the low-pass filter LPF1 + LPF2 of the present invention has frequencies twice and three times the fundamental wave (1.6 GHz and 2.6 GHz). ) Shows that an attenuation pole is formed.

この低域通過フィルタLPF1,LPF2を2段接続した構成により、従来の容量の大きな移相回路PSCを削減して、小型のLPF1に置き換えることが出来るので占有面積を約40パーセント削減でき、高周波回路の小型化が可能になる。
また大きな移相回路PSCの線路損失も削減できるので、挿入損失を約0.3dB改善した高周波回路を製作することができる。これと同時に第3次高調波を抑制することもしやすくなる。
The low-pass filters LPF1 and LPF2 connected in two stages can reduce the conventional large-capacity phase shift circuit PSC and replace it with a small LPF1, so that the occupied area can be reduced by about 40%, and the high-frequency circuit Can be miniaturized.
In addition, since the line loss of the large phase shift circuit PSC can be reduced, a high frequency circuit with improved insertion loss of about 0.3 dB can be manufactured. At the same time, it is easy to suppress the third harmonic.

図8は、本発明の高周波分波回路を誘電体多層基板内に形成した場合のパターンを示す図である。
誘電体多層基板11は、第1〜第9の誘電体層101〜109を上から順次積層することにより形成される。第3〜第8の誘電体層103〜108の上面には、キャパシタンス素子を形成するコンデンサ電極C101〜C110が形成される。また、第2〜第7の誘電体層102〜107の上面には、インダクタンス素子を構成する伝送線路の導体パターンL101〜L111が形成される。さらに第1の誘電体層101の上面には接地電極パターンG101が形成され、第9の誘電体109の下面には接地電極パターンG102が形成され、両者の4隅は貫通ビアVIA101〜104で電気的接続される。
FIG. 8 is a diagram showing a pattern when the high-frequency branching circuit of the present invention is formed in a dielectric multilayer substrate.
The dielectric multilayer substrate 11 is formed by sequentially laminating first to ninth dielectric layers 101 to 109 from above. Capacitor electrodes C101 to C110 that form capacitance elements are formed on the top surfaces of the third to eighth dielectric layers 103 to 108. In addition, transmission line conductor patterns L101 to L111 constituting inductance elements are formed on the top surfaces of the second to seventh dielectric layers 102 to 107, respectively. Further, a ground electrode pattern G101 is formed on the upper surface of the first dielectric layer 101, and a ground electrode pattern G102 is formed on the lower surface of the ninth dielectric 109. The four corners of both are electrically connected by through vias VIA101 to 104. Connected.

第9の誘電体109の下面には第1〜第3の端子P1〜P3となる電極端子T101、T102、T103が形成される。そしてコンデンサ電極C110と電極端子T101でキャパシタンス素子C1を、コンデンサ電極C109と接地電極G102でキャパシタンス素子C3を、コンデンサ電極C101、C103、C105、C107、C108でキャパシタンス素子C2を、コンデンサ電極C101と接地電極G101でキャパシタンス素子C4を、コンデンサ電極C102、C104でキャパシタンス素子C5を、コンデンサ電極C104、C106でキャパシタンス素子C6を、コンデンサ電極C102、C106でキャパシタンス素子C7を形成する。   On the lower surface of the ninth dielectric 109, electrode terminals T101, T102, and T103 to be the first to third terminals P1 to P3 are formed. The capacitor electrode C110 and the electrode terminal T101, the capacitance element C1, the capacitor electrode C109 and the ground electrode G102, the capacitance element C3, the capacitor electrodes C101, C103, C105, C107, and C108, the capacitance element C2, and the capacitor electrode C101 and the ground electrode. G101 forms a capacitance element C4, capacitor electrodes C102 and C104 form a capacitance element C5, capacitor electrodes C104 and C106 form a capacitance element C6, and capacitor electrodes C102 and C106 form a capacitance element C7.

コンデンサ電極C101、C105、C108は貫通ビアVIA111で電気的接続され、コンデンサ電極C103、C107は貫通ビアVIA112で電気的接続される。
また、伝送線路の導体パターンL101、L102、L104、L106、L109は、貫通ビアVIA105、VIA106、VIA107、VIA108を介して電気的接続されることにより伝送線路L1を形成する。伝送線路の導体パターンL103、L107、L111は、貫通ビアVIA113、VIA114を介して電気的接続されることにより伝送線路L2を形成する。伝送線路の導体パターンL105、L108、L110は、貫通ビアVIA117、VIA118を介して電気的接続された後に貫通ビアVIA119を介して接地電極G102に電気的接続されることにより、伝送線路L3を形成する。
The capacitor electrodes C101, C105, and C108 are electrically connected by through vias VIA111, and the capacitor electrodes C103 and C107 are electrically connected by through vias VIA112.
Further, the transmission line conductor patterns L101, L102, L104, L106, and L109 are electrically connected through the through vias VIA105, VIA106, VIA107, and VIA108 to form the transmission line L1. The transmission line conductor patterns L103, L107, and L111 are electrically connected via through vias VIA113 and VIA114 to form the transmission line L2. The transmission line conductor patterns L105, L108, and L110 are electrically connected through the through vias VIA117 and VIA118, and then electrically connected to the ground electrode G102 through the through vias VIA119, thereby forming the transmission line L3. .

また、電極端子T101と伝送線路の導体パターンL109は、貫通ビアVIA109を介して電気的接続されており、電極端子T103はコンデンサ電極C102と貫通ビアVIA115を介して電気的接続されている。またLPF1とLPF2は、伝送線路の導体パターンL101とL111を貫通ビアVIA110で接続され、端子P1とHPF1は外部端子T101と接続された貫通ビアVIA109から伝送線路112に分岐して貫通ビアVIA116を介して接続される。LPF2と端子P2の接続は、貫通ビアVIA111に接続された伝送線路111と電極端子T102を貫通ビアVIA120を介して電気的接続することでなされる。   Further, the electrode terminal T101 and the conductor pattern L109 of the transmission line are electrically connected through the through via VIA 109, and the electrode terminal T103 is electrically connected through the capacitor electrode C102 and the through via VIA115. LPF1 and LPF2 have transmission line conductor patterns L101 and L111 connected by through vias VIA110, and terminals P1 and HPF1 branch from through vias VIA109 connected to external terminals T101 to transmission lines 112 and through through vias VIA116. Connected. The LPF 2 and the terminal P2 are connected by electrically connecting the transmission line 111 connected to the through via VIA 111 and the electrode terminal T102 via the through via VIA 120.

図9は、誘電体層101〜109の、一部領域Aのみを破線で囲って描いた図である。この領域Aは、接地電極G102を切り欠いて外部端子T101を形成した領域を示しており、伝送線路L1を形成する導体パターンL101、L102、L104、L106、L109及びコンデンサ電極C110がこの領域A内に収められている。このように、低域通過フィルタLPF1を構成するノッチ回路を形成した部分には、接地電極G102がないので、接地電極G102との不要な接地間寄生容量を低減することが出来るので電気特性を良好に保つことが出来る。   FIG. 9 is a diagram in which only a partial area A of the dielectric layers 101 to 109 is surrounded by a broken line. This region A shows a region in which the ground electrode G102 is cut out to form the external terminal T101, and the conductor patterns L101, L102, L104, L106, L109 and the capacitor electrode C110 forming the transmission line L1 are in this region A. It is contained in. As described above, since the ground electrode G102 is not provided in the portion where the notch circuit constituting the low-pass filter LPF1 is formed, unnecessary parasitic capacitance between the ground electrode G102 and the ground electrode G102 can be reduced. Can be kept.

また、図10の領域Bはコンデンサ電極C109の形成領域を示しており、伝送線路L2を形成する導体パターンL103、L107、L111及びコンデンサ電極C101、C103、C105、C107、C108がこの領域B内に収められている。つまり、接地電極G102とコンデンサ電極C109によって形成された接地間容量を形成するコンデンサC3上に、低域通過フィルタLPF2を配置してなる。これにより、コンデンサ電極C109が伝送線路の導体パターンL103、L107、L111及びコンデンサ電極C101、C103、C105、C107、C108と接地電極G102間に生じ得る不要な接地間寄生容量を低減するシールドの役割を果たすので、電気特性を良好に保つことが出来る。   A region B in FIG. 10 shows a region where the capacitor electrode C109 is formed. The conductor patterns L103, L107, and L111 and the capacitor electrodes C101, C103, C105, C107, and C108 that form the transmission line L2 are included in the region B. It is stored. That is, the low-pass filter LPF2 is arranged on the capacitor C3 that forms the capacitance between the ground formed by the ground electrode G102 and the capacitor electrode C109. Thus, the capacitor electrode C109 serves as a shield that reduces unnecessary ground-to-ground parasitic capacitance that can occur between the conductor patterns L103, L107, and L111 of the transmission line and the capacitor electrodes C101, C103, C105, C107, and C108 and the ground electrode G102. Therefore, the electrical characteristics can be kept good.

本発明の高周波分波回路は、分波機能を具備したチップ状の分波器や、高周波モジュールの中に組み込んで利用される。
図11は、本発明に係る高周波分波回路を具備した分波器10の斜視図である。図8〜10の高周波分波回路は、セラミックなどからなる同一寸法形状の複数の誘電体層が積層された誘電体多層基板内に構成されている。このようなチップ状部品の場合、図8の電極端子は対称位置に設けられ、図11においては誘電体多層基板の側面に、複数の電極端子12が設けられている。
The high frequency demultiplexing circuit of the present invention is used by being incorporated in a chip demultiplexer having a demultiplexing function or a high frequency module.
FIG. 11 is a perspective view of the duplexer 10 including the high-frequency branching circuit according to the present invention. 8 to 10 is configured in a dielectric multilayer substrate in which a plurality of dielectric layers of the same size and shape made of ceramic or the like are laminated. In the case of such a chip-like component, the electrode terminals in FIG. 8 are provided at symmetrical positions. In FIG. 11, a plurality of electrode terminals 12 are provided on the side surface of the dielectric multilayer substrate.

図12は、誘電体多層基板11の各誘電体層に形成された、内部素子である、分布定数線路、結合線路、分布型コンデンサ、抵抗などの導体パターン52,53を模式的に示した断面図である。54は、各誘電体層にわたって、回路を縦に接続するため必要なビアホール導体を示す。
図13は、本発明の高周波分波回路を内蔵した高周波モジュール13を示す斜視図である。高周波モジュール13は、誘電体多層基板11の内部に高周波分波回路を形成し、誘電体多層基板11の上面に、高周波電力増幅回路を構成する半導体集積回路素子82、表面弾性波フィルタ、FBARフィルタ、デュープレクサなどの素子83、前記高周波スイッチSW100を構成する半導体集積回路素子84などを実装している。また、誘電体多層基板11の内部には、前記分波器10の他、低域通過フィルタLPF30、LPF40、送信電力をモニタするための方向性結合器、高周波電力増幅回路の出力インピーダンスを特性インピーダンスにマッチさせるための出力整合回路などを形成している。85は、誘電体多層基板11の底面に形成された外部接続端子である。この高周波モジュール13は、携帯電話機、PDFなど小型軽量の要求される無線通信機器に好適に搭載され、マザーボード基板表面に実装、搭載される。
FIG. 12 is a cross-sectional view schematically showing conductor patterns 52 and 53 such as distributed constant lines, coupled lines, distributed capacitors, resistors, etc., which are internal elements formed in each dielectric layer of the dielectric multilayer substrate 11. FIG. Reference numeral 54 denotes a via-hole conductor necessary for vertically connecting the circuits across each dielectric layer.
FIG. 13 is a perspective view showing a high-frequency module 13 incorporating the high-frequency branching circuit of the present invention. The high-frequency module 13 forms a high-frequency branching circuit inside the dielectric multilayer substrate 11, and a semiconductor integrated circuit element 82, a surface acoustic wave filter, and an FBAR filter constituting a high-frequency power amplifier circuit on the top surface of the dielectric multilayer substrate 11. A device 83 such as a duplexer, a semiconductor integrated circuit device 84 constituting the high-frequency switch SW100, and the like are mounted. In addition, in the dielectric multilayer substrate 11, in addition to the duplexer 10, the low-pass filters LPF30 and LPF40, a directional coupler for monitoring transmission power, and the output impedance of the high-frequency power amplifier circuit are characteristic impedances. An output matching circuit or the like for matching is formed. Reference numeral 85 denotes an external connection terminal formed on the bottom surface of the dielectric multilayer substrate 11. The high-frequency module 13 is preferably mounted on a wireless communication device that is required to be small and light, such as a mobile phone or PDF, and is mounted and mounted on the surface of the motherboard substrate.

上記分波器10や高周波モジュール13における誘電体層は、例えば、ガラスエポキシ樹脂などの有機系誘電体基板に対して、銅箔などの導体によって導体パターンを形成し、積層して熱硬化させたもの、又は、セラミック材料などの無機系誘電体層に種々の導体パターンを形成し、これらを積層後同時に焼成したものが用いられる。
特に、セラミック材料を用いれば、セラミック誘電体の比誘電率は通常9から25と、樹脂基板に比べて高いので、誘電体層を薄くでき、誘電体層に内装された回路の素子のサイズを小さくでき、素子間距離も狭くすることができる。
The dielectric layer in the duplexer 10 or the high frequency module 13 is formed by forming a conductor pattern with a conductor such as copper foil on an organic dielectric substrate such as glass epoxy resin, and laminating and thermosetting the conductive layer. Or various conductor patterns formed on an inorganic dielectric layer such as a ceramic material, and these are laminated and fired at the same time.
In particular, if a ceramic material is used, the dielectric constant of the ceramic dielectric is usually 9 to 25, which is higher than that of the resin substrate. Therefore, the dielectric layer can be made thinner, and the size of the circuit element embedded in the dielectric layer can be reduced. The distance between the elements can be reduced, and the distance between the elements can also be reduced.

とりわけ、ガラスセラミックスなどの低温で焼成が可能なセラミック材料を用いると、導体パターンを低抵抗の銅、銀などによって形成することができるので望ましい。また、ビアホール導体は、誘電体層に形成した貫通孔にメッキ処理するか、導体ペーストを充填するかして形成される。
以上で、本発明の実施の形態を説明したが、本発明の実施は、前記の形態に限定されるものではない。例えば前記実施の形態ではLPF1の減衰極を低周波帯の基本波の約3倍に合わせたが、基本波の約n倍(n≧3)に減衰極が配されるように調整してもよい。また、前記実施形態ではGSM850系(850MHz帯)/GSM900系(900MHz帯),およびDCS系(1800MHz帯)/PCS系(1900MHz帯)の2乃至4送受信系を搭載したマルチバンドの携帯電話機について示したが、CDMA方式の800MHz帯と1900MHz帯の2送受信系を搭載したマルチバンド方式の携帯電話機や、GSM系とCDMA系を組み合わせたマルチバンド方式の携帯電話機であってもよい。その他、本発明の範囲内で種々の変更を施すことが可能である。
In particular, it is desirable to use a ceramic material that can be fired at a low temperature, such as glass ceramics, because the conductor pattern can be formed of low resistance copper, silver, or the like. The via-hole conductor is formed by plating a through hole formed in the dielectric layer or filling a conductor paste.
Although the embodiments of the present invention have been described above, the embodiments of the present invention are not limited to the above-described embodiments. For example, in the above-described embodiment, the attenuation pole of the LPF 1 is adjusted to about three times the fundamental wave of the low frequency band. However, even if the attenuation pole is adjusted to be arranged about n times the fundamental wave (n ≧ 3). Good. In the above embodiment, a multi-band mobile phone equipped with 2 to 4 transmission / reception systems of GSM850 system (850 MHz band) / GSM900 system (900 MHz band) and DCS system (1800 MHz band) / PCS system (1900 MHz band) is shown. However, it may be a multiband mobile phone equipped with two CDMA 800 MHz band and 1900 MHz band transmission / reception systems, or a multiband mobile phone combining a GSM system and a CDMA system. In addition, various modifications can be made within the scope of the present invention.

本発明に係る高周波分波回路DIP10の回路構成例を示すブロック図である。It is a block diagram which shows the circuit structural example of the high frequency branching circuit DIP10 which concerns on this invention. 図1に示す高周波分波回路DIP10の回路図である。FIG. 2 is a circuit diagram of a high frequency branching circuit DIP10 shown in FIG. P1側から見たLPF1単独の位相特性を示すスミスチャートである。It is a Smith chart which shows the phase characteristic of LPF1 independent seen from P1 side. P1側から見たLPF2単独の位相特性を示すスミスチャートである。It is a Smith chart which shows the phase characteristic of LPF2 independent seen from P1 side. LPF1とLPF2を縦続接続した場合(LPF1+LPF2)のP1側から見たLPF1+LPF2の位相特性を示すスミスチャートである。6 is a Smith chart showing the phase characteristics of LPF1 + LPF2 viewed from the P1 side when LPF1 and LPF2 are connected in cascade (LPF1 + LPF2). P1側から見たHPF1の位相特性を示すスミスチャートである。It is a Smith chart which shows the phase characteristic of HPF1 seen from the P1 side. 低域通過フィルタLPF1+LPF2の伝送特性を示すグラフである。It is a graph which shows the transmission characteristic of low-pass filter LPF1 + LPF2. 本発明の高周波分波回路を誘電体多層基板内に形成した場合のパターンを示す図である。It is a figure which shows the pattern at the time of forming the high frequency branching circuit of this invention in a dielectric multilayer substrate. 誘電体層101〜109の、一部領域Aのみを破線で囲って描いた図である。It is the figure which surrounded only the partial area | region A of the dielectric material layers 101-109 with the broken line. 誘電体層101〜109の、一部領域Bのみを破線で囲って描いた図である。It is the figure which surrounded only the partial area | region B of the dielectric material layers 101-109 with the broken line. 本発明に係る高周波分波回路を具備した分波器10の斜視図である。1 is a perspective view of a duplexer 10 equipped with a high frequency branching circuit according to the present invention. 誘電体多層基板11の各誘電体層に形成された、内部素子である、分布定数線路、結合線路、分布型コンデンサ、抵抗などの導体パターン52,53を模式的に示す断面図である。3 is a cross-sectional view schematically showing conductor patterns 52 and 53 such as distributed constant lines, coupled lines, distributed capacitors, resistors, etc., which are internal elements, formed in each dielectric layer of the dielectric multilayer substrate 11. FIG. 本発明の高周波分波回路を内蔵した高周波モジュール13を示す斜視図である。It is a perspective view which shows the high frequency module 13 incorporating the high frequency branching circuit of this invention. 従来の高周波分波回路の回路図を示す。The circuit diagram of the conventional high frequency branching circuit is shown. 従来の高周波分波回路におけるLPF3のみをP1側から見た位相特性を示すスミスチャートである。It is a Smith chart which shows the phase characteristic which looked at only LPF3 in the conventional high frequency branching circuit from the P1 side. 従来の高周波分波回路におけるLPF3の前段に移相回路PSCを挿入した場合のP1側から見た位相特性を示すスミスチャートである。It is a Smith chart which shows the phase characteristic seen from the P1 side at the time of inserting the phase shift circuit PSC in the front | former stage of LPF3 in the conventional high frequency branching circuit. 従来の高周波分波回路におけるHPF2をP1側から見た位相特性を示すスミスチャートである。It is a Smith chart which shows the phase characteristic which looked at HPF2 in the conventional high frequency branching circuit from the P1 side. 従来の高周波分波回路の伝送特性を示すグラフである。It is a graph which shows the transmission characteristic of the conventional high frequency branching circuit.

符号の説明Explanation of symbols

10 分波器
11 誘電体多層基板
12 外部接続端子
13 高周波モジュール
52 インダクタンス素子を構成する導体パターン
53 キャパシタンス素子を構成する導体パターン
54 ビアホール導体
82,84 半導体集積回路素子
83 表面弾性波フィルタ
85 外部接続端子
101〜109 誘電体層
111、112 伝送線路
C1〜C7、C9〜C13 キャパシタンス素子
C8 移相用接地容量
C101〜C110 コンデンサ電極
DIP10 高周波分波回路
G101、G102 接地電極
HPF 高域通過フィルタ
L1〜L3、L5、L6 インダクタンス素子
L4 移相線路
L101〜L111 伝送線路
LPF 低域通過フィルタ
P1〜P3 端子
PSC 移相回路
SW110、SW120 高周波スイッチ回路
T101〜T103 外部端子
VIA101〜VIA120 貫通ビア
10 Demultiplexer 11 Dielectric multilayer substrate 12 External connection terminal 13 High frequency module 52 Conductor pattern 53 constituting inductance element Conductor pattern 54 constituting capacitance element Via-hole conductors 82 and 84 Semiconductor integrated circuit element 83 Surface acoustic wave filter 85 External connection Terminals 101-109 Dielectric layers 111, 112 Transmission lines C1-C7, C9-C13 Capacitance element C8 Phase-shifting ground capacitances C101-C110 Capacitor electrode DIP10 High-frequency branching circuit G101, G102 Ground electrode HPF High-pass filters L1-L3 , L5, L6 Inductance element L4 Phase shift line L101-L111 Transmission line LPF Low pass filter P1-P3 Terminal PSC Phase shift circuit SW110, SW120 High frequency switch circuit T101-T103 External terminal VIA10 ~VIA120 through vias

Claims (8)

通過周波数帯域の異なる複数の送受信系を各送受信系に分ける機能を持つ高周波分波回路において、
インダクタンス素子及びキャパシタンス素子を含む低周波帯用フィルタと、高周波帯用フィルタとを備え、
前記低周波帯用のフィルタは、インダクタンス素子を構成する伝送線路とキャパシタンス素子とを並列接続してなるノッチ回路の一端に接地間容量を形成した第1の低域通過フィルタ回路と、同じ構成を有する第2の低域通過フィルタ回路とを縦続接続して構成したものであり、
前記第1、第2の低域通過フィルタ回路のうち、一方の低域通過フィルタ回路の減衰極を、当該低周波帯用のフィルタの通過周波数帯域よりも高周波側に配し、他方の低域通過フィルタの減衰極を、当該低周波帯用のフィルタの通過周波数帯域の約n倍(n≧3)の周波数に配したことを特徴とする高周波分波回路。
In a high frequency demultiplexing circuit having a function of dividing a plurality of transmission / reception systems having different pass frequency bands into each transmission / reception system
A low frequency band filter including an inductance element and a capacitance element, and a high frequency band filter,
The filter for the low frequency band has the same configuration as the first low-pass filter circuit in which a capacitance between the grounds is formed at one end of a notch circuit formed by connecting a transmission line and a capacitance element forming an inductance element in parallel. A second low-pass filter circuit having a cascade connection;
Of the first and second low-pass filter circuits, the attenuation pole of one low-pass filter circuit is arranged on the higher frequency side than the pass frequency band of the low-frequency band filter, and the other low-pass filter circuit A high-frequency branching circuit characterized in that the attenuation pole of the pass filter is arranged at a frequency about n times (n ≧ 3) the pass frequency band of the low-frequency band filter.
前記一方の低域通過フィルタ回路の減衰極を、高周波帯用のフィルタの通過周波数帯域に設けている請求項1記載の高周波分波回路。   The high-frequency branching circuit according to claim 1, wherein the attenuation pole of the one low-pass filter circuit is provided in a pass frequency band of a filter for a high-frequency band. 前記高周波帯用フィルタは、少なくとも2個のキャパシタンス素子を直列接続して、一端を接地したインダクタンス素子を構成する伝送線路を前記少なくとも2個のキャパシタンス素子の接続点に接続し、前記直列接続したキャパシタンス素子の両端にさらにキャパシタンス素子を接続したものである請求項1又は請求項2記載の高周波分波回路。   In the high frequency band filter, at least two capacitance elements are connected in series, a transmission line constituting an inductance element having one end grounded is connected to a connection point of the at least two capacitance elements, and the series connected capacitances are connected. The high-frequency branching circuit according to claim 1 or 2, wherein a capacitance element is further connected to both ends of the element. 請求項1〜請求項3のいずれかに記載の高周波分波回路を搭載した高周波部品であって、
複数の誘電体層が積層されてなる誘電体多層基板の表面および/または内部に、前記高周波分波回路を形成してなる高周波部品。
A high-frequency component equipped with the high-frequency branching circuit according to any one of claims 1 to 3,
A high-frequency component formed by forming the high-frequency branching circuit on and / or inside a dielectric multilayer substrate formed by laminating a plurality of dielectric layers.
一方の低域通過フィルタの構成要素であるノッチ回路を、誘電体多層基板裏面の接地電極のない領域の上部に形成した請求項4記載の高周波部品。   5. The high-frequency component according to claim 4, wherein a notch circuit, which is a constituent element of one of the low-pass filters, is formed on an upper portion of a region having no ground electrode on the back surface of the dielectric multilayer substrate. 他方の低域通過フィルタを、前記一方の低域通過フィルタの構成要素である接地間容量を形成する接地対向電極の上部に配した請求項5記載の高周波部品。   6. The high-frequency component according to claim 5, wherein the other low-pass filter is disposed on an upper part of a grounding counter electrode that forms a capacitance between the grounds that is a component of the one low-pass filter. 請求項1〜請求項3のいずれかに記載の高周波分波回路を、複数の誘電体層が積層されてなる誘電体多層基板の表面および/または内部に形成し、高周波スイッチ回路、高周波電力増幅回路、弾性表面波フィルタ、FBARフィルタ、デュープレクサの少なくとも1つを当該誘電体多層基板の表面に搭載してなることを特徴とする高周波モジュール。   The high frequency branching circuit according to any one of claims 1 to 3 is formed on a surface and / or inside of a dielectric multilayer substrate in which a plurality of dielectric layers are laminated, and a high frequency switch circuit, a high frequency power amplification A high frequency module comprising at least one of a circuit, a surface acoustic wave filter, an FBAR filter, and a duplexer mounted on a surface of the dielectric multilayer substrate. 前記請求項7記載の高周波モジュールを搭載してなる無線通信機器。
A wireless communication device on which the high-frequency module according to claim 7 is mounted.
JP2003373160A 2003-10-31 2003-10-31 High frequency demultiplexer circuit, a high frequency component with the same packaged therein, high frequency module and radio communication apparatus Pending JP2005136888A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011238858A (en) * 2010-05-12 2011-11-24 Sumitomo Electric Ind Ltd Optical semiconductor device
WO2018043206A1 (en) * 2016-09-05 2018-03-08 株式会社村田製作所 Lc filter, high frequency front end circuit, and communication device
JP2021019304A (en) * 2019-07-22 2021-02-15 株式会社村田製作所 Diplexer

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011238858A (en) * 2010-05-12 2011-11-24 Sumitomo Electric Ind Ltd Optical semiconductor device
WO2018043206A1 (en) * 2016-09-05 2018-03-08 株式会社村田製作所 Lc filter, high frequency front end circuit, and communication device
US10873309B2 (en) 2016-09-05 2020-12-22 Murata Manufacturing Co., Ltd. LC filter, radio-frequency front-end circuit, and communication device
JP2021019304A (en) * 2019-07-22 2021-02-15 株式会社村田製作所 Diplexer
JP7352145B2 (en) 2019-07-22 2023-09-28 株式会社村田製作所 diplexer

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