JP2008271420A - Switch module - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a switch module preventing interference from being caused even when a multilayered substrate is reduced in size, and providing excellent electrical characteristics. <P>SOLUTION: The switch module compatible with a plurality of communication systems comprises a FET switch for switching a transmission route through which a transmitting/receiving signal of a communication system passes and a plurality of filter circuits connected to the FET switch circuit. At least a part of an inductor and a capacitor constituting a filter circuit is formed from an electrode pattern formed on a dielectric layer of a multilayered substrate, a switching element is mounted on the multilayered substrate. On a bottom surface of the multilayered substrate, a control terminal connected with a control signal input port of the FET switch circuit, a ground terminal and a high frequency terminal are provided. On a dielectric layer of a bottom surface side of the multilayered substrate, a first ground electrode is formed, and on a dielectric layer thereabove, a second ground electrode is formed. On a dielectric layer between the first ground electrode and the second ground electrode, a plurality of control signal lines are formed but no inductor electrode pattern is formed. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a switch circuit that is used in a high-frequency circuit compatible with a plurality of communication systems, and that switches a transmission / reception signal transmission path of the communication system and includes a plurality of filter circuits.

There are various access methods for mobile phones in the world, and a plurality of access methods are mixed in each region. For example, one of the access methods that are currently mainstream is the TDMA (Time Division Multiple Access) method. As main communication systems adopting this TDMA system, PDC (Personal Digital Cellular) in Japan, GSM900 (Global System for Mobile Communications) mainly in Europe and DCS1800 (Digital Cellular System 1800 mainly in the United States), and the United States. There are methods (systems) such as GSM850 and DCS1900 (PCS (Personal Communications Service)).
In addition, there is a CDMA (Code Division Multiple Access) method as an access method that has recently become widespread in the United States, South Korea, and Japan. A typical standard is IS-95 (Interim Standard-95) centered on the United States, and W-CDMA (Wideband CDMA), which is a third generation communication system capable of realizing high-speed data transmission, has been put into practical use. In Europe, a communication system called UMTS (Universal Mobile Telecommunications System) is a European standard for IMT-2000-compliant communication systems, and there is a system that selects from both W-CDMA and TD-CDMA systems. In this way, various communication methods are used in various countries around the world.

Conventional mobile phones have been designed for one communication system, for example GSM. However, due to the recent increase in the number of users and user convenience, multiband mobile phones that can use a plurality of communication methods and access methods have been put into practical use, and there is also a demand for mobile phones that are more than a Quattro band. In such a high-frequency circuit of a multi-band mobile phone, if a high-frequency component is simply provided for each communication method, the high-frequency circuit increases in size. Therefore, in order to reduce the size, high-frequency components of different communication methods are shared and combined. Is underway.
As an example, Patent Document 1 discloses a switch module that switches between a transmission circuit and a reception circuit of a plurality of different communication systems. The switch module includes a first filter circuit and a second filter circuit having different passbands, a switch circuit connected to the first filter circuit to switch the transmission circuit and the reception circuit of the communication system A, and a second A switch circuit connected to the filter circuit to switch between the transmission circuit of the communication systems B and C, the reception circuit of the communication system B, and the reception circuit of the communication system C, wherein the first and second filter circuits are separated; By functioning as a wave circuit, it supports a plurality of communication systems.

This switch module is used for a mobile phone (multi-band mobile phone) that can use a plurality of communication systems.
The switch circuit is a diode switch having a diode and a transmission line as main elements, and a voltage is applied to the diode from a control circuit to control the on state / off state, whereby a plurality of communication systems A, B, and C are controlled. Any one is selected, and the transmission circuit and the reception circuit of the antenna and the communication systems A, B, and C are switched.

In such a diode switch, a PIN diode is exclusively used. In order to achieve a low insertion loss, it is necessary to pass a sufficient current through the PIN diode, but the power consumption increases accordingly. In a cell phone driven by a battery, since low power consumption is desired, Patent Document 2 discloses a switch module using a field-effect transistor (FET) that saves power compared to a PIN diode. Has been proposed.
WO00 / 55983 (Fig. 2) JP 2002-185356 (FIG. 1)

In such a switch module, it is necessary to configure many circuit elements on a multilayer board, wiring in the multilayer board becomes complicated, and mutual interference between electrode patterns constituting different circuit elements tends to occur. In some cases, a signal leaks to another path due to interference, and the insertion loss characteristic deteriorates.
SUMMARY OF THE INVENTION An object of the present invention is to provide a switch module that handles a plurality of transmission / reception systems and that is less likely to cause interference even when a multilayer substrate is downsized, and that provides excellent electrical characteristics.

  The present invention relates to a plurality of communication systems, and is a switch module including an FET switch circuit that switches a transmission path through which a transmission / reception signal of the communication system passes, and a plurality of filter circuits connected to the FET switch circuit. The electrode pattern formed on the dielectric layer of the multilayer substrate forms at least part of an inductor and a capacitor constituting the filter circuit, and a switching element is mounted on the multilayer substrate. A control terminal connected to the control signal input port of the FET switch circuit, a ground terminal, and a high-frequency terminal are provided. A first ground electrode is formed on the dielectric layer on the bottom side of the multilayer substrate, and the upper dielectric layer The second ground electrode is formed on the dielectric layer between the first ground electrode and the second ground electrode. While control signal line is formed, the electrode pattern for said inductor is a switch module, characterized in that not formed.

The inventors of the present invention have interfered with an electrode pattern constituting a control signal line and an electrode pattern constituting an inductor of a filter circuit or a matching circuit arranged in a signal path, and a part of a transmission signal or a reception signal is It has been found that leakage to the control terminal via the control signal line causes attenuation of the signal in the transmission frequency band or the reception frequency band, thereby degrading the insertion loss characteristic.
Within the region regulated by the external dimensions of the switch module, it is not necessary to form the electrode pattern constituting the inductor such as the filter circuit so as not to interfere with the electrode pattern constituting the control signal line in the multilayer substrate. In many cases, this is difficult due to the configuration of the connection line by the terminal arrangement of the FET switch or the switch module, the arrangement of the filter circuit, the matching circuit, or the like. Accordingly, the present inventors have conceived that the control signal line is formed in a region surrounded by the ground electrode, thereby suppressing interference with other electrode patterns and preventing signal leakage to the control terminal.

The second ground electrode is formed so as to cover substantially the entire region where the control signal line is formed, and an inductor electrode pattern is formed on the upper dielectric layer. With such a configuration, the control signal line and the inductor electrode pattern do not interfere with each other. Further, it is also preferable that a part of the second ground electrode is a cut-out part where no electrode is formed, and a via hole is formed therein to connect the control signal line and the control signal input port of the FET switch. A conductor is disposed in the via hole so that electrical connection is possible. It is often formed of a conductive material similar to that of the electrode pattern, and may be densely filled or may have a gap in part and may be referred to as a through hole.
In the present invention, the first ground electrode and the second ground electrode are electrically connected to each other through via holes to stabilize the ground potential. A capacitor electrode pattern may be further formed on the dielectric layer on which the control signal line is formed. By constituting in the same layer, the number of laminated layers can be reduced, and the electrode pattern formation density per layer can be increased. The capacitor electrode pattern is preferably a ground capacitor of a filter circuit that is not easily affected by the control signal line.
When the capacitor electrode pattern is formed in the same layer together with the control signal line, the capacitor electrode pattern is connected to the inductor electrode pattern on the dielectric layer on the upper side of the second ground electrode through the via hole provided in the cut-out portion. Is also preferable.

In the present invention, a plurality of acoustic wave filters connected to the FET switch circuit are mounted on a multilayer substrate, and the balanced port of the acoustic wave filter is connected to the output terminal of the high frequency terminals via the first via hole group that is continuous in the stacking direction. Connected between the first via hole group and the control signal line, the first ground electrode and the second ground electrode are connected, and further connected to the ground electrode formed in the upper layer and continuous in the stacking direction. It is preferable to form the second via hole group. With such a configuration, the path of the received signal that is susceptible to noise can be arranged separately from the path of the control signal and the path of the transmission signal.
The ground port of the acoustic wave filter is preferably connected to the first ground electrode and the second ground electrode through a via hole. By connecting a ground electrode having a stable ground potential and an acoustic wave filter, excellent filter characteristics are exhibited.
In some cases, matching circuits composed of inductors and capacitors are connected. However, when these are formed with electrode patterns, there is no overlap in the stacking direction with the electrode patterns for inductors and capacitor electrodes that make up the filter circuit. It is preferable to do so. When electrode patterns overlap, it is preferable to prevent interference by arranging a ground electrode in between.

  According to the present invention, in a switch module that handles a plurality of transmission / reception systems, it is possible to provide a switch module that is unlikely to cause interference even if the multilayer substrate is downsized.

  FIG. 1 is a block diagram of a high-frequency circuit of a wireless communication device, which is configured using a high-frequency switch module according to an embodiment of the present invention. Hereinafter, several communication methods will be described by way of example. The frequency band of each communication method is as shown in Table 1, and transmission / reception is based on a wireless communication device terminal. Since the communication method is well known, a detailed description thereof will be omitted. Further, the communication method in which the present invention is used is not limited to the illustrated communication system, and can be used for GPS, other CDMA methods, and the like.

  This switch module is used for four communication systems, and includes a first communication system (for example, GSM850) in the frequency band f1, a second communication system (for example, DCS1800) in the frequency band f2, and a third communication in the frequency band f3. A switching circuit using a field effect transistor that is used in a high-frequency circuit corresponding to a method (for example, DCS1900) and a fourth communication method (for example, UMTS) in the frequency band f4, It has at least a branching circuit connected to the switch circuit and a low-pass filter.

  The switch circuit is an SP5T FET switch SW having six ports, and a filter circuit 10 is connected to a first port (common port) a via an ESD (electro-static discharge) countermeasure circuit 20. Is connected. A filter circuit 30, a matching circuit 86, and a DC cut capacitor C3 (not shown in FIG. 1) are connected to the second port b. A DC cut capacitor C2 (not shown in FIG. 1), a filter circuit 40, and a matching circuit 87 are connected to the third port c. The matching circuit 88 and the filter circuit 50 are connected to the fourth port d at the subsequent stage of the branching circuit 120 and the filter circuit 120a constituting the branching circuit 120. A matching circuit 80 and a filter circuit 55 are connected to the filter circuit 120b constituting the branching circuit 120. A matching circuit 85 and a filter circuit 60 are connected to the fifth port e, and a matching circuit 90 is connected to the sixth port f.

The filter circuit 10 is a low-pass filter that attenuates the third harmonic component of the transmission signal of the first communication system. The filter circuit 30 is a low-pass filter that passes the transmission signal of the first communication method. A band pass filter may be used. The filter circuit 40 is a low-pass filter that passes transmission signals of the second communication method and the third communication method. In this case, a band pass filter may be used. The filter circuit 50 is a band-pass filter that passes the received signal of the first communication method, the filter circuit 55 is a band-pass filter that passes the received signal of the third communication method, and the filter circuit 60 is the second pass filter. It is a band-pass filter that allows a communication system received signal to pass through. In this embodiment, unbalanced input-balanced output elastic wave filters are used as the filter circuit 50, the filter circuit 55, and the filter circuit 60. As the acoustic wave filter, a SAW filter, a BAW filter, and a boundary acoustic wave filter can be used.
The demultiplexing circuit 120 is formed by connecting in parallel a low-pass filter 120a that passes the reception signal of the first communication method and a high-pass filter 120b that passes the reception signal of the third communication method. The matching circuits 80, 85, 86, 87, 88, 90 are mainly used for impedance matching, but may be used for phase adjustment of a high-frequency signal.

FIG. 2 is an equivalent circuit illustrating an example of the high frequency switch.
This switch is a FET switch using a GaAs MESFET (GaAs Metal Semiconductor Field Effect Transistor), and is a high frequency switch of one terminal pair and five terminals. This FET switch includes ten field effect transistors 111 to 120, a resistor R provided on each of these gate electrodes, a ground capacitor C connected to the source electrode, and a coupling capacitor C arranged on the signal path. It is configured.
In each resistor R, the ends opposite to the ends connected to the gate electrodes of the field effect transistors 111 to 120 are connected to the control terminals CNT1-1 to CNT5-2, respectively. The FET switch incorporates a decoder 70 that decodes an external switching signal, and the decoder 70 is provided with four control terminals V1, V2, V3, and Vdd. A signal is input. For example, when the transmission signal from the transmission circuit is radiated from the antenna ANT, when the port 100a and the port 100b are connected, the port a and the port b of the FET switch SW are set based on the switching signal input from the outside. Connecting. The configuration of the decoder 70 is omitted.

In the present invention, the filter circuits 10, 30, and 40 are arranged before and after the FET switch 15, so that the generation amount of the second and third harmonics radiated from the antenna ANT is suppressed.
For example, the transmission signal modulated by the mixer is amplified through the amplifier PA and input to the port 100b of the FET switch module. The transmission signal includes m-order (m is a natural number of 2 or more) harmonic components. Yes. The transmission signal is first passed through a filter circuit (low-pass filter) 30 to attenuate signals outside the frequency band. The transmission signal that has passed through the filter circuit 30 is input to the port b of the FET switch SW. When a large high-frequency signal is input to the port b, the FETs 112 to 115 and the like in the off state are turned on in an AC manner, which may cause distortion of the signal waveform and generate harmonics other than the fundamental wave. However, since it can be attenuated by the filter circuit (low-pass filter or notch filter) 10 connected to the port a of the FET switch SW, harmonics radiated from the antenna can be suppressed.

FIG. 4 is an external perspective view of the high-frequency switch module, and FIG. 5 is an exploded perspective view of the multilayer substrate 5 used in the high-frequency switch module, showing the configuration of each layer.
The filter circuits 10, 30, 40, the branching circuit 120, and the matching circuits 80, 85, 86, 87, 88, 90 are composed of an inductor and a capacitor. These include a dielectric layer, Ag, Cu, and the like. It is configured as an electrode pattern or a chip component on a multilayer substrate formed with an electrode pattern in which a paste made of a metal or an alloy based on the metal is formed in a predetermined shape.

  The configuration of the multilayer substrate will be described below. The multi-layer substrate is formed by laminating a plurality of dielectric layers, and a plurality of first dielectric layers mainly including a pattern for a demultiplexing circuit and a low-pass filter, and a capacitor pattern are mainly formed. A plurality of second dielectric layers and a plurality of third dielectric layers mainly formed with a ground pattern. Although the coil pattern and the capacitor pattern are formed in different dielectric layers, they may be formed in the same dielectric layer. In this embodiment, the coil pattern is formed thicker than the capacitor pattern, so that the cross-sectional area is increased and the resistance is reduced. In order to obtain the effect of reducing the resistance while preventing structural defects such as voids generated between the layers around the coil pattern or the like, it is preferable to form the capacitor pattern to 2 μm to 10 μm and the coil pattern to 15 μm to 40 μm.

The first to third dielectric layers are, for example, those obtained by forming dielectric ceramics into green sheets by a known sheet forming method such as a doctor blade method, and are integrated by sintering after lamination.
A ground pattern GND (first ground electrode) covering substantially the entire surface is formed on the surface of the lowermost green sheet 14, and terminal electrodes for mounting on the circuit board are formed on the back surface. The terminal electrode serves as a high-frequency terminal, the antenna port ANT (100a) common to each communication system, the first transmission port TX1 (100b) to which the transmission signal of the first communication system is input, and the second and third communication. The second transmission port TX2 (100c) to which the transmission signal of the system is input, the reception port RX1 (100d, 100d2) output from the first communication system, and the reception port RX2 (100e1, 100e2) output from the third communication system ), A reception port RX3 (100f1, 100f2) output from the second communication system, a transmission / reception port TRX (100g) input / output from / to the fourth communication system, a ground port GND as a ground terminal, and a control terminal As control ports V1, V2, V3 and Vdd, each shaped as a green sheet (In the figure, indicated by black circles) are via holes are connected to the upper layer of the green sheet on the electrode pattern through the.

In this embodiment, the terminal electrode is an LGA (Land Grid Array), but a BGA (Ball Grid Array) or the like can also be adopted. Further, in this embodiment, the control terminals V1, V2, V3, Vdd, the reception system terminals RX1, RX2, RX3, the transmission system terminals TX1, TX2, the antenna terminal ANT and the transmission / reception system terminal TRX among the high frequency terminals are different. Collected and arranged on the side. According to such an arrangement, when the high frequency switch module is mounted on the circuit board, the connection with other high frequency circuits can be shortened. By arranging the receiving system terminals RX1, RX2, RX3 on one side and not arranging other high-frequency terminals or control terminals, the influence on the received signal is reduced, and connection with the balanced output port of the elastic wave filter is achieved. Shortened to reduce variation in electrical length. The terminal electrode and the ground pattern GND (first to fourth ground electrodes) are not overlapped so that a ground capacitor is not formed at the output end of the received signal. For this reason, variation in electrical length due to parasitic capacitance or the like is prevented, and the phase balance and amplitude balance of the reception signal that is output in a balanced manner are not impaired. Preferably, the multilayer substrate is configured not to overlap with electrode patterns other than the ground pattern GND.
The control ports V1, V2, V3, and Vdd for controlling the switch circuit are gathered on one side of the multilayer substrate, and a via hole group continuous in the stacking direction and a line pattern that runs in parallel on the green sheet 13 It is connected to a plurality of decoder mounting electrodes formed on the first main surface via (control signal line). In the same layer, a capacitor electrode pattern constituting a filter circuit and a matching circuit is formed.

  On the green sheet 12, a ground pattern GND (second ground electrode) covering almost the entire surface is formed, and a part of the ground pattern is a cut-out portion where no electrode is formed. A via hole that connects the control signal line and the control signal input port of the FET switch and a via hole that connects the capacitor electrode pattern to an electrode pattern of another layer are formed in the extracted portion.

The green sheets 11 to 8 are formed with inductor electrode patterns that constitute filter circuits and matching circuits. A green pattern GND (third ground electrode) is formed on the green sheet 7 together with the capacitor electrode pattern. The capacitor electrode pattern is an electrode pattern for a capacitor connected in series with a signal path. Capacitor electrode patterns are formed on the green sheets 6 to 4, and a ground pattern GND (fourth ground electrode) covering almost the entire surface is formed on the upper green sheet 3 together with the capacitor electrode patterns. Yes. A line (electrode pattern) for connecting the mounting electrode formed on the green sheet 1 and the inductor electrode pattern or the capacitor electrode pattern is formed on the green sheet 2.
Each electrode pattern is appropriately connected through a via hole, and the obtained laminate is sintered at about 850 ° C. to 1000 ° C. (firing temperature depends on the conductor used and dielectric ceramics) to form a multilayer substrate, which is used as an FET switch. And a switch module according to the present invention by mounting a SAW filter.
In the present embodiment, DC cut capacitors C1 to C3, an inductor L1 of an ESD countermeasure circuit, and a capacitor C1 (capacitor C1 is also used for DC cut) are mounted on a multilayer substrate. Although it is possible to form these inductors and capacitors with electrode patterns in a multilayer substrate, they require relatively large capacitance values and inductance values compared to other circuit elements. It is often mounted on a multilayer board.

  Of the mounting electrodes on which the FET switch, SAW filter, chip inductor, and chip capacitor are mounted, the ground terminal of the FET switch and SAW filter is for ground formed on the green sheet 3. It is connected to the pattern GND (fourth ground electrode) by a via hole. The ground pattern GND formed on the green sheet 3 is connected to the ground patterns GND of the green sheets 7, 12, and 14 by a plurality of via holes. With such a configuration, even a small multilayer substrate has a stable ground potential as compared with the case where the ground is divided, and the control signal line and the inductor electrode pattern are formed in the space closed by the ground, respectively. Therefore, the control signal line and the inductor electrode pattern do not interfere with each other, and excellent electrical characteristics can be obtained.

  The mounting electrode connected to the acoustic wave filter is connected to the output terminal of the high frequency terminals formed on the back surface of the multilayer substrate through a first via hole group continuous in the stacking direction. In this embodiment, the received signal is output as a balanced signal, but the above-described configuration does not impair the phase balance or amplitude balance. Further, a second via hole group is formed between the first via hole group and the control signal line in a plane and continuous in the stacking direction, and connects between the first ground electrode to the fourth ground electrode. With such a configuration, the path of the received signal that is susceptible to noise is arranged separately from the path of the control signal and the path of the transmission signal.

As dielectric ceramics constituting the laminated substrate, for example, Al, Si, and Sr as main components, Ti, Bi, Cu, Mn, Na, K, etc. as subcomponents, Al, Si, and Sr as main components. , Ca, Pb, Na, K and the like, ceramics containing Al, Mg, Si and Gd, ceramics containing Al, Si, Zr and Mg. The dielectric constant of the dielectric is preferably about 5-15. In addition to dielectric ceramics, it is also possible to form a multilayer substrate using a resin or a resin / ceramic composite material. Further, an electrode pattern may be formed by a high-temperature sinterable metal conductor such as tungsten or molybdenum in a multilayer substrate mainly composed of Al ₂ O ₃ by HTCC (high temperature co-fired ceramic) technology.

  As described above, according to the present invention, in a switch module that handles a plurality of transmission / reception systems, it is possible to provide a switch module that is unlikely to cause interference between circuits even if the multilayer substrate is downsized.

It is a circuit block diagram of the switch module concerning one example of the present invention. 1 is an equivalent circuit diagram of a switch module according to an embodiment of the present invention. It is an equivalent circuit diagram of the switch used for the switch module which concerns on one Example of this invention. 1 is an external perspective view of a switch module according to an embodiment of the present invention. It is a disassembled perspective view of the multilayer substrate used for the switch module which concerns on one Example of this invention.

Explanation of symbols

5 Multilayer substrate 10, 30, 40 Filter circuit 15 FET switch 20 ESD countermeasure circuit 50, 55, 60 Elastic wave filter 80, 85, 86, 87, 90 Matching circuit 120 Split circuit

Claims (9)

A switch module that corresponds to a plurality of communication systems and includes a FET switch circuit that switches a transmission path through which transmission / reception signals of the communication system pass, and a plurality of filter circuits connected to the FET switch circuit,
By the electrode pattern formed on the dielectric layer of the multilayer substrate, at least a part of the inductor and the capacitor constituting the filter circuit is formed, the switching element is mounted on the multilayer substrate,
The bottom surface of the multilayer substrate is provided with a control terminal connected to a control signal input port of the FET switch circuit, a ground terminal, and a high frequency terminal, and a first ground electrode is formed on the dielectric layer on the bottom surface side of the multilayer substrate. A second ground electrode is formed on the upper dielectric layer;
A switch module, wherein a plurality of control signal lines are formed in the dielectric layer between the first ground electrode and the second ground electrode, but the electrode pattern for the inductor is not formed.   2. The switch module according to claim 1, wherein the first ground electrode and the second ground electrode are electrically connected by a via hole.   The switch module according to claim 1, wherein a capacitor electrode pattern is further formed on the dielectric layer on which the control signal line is formed.   2. The second ground electrode covers substantially the entire region where the control signal line is formed, and an inductor electrode pattern is formed on a dielectric layer above the second ground electrode. The switch module in any one of thru | or 3.   The second ground electrode has a part where no electrode is formed, and a via hole that connects the control signal line and the control signal input port of the FET switch circuit is formed in the part. The switch module according to claim 1, wherein the switch module is a switch module.   The second ground electrode has a cutout portion in which no electrode is formed, and the cutout portion has a capacitor electrode formed in a dielectric layer between the first ground electrode and the second ground electrode. The via hole for connecting the pattern and the electrode pattern for inductor formed in the dielectric layer on the upper side of the second ground electrode is formed. Switch module. A plurality of acoustic wave filters connected to the FET switch circuit are mounted on the multilayer substrate, and a balanced port of the acoustic wave filter is connected to an output terminal of the high frequency terminals via a first via hole group that is continuous in the stacking direction. Connected,
The first via hole group and the control signal line are connected between the first ground electrode and the second ground electrode and further connected to the ground electrode formed in the upper layer in the stacking direction. 7. The switch module according to claim 1, wherein two via hole groups are formed.   The switch module according to claim 7, wherein the ground port of the acoustic wave filter is connected to the first ground electrode and the second ground electrode through a via hole.   The switch module according to claim 7 or 8, wherein at least the first ground electrode and the output terminal do not overlap in the stacking direction.

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