JP4775686B2 - Multilayer low-pass filter and high-frequency switch module using the same - Google Patents

Description

  The present invention relates to a multilayer low-pass filter used in mobile communication devices such as a mobile phone and a mobile terminal, and a high-frequency switch module using the same.

The multilayer low-pass filter is incorporated in a mobile communication device as a single unit or a high-frequency switch module using the multilayer low-pass filter. An example of a π-type circuit low-pass filter is shown in FIG.
As shown in FIG. 5, the present applicant is connected in parallel to an inductor L, a capacitor C2 that grounds one end of the inductor L, a capacitor C3 that grounds the other end of the inductor L, and an inductor L. The low-pass filter composed of the capacitor C1 has been continuously miniaturized and provided with a low insertion loss (see, for example, Patent Document 1).
FIG. 6 shows an electrode pattern diagram for each layer. A ground electrode 52 is formed on the lowermost dielectric layer 51A, and electrodes 52a and 52b are formed on the dielectric layer 51B. An electrode 53 is formed on the dielectric layer 51C, and electrodes 54a and 54b are formed on the dielectric layer 51D. A ground electrode 55 is formed on the dielectric layer 51E, and an electrode 56 is formed on the dielectric layer 51F. A line electrode 57 is formed on the dielectric layer 51G, a line electrode 58 is formed on the dielectric layer 51H, and a line electrode 59 is formed on the dielectric layer 51I. The line electrode 57 and the line electrode 58, and the line electrode 58 and the line electrode 59 are connected by a via-hole. An electrode 60 is formed on the dielectric layer 51J, a ground electrode 61 is formed on the dielectric layer 51K, and a dielectric layer 51L is formed on the uppermost layer.
An inductor L is constituted by the line electrodes 57, 58, 59 and via holes connecting the respective electrodes.
The capacitor C2 is configured by the capacitor between the electrode 52b and the ground electrode 52, the capacitor between the electrode 54b and the ground electrode 55, and the capacitor between the electrode 56 and the ground electrode 55.
The capacitor C3 is configured by the capacitor between the electrode 52a and the ground electrode 52, the capacitor between the electrode 54a and the ground electrode 55, and the capacitor between the electrode 60 and the ground electrode 61.
Further, a capacitor between the electrode 52a and the electrode 53, a capacitor between the electrode 52b and the electrode 53, a capacitor between the electrode 54a and the electrode 53, and a capacitor between the electrode 54b and the electrode 53 are used. C1 is configured.
Here, the electrodes 52b and 54b serve as electrodes of the capacitor C2 and also serve as electrodes of the capacitor C1. The electrodes 52a and 54a also serve as the electrodes of the capacitor C3 and the capacitor C1.
A plurality of external electrodes are formed on the side surface of the laminate, and the electrodes formed in each layer are connected by these external electrodes to form a low-pass filter.

The amount of attenuation with respect to the harmonics in the low-pass filter is an important characteristic. This will be described. Here, the harmonic is a second harmonic (3.6 GHz), a third harmonic (5.4 GHz), or the like of a fundamental wave f ₀ (for example, 1.8 GHz) that is the center frequency of the pass band (pass frequency band). Unwanted radiation with frequency.
This harmonic is mainly generated from the power amplifier. As the mobile communication device has been downsized, the power amplifier has also been downsized. As a result, the nonlinearity of the power amplifier has become more prominent, which has increased the generation of harmonics, which has been a problem.
If the attenuation of the harmonics is insufficient, the harmonics are emitted from the antenna as unwanted radiation, resulting in a problem that the isolation characteristics required for the system (for example, −30 dBm or less in the GSM system) cannot be satisfied.

As an example of a mobile phone in which a low-pass filter and a high-frequency switch module using the low-pass filter are incorporated, there is a triple-band mobile phone compatible with three systems of GSM900, DCS, and PCS. Here, GSM (Global System For Mobiles) is a European standard digital cellular phone system, which includes GSM900 using a frequency of 900 MHz band, GSM1800 system using a frequency of 1.8 GHz, and GSM1800 system is a DCS (Digital Cellular System). ) Is often called. PCS (pulse communication system) is a pulse communication system. Here, the GSM900 system has a transmission frequency of 880 to 915 MHz and a reception frequency of 925 to 960 MHz. The DCS system has a transmission frequency of 1710 to 1785 MHz and a reception frequency of 1805 to 1880 MHz. The PCS system has a transmission frequency of 1850 to 1910 MHz and a reception frequency of 1930 to 1990 MHz.
Thus, in order to cope with a plurality of frequency bands with a single mobile phone, the required characteristics imposed on filters and high-frequency switch modules including low-pass filters are becoming more severe day by day.

JP 2000-134001 A

Due to downsizing and higher performance of mobile communication devices that use low-pass filters, the conventional low-pass filter described in Patent Document 1, for example, has come to have an insufficient amount of harmonic attenuation.
That is, the influence of the harmonics generated from the power amplifier has become larger than before due to the miniaturization that does not stop. The same applies to a high-frequency switch module in which a low-pass filter is incorporated.

  Therefore, an object of the present invention is to provide a low-pass filter and a high-frequency switch module that have sufficient attenuation of harmonics even if they are small or smaller.

[Means 1]
In the present invention, a dielectric layer (S1 to S10) and electrode patterns (EL1, EL2, EL31 to EL34, EL4, GND1 to GND3) are laminated, and an inductor (L) and capacitors (C1, C2, C3) are formed by the electrode pattern. ) Is a low-pass filter integrated into the laminate,
A first capacitor (C1) connected in parallel with the inductor (L), a second capacitor (C2) connected between one end of the inductor (L) and the ground, and the inductor (L) In the multilayer low-pass filter including a third capacitor (C3) connected between the other end of the first capacitor and the ground,
The stacked body includes at least three ground electrode patterns (GND1, GND2, GND3), a dielectric layer on which a first ground electrode pattern (GND1) having a smaller area than other ground electrode patterns is formed, and a first layer Electrode patterns (EL31 to EL34) for forming the inductor (L) are disposed between the dielectric layers on which the two ground electrode patterns (GND2) are formed , and the first ground electrode pattern (GND1) On the opposite side of the electrode patterns (EL31 to EL34) forming the inductor (L), electrode patterns (EL1 and EL2) forming the first capacitor (C1) and the second capacitor (C2) are disposed,
An electrode pattern (EL4) that forms a third capacitor (C3) is disposed between the second ground electrode pattern (GND2) and the third ground electrode pattern (GND3),
Accordingly, the second capacitor (C2) and the third capacitor (C3) are configured in different portions in the stacking direction via the first ground electrode pattern (GND1) and the second ground electrode pattern (GND2),
The electrode patterns forming the first capacitor (C1), the second capacitor (C2), and the third capacitor (C3) are formed so as to overlap when the stacked body is viewed from the stacking direction. inductor electrode pattern (EL31~EL34) to form the (L) is a feature that it is formed such that the first ground electrode pattern (GND1) is arranged in the side, it does not overlap both one ground electrode pattern Is a laminated low-pass filter.

[Means 2]
The present invention is a high-frequency switch module including a switch circuit that connects the laminated low-pass filter to a transmission signal path, and a switch element that constitutes the switch circuit is mounted on the laminated low-pass filter.

[Means 3]
The present invention further includes a high-pass filter connected to the switch circuit, the high-pass filter including a series resonant circuit including an inductor and a capacitor connected between a reception signal path and a ground, the series resonant circuit The high-frequency switch module is characterized in that the resonance frequency is between 100 MHz and 500 MHz.

  According to the present invention, it is possible to provide a laminated low-pass filter and a high-frequency switch module that are sufficiently small in size or smaller in size and have sufficient harmonic attenuation.

The inventor can reduce the parasitic capacitance generated in the inductor L and the first to third capacitors C1 to C3 by the configuration described in [Means 1] to [Means 3]. It has been found that sufficient low-pass filters and high-frequency switch modules can be obtained.
The influence of the parasitic capacitance on the attenuation is greater in the case of the low-pass filter than in the high-pass filter. This is because the former has a higher frequency than the fundamental frequency, and the harmonic frequency becomes an attenuation region (non-passage frequency band). Therefore, it is significant to adopt the configuration described in [Means 1] in the low-pass filter.
Further, the high-frequency switch module described in [Means 3] incorporating the low-pass filter described in [Means 1] can be obtained with a large amount of attenuation of harmonics while being small.

A low-pass filter according to the present invention will be described with reference to FIG. FIG. 1 shows the electrode pattern of each layer when the π-type circuit low-pass filter shown in FIG.
The low-pass filter according to the present invention includes an inductor L and capacitors C1 to C3. The electrode pattern constituting the inductor L is formed on the fourth to seventh layers (S4 to S7) of dielectric. The upper and lower layers of the fourth to seventh layers (S4 to S7) constituting the inductor L are sandwiched between the ground electrodes GND1 and GND2. Electrode patterns EL1 and EL2 constituting the capacitors C1 and C2 are formed above the third layer (S3) on which the ground electrode GND1 is formed, and the capacitor C1 is an electrode formed on the first layer (S1). The capacitor C2 is formed between the pattern EL1 and the ground electrode GND1 formed on the third layer (S3), and the capacitor C2 includes the electrode pattern EL2 and the ground electrode GND1 formed on the second layer (S2). Formed between.
On the other hand, the capacitor C3 is formed between the electrode pattern EL4 formed on the ninth layer (S9) and the ground electrode GND2, and between the electrode pattern EL4 and the ground electrode GND3 formed on the tenth layer (S10). Formed between.
The layers between the electrode patterns are connected by via holes indicated by black dots to form a low-pass filter. The layers between the ground electrodes GND1 to GND3 and the mutual electrode patterns are also connected by via holes (not shown).

In the embodiment illustrated in FIG. 1, the inductor L is divided into the fourth to seventh layers (S4 to S7) and formed with spiral coils, so that the inductor L is formed in the meander shape on the same layer. The track length is short.
The electrode pattern EL4 constituting the capacitor C3 includes GND electrode patterns GND1 formed on the third layer (S3) and the eighth layer (S8), respectively, below the electrode patterns EL1 and EL2 constituting the capacitor C1 and the capacitor C2. It arrange | positions across GND2. Therefore, the isolation between the capacitors C1 and C2 and the capacitor C3 is greatly improved, and the attenuation amount of the harmonic can be increased.
In the low-pass filter according to the present invention, the capacitor C3 and the capacitor C2 can be replaced. That is, in FIG. 1, not the electrode pattern EL2 constituting the capacitor C2 but the electrode pattern EL4 constituting the capacitor C3 is arranged on the second layer (S2), and conversely the electrode constituting the capacitor C3 on the ninth layer (S9). You may arrange | position electrode pattern EL2 which comprises the capacitor | condenser C2 instead of pattern EL4.

The dielectric layers S1 to S10 are low-temperature fired together after printing and laminating a transmission line electrode pattern or a capacitor electrode pattern on a green sheet (unfired raw sheet) made of a dielectric material with a silver paste or the like. It consists of fired ceramics (LTCC). The connection between the layers can be made by filling the via holes with a conductive paste. It is not limited to the via hole, and the connection between the layers can be performed by an external electrode provided outside the stacked body, or the via hole and the external electrode can be used in combination.
The electrode patterns (EL31 to EL34) constituting the inductor L and the electrode patterns (EL1, EL2, EL4) constituting the capacitors C1, C2, and C3 are arranged so as to overlap each other when viewed from the stacking direction of the stacked body. May be. For example, in a low-pass filter having a conventional structure as shown in Patent Document 1, it is necessary to arrange capacitors C2 and C3 side by side, so that the area required to form the low-pass filter increases. In the structure of the present invention, each electrode pattern can be arranged so as to overlap each other when viewed from the vertical direction, so that a low-pass filter can be formed with a smaller area, which is advantageous for the development of high-frequency components that are becoming smaller and more multifunctional.
The designer can select as appropriate so that the optimum filter characteristics can be obtained depending on the arrangement with other electrode patterns, the dimensional relationship, the handled frequency band, and the like.
Since the low-pass filter according to the present invention does not require cascade connection of the low-pass filters corresponding to each harmonic in multiple stages in order to attenuate the harmonics, the size can be reduced. Since the number of low-pass filters used in the high-frequency module is increased by dual band, triple band, etc., the effect of miniaturization is great.

The low-pass filter according to the present invention can be integrated not only with a single unit but also with other circuits such as a high-frequency switch module in a laminate.
Next, the high frequency switch module will be described in detail.
FIG. 2 shows an equivalent circuit of the high-frequency switch module according to the present invention. The low-pass filter according to the present invention described with reference to FIG. 5, for example, LPF2, is substantially at the center of the drawing in FIG. 2, where L in FIG. 5 is Ld3, C1 in FIG. 5 is Cd7, and C2 in FIG. The code Cd4 and the code C3 in FIG. 5 correspond to the code Cd3. The configuration described in [Means 1] is employed for the low-pass filter of this portion.
The high-frequency switch module shown in FIG. 2 exemplifies a triple band case corresponding to three systems of GSM900, DCS, and PCS as an embodiment.
This high-frequency switch module switches the connection between the antenna terminal Ant and the transmission circuit and reception circuit of the GSM, DCS, and PCS. In this embodiment, the DCS transmission circuit and the PCS transmission circuit are shared.
Here, the reference numerals shown at the right end of FIG. 2 will be described. Symbol Tx1 indicates a GSM900 transmission terminal, and symbol Rx1 indicates a GSM900 reception terminal. Symbol Tx2 indicates a transmission terminal common to DCS and PCS, symbol Rx2 indicates a DCS reception terminal, and symbol Rx3 indicates a PCS reception terminal.
The high frequency switch module illustrated in FIG.
(A) a branching circuit composed of a low-frequency filter and a high-frequency filter;
(B) a first switch circuit that is arranged downstream of the low-frequency filter of the branching circuit and switches between the transmission terminal Tx1 and the reception terminal Rx1 by a voltage supplied from the control terminal Vg;
(C) A second switch circuit that is disposed after the high-frequency filter of the branching circuit and switches between the transmission terminal Tx2, the reception terminal Rx2, and the reception terminal Rx3 by voltages supplied from the control terminals Vd and Vp. To do.

[1] Circuit configuration of high-frequency switch module (A) Demultiplexing circuit (DIP)
The branching circuit includes a low frequency side filter and a high frequency side filter. In other words, a low-pass filter is provided as a low-frequency side (GSM900 Side) filter that passes GSM900 transmission / reception signals and attenuates DCS and PCS transmission / reception signals, and passes DCS and PCS transmission / reception signals and attenuates GSM900 transmission / reception signals. A high-pass filter is provided as a high frequency side (DCS / PCS Side) filter.
The low frequency filter and the high frequency filter connected to the antenna terminal Ant are each composed of a transmission line and a capacitor. The low frequency side filter and the high frequency side filter can also be constituted by a band pass filter and a notch filter.
A low pass filter as a low frequency side (GSM900 Side) filter will be described.
The transmission line Lf1 allows a signal in the GSM band on the low frequency side to pass through with low loss and has a high impedance with respect to the signal in the DCS and PCS band on the high frequency side to prevent the DCS and PCS band signals from wrapping around. .
The transmission line Lf2 and the capacitor Cf1 form a series resonance circuit, and are designed to have a resonance frequency in the DCS and PCS bands, so that signals in the DCS and PCS bands are dropped to the ground to prevent wraparound.
Here, it is preferable that the transmission line Lf1 is set to a certain length so as to have a high impedance with respect to the frequency of signals in the DCS and PCS bands. This makes it difficult for signals in the DCS and PCS bands to be transmitted to the GSM route.
A high-pass filter as a high frequency side (DCS / PCS Side) filter will be described.
Capacitors Cf2 and Cf3 pass the DCS and PCS band signals on the high frequency side with a low loss, and prevent the GSM band signal from wrapping around so as to have a high impedance to the GSM band signal on the low frequency side.
The transmission line Lf4 and the capacitor Cf4 constitute a series resonance circuit and are designed to have a resonance frequency in the GSM900 band, and a signal in the GSM900 band is dropped to the ground to prevent wraparound.

The switch circuit will be described.
Each of the first switch circuit that switches between the transmission terminal Tx1 and the reception terminal Rx1 and the second switch circuit that switches between the transmission terminal Tx2, the reception terminal Rx2, and the reception signal Rx3 are arranged in the subsequent stage of the branching circuit. The switch element and transmission line are the main elements. As this switching element, a PIN diode is suitable. In addition, GaAs switches can be used. Generally, a switch circuit using a PIN diode has an advantage that a circuit can be constructed at a lower cost than a GaAs switch. Conversely, a GaAs switch has a lower power consumption than a switch circuit using a PIN diode. Can be selected to take advantage of these features.

(B) First switch circuit The first switch circuit is located in the upper part of FIG. 2, and switches between the transmission terminal Tx1 of GSM900 and the reception terminal Rx1 of GSM900, and includes two diodes Dg1, Dg2 and two transmissions. The lines Lg1 and Lg2 are the main elements.
The diode Dg1 is interposed between the low frequency filter of the branching circuit and the transmission terminal Tx1, the anode of the diode Dg1 is connected to the low frequency filter of the branching circuit, and the cathode of the diode Dg1 is the transmission line Lg3. And a π-type low-pass filter LPF1 composed of capacitors Cg7, Cg4, and Cg3.
A transmission line Lg1 is connected between the other end of the transmission line Lg3 constituting the low-pass filter LPF1 and the ground.
This low-pass filter LPF1 passes the GSM900 transmission signal in order to suppress high-order harmonic distortion contained in the transmission signal input from the power amplifier (not shown) on the GSM900 side, and is more than twice the GSM900 transmission signal. It is preferable to have characteristics that sufficiently attenuate the frequency.
The inductor Lg3 and the capacitor Cg7 constitute a parallel resonance circuit, and the resonance frequency is set to be twice or three times the transmission frequency of GSM900. Thereby, the harmonic distortion contained in the transmission signal on the GSM 900 side input from a power amplifier (not shown) can be sufficiently attenuated.
Capacitors Cg6, Cg2, and Cg1 are DC cut capacitors that remove a DC component so that a control DC voltage can be applied to a circuit that includes diodes Dg1 and Dg2.
A transmission line Lg2 is inserted between the anode of the diode Dg1 and the receiving terminal Rx1, a diode Dg2 is connected between one end of the transmission line Lg2 and the ground, and a capacitor Cg1 is connected between the anode of the diode Dg2 and the ground. Is connected. A resistor Rg is connected in series between the anode of the diode Dg2 and the control terminal Vg.
A capacitor Cvg connected between the control terminal Vg and the ground prevents noise from entering the control power supply and stabilizes the control.
Both the transmission line Lg1 and the transmission line Lg2 preferably have line lengths such that the resonance frequency is within the frequency band of the transmission signal of GSM900. For example, when each resonance frequency is set to a substantially intermediate frequency (897.5 MHz) of the transmission signal frequency of GSM900, excellent insertion loss characteristics can be obtained within a desired frequency band.

(C) Second switch circuit The second switch circuit is a switch circuit in the lower stage of FIG. 2, and includes a DCS reception terminal Rx2, a PCS reception terminal Rx3, and a DCS and PCS common transmission terminal Tx2. Switch.
The second switch circuit includes four diodes Dd1, Dd2, Dp1, and Dp2 and four transmission lines Ld1, Ld2, Lp1, and Lp2 as main elements.
The diode Dd1 is inserted between the high frequency filter of the branching circuit and the transmission terminal Tx2, the anode of the diode Dd1 is connected to the high frequency filter of the branching circuit, and the cathode of the diode Dd1 is the transmission line Ld3 and the capacitor Cd3. , Cd4 and Cd7 are connected to a π-type low-pass filter LPF2. A transmission line Ld1 is connected between the other end of the transmission line Ld3 constituting the low-pass filter and the ground.
Here, the low-pass filter LPF2 passes the DCS or PCS transmission signal in order to suppress high-order harmonic distortion contained in the transmission signal input from the DCS and PCS side power amplifiers (not shown), and the DCS or PCS. It is preferable to have a characteristic that sufficiently attenuates a frequency twice or more that of the transmission signal.
The line length of the transmission line Ld3 constituting the low-pass filter LPF2 is preferably λ / 8 to λ / 12 (where λ is the wavelength of the intermediate frequency of the transmission signal in the DCS and PCS transmission / reception systems). The intermediate frequency λ of the transmission signal in the DCS and PCS transmission / reception systems is an intermediate frequency (1810 MHz) between the DCS transmission signal 1710 to 1785 MHz and the PCS transmission signal 1850 to 1910 MHz. If the line length of the transmission line Ld3 is greater than λ / 8 with respect to the wavelength λ of the intermediate frequency, the passband characteristic becomes narrow, and is desired in the vicinity of the lower limit frequency of the DCS transmission signal and the upper limit frequency of the PCS transmission signal. Insertion loss characteristics cannot be obtained. If the transmission line Ld3 has a line length less than λ / 12, the attenuation in the high frequency region such as the second harmonic and the third harmonic is deteriorated. Thus, in any case, the characteristics as the high frequency switch module deteriorate, which is not preferable.
The functions of the inductor Ls and the capacitor Cs connected in parallel to the diode Dd1 will be described. This is because when the diode Dd1 is OFF, the inductor Ls and the capacitor Cs are connected in series for the purpose of ensuring isolation between the transmission terminal Tx2 and the antenna terminal Ant, between the transmission terminal Tx2 and the reception terminal Rx2, and between the transmission terminal Tx2 and the reception terminal Rx3. The circuit is connected in parallel to the diode Dd1, and the capacitance component of the diode at the time of OFF is canceled.

The transmission lines Ld1 and Ld2 preferably have line lengths such that their resonance frequencies fall within the range from the maximum frequency to the minimum frequency of the transmission signal frequency band of the DCS and PCS transmission / reception systems. It is preferable to have a line length that is an intermediate frequency between the minimum frequencies. For example, when the resonance frequency of the transmission lines Ld1 and Ld2 is set to a substantially intermediate frequency (1810 MHz) between the transmission signal frequencies of the DCS band and the PCS band, excellent electrical characteristics can be obtained in each mode, and two transmission signals can be obtained. Can be handled by one circuit.
Capacitor Cd2 is a DC cut capacitor that removes the DC component so that a control DC voltage can be applied to the circuit including diodes Dd1 and Dd2. Capacitors Cd5, Cp1, Cp4, and Cp2 are diodes Dp1 and Dp2. This is a DC cut capacitor that can apply a control DC voltage to a circuit including
One end of the transmission line Ld2 is connected to a capacitor Cf3 constituting a high frequency filter of the branching circuit. A diode Dd2 and a capacitor Cd1 are connected between the other end of the transmission line Ld2 and the ground. A control terminal Vd is connected to the anode of the diode Dd2 via a resistor Rd. The capacitor Cvd stabilizes control by preventing noise from entering the control power supply.
A DC cut capacitor Cd5 having a size of 2 to 10 pF is connected between the transmission line Ld2 and the transmission line Lp2.
One end of the transmission line Lp2 is connected to the capacitor Cd5, and the other end of the transmission line Lp2 and the ground are connected to the ground via the diode Dp2 and the capacitor Cp1.
A connection point between the diode Dp2 and the capacitor Cp1 is connected to the control terminal Vp via the resistor Rp. The capacitor Cvp stabilizes control by preventing noise from entering the control power supply.
The anode of the diode Dp1 is connected to the connection point between the capacitor Cd5 and the transmission line Lp2. A parallel resonant circuit of a transmission line Lp1 and a capacitor Cp3 is connected between the cathode of the diode Dp1 and the ground to prevent leakage of the PCS reception signal to the ground.
The DC cut capacitors Cp4 and Cp2 connected to the receiving terminals Rx2 and Rx3 may be removed when the SAW filter is used because the SAW filter itself can remove the direct current component.

(D) ESD countermeasure circuit The (A) branching circuit, (B) first switch circuit, and (C) second switch circuit described above constitute a high-frequency switch module according to the present invention.
However, when incorporated in a portable device as a high-frequency switch module, it is desirable to take an ESD (ElectroStatic Discharge) measure in order to prevent the module from being destroyed by electrostatic surges caused by electrostatic discharge. Hereinafter, the ESD countermeasure circuit in the embodiment illustrated in FIG. 2 will be described.
The inductor Le connected between the antenna terminal Ant and the ground at the left end of FIG. 2 is inserted for ESD countermeasures. By appropriately selecting the values of these inductors, the electrostatic surge can escape to the ground and be rendered harmless.
In the upper right part of FIG. 2, a π-type high-pass filter including a capacitor Cec, a series resonance circuit of an inductor Len and a capacitor Cen, and an inductor Les is also inserted for ESD countermeasures. By appropriately selecting the values of the inductor and the capacitor, the electrostatic surge is released to the ground, and the high frequency signal can be transmitted with low loss. Here, Les is preferably 50 nH or less, and Cec is preferably 10 pF or less. In addition, in the series resonance circuit of the inductor Len and the capacitor Cen, the values of the inductor and the capacitor are set so that the resonance frequency is set between 100 MHz and 500 MHz. In this case, Len is desirably 50 nH or less, and Cen is desirably 33 pF or less.
Thereby, the electrostatic surge in the resonance frequency band which is a problem in electrostatic breakdown can be absorbed to the ground, and the countermeasure against electrostatic surge can be performed more efficiently.
That is, by configuring a high-pass filter that blocks the passage of alternating current and direct current components at least lower than the communication frequency, even if an electrostatic surge enters the high frequency switch module from the antenna terminal Ant, the direct current component and An AC component having a frequency lower than the communication frequency can be released to the ground side by the inductors Len and Les.
The reason why an ESD countermeasure high-pass filter is inserted in the GSM receiving circuit is that the first GSM receiving circuit is destroyed by the electrostatic surge.
The position where the high-pass filter for ESD countermeasures is inserted is not limited to the position illustrated in FIG. 3, but the insertion loss is smaller in the final stage than in the previous stage of the antenna terminal Ant.

[2] Description of operation of the high-frequency switch module The high-frequency switch module according to the present invention applies GSM, DCS, One of the PCS transmission / reception systems is selected.
The operation of the high-frequency switch module having the equivalent circuit shown in FIG. 2 will be described.
(A) GSM transmission mode When transmitting a transmission signal from the transmission terminal Tx1 of the GSM900 to the antenna terminal Ant, the control terminal Vg is set to High (for example, 2.6 V), the control terminal Vd is set to Low (for example, zero voltage), and Vp is set to High. Or it is set to Low.
Here, the control voltage applied to the control terminal is preferably +1 to +5 V for High, and −0.5 to +0.5 V for Low.
When the control voltage applied to the control terminal Vg is High, the DC (direct current) component is cut by the capacitors Cg1, Cg2, and Cg6 and applied to the circuit including the diodes Dg1 and Dg2. Thus, the current path is limited so that the current flowing by the control voltage applied to the control terminal Vg flows only to the circuit including the diodes Dg1 and Dg2, and the other parts can be prevented from being affected. As a result, the diodes Dg1 and Dg2 are turned on. When the diode Dg1 is turned on, the impedance in the GSM band is lowered between the GSM transmission terminal Tx1 and the connection point between the capacitor Cg6 and the anode of the diode Dg1. Further, the transmission line Lg2 is grounded at high frequency and resonated by the diode Dg2 and the capacitor Cg1 which are turned on, and the impedance when the GSM receiving terminal Rx1 is viewed from the connection point between the capacitor Cg6 and the anode of the diode Dg1 is It becomes very large in the GSM band. Therefore, the transmission signal transmitted from the GSM transmission terminal Tx1 is transmitted to the antenna terminal Ant without leaking to the GSM reception terminal Rx1.
Here, the lengths of the transmission lines are set so that the transmission lines Lg1 and Lg2 become λ / 4 resonators in the GSM transmission frequency band.
The transmission line Lg1 can be replaced with a choke coil whose ground level appears to be open (high impedance state) at the GSM transmission frequency. In this case, the inductance value is desirably about 10 to 100 nH.
The resistor Rg limits the current flowing through the diodes Dg1 and Dg2 when the control terminal Vg is in the high state. If this current is too small, the signal insertion loss increases, and if it is excessive, the power consumption of the high-frequency switch module increases, so that the current is limited to an appropriate value.

(B) DCS / PCS transmission mode When a DCS or PCS transmission signal is transmitted from the DCS and PCS common transmission terminal Tx2 to the antenna terminal Ant, the control terminal Vd is High and the control terminal Vp is High (or Low), The control terminal Vg is set to Low.
As a result, the diodes Dd1 and Dd2 are turned on. When the diode Dd1 is turned on, the impedance in the DCS / PCS band decreases between the DCS and PCS transmission terminals Tx2 and the connection point between the capacitor Cf3 constituting the high-frequency side high-pass filter and the anode of the diode Dd1.
Further, the transmission line Ld2 is grounded and resonated at high frequency by the diode Dd2 and the capacitor Cd1 which are turned on, and the DCS receiving terminal is connected from the connection point between the capacitor Cf3 and the anode of the diode Dd1 constituting the high-pass filter on the high frequency side. The impedance of the Rx2 side and the PCS receiving terminal Rx3 side is very large in the DCS / PCS band. As a result, the transmission signal transmitted from the DCS (or PCS) transmission terminal Tx2 is transmitted to the antenna terminal Ant without leaking to the reception terminal Rx2 and the reception terminal Rx3.

(C) GSM reception mode When receiving a signal from the antenna terminal Ant at the GSM reception terminal Rx1, all the control terminals Vg, Vp, and Vd are set to Low. As a result, the diodes Dg1 and Dg2 are turned off.
When the diode Dg1 is turned off, the impedance viewed from the connection point between the capacitor Cg6 and the anode of the diode Dg1 when viewed from the Tx1 side is increased in the GSM band, and the connection with the transmission terminal Tx1 is disconnected, while the transmission line Lg2 The connection point between the capacitor Cg6 and the anode of the diode Dg1 is connected to the receiving terminal Rx1 of the GSM.
As a result, the reception signal that enters from the branching circuit via the antenna terminal Ant is transmitted to the reception terminal Rx1 without leaking to the transmission terminal Tx1.

(D) DCS reception mode When receiving a signal from the antenna terminal Ant at the DCS reception terminal Rx2, all of the control terminals Vd, Vg, and Vp are set to Low.
Thereby, the diodes Dd1, Dd2, Dp1, and Dp2 are all turned off. When the diode Dd1 is turned off, the impedance when the DCS / PCS common transmission terminal Tx2 side is viewed from the connection point between the capacitor Cf3 constituting the high-pass filter on the high frequency side and the anode of the diode Dd1 is increased in the DCS band. While the connection with the transmission terminal Tx2 is disconnected, the connection point between the capacitor Cf3 constituting the high-pass filter on the high frequency side and the anode of the diode Dd1, and the transmission line Ld2 and the cathode of the diode Dd2 are connected via the transmission line Ld2. The connection point is connected.
Further, when the diode Dp1 is turned off, the impedance of the PCS receiving terminal Rx3 seen from the connection point between the transmission line Lp2 and the cathode of the diode Dp1 increases in the DCS band, and the connection with the PCS receiving terminal Rx3 is broken. Be drunk. On the other hand, the connection point between the transmission line Lp2 and the cathode of the diode Dp2 and the DCS reception terminal Rx2 are connected via the transmission line Lp2.
As a result, the DCS reception signal that enters from the branch circuit via the antenna terminal Ant is transmitted to the DCS reception terminal Rx2 without leaking to the DCS / PCS common transmission terminal Tx2 and PCS reception terminal Rx3.

(E) PCS reception mode In this case, the control terminal Vp is set to High, and the control terminals Vd and Vg are set to Low.
The positive voltage applied to the control terminal Vp is applied to the circuit including the diodes Dp1 and Dp2, with the DC component cut by the capacitors Cd5, Cp1, Cp2, and Cp4.
As a result, the diodes Dp1 and Dp2 are turned on.
When the diodes Dd1 and Dd2 are in the OFF state, the connection point between the capacitor Cf3 and the diode Dd1 and the connection point between the capacitor Cd5 and the transmission line Lp2 are connected via the transmission line Ld2.
Further, when the diode Dp1 is turned on, the impedance when the PCS receiving terminal Rx3 side is viewed from the connection point between the transmission line Lp2 and the diode Dp1 is lowered in the PCS band.
The transmission line Lp2 is grounded at a high frequency by the diode Dp2 and the capacitor Cp1 which are turned on, and resonates in the reception signal frequency band of the PCS. From the connection point between the transmission line Lp2 and the diode Dp1, the DCS reception terminal Rx2 The impedance seen from the above becomes very large in the PCS received signal band.
As a result, the PCS reception signal that enters from the branching circuit via the antenna terminal Ant is transmitted to the PCS reception terminal Rx3 without leaking to the DCS / PCS common transmission terminal Tx2 and DCS reception terminal Rx2.

Next, with reference to FIG. 3, the case where the high-frequency switch module is formed of a laminated substrate by incorporating the low-pass filter according to the present invention shown in FIG. 1 will be described.
A part of a transmission line and a capacitor constituting a demultiplexing circuit, a switch circuit, and a filter are built in a dielectric laminated substrate, a switch element such as a PIN diode and a GaAs switch constituting a part of the switch circuit, a resistor, a capacitor, By mounting chip components such as inductors on a dielectric multilayer substrate, a compact and inexpensive multiband antenna switch multilayer module composite component can be obtained.
First, the correspondence between FIG. 3 showing the laminate of the high-frequency switch module according to the present invention and FIG. 1 showing the laminate of the low-pass filter according to the present invention will be described.
The three ground electrode patterns shown in FIG. 1, that is, the electrode pattern GND1, are formed on the dielectric layer S6 in FIG. 3, the electrode pattern GND2 is formed on the dielectric layer S13, and the electrode pattern GND3 is formed on the dielectric layer S15.
The electrode pattern EL1 corresponding to the capacitor C1 shown in FIG. 1 is in the dielectric layer S3 in FIG. 3, the electrode pattern EL2 corresponding to the capacitor C2 is in the dielectric layer S5, and the electrode pattern EL4 corresponding to the capacitor C3 is in the dielectric layer S14. Respectively.
The electrode patterns EL31 to EL34 of the inductor L shown in FIG. 1 are respectively formed on the dielectric layers S9 to S12 of FIG.
In FIG. 2, the low-frequency low-pass filter (configured with inductor Lg3, capacitors Cg7, Cg4, and Cg3) is not necessarily configured as [Means 1] of the present invention.
That is, in the embodiment illustrated in FIG. 2, the electrode patterns ELCG3 and ELCG4 constituting the capacitor Cg3 and the capacitor Cg4 are arranged side by side on the 14th layer (S14) to have a configuration similar to that of the conventional technique FIG. . In the embodiment shown in FIG. 2, the third-order attenuation of the GSM transmission band is obtained using a low-pass filter composed of an inductor Lg3, capacitors Cg7, Cg4, and Cg3, and inductors Lf1, Lf2, and capacitors This is because the low-pass filter composed of Cf1 is used to attenuate the second harmonic of the GSM transmission band, and therefore the harmonics can be easily attenuated without applying the present invention.

Next, the whole of FIG. 3 which shows the laminated body of the high frequency switch module which concerns on this invention is demonstrated.
On the dielectric layer S1, land electrodes for mounting diodes, chip resistors, chip capacitors, and chip inductors are printed.
In the equivalent circuit shown in FIG. 2, in this embodiment, in addition to the diode (Dd1, Dd2, Dg1, Dg2, Dp1, Dp2), the resistor (Rg, Rp, Rd), the inductor Ls and the capacitor (Cg2, Cg6) , Cd2, Cd5, Cvg, Cvd), and an inductor Le inserted for ESD countermeasures, a capacitor Cec constituting a π-type high-pass filter also inserted for ESD countermeasures, and series resonance of the inductor Len and the capacitor Cen The circuit and the inductor Les were also external components of the laminate.
In FIG. 3, black circles are via holes, and the electrode patterns formed in the dielectric layers S1 to S15 are electrically connected to constitute a high-frequency switch module whose equivalent circuit is shown in FIG. Hereinafter, description will be made using the reference numerals shown in FIG.

In the dielectric layer S2, an electrode pattern for electrically connecting the land electrode formed in the dielectric layer S1 and the electrode pattern formed in the dielectric layers S3 to S15 is formed.
On the dielectric layer S3, an electrode pattern to be a capacitor is printed, and capacitors Cd1, Cd7, Cf2, Cg7, Cp3, and Cp5 are formed.
On the dielectric layer S4, an electrode pattern to be a capacitor is printed, and capacitors Cf2, Cf3, Cg7, and Cs are formed.
The dielectric layer S5 is printed with an electrode pattern serving as a capacitor, and capacitors Cd1, Cd4, Cf3, Cg5, Cg7, Cp1, and Cs are formed.
On the dielectric layer S6, GND1 that is a ground electrode pattern and electrode patterns that are capacitors Cf2, Cf3, and Cs are printed.
An electrode pattern to be the capacitor Cf2 is printed on the dielectric layer S7.
An electrode pattern serving as an inductor is printed on the dielectric layer S8, and inductors Lf1, Lf2, Lf3, Lg1, and Lg3 are formed.
An electrode pattern serving as an inductor is printed on the dielectric layer S9, and inductors Ld1, Ld2, Ld3, Lf1, Lf2, Lf3, Lg1, Lg2, Lg3, and Lp1 are formed.
An electrode pattern serving as an inductor is printed on the dielectric layer S10, and inductors Ld1, Ld2, Ld3, Lf1, Lf2, Lf3, Lg1, Lg2, Lg3, Lp1, and Lp2 are formed.
An electrode pattern serving as an inductor is printed on the dielectric layer S11, and inductors Ld1, Ld2, Ld3, Lf1, Lf2, Lf3, Lg1, Lg2, Lg3, Lp1, and Lp2 are formed.
An electrode pattern serving as an inductor is printed on the dielectric layer S12, and inductors Ld1, Ld3, Lf1, Lf2, Lf3, Lg1, Lg2, Lg3, Lp1, and Lp2 are formed.
In the dielectric layer S13, GND2 serving as a ground electrode pattern is formed.
The dielectric layer S14 is printed with an electrode pattern serving as a capacitor, and capacitors Cd3, Cf1, Cf4, Cg1, Cg3, Cg4, and Cvp are formed.
In the dielectric layer S15, GND3 serving as a ground electrode pattern is formed.

In FIG. 3, the dielectric layers S1 to S15 are stacked in order from the top. The dielectric layer S15 is the lowest layer. The surface illustrated as “rear surface” under the dielectric layer S15 is the rear surface of the dielectric layer S15, and reference characters Vd, Vg, and Vp denote terminal electrodes corresponding to the control terminals Vd, Vg, and Vp in FIG. Show.
Symbol Tx1 indicates a terminal electrode connected to the GSM900 transmission terminal, and symbol Rx1 indicates a terminal electrode connected to the GSM900 reception terminal. Symbol Tx2 indicates a terminal electrode connected to a transmission terminal common to DCS and PCS, Symbol Rx2 indicates a terminal electrode connected to a DCS reception terminal, and symbol Rx3 indicates a terminal electrode connected to a PCS reception terminal. Reference numeral Ant denotes a terminal electrode connected to the antenna terminal Ant. These terminal electrodes are used for connection with an external circuit.
The hatched terminal electrode is a ground electrode. The antenna terminal electrode Ant, the transmission terminal electrodes Tx1, Tx2, the reception terminal electrodes Rx1 to Rx3, and the terminal electrodes Vg, Vp, Vd of the control terminal are arranged between the ground electrodes GND, so that the isolation between the terminals is improved. Is done.

Hereinafter, the low-pass filter and the high-frequency switch module according to the present invention will be described using specific embodiments. The technical idea of the present invention is not limited to a specific embodiment.
[Example 1]
A low-pass filter according to the present invention will be described.
FIG. 1 shows the structure of the multilayer substrate, and FIG. 5 shows an equivalent circuit. FIG. 5 is the same as an equivalent circuit of a conventionally used π-type low-pass filter.
The dielectric layers S1 to S10 are made of ceramic dielectric material (LTCC) that can be fired at a low temperature of 950 ° C. or lower, and have a sheet thickness of 40 to 200 μm so that a transmission line and a capacitor can be easily formed. After laminating the dielectric layers S1 to S10 and filling the via holes with the conductive paste, the dielectric layers S1 to S10 were fired at 950 ° C. to obtain a laminated body of a low-pass filter.
Compared with the conventional low-pass filter shown in FIG. 6, it was confirmed that the amount of attenuation with respect to the harmonics greatly increased. In addition, the quantitative comparison test was done with the high frequency switch module shown in [Example 2]. This is because it is often used as a module rather than a single low-pass filter.

[Example 2]
The high frequency switch module according to the present invention will be described.
FIG. 2 shows an equivalent circuit, and FIG. 3 shows the structure of the multilayer substrate. Here, the comparative example is a high-frequency switch module in which the conventional low-pass filter shown in FIG. 6 is integrated.
A method for measuring the attenuation will be described. That is, a signal of 0.1 to 6 GHz was input to the DCS / PCS common transmission terminal Tx2, and a signal output to the antenna terminal Ant was measured using a spectrum analyzer.
With reference to FIG. 4, the measurement results of attenuation in [Example 2] will be described. The attenuation of the high-frequency switch module according to the present invention shown in FIG. 4A is set to f ₀ (1.8 GHz) as the center frequency compared to the attenuation of the high-frequency switch module of the comparative example shown in FIG. It can be seen that the attenuation in the harmonics of 2f ₀ (3.6 GHz) and 3f ₀ (5.4 GHz) has been remarkably improved. That is, in the second harmonic, the comparative example is −30 (db), in the present invention, −37 (db). In the third harmonic, the comparative example is −35 (db), and in the present invention, −45 (db). ), And there was a marked increase in harmonic attenuation.

  According to the present invention, it is possible to provide a laminated low-pass filter with a sufficient amount of attenuation of harmonics and a high-frequency switch module using the same, which contributes greatly to the reduction in size and performance of mobile communication devices.

It is a figure which shows the electrode pattern of each layer at the time of comprising the low-pass filter which concerns on this invention with a laminated substrate. It is an equivalent circuit diagram of the high frequency switch module according to the present invention. It is a figure which shows the electrode pattern of each layer at the time of comprising the high frequency switch module which concerns on this invention with a laminated substrate. It is a frequency characteristic figure of the amount of attenuation in the case of the present invention (Drawing 5 (A)) and the case of a comparative example (Drawing 5 (B)) in the high frequency switch module concerning the present invention. It is an equivalent circuit diagram of a general low-pass filter. It is a figure which shows the electrode pattern of each layer at the time of comprising the conventional low-pass filter with a laminated substrate.

Explanation of symbols

Ant: Antenna terminals Cd1 to Cd5, Cf1 to Cf4, Cg1 to Cg6, Cp1 to Cp5: Capacitors Cvd, Cvg, Cvp: Capacitors Dd1, Dd2, Dg1, Dg2, Dp1, Dp2: Diodes DIP: Demultiplexing circuits EL1, EL2, EL4: Electrode patterns EL31-EL34: Electrode patterns ELCG3, ELCG4: Electrode patterns ELCG71-ELCG73: Electrode patterns ELLG31-ELLG34: Electrode patterns GND1-GND3: Ground electrode patterns Ld1-Ld5, Lf1-Lf4, Lg1-Lg3, Lp1, Lp2 : Transmission line LPF1, LPF2: low pass filter P1: output terminal P2: input terminals Rd, Rg, Rp: resistor Rx1: GSM reception terminal Rx2: DCS reception terminal Rx3: PCS reception terminals S1 to S15: induction Body layer Tx1: GSM transmitting terminal Tx2: DCS / PCS common transmitting terminal Vd, Vg, Vp: control terminal

Claims (3)

A first capacitor connected in parallel with the inductor; a second capacitor connected between one end of the inductor and ground; and a third capacitor connected between the other end of the inductor and ground. In the multilayer low-pass filter formed by forming the inductor and the first, second, and third capacitors in a dielectric layer with an electrode pattern, and laminating the dielectric layer and the electrode pattern,
The dielectric layer has at least three ground electrode patterns, and a dielectric layer on which a first ground electrode pattern having a smaller area than the other ground electrode patterns is formed and a second ground electrode pattern are formed. An electrode pattern forming the inductor is disposed between the dielectric layers ,
An electrode pattern for forming a first capacitor and a second capacitor is disposed on the opposite side of the first ground electrode pattern from the electrode pattern for forming the inductor,
An electrode pattern forming a third capacitor is disposed between the second ground electrode pattern and the third ground electrode pattern,
Accordingly, the second capacitor and the third capacitor are configured in different portions in the stacking direction via the first ground electrode pattern and the second ground electrode pattern,
The first capacitor, the second capacitor, and the electrode pattern to form a third capacitor, are formed so as to overlap a look at the laminate from the laminating direction, the electrode pattern forming the inductor, the A laminated low-pass filter , which is disposed on the first ground electrode pattern side so as not to overlap any of the ground electrode patterns . Including a switch circuit for connecting the multilayer low-pass filter according to claim 1 to a transmission signal path;
A high-frequency switch module, wherein a switch element constituting the switch circuit is mounted on a laminated low-pass filter. A high-pass filter connected to the switch circuit;
The high-pass filter includes a series resonance circuit including an inductor and a capacitor connected between a reception signal path and a ground, and the series resonance circuit has a resonance frequency between 100 MHz and 500 MHz. Item 5. The high frequency switch module according to Item 2.

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