WO2007092557A2 - Anneaux d'empilement pour tranches - Google Patents

Anneaux d'empilement pour tranches Download PDF

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Publication number
WO2007092557A2
WO2007092557A2 PCT/US2007/003367 US2007003367W WO2007092557A2 WO 2007092557 A2 WO2007092557 A2 WO 2007092557A2 US 2007003367 W US2007003367 W US 2007003367W WO 2007092557 A2 WO2007092557 A2 WO 2007092557A2
Authority
WO
WIPO (PCT)
Prior art keywords
wafer
stacking
ring
rings
wafers
Prior art date
Application number
PCT/US2007/003367
Other languages
English (en)
Other versions
WO2007092557A3 (fr
Inventor
Will D. Harrison
Phil Glynn
Original Assignee
Entegris, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Entegris, Inc. filed Critical Entegris, Inc.
Publication of WO2007092557A2 publication Critical patent/WO2007092557A2/fr
Publication of WO2007092557A3 publication Critical patent/WO2007092557A3/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/67346—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders characterized by being specially adapted for supporting a single substrate or by comprising a stack of such individual supports

Definitions

  • the present invention relates to wafer carriers or packages used for shipping semiconductor wafers.
  • the present invention relates to rings for stacking wafers in a wafer carrier.
  • Wafers typically made from silicon are processed into integrated circuits. Such wafers are circular in shape, very fragile, and must be shipped from one location to other locations for processing.
  • Various containers are known for shipping wafers. Wafers can be shipped with their edges in a vertical plane in a separated array. See for example U.S. Patent No. 6,267,245 owned by the owner of the instant invention. Such arrangement utilizes edge support which is advantageous in that the sensitive vulnerable areas away from the edge portions are not touched. Also, such containers utilize significant volume and are thus shipping is generally more expensive than shipping in a horizontally stacked configuration (stack axis extending vertically) in a "coin stack wafer shipper" as is illustrated in U.S. Patent No.
  • Certain semiconductor wafers have wafer bumps protruding from the wafer surface in the interior of the wafers that can be damaged during shipping, especially when stacked in a horizontal configuration. The damage often occurs when the surface of one wafer is in contact with the back side of a wafer above it. The wafer bumps may be damaged due to sheer forces from one wafer rotating and/or shifting relative to another wafer or by compression.
  • the invention as presented in the preferred embodiments is a stackable ring for shipping wafers, particularly bumped wafers, thick and thinned varieties, in horizontal wafer shippers or coin stack shippers without damaging the bumps.
  • the invention also comprises the combination of the horizontal wafer shippers with pockets sized to receive a stack of wafers rings and wafers.
  • a ring is made of a rigid material with a wafer recess adjacent the top surface and inside surface to suspend the wafer by its perimeter.
  • Stacking structure means are provided, for example, each ring also has a ring recess adjacent the bottom surface and outside surface in which a portion of the ring below it in the shipper is disposed. Stacking the rings with wafers sandwiched between adjacent wafers provide a secure and dense package.
  • An advantage of the preferred embodiments is the ability to support a bumped wafer without damaging the bumps.
  • the ring has an open center and supports the wafer by its perimeter on a narrow groove, so that wafer bumps are not damaged.
  • Another advantage of the preferred embodiments is the ability to stack a plurality of wafers and rings in a shipper without damaging the wafers. There is no contact between adjacent wafers because the rings are spaced so that there is clearance between the bumps of one wafer and the backside of an adjacent wafer. In certain embodiments the rings nest into each other, reducing contact between the wafer and the ring above it and creating an even denser and more cost efficient package.
  • Another advantage in certain embodiments is an enhanced ability to secure the wafer in the ring.
  • the insert above each wafer contacts the edge of the backside of the wafer to help hold it in place in its insert. This reduces movement of the wafer and therefore the likelihood of damage to the wafer.
  • Another advantage in certain embodiments is the reduction or elimination of particle migration.
  • the geometry of the ring can be designed such that it creates a torturous path that prevents particles from migrating.
  • the ring can be formed of more that one material, for example two polymers may be utilized where one provides additional cushioning or resistance to rotation of the rings and/or wafers with respect to the rings.
  • Another advantage in certain embodiments is the ability to lock the rings together relative to one another.
  • the rings can be provided with locking features to lock adjacent rings together. Further, a stack of locked rings can obviate the need for additional outer packaging.
  • an enhanced gap is provided at the top and bottom of the wafer stack such that upon a shock event the middle portions of the wafers can deform and still not contact any of the packaging.
  • Such an additional enhanced gap may be provided by a supplemental spacer ring.
  • FIG. 1 is a top view of a wafer stacking ring according to an embodiment of the present invention.
  • FIG. 2 is a side elevational view of a base portion of a coin stack wafer shipper with a stack of rings and wafers contained therein according to the invention.
  • FIG. 3 is cross section view of the bumped wafer stacking ring embodiment shown in FIG. 1 with a wafer inserted in the ring.
  • FIG. 4 is a cross section view of two ring-wafer combinations stacked on top of each other according to the embodiment shown in FIG. 1.
  • FIG. 5 is an exploded view of a plurality of bumped wafer stacking rings and wafers in a stacked configuration according to an embodiment of the present invention.
  • FIG. 6 is a top view of a bumped wafer stacking ring according to an embodiment of the present invention.
  • FIG. 7 is a cross section view of the bumped wafer stacking ring embodiment shown in FIG. 6.
  • FIG. 8 is a cross section view of a plurality of bumped wafer stacking rings with inserted wafers stacked upon each other according the embodiment shown in FIG. 6.
  • FIG. 9 is a cross section view of a wafer stacking ring of a different configuration according to the invention.
  • FIG. 10 is a cross section view of the wafer stacking ring of FIG. 9 inverted and with suitable dimensions.
  • FIGS. 1, 2, 3, 4 depict a first embodiment of the present invention.
  • a top view of a bumped wafer stacking ring 100 in accordance with an embodiment of the present invention.
  • This embodiment employs both a circular inner perimeter shape 102 and a circular outer perimeter shape 104, with a hole 106 in the middle.
  • the stacking rings are suitable for use in horizontal shippers such as illustrated in U.S. Patent Nos. 6,550,619, owned by the owner of this application.
  • Prior art rings for use in horizontal shippers are illustrated in U.S. Patent No. 6,926,150. Said rings have features making them suitable for bumped wafers.
  • the 6,550,619 and 6,926,150 patents are incorporated herein by reference.
  • Stacking ring 100 includes an inner surface 108 and an opposing outer surface 110 that respectively define inner perimeter shape 102 and outer perimeter shape 104 of the stacking ring 100.
  • Stacking ring 100 further includes circular planar uppermost surface, such as a top surface 112, and a circular planar lowermost surface, such as opposing bottom surface 114.
  • a wafer recess 120 is disposed adjacent inner surface 108 and top surface 112 and is defined by wafer recess base surface 118 and wafer recess side surface 116.
  • Wafer recess base surface 118 extends a first length 130 between inner surface 108 and wafer recess side surface 116.
  • Wafer recess side surface 116 extends a first depth 128 between top surface 112 and wafer recess base surface 118.
  • the respective wafer recess base surface 118 and top surface 112 may be considered to be inner and outer upper surfaces.
  • the bottom surface 114 and base surface 124 may be viewed as stepped lower surfaces.
  • a ring recess 126 is disposed adjacent outer surface 110 and bottom surface 114 and is defined by ring recess base surface 124 and ring recess side surface 122.
  • Ring recess base surface 124 extends a second length 134 between outer surface 110 and ring recess side surface 122.
  • Ring recess side surface 122 extends a second depth 132 between bottom surface 114 and ring recess base surface 124.
  • a bumped wafer stacking ring 100 according to an embodiment of the invention is shown supporting a wafer 136.
  • Wafer 136 is supported by its perimeter and rests on wafer recess base surface 118 in wafer receiving portion 120. Wafer 136 may also rest against wafer recess side surface 116 of wafer receiving portion 120 so that the wafer 136 does not freely slide horizontally within the stacking ring 100 during shipping and handling.
  • the length 130 of wafer recess base surface 118 may be such that wafer 136 does not contact wafer recess side surface 116 in order to account for manufacturing tolerances of wafers 136 and stacking rings 100 and to prevent wafers 136 from sticking in the stacking rings 100 or breaking due to stresses imparted to the wafers 136, themselves.
  • Wafer 136 is positioned with wafer bumps (not pictured) facing downward, so that they do not contact any other surface.
  • each wafer 136 fits into each stacking ring 10OA, IOOB in the above described manner and is sandwiched between the stacking rings IOOA and IOOB such that the bottom surface 114 is above the top surface 112.
  • the bottom surface 114 of the upper stacking ring IOOA rests on the backside of the wafer 136 below it. Contact is with only a small portion of the wafer 136 to avoid damaging the wafer 136.
  • Ring recess base surface 124 of the upper stacking ring IOOA may or may not contact top surface 112 of lower stacking ring IOOB depending on the thickness of the wafer and the precise geometry of the rings. Lateral movement of the portion of the ring IOOA bounded by the bottom surface 114 is constrained by the portion of the ring I OOB bounded by the top surface 112.
  • a further ring 137 shown in dashed lines may be used to separate the stack from the base of the horizontal shipper or from the foam or other cushioning in the horizontal shipper. This allows substantial deformation during shock incidents of the middle of the stack of wafers without the lowermost wafer contacting the packaging and prevents the adjacent wafer from contacting the bottom-most wafer, thereby causing damage.
  • Foam 138 may be included above and below the stacking arrangement for additional protection. Such a configuration eliminates the need for the additional spacers and foam pieces currently used between wafers, thus creating a denser and more cost efficient wafer shipper.
  • FIGS. 6, 7, and 8 Another embodiment of a wafer stacking ring 200 with a more complex geometry can be seen in FIGS. 6, 7, and 8.
  • This embodiment 200 also employs both a circular inner perimeter shape 202 and a circular outer perimeter shape 204, with a hole 206 in the middle.
  • This embodiment 200 additionally includes wafer-accessing slots 208, which allow easier removal of wafers 216, whether by robotic or manual means.
  • this stacking ring embodiment 200 has a semi- conical cross-sectional shape. Though a simpler cone shaped cross section is also within the scope of the invention, additional geometry increases resistance to particle migration and creates secondary locations for interfacing with automation or packaging.
  • the semi-conical shape allows for each stacking ring 200 to nest into another stacking ring 200.
  • the bottom surface 212 of one stacking ring 200 rests on the top surface 210 of the stacking ring 200 below it, minimizing contact between each stacking ring 200 and the wafer 216 below it.
  • Angled top surfaces 218, 220 of one stacking ring 200 guide the angled bottom surfaces 222, 224 of an adjacent ring into place allowing for accurate and precise alignment of stacking rings 200 and wafers 216.
  • wafer 214 is formed by wafer recess bare surface 213 and wafer recess angled surface 215. The many angles additionally form a torturous path to the wafer that reduces or eliminates particle migration. Each wafer 216 rests in the wafer recess 214, and has only slight edge contact with the stacking ring 200 disposed above it.
  • a wafer carrier 260 which includes a base 262 and a cover 264.
  • the base 262 has a base portion 268 and a wafer storage member 270 extending from the base portion 268 and opening to form an access 271.
  • a pair of generally opposed flanges 272, 274 also extends from the base portion 268, the flanges 272, 274 ending in respective hooked tips 276, 278.
  • the cover has a pair of flanges 282, 284 extending from a cover body 286 such that the hooked tips 276, 278 seat at the flanges when the cover is secured over the base.
  • plurality of the wafer stacking rings, 100 or 200, with a plurality of wafers secured therebetween may be disposed in the wafer storage member 270. If there is a remaining space, one or more foam pads (e.g., 138) may be placed in the wafer storage member until the stack is even with the top of the wafer storage member. Then the cover is secured as described above.
  • foam pads e.g., 138
  • rings can include locking features such as an interference fit between adjacent rings. Referring to FIG. 9, such can be at the vertical juncture between adjacent rings.
  • the embodiments of FIGS. 9 and 10 include an inner shoulder 242 and an outer shoulder 248 to facilitate cooperation and stacking between adjacent rings. Note that in this configuration the tolerences provide direct vertical engagement between adjacent rings. The dimensions plus or minus 20% of those shown in FIG. 10 are believed to be quite suitable for an effective ring design.
  • a stack of locked rings can in certain instances provide a separate containment or package in itself, with reduced need for a high integrity outer container or other outer packaging.
  • Stacking rings are preferably made from a rigid plastic, such as polypropylene, polyethylene, terephthalate, or polycarbonate and preferably have static dissipative characteristics such as when carbon fibers are present.
  • Stacking rings are preferably formed by injection molding but can also be formed by vacuum molding, machining, or any other suitable process. Additionally, overmolding could be employed to create a composite ring. Such a composite ring could have a rigid plastic outer surface while employing a softer inner material where the wafer is contacted. This would increase shock absorption of the ring, while maintaining sturdy support for the wafer.
  • discrete portions configured for example as pads facing upwardly or downwardly, may be utilized for cushioning or providing anti rotation characteristics.
  • Such pads may be recessed into the ring and have an exposed portion extending just beyond the ring surface adjacent to pads. For example less than .010 inch.
  • a portion 250 may be overmolded to provide a pad or high friction surface to prevent the wafers from rotating.
  • Such portions 252 may also be positioned at the ring to ring interface as illustrated in FIG. 9. Such portions may be elastomeric or at least softer than the balance of the ring.
  • Stacking rings may also be provided with anti rotation features or characteristics to better keep adjacent stacking rings together.
  • Such features may be suitable projections and cooperating recesses on, for example the top surface and bottom surface of the rings.
  • pads as described above could be utilized in the ring to ring contact areas to prevent rotation.
  • a stacking ring in accordance with the present invention may be formed in various sizes to accommodate variously sized wafers.
  • a ring may be molded with a closed center section or with supporting structure to better support the wafer and prevent bowing.
  • a stacking ring employing a closed center section may utilize a softer material in the center section in order to prevent damages to the wafer bumps. Such a material should be soft enough to conform to the bumps.
  • a center section could have preformed grooves to correspond with the wafer bumps.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Packaging Frangible Articles (AREA)

Abstract

La présente invention telle qu'elle est décrite dans des modes de réalisation préférés concerne un anneau superposable pour le transport de tranches, notamment des variétés épaisses et minces de tranches à plot de contact, dans des dispositifs de transport de tranches horizontaux ou des dispositifs de transport à empilement en pièces sans endommager les plots de contact. L'invention concerne également la combinaison de dispositifs de transport de tranches horizontaux avec des poches dimensionnées pour la réception d'une pile d'anneaux à tranches et de tranches. Un anneau est réalisé en un métal rigide avec un évidement pour des tranches adjacent à la surface supérieure et à la surface intérieure pour la suspension de la tranche par son périmètre. Des moyens de structure d'empilement sont prévus, par exemple, chaque anneau comprend un évidement adjacent à la surface inférieure et la surface extérieure dans lequel une partie de l'anneau en-dessous de l'évidement dans le dispositif de transport est disposée. L'empilement des anneaux avec des tranches enserrées entre des tranches assure un emballage sécurisé et dense.
PCT/US2007/003367 2006-02-08 2007-02-08 Anneaux d'empilement pour tranches WO2007092557A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US77183906P 2006-02-08 2006-02-08
US60/771,839 2006-02-08

Publications (2)

Publication Number Publication Date
WO2007092557A2 true WO2007092557A2 (fr) 2007-08-16
WO2007092557A3 WO2007092557A3 (fr) 2008-07-17

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2178114A3 (fr) * 2008-10-14 2011-11-23 Christian Senning Verpackungsmaschinen GmbH & Co. Emballages pour produits fins plats en forme de disques
WO2015130690A1 (fr) * 2014-02-25 2015-09-03 Entegris, Inc. Conditionnement d'expédition de plaquettes à anneaux de support empilés
US20170178937A1 (en) * 2015-12-18 2017-06-22 Texas Instruments Incorporated Interlocking nest wafer protector
EP3231009A4 (fr) * 2014-12-08 2018-08-15 Entegris, Inc. Contenant de substrats horizontaux à ressort de coin incorporé pour confinement de substrats
US10535542B2 (en) 2016-07-28 2020-01-14 Infineon Technologies Ag Wafer box, method for arranging wafers in a wafer box, wafer protection plate and method for protecting a wafer
EP3664128A1 (fr) * 2018-12-06 2020-06-10 Heraeus Deutschland GmbH & Co. KG Unité d'emballage pour substrat
US20230005771A1 (en) * 2017-08-29 2023-01-05 Daewon Semiconductor Packaging Industrial Company Separators for handling, transporting, or storing semiconductor wafers
TWI793341B (zh) * 2018-06-27 2023-02-21 日商村田機械股份有限公司 基材載具及基材載具堆疊體

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG11201704304XA (en) * 2014-11-27 2017-06-29 Achilles Corp Ring spacer

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6550619B2 (en) * 2000-05-09 2003-04-22 Entergris, Inc. Shock resistant variable load tolerant wafer shipper
US20050072121A1 (en) * 2003-10-06 2005-04-07 Texas Instruments Incorporated Method and system for shipping semiconductor wafers
US6926150B2 (en) * 2003-02-05 2005-08-09 Texas Instruments Incorporated Protective interleaf for stacked wafer shipping

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6550619B2 (en) * 2000-05-09 2003-04-22 Entergris, Inc. Shock resistant variable load tolerant wafer shipper
US6926150B2 (en) * 2003-02-05 2005-08-09 Texas Instruments Incorporated Protective interleaf for stacked wafer shipping
US20050072121A1 (en) * 2003-10-06 2005-04-07 Texas Instruments Incorporated Method and system for shipping semiconductor wafers

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2178114A3 (fr) * 2008-10-14 2011-11-23 Christian Senning Verpackungsmaschinen GmbH & Co. Emballages pour produits fins plats en forme de disques
CN106463437B (zh) * 2014-02-25 2019-09-06 恩特格里斯公司 具有堆叠式支撑环的晶片运送装置
WO2015130690A1 (fr) * 2014-02-25 2015-09-03 Entegris, Inc. Conditionnement d'expédition de plaquettes à anneaux de support empilés
CN106463437A (zh) * 2014-02-25 2017-02-22 恩特格里斯公司 具有堆叠式支撑环的晶片运送装置
US10896834B2 (en) 2014-02-25 2021-01-19 Entegris, Inc. Wafer shipper with stacked support rings
EP3111472A4 (fr) * 2014-02-25 2017-07-12 Entegris, Inc. Conditionnement d'expédition de plaquettes à anneaux de support empilés
EP3231009A4 (fr) * 2014-12-08 2018-08-15 Entegris, Inc. Contenant de substrats horizontaux à ressort de coin incorporé pour confinement de substrats
US20170178937A1 (en) * 2015-12-18 2017-06-22 Texas Instruments Incorporated Interlocking nest wafer protector
US10832927B2 (en) * 2015-12-18 2020-11-10 Texas Instruments Incorporated Interlocking nest wafer protector
CN106892226A (zh) * 2015-12-18 2017-06-27 德州仪器公司 互锁嵌套晶片保护器
US10535542B2 (en) 2016-07-28 2020-01-14 Infineon Technologies Ag Wafer box, method for arranging wafers in a wafer box, wafer protection plate and method for protecting a wafer
US20230005771A1 (en) * 2017-08-29 2023-01-05 Daewon Semiconductor Packaging Industrial Company Separators for handling, transporting, or storing semiconductor wafers
TWI793341B (zh) * 2018-06-27 2023-02-21 日商村田機械股份有限公司 基材載具及基材載具堆疊體
EP3664128A1 (fr) * 2018-12-06 2020-06-10 Heraeus Deutschland GmbH & Co. KG Unité d'emballage pour substrat
WO2020114787A1 (fr) * 2018-12-06 2020-06-11 Heraeus Deutschland GmbH & Co. KG Unité d'emballage destinés à des substrats

Also Published As

Publication number Publication date
WO2007092557A3 (fr) 2008-07-17
TW200746349A (en) 2007-12-16

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