WO2007000997A1 - ビデオ信号処理回路、およびそれを搭載した電子機器 - Google Patents
ビデオ信号処理回路、およびそれを搭載した電子機器 Download PDFInfo
- Publication number
- WO2007000997A1 WO2007000997A1 PCT/JP2006/312805 JP2006312805W WO2007000997A1 WO 2007000997 A1 WO2007000997 A1 WO 2007000997A1 JP 2006312805 W JP2006312805 W JP 2006312805W WO 2007000997 A1 WO2007000997 A1 WO 2007000997A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- video signal
- circuit
- signal processing
- voltage
- frequency
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
- H04N5/148—Video amplifiers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/63—Generation or supply of power specially adapted for television receivers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
- H04N5/21—Circuitry for suppressing or minimising disturbance, e.g. moiré or halo
- H04N5/213—Circuitry for suppressing or minimising impulsive noise
Definitions
- the present invention relates to a video signal processing circuit using a voltage supplied from a camera such as a DC-DC converter, and an electronic device equipped with the video signal processing circuit.
- a plurality of different voltages other than a single type of power supply voltage used in the video signal processing circuit may be required.
- a method of supplying a plurality of power supply voltages from an external power supply circuit can be considered.
- a charge pump circuit instead of supplying multiple power supply voltages from the outside, use a charge pump circuit to convert the power supply voltage to a different voltage using one type of power supply voltage to be supplied, and obtain multiple voltages. There is also a technique.
- Patent Document 1 discloses display unevenness caused by ripples generated in the drive voltage.
- Patent Document 1 Japanese Patent Laid-Open No. 2001-92402
- the video signal processing circuit When the voltage generated by such a charge pump circuit is used in a video signal processing circuit, the video signal processing circuit operates by receiving the supply of a voltage on which noise is superimposed. The device may be affected by that.
- the operation clock of the charge pump circuit directly interferes with the video signal processing circuit in the IC chip. Therefore, it becomes a bigger problem.
- image noise such as a striped line is generated on the screen due to the noise component of the charge pump circuit force, which causes the image quality to deteriorate.
- the present invention has been made in view of such circumstances, and an object of the present invention is to reduce the influence of image quality degradation in a circuit configuration in which a voltage is supplied, such as a DC-DC converter.
- An object of the present invention is to provide a video signal processing circuit capable of performing the same and an electronic device equipped with the circuit. Means for solving the problem
- a video signal processing circuit includes a video signal processing unit that performs predetermined processing on a video signal, and a plurality of different power supply voltages for the video signal processing unit.
- the operation is performed so as to visually reduce quality degradation due to image noise generated in an image generated from a video signal processed by the video signal processing unit mixed with noise caused by an operation clock of a circuit to be generated.
- Clock frequency is selected.
- the “predetermined fixed voltage” may be a power supply voltage.
- the “clock generation circuit” may be an oscillation circuit or a circuit that converts a given clock to generate a new clock.
- the clock generation circuit may set the frequency of the operation clock so that a line due to a set of image noises generated in the image flows in an oblique direction.
- the clock generation circuit may set the frequency of the operation clock so that the line moves at a predetermined speed or higher.
- the clock generation circuit may set the frequency of the operation clock so that a plurality of lines are generated.
- the operating clock frequency may be set in the range of 90kHz to 230kHz. According to this aspect, it is possible to adjust to image noise that is not noticeable to human eyes.
- the clock generation circuit may set the frequency of the operation clock so that the frequency of the operation clock and the frequency of the horizontal synchronization signal of the video signal satisfy a predetermined relationship.
- the frequency of the operation clock may be set so that the frequency of the operation clock does not become an integer multiple or substantially an integer multiple of the horizontal sync signal frequency of the video signal.
- the operating clock frequency approaches an integer multiple of the horizontal sync signal frequency of the video signal, the resulting image noise becomes static. It becomes a vertical line. According to this aspect, it is possible to suppress the occurrence of such image noise.
- the video signal processing unit may include an operational amplifier for amplifying the input video signal with a predetermined gain.
- the operational amplifier may operate with a plurality of power supply voltages and receive at least one power supply voltage to receive a circuit force that generates another voltage. A circuit that generates another voltage
- the DC-DC converter generates a negative voltage by dropping a predetermined fixed voltage, and the operational amplifier receives a predetermined fixed voltage from the positive power supply terminal.
- the terminal force may also operate by receiving a negative voltage.
- At least the video signal processing unit and a circuit for generating another voltage may be integrated on the same semiconductor substrate.
- the clock generation circuit may also be integrated on the same board.
- the electronic device includes a video signal processing circuit and a battery that supplies a predetermined fixed voltage to the video signal processing circuit.
- a video signal processing circuit with a plurality of power supplies can be configured with a small circuit, and the influence of image quality degradation caused by using a DC-DC converter can be reduced.
- the influence of image quality degradation can be reduced by a circuit configuration in which a voltage is also supplied, such as a DC-DC converter.
- FIG. 1 is a diagram showing an example of an image displayed on a display according to a horizontal synchronization signal.
- FIG. 2 is a diagram showing a configuration of a video signal processing circuit and a display unit in Embodiment 1 of the present invention.
- FIG. 3 is a diagram showing a characteristic between an oscillation frequency and a ripple rejection rate.
- FIG. 4 is a diagram illustrating a configuration example of an oscillation circuit.
- FIG. 5 is a diagram showing a path through which noise generated in the charge pump circuit flows into the preceding circuit.
- FIG. 6 is a diagram showing a portable device and a display device equipped with a video signal processing circuit. Explanation of symbols
- 10 video amplification circuit 20 oscillation circuit, 30 charge pump circuit, 100 video signal processing circuit, 110 battery, 200 display unit, 210 display device, 310 digital to analog converter, 400 electronic device, 410 cable.
- the video signal includes a horizontal synchronization signal in addition to image information, and an image is reproduced on a display such as a television screen based on the horizontal synchronization signal.
- the horizontal sync signal uses a frequency of about 15.734 kHz for the NTSC system and about 15.625 kHz for the PAL system.
- FIG. 1 shows an example of an image displayed on the display according to the horizontal synchronization signal.
- the electron beam scans the upper left force and lower right in the screen, and an image is formed.
- scanning line h in Fig. 1 one image is formed by repeating scanning from the left end to the right end in the screen a plurality of times.
- the horizontal sync signal specifies the frequency of one scan from the left end force to the right end in the screen.
- noise of vertical line n is generated on the screen.
- noise n is generated at the same position for each scanning line h when both frequencies coincide with each other, and they are arranged in a line on the screen.
- the noise appears in the same position, so it looks stationary.
- the above charge pump circuit noise When the frequency of is double the frequency of the horizontal sync signal, two stationary vertical lines n are generated based on the same principle. Further, the same phenomenon continues even when the frequency of the noise becomes high, and when the frequency of the noise and the frequency of the horizontal synchronization signal become an integer ratio, the number of vertical lines n is generated.
- FIG. 2 shows a configuration of the video signal processing circuit 100 and the display unit 200 in Embodiment 1 of the present invention.
- the video signal processing circuit 100 in this embodiment amplifies an input video signal and supplies the amplified video signal to the display unit 200 via a 75 ⁇ driver.
- the video signal processing circuit 100 includes a video amplification circuit 10, an oscillation circuit 20, and a charge pump circuit 30.
- the output terminal of the video amplifier circuit 10 is connected to the input terminal of the display unit 200 via the first resistor R10.
- the second resistor R12 is connected between the connection point between the first resistor R10 and the input terminal of the display unit 200 and the ground.
- the first resistor R10 and the second resistor R12 function as a 75 ⁇ driver.
- the video amplification circuit 10, the oscillation circuit 20, and the charge pump circuit 30 are supplied with a power supply voltage Vcc.
- the video amplifier circuit 10 is connected to the first capacitor C10 in order to be supplied with a negative power supply.
- the first capacitor C10 holds the output voltage of the charge pump circuit 30.
- FIG. 2 shows an example in which the video amplifier circuit 10, the oscillation circuit 20, the charge pump circuit 30, and the first resistor R10 are integrated into an IC chip.
- the video signal processing circuit 100 is not limited to the configuration in which the IC chip is provided. Also, when the IC is formed as an IC chip, the designer can make any circuit element into an IC chip.
- the video amplification circuit 10 is configured by using an operational amplifier or the like, and an input video signal Is amplified with a predetermined gain.
- the operational amplifier uses two power sources, that is, positive and negative power sources instead of a single power source.
- Using an operational amplifier with positive and negative power supplies can set the DC component to the OV level, which contributes to the miniaturization of the entire circuit without the need to connect a large capacitor to the output of the operational amplifier.
- the charge pump circuit 30 Since the charge pump circuit 30 supplies a negative voltage to the video amplifier circuit 10 as described above, the charge pump circuit 30 generates the negative voltage using the power supply voltage Vcc.
- the basic configuration includes a switch for switching the capacitance, the first path between the power supply voltage Vcc and the ground, and the second path between the power supply voltage Vcc and the capacity for holding the output voltage for the path of the capacitance. .
- the charge pump circuit 30 inverts the power supply voltage Vcc through such processing.
- the charge pump circuit 30 is an example of a DC-DC converter, and a switching regulator or the like may be used.
- the oscillation circuit 20 generates a clock for controlling on / off of the switch in the charge pump circuit 30.
- the frequency of this clock is adjusted so as not to be an integral multiple of the frequency of the horizontal synchronizing signal of the video signal.
- the frequency of the operation clock of the charge pump circuit 30 from the viewpoint of the quality of an image in which video signal power is also generated, the noise itself generated in the image can be suppressed as the frequency is lowered.
- the higher the frequency the faster the noise flow in the image and the more noticeable it is to the human eye. There may also be a sensitive evaluation that the more fringe lines caused by noise, the less you care.
- the frequency of the operation clock of the charge pump circuit 30 is set in the range of about 90 kHz to 230 kHz and set so as not to be an integral multiple of the horizontal synchronization signal.
- FIG. 3 shows the characteristics between oscillation frequency and ripple rejection.
- the horizontal axis in Fig. 3 shows the oscillation frequency fosc, which is described in logarithmic scale.
- the vertical axis shows the ripple rejection ratio RR.
- the ripple rejection ratio RR is -45dB when the oscillation frequency fosc is 90kHz as shown at point A
- the ripple rejection ratio RR is -37dB when the oscillation frequency fosc is 230kHz as shown at point B.
- the difference of 8dB is It is equivalent to about 2.5 times.
- the ripple rejection ratio RR decreases in proportion to the oscillation frequency fosc.
- the operation clock of the charge pump circuit 30 is set to a range of about 90 kHz to 230 kHz.
- FIG. 4 shows a configuration example of the oscillation circuit 20.
- the oscillation circuit 20 includes a pair of first comparator CP22, second comparator CP24, and flip-flop 28.
- the first comparator CP22 and the second comparator CP24 function as a window comparator.
- a series circuit of a first constant current source 24 and a second constant current source 26 is provided between the power supply voltage Vcc and the ground.
- a second capacitor C20 is provided in parallel at the connection point between the first constant current source 24 and the second constant current source 26. The second capacitor C20 makes the voltage at its connection point triangular.
- the output voltage of the second capacitor C20 is applied to the inverting input terminal of the first comparator CP22 and the non-inverting input terminal of the second comparator CP24.
- the first and second reference voltages obtained by dividing the power supply voltage Vcc by the respective resistor strings are applied to the non-inverting input terminal of the first comparator CP22 and the second comparator CP24.
- the first switch SW22 is provided between the power supply voltage Vcc and the first constant current source 24, and the connection point between the first constant current source 24 and the second constant current source 26 and the second constant current
- a second switch SW24 is provided between the source 26 and the power source 26.
- the first switch SW22 is on / off controlled by the output signal of the flip-flop 28, and the second switch SW24 is on / off controlled by the inverted signal.
- a voltage-current conversion circuit 22 for supplying a current to the first constant current source 24 is provided.
- the voltage-current conversion circuit 22 generates a current to be supplied to the first constant current source 24 based on a voltage generated based on the third reference voltage Vref.
- the first comparator CP22 and the second comparator CP24 compare the reference voltage generated by each resistor string with the triangular wave input voltage, and output a high-level signal or a low-level signal.
- the output signal of the first comparator CP22 is input to the reset terminal of the flip-flop 28, and the output signal of the second comparator CP24 is input to the set terminal of the flip-flop 28. Since the first comparator CP22 and the second comparator CP24 have the input terminals connected in reverse, the phase of the output signal is also reversed.
- the flip-flop 28 latches the signals input from the first comparator CP22 and the second comparator CP24 for a predetermined period and outputs them at a predetermined timing.
- the output signal of the flip-flop 28 becomes a square wave signal and becomes an operation clock supplied to the charge pump circuit 30.
- the output signal having the opposite phase to this output signal is a signal for on / off control of the second switch SW24.
- the designer determines the frequency of the output signal of the oscillation circuit 20, and adjusts the resistance value or the capacitance value using laser trimming, diode zapping, or the like. To do. Thereby, the frequency of the operation clock used in the charge pump circuit 30 can be set to a desired value.
- the reference voltage supplied to the voltage-current conversion circuit 22 can be adjusted by trimming.
- six resistors from the third resistor R20 to the eighth resistor R29 are connected in series between the third reference voltage Vref and the ground.
- a first fuse F20, a second fuse F22, a third fuse F28 and a fourth fuse F29 are connected in parallel to the third resistor R20, the fourth resistor R22, the seventh resistor R28 and the eighth resistor R29, respectively.
- connection point force between 5th resistor R24 and 6th resistor R26 Voltage-to-current A reference voltage to be supplied to the conversion circuit 22 is obtained.
- the designer must By cutting one or more with a laser, the resistor string can be set to a predetermined voltage division ratio.
- the output current can be adjusted by adjusting the value of the feedback resistor and the resistor for generating the reference voltage.
- the adjustment of the resistance value for adjusting the ratio between the input voltage and the output current is also performed by the resistor string including the ninth resistor R30, the tenth resistor R32, and the eleventh resistor R34, and the ninth resistor R30. This can be realized by using the third fuse F30 and the fourth fuse F32 respectively connected in parallel to the 10 resistor R32.
- resistors from the twelfth resistor R40 to the seventeenth resistor R49 are connected in series between the power supply voltage Vcc and the ground.
- the seventh fuse F40, the eighth fuse F42, the ninth fuse F46, and the tenth fuse F48 are connected in parallel to the twelfth resistor R40, the thirteenth resistor R42, the fifteenth resistor R46, and the sixteenth resistor R48, respectively.
- the connecting point force between the 14th resistor R44 and the 15th resistor R46 is also used to obtain the reference voltage supplied to the first comparator CP22.
- the capacitance value of the second capacitor may be adjusted. The designer may use one of these adjustments or may use them in a superimposed manner.
- a diode may be used instead of the fuse. In that case, a current exceeding the breakdown voltage may be passed through the diode to cause a short circuit.
- the frequency of the noise mixed with the charge pump circuit power and the video signal are also included.
- the operation clock of the charge pump circuit so that the frequency with the horizontal sync signal does not have a predetermined relationship, it is possible to reduce the influence of the quality degradation of the image generated from the video signal. it can.
- charge pump circuit power First, the influence of image quality degradation due to noise flowing into the negative power supply terminal of the operational amplifier constituting the video amplifier circuit is reduced. be able to.
- the power supply terminal side of the charge pump circuit is also subjected to a current change corresponding to the switching operation, as shown in FIG. 2, the video amplifier circuit 10 and the charge pump circuit 30 can supply the power supply voltage Vcc even with the same power supply line force. If it is received, noise due to the current change may flow into the positive power supply terminal of the operational amplifier constituting the video amplifier circuit 10.
- FIG. 5 is a diagram showing a path through which noise generated in the charge pump circuit flows into the preceding circuit.
- Another IC chip-formed circuit 300 is provided in the previous stage of the IC-chip video signal processing circuit 100 described in FIG.
- the preceding circuit 300 may include a digital-to-analog converter 310 to perform processing for converting a digital data video signal into an analog data video signal.
- Vcc power supply voltage
- the noise generated in the charge pump circuit 30 causes the power supply line power to be digital in the previous stage.
- it wraps around analog 310 it is possible to reduce the influence of image quality degradation caused by noise flowing in such a route.
- FIG. 6 shows an electronic device 400 and a display device 210 on which the video signal processing circuit 100 is mounted.
- the electronic device 400 may be a mobile device such as a mobile phone or a digital camera.
- the electronic device 400 includes a video signal processing circuit 100 and a battery 110 for supplying a power supply voltage thereto.
- the electronic device 400 can be connected to a display device 210 such as a television with a cable 410, and can output a video signal to the display device 210. For example, an image captured by a camera (not shown) mounted on the electronic device 400 Can be displayed on the display device 210.
- the present invention is an effective technique for the configuration because it is difficult for an external force to be supplied with a plurality of power supply voltages. It can be said that mobile devices are exactly in that environment.
- the video signal processing circuit 100 in the embodiment described above is provided with a ripple filter or the like to reduce the influence of the deterioration of the quality of the image generated from the video signal without reducing the noise generated by the charge pump circuit. This makes it possible to achieve both circuit miniaturization and image noise countermeasures.
- the operation clock of the charge pump circuit 30 is given from the oscillation circuit 20 in the same IC chip.
- the clock may be used as the operation clock of the charge pump circuit 30.
- the IC chip can be reduced in size because the oscillation circuit 20 is not mounted.
- the video signal processing circuit according to the present invention can be used in an electronic device that handles video signals.
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Dc-Dc Converters (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Picture Signal Circuits (AREA)
- Television Receiver Circuits (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/994,083 US20090086106A1 (en) | 2005-06-29 | 2006-06-27 | Video signal processing circuit and electric device in which the same is mounted |
JP2006548023A JP4463827B2 (ja) | 2005-06-29 | 2006-06-27 | ビデオ信号処理回路、およびそれを搭載した電子機器 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005189353 | 2005-06-29 | ||
JP2005-189353 | 2005-06-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2007000997A1 true WO2007000997A1 (ja) | 2007-01-04 |
Family
ID=37595246
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2006/312805 WO2007000997A1 (ja) | 2005-06-29 | 2006-06-27 | ビデオ信号処理回路、およびそれを搭載した電子機器 |
Country Status (5)
Country | Link |
---|---|
US (1) | US20090086106A1 (ja) |
JP (1) | JP4463827B2 (ja) |
KR (1) | KR20080016521A (ja) |
CN (1) | CN100515031C (ja) |
WO (1) | WO2007000997A1 (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008283513A (ja) * | 2007-05-11 | 2008-11-20 | New Japan Radio Co Ltd | 映像回路 |
CN101303823B (zh) * | 2007-05-09 | 2011-04-20 | 晨星半导体股份有限公司 | 电压提供电路以及其相关方法 |
JP2011114766A (ja) * | 2009-11-30 | 2011-06-09 | Denso Corp | ビデオ信号処理装置およびビデオ信号処理装置を備えた電子機器 |
JP2011145790A (ja) * | 2010-01-13 | 2011-07-28 | Asahi Kasei Electronics Co Ltd | 電流ロック回路 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5867012B2 (ja) * | 2011-11-24 | 2016-02-24 | 株式会社ソシオネクスト | 定電圧回路 |
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JPS6050576U (ja) * | 1983-09-13 | 1985-04-09 | 三洋電機株式会社 | ビデオテ−プレコ−ダのスイツチングレギユレ−タ回路 |
JPH07106963A (ja) * | 1993-09-29 | 1995-04-21 | Victor Co Of Japan Ltd | アナログ・デジタル混在回路 |
JP2000106658A (ja) * | 1998-09-28 | 2000-04-11 | Nec Eng Ltd | 映像機器用電源回路 |
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KR100204238B1 (ko) * | 1996-12-12 | 1999-06-15 | 구자홍 | 영상표시기기에서의 에스엠피에스 트랜스 구동주파수 제어장치 |
US6160591A (en) * | 1997-09-19 | 2000-12-12 | Sony Corporation | Apparatus and method of providing switching frequency synchronization |
US20030011625A1 (en) * | 2001-07-13 | 2003-01-16 | Kellis James T. | Brightness control of displays using exponential current source |
JP2004318235A (ja) * | 2003-04-11 | 2004-11-11 | Renesas Technology Corp | 基準電圧発生回路 |
JP2005151468A (ja) * | 2003-11-19 | 2005-06-09 | Sanyo Electric Co Ltd | アンプ |
KR100574956B1 (ko) * | 2003-11-20 | 2006-04-28 | 삼성전자주식회사 | 시스템 클럭에 동기 되는 전압 기준 클럭을 발생하는 전압기준 클럭 발생 회로 및 방법 |
US7091713B2 (en) * | 2004-04-30 | 2006-08-15 | Integration Associates Inc. | Method and circuit for generating a higher order compensated bandgap voltage |
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2006
- 2006-06-27 KR KR1020077007533A patent/KR20080016521A/ko not_active Application Discontinuation
- 2006-06-27 CN CNB2006800008204A patent/CN100515031C/zh not_active Expired - Fee Related
- 2006-06-27 JP JP2006548023A patent/JP4463827B2/ja not_active Expired - Fee Related
- 2006-06-27 US US11/994,083 patent/US20090086106A1/en not_active Abandoned
- 2006-06-27 WO PCT/JP2006/312805 patent/WO2007000997A1/ja active Application Filing
Patent Citations (7)
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JPS6050576U (ja) * | 1983-09-13 | 1985-04-09 | 三洋電機株式会社 | ビデオテ−プレコ−ダのスイツチングレギユレ−タ回路 |
JPH07106963A (ja) * | 1993-09-29 | 1995-04-21 | Victor Co Of Japan Ltd | アナログ・デジタル混在回路 |
JP2000106658A (ja) * | 1998-09-28 | 2000-04-11 | Nec Eng Ltd | 映像機器用電源回路 |
JP2000217346A (ja) * | 1999-01-21 | 2000-08-04 | Toyota Autom Loom Works Ltd | Dc―dcコンバ―タ |
JP2000299979A (ja) * | 1999-04-12 | 2000-10-24 | Cosel Co Ltd | スイッチング電源用制御回路 |
JP2003070247A (ja) * | 2001-08-28 | 2003-03-07 | Fuji Electric Co Ltd | スイッチング電源装置の制御回路 |
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CN101303823B (zh) * | 2007-05-09 | 2011-04-20 | 晨星半导体股份有限公司 | 电压提供电路以及其相关方法 |
JP2008283513A (ja) * | 2007-05-11 | 2008-11-20 | New Japan Radio Co Ltd | 映像回路 |
JP2011114766A (ja) * | 2009-11-30 | 2011-06-09 | Denso Corp | ビデオ信号処理装置およびビデオ信号処理装置を備えた電子機器 |
JP2011145790A (ja) * | 2010-01-13 | 2011-07-28 | Asahi Kasei Electronics Co Ltd | 電流ロック回路 |
Also Published As
Publication number | Publication date |
---|---|
CN100515031C (zh) | 2009-07-15 |
JP4463827B2 (ja) | 2010-05-19 |
KR20080016521A (ko) | 2008-02-21 |
JPWO2007000997A1 (ja) | 2009-01-22 |
CN101019415A (zh) | 2007-08-15 |
US20090086106A1 (en) | 2009-04-02 |
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