WO2006033240A1 - オーディオパワーアンプicおよびそれを備えたオーディオシステム - Google Patents
オーディオパワーアンプicおよびそれを備えたオーディオシステム Download PDFInfo
- Publication number
- WO2006033240A1 WO2006033240A1 PCT/JP2005/016579 JP2005016579W WO2006033240A1 WO 2006033240 A1 WO2006033240 A1 WO 2006033240A1 JP 2005016579 W JP2005016579 W JP 2005016579W WO 2006033240 A1 WO2006033240 A1 WO 2006033240A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- clock
- audio
- power amplifier
- audio signal
- circuit
- Prior art date
Links
- 230000005236 sound signal Effects 0.000 claims abstract description 110
- 230000001360 synchronised effect Effects 0.000 claims abstract description 13
- 230000006866 deterioration Effects 0.000 abstract description 2
- 230000007423 decrease Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 208000018583 New-onset refractory status epilepticus Diseases 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/181—Low-frequency amplifiers, e.g. audio preamplifiers
- H03F3/183—Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
- H03F3/187—Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/03—Indexing scheme relating to amplifiers the amplifier being designed for audio applications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/249—A switch coupled in the input circuit of an amplifier being controlled by a circuit, e.g. feedback circuitry being controlling the switch
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/345—Pulse density modulation being used in an amplifying circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/351—Pulse width modulation being used in an amplifying circuit
Definitions
- the present invention relates to a digital signal that is output by performing pulse modulation such as pulse width modulation (PWM (Pulse Width Modulation)) and pulse density modulation (PDM (Pulse Duration Modulation)) on an input audio signal.
- PWM Pulse Width Modulation
- PDM Pulse Duration Modulation
- the present invention relates to an audio power amplifier IC (Integrated Circuit) including a power amplifier circuit and a video system including the audio power amplifier IC.
- left and right speakers In recent years, in addition to two speakers that output left and right stereo sound (hereinafter also referred to as left and right speakers), respectively, in order to increase the acoustic effect, such as a 2-way stereo system and a home shutter system, etc.
- audio systems with a speech output that outputs sound that emphasizes only the low frequencies are becoming popular.
- a plurality of power amplifier circuits corresponding to the respective speakers are required.
- a so-called digital power amplifier (class D amplifier) circuit that performs pulse modulation such as PWM and PDM and outputs a pulse is widely used because of its high efficiency (for example, Japanese Patent Publication No. 2002-299968 (Patent Document 1)).
- FIG. 2 is a block diagram showing an example of a conventional audio system using a digital power amplifier circuit.
- this audio system includes audio power amplifier ICs 101, 101a and 101b, and speakers 141, 141a, 141b and 142.
- This audio system is a so-called two-way stereo system.
- stereo audio is output from the left and right speakers 141 and 142 via the audio power amplifier IC 101 based on the stereo audio signals Lin and Rin to which an external force is also input, and the stereo audio that emphasizes only the low frequencies is Audio amplifiers for the left and right speakers 141a and 141b via IClOla or 101b Output.
- the low-frequency speakers 141a and 141b have a so-called BTL (Balanced Transformerless) configuration in which two drive inputs are driven in opposite phases to increase output.
- the audio power amplifier IC101 and the audio power amplifiers IC101a and 101b for bass are the same IC.
- Each of the audio power amplifiers IC101, 101a, and 101b includes digital power amplifier circuits 151 and 152, a clock generation circuit 110 that generates a reference clock BCLK, and the like.
- the digital power amplifier circuits 151 and 152 perform pulse modulation based on the reference clock BCLK on the audio signals input thereto, and output pulses synchronized with the reference clock BCLK.
- Audio power amplifier IC 101 drives stereo speakers 141 and 142. Also, the audio power amplifiers IClOla and 101b for bass sound drive the BTL-configured force 141a and 141b, respectively.
- Patent Document 1 Japanese Patent Laid-Open No. 2002-299968
- the inventors of the present application differ slightly due to factors such as characteristic noise between the ICs, because the frequency of the reference clock of each audio power amplifier IC is slightly different.
- the present invention has been made in view of the above-described reasons, and an object of the present invention is to suppress deterioration in sound quality caused by the frequency of a reference clock in an audio system using a plurality of audio power amplifier ICs.
- Audio power amplifier IC that can It is to provide an audio system provided.
- an audio power amplifier IC includes a clock generation circuit that generates an internal clock and an output of the internal clock or an input power s of the external clock.
- a clock selection circuit a clock selection circuit that selects one of an internal clock and an external clock as a reference clock, a first audio signal input terminal to which a first audio signal is input, and a first audio signal
- a first digital amplifier circuit that performs pulse modulation based on the reference clock and outputs a pulse synchronized with the reference clock.
- the audio power amplifier IC further includes a second audio signal input terminal to which the second audio signal is input, an inverting circuit that inverts and outputs the first audio signal, and an inverting circuit
- the audio signal selection circuit that selects and outputs either the audio signal output from the audio signal or the second audio signal, and performs pulse modulation based on the reference clock on the selected audio signal to generate a pulse synchronized with the reference clock.
- an audio system including a first audio power amplifier IC and a second audio power amplifier IC, and includes:
- Each of the audio power amplifier IC and the second audio power amplifier IC includes a clock generation circuit that generates an internal clock, a clock terminal that outputs an internal clock or an external clock, an internal clock, and an external clock.
- a clock selection circuit that selects one of the two as a reference clock, a first audio signal input terminal to which the first audio signal is input, and pulse modulation based on the reference clock on the first audio signal for reference.
- a first digital power amplifier circuit that outputs a pulse synchronized with the clock, and a second One of the second audio signal input terminal to which the audio signal is input, the inverting circuit that inverts and outputs the first audio signal, the audio signal that the inverting circuit outputs, and the second audio signal.
- Selected And a second digital power amplifier circuit that performs pulse modulation on the selected audio signal based on the reference clock and outputs a pulse synchronized with the reference clock.
- the clock selection circuit includes: When the audio signal selection circuit selects the audio signal output from the inverting circuit, the external clock is selected as the reference clock. In the audio system, the first audio power amplifier IC and the second audio power amplifier IC are selected.
- the clock selection circuit selects the internal clock as the reference clock, outputs the internal clock from the clock terminal, and outputs the second audio signal.
- the clock selection circuit is the first amplifier. I O power amplifier IC force also selects the external clock received via the clock pin as a reference clock.
- the audio power amplifier IC according to the present invention selects either the internal clock or the external clock as a reference clock from the clock selection circuit. Therefore, in an audio system using a plurality of audio power amplifier ICs according to the present invention, the frequency of the reference clock can be made the same for all audio power amplifier ICs, and as a result, It is possible to suppress a decrease in sound quality without generating a beat sound. Also, since the audio system according to the present invention uses this audio power amplifier IC! /, A high quality system can be realized.
- FIG. 1 is a block diagram showing a configuration of a plurality of audio power amplifier ICs according to an embodiment of the present invention and an audio system including the same.
- FIG. 2 is a block diagram showing an example of a conventional audio system using a digital power amplifier circuit.
- FIG. 1 is a block diagram showing a configuration of a plurality of audio power amplifier ICs and an audio system including the same according to an embodiment of the present invention. First, the audio power amplifier IC1 will be described, and then the configuration of the audio system will be described.
- the audio power amplifier IC1 includes an audio signal input terminal (first audio signal input terminal) IN1, an audio signal input terminal (second audio signal input terminal) I N2, and a pulse output terminal (first pulse output). Terminal) OUT1 and pulse output terminal (second pulse output terminal) OUT2, clock terminal CLK, control terminal CNT, digital power amplifier circuit (first digital power amplifier circuit) 51 and 52 (second digital power terminal) An amplifier circuit), a clock generation circuit 10, a clock selection circuit 11, an audio signal selection circuit 12, a selection control circuit 13, and an inverting circuit 14.
- the digital power amplifier circuit 51 includes a pulse modulation circuit 61 and an output circuit 71.
- Digital power amplifier circuit 52 includes a noise modulation circuit 62 and an output circuit 72.
- An audio signal (first audio signal) Lin and an audio signal (second audio signal) R in are input to the audio signal input terminal IN1 and the audio signal input terminal IN2.
- Pulse-modulated pulses described later are output from the pulse output terminal OUT1 and the pulse output terminal OUT2, respectively.
- the control terminal CNT includes a clock selection circuit 11 and an audio signal selection circuit described later.
- a voltage is applied to control the 12 selections.
- Audio signal input terminal IN1 has a digital power amplifier circuit 51 and an inverting circuit 1
- the noise modulation circuit 61 performs pulse modulation on the audio signal Lin based on the reference clock BCLK, and outputs a pulse synchronized with the reference clock BCLK.
- the output circuit 71 outputs the pulse received from the pulse modulation circuit 61 with a low output impedance.
- the output of the output circuit 71 becomes the output of the digital power amplifier circuit 51 and is connected to the pulse output terminal OUT1.
- the configuration of the digital power amplifier circuit 52 is substantially the same as that of the digital power amplifier circuit 51. That is, the pulse modulation circuit 62 performs pulse modulation on the audio signal output from the audio signal selection circuit 12 based on the reference clock BCLK, and outputs a pulse synchronized with the reference clock BCLK.
- the output circuit 72 outputs the pulse received from the pulse modulation circuit 62 with a low output impedance. The output of the output circuit 72 becomes the output of the digital power amplifier circuit 52 and is connected to the pulse output terminal OUT2.
- the pulse modulation circuit 61 outputs different pulses depending on the type of modulation method such as PWM and PDM.
- the output pulse has a period equal to the reference clock BCLK.
- the pulse width of the output pulse changes according to the voltage of the audio signal Lin. In other words, the pulse width increases as the voltage of the audio signal Lin increases, and decreases as it decreases.
- the output pulse has the same period as the reference clock BCLK, and the pulse width is constant.
- the density of the output pulses varies according to the voltage of the audio signal Lin. In other words, the pulse density increases as the voltage of the audio signal Lin increases, and decreases as it decreases.
- the inverting circuit 14 inverts and outputs the audio signal Lin.
- the output of the inverting circuit 14 and the audio signal input terminal IN2 are connected to the input of the audio signal selection circuit 12.
- the audio signal selection circuit 12 selects either the audio signal output from the inverting circuit 14 or the audio signal Rin based on the control of the selection control circuit 13 described later. Output.
- a digital power amplifier circuit 52 is connected to the output of the audio signal selection circuit 12.
- a clock selection circuit 11 is connected to the clock terminal CLK.
- the clock selection circuit 11 selects either the internal clock or the external clock as the reference clock BCLK based on the control of the selection control circuit 13 described later.
- the internal clock is generated by the clock generation circuit 10.
- the external clock is generated by an external IC or the like and input via the clock terminal CLK.
- the clock selection circuit 11 When the internal clock is selected as the reference clock BCLK, the clock selection circuit 11 outputs the internal clock from the clock terminal CLK. When the external clock is selected as the reference clock BCLK, the clock selection circuit 11 receives the external clock from the clock terminal CLK, and electrically disconnects the clock generation circuit 10 and the clock terminal CLK.
- a selection control circuit 13 is connected to the control terminal CNT.
- the selection control circuit 13 controls the clock selection circuit 11 and the audio signal selection circuit 12 based on the voltage level of the control terminal CNT! That is, the selection control circuit 13 causes the clock selection circuit 11 to select the internal clock as the reference clock BCLK and the audio signal selection circuit 12 to select the audio signal Rin when the control terminal CNT is at the ground potential level. .
- the selection control circuit 13 causes the clock selection circuit 11 to select the external clock as the reference clock BCLK, and the audio signal selection circuit 12 outputs the inverting circuit 14 Select the audio signal to be used.
- This audio system is a 2-way stereo system. That is, the stereo audio signals Lin and Rin are input, stereo sound is output from the left and right speakers 41 and 42, and stereo sound in which only low sound is emphasized is output from the left and right speakers 41a and 41b for low sound. Also, the bass speakers 41a and 41b have two drive inputs that are connected to each other to increase the output. The so-called BTL configuration is driven in the opposite phase.
- This audio system includes an audio power amplifier IC (first audio power amplifier IC) 1, la (second audio power amplifier IC) and lb (second audio power amplifier IC), and a Rhono 2a, 2b, 31, 32, 31a, 32a, 31b, and 32b, and speaker forces 41, 41a, 41b, 42, 42a, and 42b.
- first audio power amplifier IC first audio power amplifier IC
- la second audio power amplifier IC
- lb second audio power amplifier IC
- the low-pass filters 31, 32, 31a, 32a, 31b, and 32b remove a harmonic component generated by the pulse-modulated pulse force reference clock BCLK and extract a signal in the audio band.
- the low-pass filters 2a and 2b pass only the frequencies corresponding to the low frequencies of the stereo audio signals Lin and Rin, respectively.
- the low-pass filters 31 and 32 are connected to the pulse output terminals OUT1 and OUT2 of the audio power amplifier IC1.
- one of the drive inputs is connected to the output of low-pass filters 31 and 32, and the other drive input is grounded.
- the audio power amplifier ICla is for the bass on the left side.
- the audio signal Lin is input to the low-pass filter 2a.
- the output of the low-pass filter 2a is connected to the audio signal input terminal IN1.
- the low-pass filters 3 la and 32a are connected to the pulse output terminals OUT1 and OUT2 of the audio power amplifier I Cla.
- the outputs of the low-pass filters 3la and 32a are connected to two drive inputs, respectively.
- the audio power amplifier IClb is for the bass on the right side.
- the audio signal Rin is input to the low-pass filter 2b.
- the output of the low-pass filter 2b is connected to the audio signal input terminal IN1.
- the low-pass filters 31b and 32b are connected to the pulse output terminals OUT1 and OUT2 of the audio power amplifier I Clb.
- the speaker 41b has two drive inputs connected to the outputs of the low-pass filters 3 lb and 32b, respectively.
- the clock terminals CLK of the audio power amplifiers IC1, la, and lb are connected to each other.
- the audio power amplifier IC1 and the audio power amplifiers ICla and lb for bass are the same IC.
- Each of the audio power amplifiers ICla and lb includes digital power amplifier circuits 51 and 52, a clock generation circuit 10, a clock selection circuit 11, and An audio signal selection circuit 12, a selection control circuit 13, and an inversion circuit 14 are provided.
- the audio power amplifier IC1 drives the stereo speakers 41 and 42 because the control terminal CNT is connected to the ground potential.
- the clock selection circuit 11 selects an internal clock as the reference clock BCLK based on the control of the selection control circuit 13, and outputs the internal clock from the clock terminal CLK. That is, the internal clock power output from the audio power amplifier IC1 is an external clock for the audio power amplifiers ICla and lb.
- the audio signal selection circuit 12 selects the audio signal Rin based on the control of the selection control circuit 13 and outputs it to the digital power amplifier circuit 52.
- the audio power amplifiers ICla and lb for the bass drive the BTL-configured speakers 41a and 41b, respectively, since the control terminal CNT is connected to the power supply voltage VCC.
- the clock selection circuit 11 selects the external clock received from the audio power amplifier IC1 via the clock terminal CLK as the reference clock BCLK based on the control of the selection control circuit 13.
- the audio signal selection circuit 12 selects the audio signal output from the inversion circuit 14 based on the control of the selection control circuit 13, and outputs the audio signal to the digital power amplifier circuit 52.
- the frequency of the reference clock BCLK can be made the same for the three audio power amplifier ICs, no beat sound is generated and the sound quality is improved. The decrease can be suppressed.
- the clock selection circuit 11 when driving the STL power, the clock selection circuit 11 is based on the control of the selection control circuit 13. Select an external clock as BCLK. Therefore, the selection of the reference clock BCLK of the audio power amplifier IC1, la, and lb can be controlled only by the control terminal CNT, so that the number of terminals can be reduced. However, it is also possible to provide the control terminal CNT separately.
- the power described above for the two-way stereo system using the three audio power amplifiers IC1, la, and lb is not limited to other audio systems such as a home shutter system. Audio power amplifier IC! / Reference clock BCLK By making the frequency the same, it is possible to suppress a reduction in sound quality without generating a beat sound. As a result, a high quality audio system can be provided.
- the audio power amplifier IC includes two audio signal input terminals and two digital power amplifier circuits, and thus includes a two-way stereo system including three audio power amplifier circuits.
- the power that can be achieved with a power amplifier IC The audio power amplifier IC is not limited to such a configuration. It must be configured to include only one audio signal input terminal and only one digital power amplifier circuit. Both are possible. In this case, it is possible to more flexibly cope with various audio systems (for example, a system having an odd number of speakers not having a BTL configuration) that can be expected to increase costs.
- the low-pass filter 2a or 2b may be built in the audio power amplifier IC, and the selection control circuit 13 may select whether or not the force using the Rhono filter 2a or 2b is selected.
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- Microelectronics & Electronic Packaging (AREA)
- Multimedia (AREA)
- Amplifiers (AREA)
Abstract
Description
Claims
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/661,792 US7459968B2 (en) | 2004-09-21 | 2005-09-09 | Audio power amplifier IC and audio system provided with the same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004-272645 | 2004-09-21 | ||
JP2004272645A JP4201752B2 (ja) | 2004-09-21 | 2004-09-21 | オーディオパワーアンプic |
Publications (1)
Publication Number | Publication Date |
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WO2006033240A1 true WO2006033240A1 (ja) | 2006-03-30 |
Family
ID=36090003
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2005/016579 WO2006033240A1 (ja) | 2004-09-21 | 2005-09-09 | オーディオパワーアンプicおよびそれを備えたオーディオシステム |
Country Status (5)
Country | Link |
---|---|
US (1) | US7459968B2 (ja) |
JP (1) | JP4201752B2 (ja) |
CN (1) | CN101023580A (ja) |
TW (1) | TW200625796A (ja) |
WO (1) | WO2006033240A1 (ja) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8022756B2 (en) * | 2007-05-15 | 2011-09-20 | Qualcomm, Incorporated | Output circuits with class D amplifier |
JP5194663B2 (ja) | 2007-09-13 | 2013-05-08 | 株式会社リコー | 半導体装置 |
US8693708B2 (en) * | 2010-08-24 | 2014-04-08 | Star Headlight & Lantern Co., Inc. | System for operating a device for producing an audible alarm |
KR101101631B1 (ko) * | 2010-11-19 | 2012-01-02 | (주)합동전자산업 | 초절전형 디지털 앰프 |
US9106329B2 (en) | 2011-01-31 | 2015-08-11 | Mediatek Inc. | Apparatus for communicating another device |
EP2608402B1 (en) * | 2011-12-20 | 2015-03-25 | BlackBerry Limited | Using a new synchronization scheme for a multi-channel class-d amplifier |
US8618875B2 (en) | 2011-12-20 | 2013-12-31 | Blackberry Limited | Using a new synchronization scheme for a multi-channel class-D amplifier |
TWI521882B (zh) * | 2013-05-02 | 2016-02-11 | 瑞昱半導體股份有限公司 | 利用脈衝密度調變進行溝通之電子裝置、溝通方法、音訊裝置及放大裝置 |
CN106569921B (zh) * | 2016-10-17 | 2019-01-08 | 国家电网公司 | 一种双芯智能电能表的计量芯时钟处理方法及装置 |
CN107396245B (zh) * | 2017-08-25 | 2023-12-22 | 东莞精恒电子有限公司 | 一种脉宽调制700w+700w(pfc)功放模组 |
CN107343245B (zh) * | 2017-08-28 | 2023-12-22 | 东莞精恒电子有限公司 | 一种脉宽调制双pwm单元功放模组 |
CN107333213B (zh) * | 2017-08-30 | 2024-02-13 | 东莞精恒电子有限公司 | 一种脉宽调制300w+双150w(pfc)功放模组 |
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JPS63234706A (ja) * | 1987-03-24 | 1988-09-30 | Toshiba Corp | 電力増幅回路 |
JPH11317629A (ja) * | 1998-04-30 | 1999-11-16 | Matsushita Electric Ind Co Ltd | D級増幅器を使用したシステム |
JP2003060443A (ja) * | 2001-08-21 | 2003-02-28 | Sony Corp | スイッチング増幅装置 |
JP2005269580A (ja) * | 2004-03-16 | 2005-09-29 | Koichi Nakagawa | 注入同期した自励発振型pwmモジュレータ方式 |
Family Cites Families (4)
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US6191650B1 (en) * | 1996-12-11 | 2001-02-20 | G/N Netcom A/S | Class d amplifier with pulse width modulation and a very low power consumption |
US6831508B2 (en) * | 2001-02-19 | 2004-12-14 | Sony Corporation | Switching power amplifier, and switching control method for a switching power amplifier |
JP2002299968A (ja) | 2001-03-30 | 2002-10-11 | Pioneer Electronic Corp | D級アンプ |
TWM309289U (en) * | 2006-10-03 | 2007-04-01 | Princeton Technology Corp | Audio amplifier capable of performing self-oscillation |
-
2004
- 2004-09-21 JP JP2004272645A patent/JP4201752B2/ja not_active Expired - Fee Related
-
2005
- 2005-09-09 US US11/661,792 patent/US7459968B2/en active Active
- 2005-09-09 WO PCT/JP2005/016579 patent/WO2006033240A1/ja active Application Filing
- 2005-09-09 CN CNA200580031502XA patent/CN101023580A/zh active Pending
- 2005-09-15 TW TW094131858A patent/TW200625796A/zh not_active IP Right Cessation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS63234706A (ja) * | 1987-03-24 | 1988-09-30 | Toshiba Corp | 電力増幅回路 |
JPH11317629A (ja) * | 1998-04-30 | 1999-11-16 | Matsushita Electric Ind Co Ltd | D級増幅器を使用したシステム |
JP2003060443A (ja) * | 2001-08-21 | 2003-02-28 | Sony Corp | スイッチング増幅装置 |
JP2005269580A (ja) * | 2004-03-16 | 2005-09-29 | Koichi Nakagawa | 注入同期した自励発振型pwmモジュレータ方式 |
Also Published As
Publication number | Publication date |
---|---|
JP4201752B2 (ja) | 2008-12-24 |
JP2006093749A (ja) | 2006-04-06 |
TWI338445B (ja) | 2011-03-01 |
TW200625796A (en) | 2006-07-16 |
CN101023580A (zh) | 2007-08-22 |
US20070252644A1 (en) | 2007-11-01 |
US7459968B2 (en) | 2008-12-02 |
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