WO2005114725A1 - Élément de résistance semi-conducteur et sa méthode de fabrication, dispositif semi-conducteur utilisant un élément de résistance semi-conducteur - Google Patents

Élément de résistance semi-conducteur et sa méthode de fabrication, dispositif semi-conducteur utilisant un élément de résistance semi-conducteur Download PDF

Info

Publication number
WO2005114725A1
WO2005114725A1 PCT/JP2005/009256 JP2005009256W WO2005114725A1 WO 2005114725 A1 WO2005114725 A1 WO 2005114725A1 JP 2005009256 W JP2005009256 W JP 2005009256W WO 2005114725 A1 WO2005114725 A1 WO 2005114725A1
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor
atoms
resistance element
conductivity type
region
Prior art date
Application number
PCT/JP2005/009256
Other languages
English (en)
Japanese (ja)
Inventor
Naoto Kuratani
Takayuki Haruyama
Keisuke Okamoto
Takafumi Yanagizaki
Shinichi Wada
Original Assignee
Omron Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Corporation filed Critical Omron Corporation
Publication of WO2005114725A1 publication Critical patent/WO2005114725A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20—Resistors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P15/00—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
    • G01P15/02—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
    • G01P15/08—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
    • G01P15/12—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values by alteration of electrical resistance
    • G01P15/123—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values by alteration of electrical resistance by piezo-resistive elements, e.g. semiconductor strain gauges
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/0802—Resistors only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/66166—Resistors with PN junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/8605—Resistors with PN junctions
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P15/00—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
    • G01P15/02—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
    • G01P15/08—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
    • G01P2015/0805—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values being provided with a particular type of spring-mass-system for defining the displacement of a seismic mass due to an external acceleration
    • G01P2015/0822—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values being provided with a particular type of spring-mass-system for defining the displacement of a seismic mass due to an external acceleration for defining out-of-plane movement of the mass
    • G01P2015/084—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values being provided with a particular type of spring-mass-system for defining the displacement of a seismic mass due to an external acceleration for defining out-of-plane movement of the mass the mass being suspended at more than one of its sides, e.g. membrane-type suspension, so as to permit multi-axis movement of the mass

Definitions

  • the present invention relates to a semiconductor resistor, a method for manufacturing the same, and a semiconductor device such as a semiconductor sensor, a semiconductor circuit, and a semiconductor actuator using the semiconductor resistor.
  • a diffused resistor may be used as a resistance component when a circuit is formed on a semiconductor substrate or as a piezoresistor for stress measurement.
  • the diffusion resistance has a positive temperature coefficient of resistance value, and the force of the diffusion resistance is also large.
  • the resistance of conventional diffused resistors increases as the temperature rises, and decreases as the temperature decreases, and the force changes greatly.
  • Fig. 1 is a diagram showing the evaluation results of the temperature characteristics of a conventional diffused resistor.
  • the horizontal axis represents the temperature T (° C) of the diffused resistor, and the vertical axis represents the resistance value change rate ⁇ R ( T) / R (25).
  • R (25) is the resistance value when the diffusion resistance temperature T is 25 ° C,
  • AR (T) R (T) -R (25)
  • R (T) is the resistance value when the temperature is T (° C).
  • T the resistance value when the temperature is T (° C).
  • the resistance value of the diffused resistor increases by about 15%, and the temperature of the diffused resistor rises to room temperature.
  • the resistance of the diffusion resistance decreases by about 10%.
  • FIG. 1 also shows that the diffusion resistance has a positive temperature coefficient.
  • Such a diffused resistor has a large temperature coefficient of resistance value as described above. Therefore, when a diffused resistor is used in a semiconductor device typified by a semiconductor circuit, a semiconductor sensor, and a semiconductor actuator, heat generation and ambient temperature change are caused. The change causes a change in the resistance value of the diffused resistor, which hinders the normal operation of the circuit and fluctuates the measured value of the sensor. In addition, a complicated correction circuit had to be provided in order to avoid a phenomenon such as a malfunction due to a temperature change.
  • a method in which a full bridge circuit is configured by a plurality of resistance elements to offset each other's temperature characteristics (for example, Patent Document 2).
  • Patent Document 2 In order to cancel out the temperature characteristics of each other in such a full bridge circuit and to prevent the bridge output from changing with temperature, theoretically, the temperature coefficients of all the resistance elements are completely equal. There must be. However, in practice, there is more or less variation in the temperature coefficient between the elements, and it is difficult to make the temperature coefficients of the elements completely equal. Therefore, even if a full bridge circuit is formed by using a plurality of resistance elements, the temperature characteristics are not completely offset among the resistance elements. There has been a problem that the output also varies greatly with temperature. Therefore, even when such a full-bridge circuit is used, it is desired to use a resistance element having a temperature coefficient as small as possible.
  • the resistance element should have as small a variation in resistance value as possible, like other circuit elements. Required.
  • Patent Document 1 Japanese Patent Application Laid-Open No. 2001-268944
  • Patent Document 2 Japanese Patent Application Laid-Open No. 2002-296293
  • the present invention has been made in view of the above technical problems, and has a first object and An object of the present invention is to provide a semiconductor resistor having a small temperature coefficient and a small variation in resistance value. Another object of the present invention is to provide a semiconductor resistor having a negative temperature coefficient.
  • a first semiconductor resistance element is a semiconductor resistance element in which a resistance element region made of a second conductivity type semiconductor is formed on a surface portion of a first conductivity type semiconductor region.
  • surface impurity concentration of the semiconductor region of a conductivity type is a 1.0 X 10 18 a tom S / C m 3 or more 8.0 X 10 18 atoms / cm 3 or less
  • the surface impurity concentration of the resistor region is 1.0 X 10 19 atoms / cm It is characterized by being 3 or more and 5.0 X 10 19 atoms / cm 3 or less!
  • a second semiconductor resistance element is configured such that a first conductivity type semiconductor region is formed on a second conductivity type semiconductor region, and a second conductivity type semiconductor region is formed on a surface portion of the first conductivity type semiconductor region.
  • the surface impurity concentration of the semiconductor region of the first conductivity type is not less than 1.0 X 10 18 atoms / cm 3 and not more than 8.0 X 10 18 atoms / cm 3 .
  • the resistance element region has a surface impurity concentration of 1.0 ⁇ 10 19 atoms / cm 3 or more and 5.0 ⁇ 10 19 atoms / cm 3 or less.
  • the first and second semiconductor resistance elements According to the first and second semiconductor resistance elements according to the present invention, a semiconductor resistance element having a small temperature coefficient and a small variation in resistance value can be obtained.
  • the reason why the surface impurity concentration of the semiconductor region of the first conductivity type is limited to 1.0 ⁇ 10 18 atoms / cm 3 or more and 8.0 ⁇ 10 18 atoms / cm 3 or less is because the surface of the semiconductor region of the first conductivity type is limited. If the impurity concentration is smaller than 1.0 ⁇ 10 18 atoms / cm 3 , the temperature coefficient is negative and large. Further, when the surface impurity concentration of the semiconductor region of the first conductivity type is higher than 8.0 ⁇ 10 18 at O m S / cm 3 , the variation in resistance value increases.
  • the reason that the surface impurity concentration of the resistance element region is limited to 1.0 X 10 19 atoms / cm 3 or more and 5.0 X 10 19 atoms / cm 3 or less is that the surface impurity concentration of the resistance element region is 1.0 X 10 19 atoms / cm 3 If it is smaller than the above range, the variation in the resistance value becomes large. Further, when the surface impurity concentration of the resistor region is greater than 5.0 X 10 19 a tom S / C m 3 is had want to make many crystal damage is liable leakage current increases.
  • the first conductivity type semiconductor element may be used. Both the body region and the resistance element region are impurity diffusion layers.
  • the impurity diffusion layer can be obtained by doping an impurity by ion implantation or thermal diffusion, and then performing a diffusion rule as necessary.
  • the resistance element layer is a diffusion resistance due to impurity diffusion, so that the variation of the resistance value of the diffusion resistance can be reduced and the temperature coefficient can be reduced.
  • the first method for fabricating a semiconductor element according to the present invention, the impurity diffusion process, the surface impurity concentration of lO X 10 18 atoms / cm 3 or more 8.0 X 10 18 atoms / cm 3 or less of the first conductive forming a type of semiconductor region, the surface portion of the first conductivity type semiconductor region, the impurity diffusion process, the surface impurity concentration of lO X 10 19 atoms / cm 3 or more 5.0 X 10 1 9 a tom S / is characterized by comprising the step of forming a C m 3 or less of the second conductivity type semiconductor force becomes resistance element region.
  • the first conductive layer having a surface impurity concentration of lO X 10 18 atoms / cm 3 or more and 8.0 X 10 18 atoms / cm 3 or less is formed by an impurity diffusion process.
  • a diffusion resistance (resistance element region) having a small temperature coefficient and a small variation in resistance value can be obtained.
  • the surface impurity concentration of the semiconductor region of the first conductivity type is limited to lO X 10 18 atoms / cm 3 or more 8.0 X 10 18 a tom S / C m 3
  • the first conductivity type This is because when the surface impurity concentration of the semiconductor region is lower than 10 ⁇ 10 18 atoms / cm 3 , the temperature coefficient is negative and large.
  • the surface impurity concentration of the semiconductor region of the first conductivity type is higher than 8.0 ⁇ 10 18 atoms / cm 3 , the variation in the resistance value increases. Why a surface impurity concentration of the resistance element region is limited to lO X 10 19 atoms / cm 3 or more 5.0 X 10 19 atoms / cm 3, the surface impurity concentration of the resistor region is lO X 10 19 atoms / cm If it is smaller than 3 , the variation in the resistance value becomes large. If the surface impurity concentration of the resistive element region is higher than 5.0 ⁇ 10 19 at O m S / cm 3 , crystal damage is increased. This is because the leakage current tends to increase.
  • the impurity diffusion process can be performed by doping an impurity by ion implantation or thermal diffusion, and then performing a diffusion rule as necessary.
  • the semiconductor resistance element of the present invention can be used for a semiconductor device such as a semiconductor sensor, a semiconductor circuit, and a semiconductor actuator, and can stabilize temperature characteristics of a circuit or the like used thereby. Alternatively, the reliability of the measurement value of a sensor or the like can be improved. Further, since it is not necessary to additionally provide an element or a circuit for temperature correction, a small-sized and low-cost semiconductor device can be obtained.
  • the third semiconductor resistance element of the present invention is a semiconductor element of the second conductivity type formed by the impurity diffusion process on a surface portion of the semiconductor region of the first conductivity type formed by the impurity diffusion process.
  • the third semiconductor element of the present invention a diffusion resistor having a negative temperature coefficient could be obtained.
  • the reason why the surface impurity concentration of the semiconductor region of the first conductivity type is limited to a range smaller than 1.0 ⁇ 10 18 atoms / cm 3 is that the surface impurity concentration of the semiconductor region of the first conductivity type is lO X
  • the temperature coefficient is also a positive force.
  • the reason that the surface impurity concentration in the resistance element region is limited to lO X 10 19 atoms / cm 3 or more and 5.0 X 10 19 atoms / cm 3 or less is that the surface impurity concentration in the resistance element region is 1.0 X 10 19 atoms / cm 3 This is because when the value is smaller than the above, the variation of the resistance value increases. Further, when the surface impurity concentration of the resistance element region is higher than 5.0 ⁇ 10 19 atoms / cm 3 , the crystal damage is increased, and the leak current is likely to increase.
  • FIG. 1 is a diagram showing a temperature characteristic evaluation result of a conventional diffused resistor.
  • FIG. 2 is a schematic diagram showing a first type of semiconductor resistor element in Embodiment 1 of the present invention. It is sectional drawing.
  • FIG. 3 is a schematic cross-sectional view showing a second type semiconductor resistance element according to Example 1 of the present invention.
  • FIG. 4 is a diagram showing a resistance value change rate of the semiconductor resistance element according to Example 1 of the present invention.
  • FIG. 5 is a view showing a resistance value change rate of the semiconductor resistance element according to Example 1 of the present invention.
  • FIG. 6 is a view showing a result of measuring variation in resistance value while changing the surface impurity concentration of the diffusion layer in Example 1 of the present invention.
  • FIG. 7 is a view showing a result of measuring a variation in resistance value while changing the surface impurity concentration of the resistance element region in Example 1 of the present invention.
  • FIG. 8 is a view showing a resistance value change rate when the surface impurity concentration of the diffusion layer is in the order of 10 17 atoms / cm 3 in Example 1 of the present invention.
  • FIG. 9 is a plan view of an acceleration sensor according to a second embodiment of the present invention.
  • FIG. 10 is a cross-sectional view of the acceleration sensor of the above.
  • FIG. 11 is a circuit diagram showing an X-axis direction acceleration detection circuit for detecting acceleration in the X-axis direction.
  • FIG. 12 is a circuit diagram showing a Y-axis direction acceleration detecting circuit for detecting a Y-axis direction acceleration.
  • FIG. 13 is a circuit diagram showing a Z-axis direction acceleration detection circuit for detecting acceleration in the Z-axis direction.
  • FIG. 14 is a schematic diagram showing a state in which acceleration in the X-axis direction acts on the acceleration sensor.
  • FIG. 15 is a schematic diagram showing a part of FIG. 14 in an enlarged manner.
  • FIG. 16 is a schematic diagram showing a state in which acceleration in the Z direction is acting on the acceleration sensor.
  • FIGS. 17 (a) and 17 (b) are schematic views illustrating a manufacturing process of the acceleration sensor according to the present invention.
  • FIGS. 18 (a) and 18 (b) are schematic views illustrating steps after the step shown in FIG.
  • FIGS. 19 (a) and 19 (b) are schematic views illustrating steps after the step shown in FIG.
  • FIG. 20 is a schematic diagram illustrating a step after the step illustrated in FIG. 19.
  • FIG. 21 is a diagram showing the results of evaluating the temperature characteristics of a full-bridge output in a full-bridge circuit configured using the semiconductor resistance element according to the present invention.
  • FIG. 22 is a diagram showing the results of evaluating the temperature characteristics of a full-bridge output in a conventional full-bridge circuit using a diffused resistor.
  • FIG. 23 is a schematic plan view and a cross-sectional view showing a resistive element incorporated in a semiconductor circuit.
  • FIG. 2 is a schematic sectional view showing a first type of semiconductor resistor element 11 according to one embodiment of the present invention.
  • the semiconductor resistance element 11 includes a first conductivity type diffusion layer 12 formed on a substrate (not limited to a semiconductor substrate; not shown) and a second conductivity type diffusion layer 12 formed on a surface portion of the diffusion layer 12. And the conductive type resistance element region 13.
  • the diffusion layer 12 is formed by an impurity diffusion process. That is, impurities of the first conductivity type are implanted into the semiconductor layer formed on the substrate by ion implantation, and then diffusion annealing is performed to remove crystal damage. Alternatively, a thermal diffusion method may be used.
  • the resistance element region 13 is also formed by an impurity diffusion process.
  • impurities of the second conductivity type are implanted into a predetermined region of the diffusion layer 12 through an opening of the mask by ion implantation, and then a diffusion annealing is performed to remove crystal damage.
  • a thermal diffusion method may be used.
  • FIG. 3 is a schematic sectional view showing a second type semiconductor resistor element 14 according to one embodiment of the present invention.
  • the semiconductor resistance element 14 includes a first conductivity type diffusion layer 12 formed on the upper surface of a second conductivity type semiconductor substrate (wafer) 15 and a second conductivity type diffusion layer 12 formed on the surface of the diffusion layer 12. And the resistance element region 13.
  • the diffusion layer 12 is formed by an impurity diffusion process. That is, impurities of the first conductivity type are implanted into the surface portion of the semiconductor substrate 15 by ion implantation, and then diffusion annealing is performed to remove crystal damage.
  • the resistance element region 13 is also formed by an impurity diffusion process.
  • both the diffusion layer 12 and the resistance element region 13 may be formed by a thermal diffusion method.
  • a p-type semiconductor substrate (Ueno) 15 such as a p-type silicon substrate is prepared, and an n-type impurity such as P (phosphorus) is ion-implanted into the silicon substrate 15.
  • P phosphorus
  • PH was used as a source gas, and P was implanted at an energy of 10 to 200 keV.
  • the energy is less than 10 keV, the beam amount cannot be obtained. If the energy is more than 200 keV, the implantation depth becomes too deep, the impurity concentration on the surface decreases, and crystal defects are likely to occur. Then, it was set to 10 to 200 keV.
  • the semiconductor substrate 15 is placed in an electric furnace, and N, O, H, HC1,
  • Diffusion annealing was performed at an annealing temperature of 500 to 1300 ° C. in the mixed gas. If the annealing temperature is lower than 500 ° C, diffusion annealing cannot be performed sufficiently. If the annealing temperature is higher than 1300 ° C, the silicon substrate 15 is thermally damaged.Therefore, the annealing temperature is set in the range of 500 to 1300 ° C.
  • the n-type diffusion layer 12 is formed on the upper surface of the silicon substrate 15, the upper surface of the diffusion layer 12 is covered with the mask, and a mask is opened in a predetermined region.
  • a p-type impurity such as B (boron) is ion-implanted into the surface of the diffusion layer 12 through the opening of the mask.
  • B boron
  • BH or BF is used as a source gas with an energy of 10 to 200 keV.
  • the semiconductor substrate 15 is put into the electric furnace again, and N, O, H, HC1, a rare gas or a mixture thereof is used.
  • Diffusion annealing was performed in the gas at an annealing temperature of 500-1300 ° C. Thereafter, when the mask was removed from the diffusion layer 12, a p-type resistance element region 13 was formed in a predetermined region of the diffusion layer 12, and a semiconductor resistance element 14 was manufactured.
  • FIG. 4 is a diagram showing the resistance change rate of the semiconductor resistor element manufactured as described above.
  • the horizontal axis shows the temperature T, and the vertical axis shows the resistance change rate AR (T) ZR ( 25).
  • the surface impurity concentration of the resistance element region 13 which is a p-type semiconductor region is fixed to 3.0 ⁇ 10 19 atoms / cm 3
  • the surface impurity concentration of the diffusion layer 12 is increased by 1.0 ⁇ 10 18 atoms / cm 3 (curve A1) force.
  • the slope becomes gradually smaller, and when the surface impurity concentration reaches 8.0 ⁇ 10 18 atoms / cm 3 (curve A4), the temperature characteristic becomes negative.
  • the surface impurity concentration of the diffusion layer 12 is in the range of 1.0 ⁇ 10 18 atoms / cm 3 to 8.0 ⁇ 10 18 atoms / cm 3 , all are as small as 5% or less in the temperature range of ⁇ 30 ° C. to 85 ° C. Shows the temperature change rate.
  • FIG. 5 is also a diagram showing the rate of change of the resistance value of the semiconductor resistance element, where the horizontal axis shows the temperature T and the vertical axis shows the rate of change in the resistance value AR (T) ZR (25). .
  • the surface impurity concentration of the diffusion layer 12 which is the n-type semiconductor region is fixed at 2.3 ⁇ 10 18 at O m S / cm 3
  • the surface impurity concentration of the resistance element region 13 which is the p-type semiconductor region is 1.0 X 10 19 atoms / cm 3 (curve B1), 2.4 X 10 19 atoms / cm 3 (curve B2), 3.0 X 10 19 atoms / cm 3 (curve B3), 3.4 X 10 19 atoms / cm 3 (curve B4), It was changed to 5.0 X 10 19 atoms / cm 3 (curve B5).
  • the surface impurity concentration of the resistance element region 13 is set to 5.0 ⁇ 10 19 atoms / cm 3
  • FIG. 6 is a view showing a result of measuring a variation in resistance value while changing the surface impurity concentration of the diffusion layer 12.
  • the surface impurity concentration of the resistance element region 13 is set to 3.0 ⁇ 10 19 atoms / cm 3
  • the surface impurity concentration of the diffusion layer 12 is set to 0.1 ⁇ 10 19 atoms / cm 3 to: LO X 10 19 atoms / cm 3 . Range.
  • the variation in the resistance value of the resistance element region 13 rapidly increases. This is because the difference between the surface impurity concentration of the diffusion layer 12 and the surface impurity concentration of the resistance element region 13 becomes small, so that the formation of the resistance is unstable. ), And the variation in the resistance value is considered to be large.
  • FIG. 7 is a diagram showing the results of measuring the variation in resistance value while changing the surface impurity concentration of the resistance element region 13.
  • the surface impurity concentration of the diffusion layer 12 was 2.3 ⁇ 10 18 atoms / cm 3
  • the surface impurity concentration of the resistance element region 13 was changed within a range of 5.0 ⁇ 10 19 atoms / cm 3 or less.
  • the variation in the resistance value of the resistive element region 13 rapidly increases. This is due to the surface impurity concentration of the resistance element region 13 and the surface impurity of the diffusion layer 12. This is considered to be because the difference with the pure substance concentration becomes small, and the degree of formation of the resistance becomes unstable (the concentration difference just before the impurity concentration is inverted with respect to the diffusion layer 12), and the variation in the resistance value increases. .
  • FIG. 8 is a diagram showing a resistance value change rate when the surface impurity concentration of the diffusion layer 12 is on the order of 10 17 atoms / cm 3 . As shown here, becomes smaller than the surface impurity concentration force S lO X 10 18 at O m S / cm 3 of the diffusion layer 12, the resistance value of the resistor region 13 becomes a negative temperature coefficient, the teeth force also, The rate of change in the resistance value increases.
  • the temperature coefficient of the resistance value in the resistance element region 13 is reduced, and the resistance value due to the variation in the impurity concentration in the diffusion layer 12 and the resistance element region 13 is reduced.
  • the surface impurity concentration of the diffusion layer 12 (the semiconductor region of the first conductivity type) is set to 1.0 ⁇ 10 18 atoms / cm 3 to 8.0 ⁇ 10 18 atoms / cm 3 and the resistance element I if the surface impurity concentration of regions 13 and l .OX 10 19 atoms / cm 3 ⁇ 5.0 X 10 1 9 atoms / cm 3!, it can be seen.
  • the temperature coefficient of the resistance element region 13 becomes negative as shown in FIG.
  • the resistance value change rate increases.
  • the surface impurity concentration of the diffusion layer 12 is higher than 8.0 ⁇ 10 18 at O m S / cm 3, as shown in FIG. 6, the variation in the resistance value of the resistance element region 13 increases.
  • the surface impurity concentration of the resistance element region 13 becomes lower than 10 ⁇ 10 19 atoms / cm 3 , the dispersion of the resistance values of the resistance element region 13 increases as shown in FIG.
  • the surface impurity concentration of the resistance element region 13 is higher than 5.0 ⁇ 10 19 atoms / cm 3 , crystal damage will be increased, the leakage current will be easily increased, and the impurity implantation amount will increase. There is a disadvantage that the injection time is prolonged, which leads to an increase in product cost.
  • the surface impurity concentration of the diffusion layer 12 is set to 10 ⁇ 10 18 atoms / cm 3 to 8.0 ⁇ 10 18 atoms / cm 3 , and By setting the surface impurity concentration to 10 ⁇ 10 19 atoms / cm 3 to 5.0 ⁇ 10 19 atoms / cm 3 , a diffusion resistance with high stability against temperature change can be realized.
  • the surface impurity concentration of the diffusion layer 12 (the semiconductor region of the first conductivity type) is set to 1.0 ⁇ 10 18
  • a diffusion resistance having a negative temperature coefficient was obtained as shown in FIG.
  • the resistance does not vary greatly as in the case where a negative temperature coefficient is obtained by increasing the surface impurity concentration of the diffusion layer 12 to more than 8.0 ⁇ 10 18 atoms / cm 3 . Therefore, by combining such a diffused resistor with a negative temperature coefficient (semiconductor resistance element) with a diffused resistor with a positive temperature resistance, it is possible to produce a diffused resistor with positive and negative temperature characteristics in the same process. Thus, fabrication of a temperature compensation circuit and the like can be easily performed.
  • FIG. 9 is a plan view of the acceleration sensor 21, and FIG.
  • the movable member 23 is located at the center of the frame 22 (stationary member), and the frame 22 and the movable member 23 have four flexible beams (beams) 24A, 24B, 2B. Connected by 4C, 24D.
  • the movable member 23 is supported on the frame 22 by beams 24A to 24D, and a weight 25 is provided on the lower surface thereof.
  • the acceleration sensor 21 has a two-layer structure of a glass substrate 26 and a silicon substrate 27.
  • the frame 22 is composed of two layers, a glass substrate 26 and a silicon substrate 27, the movable member 23 and the beams 24A to 24D are formed by the silicon substrate 27, and the weight 25 separates a part of the glass substrate 26 from the frame part. Formed by ⁇ ⁇ .
  • the four beams 24A to 24D are arranged in a cross shape in a plane parallel to the upper surface of the movable member 23, and a direction parallel to the pair of beams 24A and 24C is called an X-axis direction.
  • the direction parallel to the pair of beams 24B and 24D is called the Y direction, and the direction perpendicular to these beams 24A to 24D is called the Z-axis direction.
  • Piezoresistors Rxl, Rx2, Rzl, and Rz2, which are semiconductor resistance elements according to the present invention, are embedded in the upper surface of one beam 24A extending in the X-axis direction.
  • the piezoresistors Rxl and Rzl are arranged in parallel at the end of the beam 24A on the frame side, and the piezoresistors Rx2 and Rz2 are arranged in parallel at the end of the beam 24A on the movable member side.
  • piezoresistors Rx3, Rx4, Rz3, and Rz4, which are the semiconductor elements according to the present invention are embedded in the upper surface of the other beam 24C extending in the X-axis direction.
  • the piezoresistors Rx3 and Rz3 are at the movable member side end of the beam 24C!
  • the piezoresistors Rx4 and Rz4 are arranged in parallel at the frame-side end of the beam 24C.
  • piezoresistors Ryl and Ry2 made of a semiconductor resistor element according to the present invention are embedded, and the piezoresistor Ryl is an end of the beam 24B on the frame side.
  • the piezoresistor Ry2 is disposed at the movable member side end of the beam 24B.
  • piezoresistors Ry3 and Ry4 which also have a semiconductor resistive element force acting on the present invention, are embedded.
  • the piezoresistor Ry4 is disposed at the movable member side end of the beam 24D.
  • the upper surface of the silicon substrate 27 is provided with a concave portion 28 by performing shallow etching while leaving the periphery, and a plurality of electrode pads 29 are provided on the outer peripheral portion of the concave portion 28.
  • the upper surfaces of the frame 22, the movable member 23, and the beams 24A to 24D are covered with an insulating film 30, and the piezoresistors Rxl to Rx4, Ryl to Ry4, 13 ⁇ 41 to 13 ⁇ 44, and the electrode pads 29 are formed on the insulating film 30. Connected as shown in FIG. 9 by A1 wiring 31!
  • FIG. 11 shows an X-axis direction acceleration detection circuit for detecting acceleration in the X-axis direction.
  • Piezo resistors Rxl, Rx2, Rx3, and Rx4 formed on the beams 24A and 24C are shown in FIG.
  • the full bridge circuit is configured as shown in FIG. That is, a branch in which the piezoresistors Rxl and Rx4 are connected in series and a branch in which the piezoresistors Rx2 and Rx3 are connected in series are connected in parallel to form a full bridge circuit, and both ends of the full bridge circuit are provided. Is configured to receive a voltage from the power supply 32.
  • the difference Vx between the potential at the midpoint of the piezoresistors Rxl and Rx4 measured by the potentiometer 33X and the potential at the midpoint of the piezoresistors Rx2 and Rx3 is expressed by the following equation (1).
  • Vo is the output voltage of the power supply 32
  • the resistance values of the piezoresistors Rxl, Rx2, Rx3, and Rx4 are represented using the same symbols (the same applies hereinafter).
  • FIG. 12 shows a Y-axis direction acceleration detection circuit for detecting acceleration in the Y-axis direction, and includes piezoresistors Ryl, Ry2, Ry3, and Ry4 formed on beams 24 ° and 24D. Constitutes a full bridge circuit as shown in FIG. Therefore, also in this circuit, the difference Vy between the potential of the middle point of the piezoresistors Ryl and Ry4 measured by the potentiometer 33Y and the potential of the middle point of the piezoresistors Ry2 and Ry3 is expressed by the following equation (2). It is.
  • FIG. 13 shows a Z-axis direction acceleration detection circuit for detecting acceleration in the Z-axis direction.
  • Piezo resistors Rzl, Rz2, Rz3, and Rz4 formed on beams 24A and 24C are The full bridge circuit is configured as shown in FIG. That is, a branch in which the piezoresistors Rz1 and Rz3 are connected in series and a branch in which the piezoresistors Rz2 and Rz4 are connected in series are connected in parallel to form a full-bridge circuit. A voltage is applied to the end from a power supply 32.
  • FIG. 14 shows a case in which acceleration in the X-axis direction is acting on the acceleration sensor 21, and FIG. 15 shows an enlarged view of the beams 24A and 24C.
  • the weight 25 is pulled in the X direction by the inertial force. Therefore, both the beams 24A and 24C are curved in an S shape as shown in FIG.
  • the piezoresistors Rxl and Rx3 extend and receive a tensile stress, and their resistance values increase.
  • the piezoresistors Rx2 and Rx4 contract and receive compressive stress, and their resistance values decrease.
  • the beam 24A, 2 The potential between the piezoresistors Rxl and Rx4 decreases and the potential between the piezoresistors Rx2 and Rx3 increases in accordance with the magnitude of the bending force ⁇ of 4C. As shown in FIG. At 33X, the potential difference according to the magnitude of the acceleration is measured.
  • the acceleration in the X direction is not detected by the acceleration detection circuit in the Z axis direction. Further, since the beams 24B and 24D in the Y-axis direction are only twisted, their piezoresistors Ryl to Ry4 only change their resistance values in the same manner, and the force in FIG. The acceleration in the X direction is not detected by the Y-axis acceleration detection circuit.
  • a potential difference corresponding to the magnitude of the acceleration in the direction is detected. Also, when acceleration in the Z-axis direction is working, the potential in the X-direction acceleration detection circuit does not change the potential between the piezoresistors Rxl and Rx4, and the potential between the piezoresistors Rx2 and Rx3 does not change. Is detected by the X-axis acceleration detection circuit. Absent. Similarly, in the Y-direction acceleration detection circuit, since the potential between the piezoresistors Ryl and Ry4 does not change and the potential between the piezoresistors Ry2 and Ry3 does not change, acceleration in the Z direction is detected by the Y-axis acceleration detection circuit. Not done.
  • the acceleration in the X-axis direction, the acceleration in the Y-axis direction, and the acceleration in the Z-axis direction are respectively detected by the X-axis acceleration detection circuit and the Y-axis acceleration detection.
  • the measurement can be performed independently by the circuit and the Z-axis direction acceleration detection circuit. Since the semiconductor resistance element according to the present invention is used as each piezoresistor, the temperature change of the resistance value of each piezoresistor is small, and the variation of the resistance value and its temperature coefficient is small. Measurement accuracy and reliability can be realized.
  • FIG. 17, FIG. 18, FIG. 19, and FIG. 20 are schematic views illustrating the manufacturing process of the acceleration sensor 21.
  • a concave portion 28 is formed by shallow etching of the upper surface of an n-type silicon substrate (Ueno) 27 (FIG. 17 (a)).
  • p-type impurities such as B are ion-implanted into regions on the upper surface of the silicon substrate 27 where the frame 22, the movable members 23 and 24A to 24D are to be formed, and diffusion annealing is performed to diffuse p-type impurities into the surface layer of the silicon substrate 27.
  • the layer 12 is formed (FIG. 17B).
  • the diffusion depth of the diffusion layer 12 is controlled to be equal to the thickness of the beams 24A to 24D.
  • a coating 34 such as an oxide film or a nitride film is formed on the back surface of the silicon substrate 27, an n-type impurity such as P is ion-implanted into the surface layer of the diffusion layer 12 so that the piezoresistors Rxl to Rx2 , Ryl to Ry4 and Rzl to Rz4 are formed.
  • an insulating film 30 is formed on the diffusion layer 12, an opening is formed in the insulating film 30 at a position facing both ends of the resistance element region 13, and an A1 wiring 31 is formed on the insulating film 30 by a lift-off method or the like.
  • A1 wiring 31 is patterned and formed as shown in FIG. The thus formed A1 wiring 31 is connected to both ends of each resistance element region 13 and each electrode pad 29 (FIG. 18A).
  • a mask 35 made of a nitride film is formed on the back surface of the silicon substrate 27.
  • the mask 35 is formed so as to cover a region to be a silicon substrate portion of the frame 22 and a region to be a lower surface of the movable member 23 (FIG. 18B).
  • the insulating film 30 on the upper surface is removed by etching to expose the silicon substrate 27.
  • an etching solution is brought into contact with the lower surface of the silicon substrate 27 in a state where a reverse bias is applied between the diffusion layer 12 and the lower surface of the silicon substrate 27, and the silicon substrate is passed through the opening of the mask 35. 27 is etched from the lower surface side.
  • the diffusion layer 12 functions as an etching stop layer, and the etching is stopped at the pn junction surface between the silicon substrate 27 and the diffusion layer 12, so that the etching depth and the thickness of the beams 24A to 24D are accurately controlled. You can control.
  • This technique is known as ECE (Electro Chemical Etchstop).
  • ECE Electro Chemical Etchstop
  • the silicon substrate 27 is overlaid on the glass substrate 26, and the silicon substrate 27 and the glass substrate 26 are kept at a temperature of 300 to 400 ° C.
  • a voltage of 500 to 1000 volts is applied in between, and the silicon substrate 27 and the glass substrate 26 are bonded together by anodic bonding (FIG. 19 (b)).
  • the glass substrate 26 is cut into the frame portion and the weight 25, and the acceleration sensors 21 formed on the silicon substrate (wafer) 27 are cut one by one by dicing (FIG. 20).
  • FIG. 21 is a diagram showing the results of evaluating the temperature characteristics of the bridge output by constructing a full-bridge circuit as shown in FIGS. 11 to 13 using the semiconductor resistor element 11 of the present invention.
  • the horizontal axis shows the temperature of the full bridge circuit
  • the vertical axis shows the bridge output A OffsetX.
  • the temperature fluctuates only by 0.05 mVZV or less in the temperature range of ⁇ 30 ° C. to 85 ° C.
  • an acceleration sensor having excellent temperature characteristics without adding a complicated circuit is provided. Can be manufactured.
  • FIG. 22 is a diagram showing a result of evaluating a temperature characteristic of a bridge output ⁇ OffsetX in a conventional full bridge circuit using a diffusion resistor.
  • the conventional example as can be seen from FIG. 22, there is an output fluctuation exceeding 0.5 mVZV in the temperature range of ⁇ 30 ° C. to 85 ° C., and the output fluctuation is 10 times as large as that of the embodiment of the present invention. It turns out that there is.
  • the real In the embodiment only the output fluctuation of the bridge circuit is shown.
  • characteristics such as frequency characteristics can be kept constant.
  • FIG. 23 is a schematic plan view and a cross-sectional view showing a resistance element incorporated in a semiconductor circuit such as an MMIC.
  • the resistance element 41 is formed by forming a p-type diffusion layer 12 on the surface of a compound semiconductor substrate 42 such as GaAs by implanting p-type ions or the like, and implanting n-type ions inside the diffusion layer 12 by n-type ions or the like.
  • the resistance element region 13 of FIG. According to this embodiment, it becomes possible to form a resistance element having a small temperature coefficient force and small variation in a semiconductor integrated circuit by a diffusion method.
  • the force described in the case of the acceleration sensor and the semiconductor circuit is used.
  • the semiconductor resistance element according to the present invention is used for detecting pressure, angular velocity, temperature, and the like in addition to the acceleration sensor and the semiconductor circuit.
  • the present invention can also be used for manufacturing semiconductor devices such as semiconductor sensors and semiconductor actuators such as motors, mirrors, relays, and switches.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Pressure Sensors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Measuring Fluid Pressure (AREA)

Abstract

Sur un substrat semi-conducteur de type n (15), une couche de diffusion de type p (12) est formée par implantation d'ions et sur une couche de surface de la couche de diffusion (12), une région d'élément de résistance de type n (13) est formée par implantation d'ions. Pour avoir un petit coefficient de température d'un élément de résistance semi-conducteur (résistance de diffusion) et pour réduire la variance d'une valeur de résistance, la concentration d'impuretés de surface de la couche de diffusion (12) est de préférence de 1,0×1018atomes/cm3 ou plus, mais pas supérieure à 8,0×1018 atomes/cm3, et la concentration d'impuretés de surface de la région de l'élément de résistance (13) est de préférence de 1,0×1019 atomes/cm3 ou plus, mais d'un maximum de 5,0×1019 atomes/cm3.
PCT/JP2005/009256 2004-05-21 2005-05-20 Élément de résistance semi-conducteur et sa méthode de fabrication, dispositif semi-conducteur utilisant un élément de résistance semi-conducteur WO2005114725A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004-152607 2004-05-21
JP2004152607A JP2005333093A (ja) 2004-05-21 2004-05-21 半導体抵抗素子及びその製造方法並びに半導体抵抗素子を用いた半導体装置

Publications (1)

Publication Number Publication Date
WO2005114725A1 true WO2005114725A1 (fr) 2005-12-01

Family

ID=35428617

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2005/009256 WO2005114725A1 (fr) 2004-05-21 2005-05-20 Élément de résistance semi-conducteur et sa méthode de fabrication, dispositif semi-conducteur utilisant un élément de résistance semi-conducteur

Country Status (3)

Country Link
JP (1) JP2005333093A (fr)
TW (1) TW200610155A (fr)
WO (1) WO2005114725A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5649478B2 (ja) * 2011-02-16 2015-01-07 三菱電機株式会社 半導体装置及びその試験方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5896761A (ja) * 1981-12-03 1983-06-08 Matsushita Electronics Corp イオン注入抵抗およびその製造方法
JPH01235366A (ja) * 1988-03-16 1989-09-20 Oki Electric Ind Co Ltd 半導体抵抗素子
JP2002243759A (ja) * 2001-02-13 2002-08-28 Hokuriku Electric Ind Co Ltd 半導体加速度センサ素子

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5896761A (ja) * 1981-12-03 1983-06-08 Matsushita Electronics Corp イオン注入抵抗およびその製造方法
JPH01235366A (ja) * 1988-03-16 1989-09-20 Oki Electric Ind Co Ltd 半導体抵抗素子
JP2002243759A (ja) * 2001-02-13 2002-08-28 Hokuriku Electric Ind Co Ltd 半導体加速度センサ素子

Also Published As

Publication number Publication date
TW200610155A (en) 2006-03-16
JP2005333093A (ja) 2005-12-02

Similar Documents

Publication Publication Date Title
US6192757B1 (en) Monolithic micromechanical apparatus with suspended microstructure
JP3367113B2 (ja) 加速度センサ
US5620931A (en) Methods for fabricating monolithic device containing circuitry and suspended microstructure
US6046067A (en) Micromechanical device and method for its production
US5850042A (en) Electrostatically force balanced silicon accelerometer
US5719069A (en) One-chip integrated sensor process
JPH0479420B2 (fr)
US5744719A (en) Integrated micromechanical sensor device
JP2560140B2 (ja) 半導体装置
JPH0798327A (ja) 絶縁体上シリコン技術を用いた加速度計の製造方法およびそれにより得られる加速度計
EP1385010B1 (fr) Accéléromètre semiconducteur utilisant des couches semiconductrices dotées comme conducteurs
US6763719B2 (en) Acceleration sensor
JP4431475B2 (ja) 半導体型３軸加速度センサ
JP4589605B2 (ja) 半導体多軸加速度センサ
WO2005114725A1 (fr) Élément de résistance semi-conducteur et sa méthode de fabrication, dispositif semi-conducteur utilisant un élément de résistance semi-conducteur
JPH05281251A (ja) 加速度センサおよびその製造方法
JPH1144705A (ja) 半導体加速度センサおよびその製造方法
JPH06196721A (ja) 半導体加速度センサ及びその製造方法
JPH02224277A (ja) 半導体圧力センサ及びその製造方法
JP3405222B2 (ja) 半導体加速度センサ素子及びその製造方法
JP2001056343A (ja) マイクロマシン、およびその製造方法
JPH04329676A (ja) 半導体加速度センサの製造方法
JPH04302175A (ja) 半導体加速度センサの製造方法
JPH03282373A (ja) 加速度センサの構造並にその製造方法
JPS6176961A (ja) 半導体加速度センサ

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS KE KG KM KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NG NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SM SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
NENP Non-entry into the national phase

Ref country code: DE

WWW Wipo information: withdrawn in national office

Country of ref document: DE

122 Ep: pct application non-entry in european phase