WO2005109530A1 - 半導体発光素子およびその製法 - Google Patents
半導体発光素子およびその製法 Download PDFInfo
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- WO2005109530A1 WO2005109530A1 PCT/JP2005/008510 JP2005008510W WO2005109530A1 WO 2005109530 A1 WO2005109530 A1 WO 2005109530A1 JP 2005008510 W JP2005008510 W JP 2005008510W WO 2005109530 A1 WO2005109530 A1 WO 2005109530A1
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- nitride semiconductor
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- emitting device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
Definitions
- the present invention relates to a semiconductor light-emitting device that emits blue (from ultraviolet to yellow) light in which a nitride semiconductor is stacked on a substrate, and a method for producing the same. More specifically, the present invention relates to a nitride semiconductor light emitting device which can be easily formed with a small number of steps while improving the ohmic contact of an n-side electrode provided in an n-type layer of a nitride semiconductor, and a method of manufacturing the same.
- Background art
- a semiconductor light emitting device that emits blue light is, for example, a sapphire substrate formed of an n-type layer having a force such as GaN and a material having a band gap energy smaller than that of the n-type layer and determining an emission wavelength.
- an active layer light-emitting layer
- a p-type layer that also has a power such as GaN are stacked on an InGaN-based (meaning that the ratio of In to Ga can vary).
- side (upper) electrode is provided
- n-side (lower) electrode is formed by being provided on the laminated surface of the semiconductor layer n-type layer partially exposed by etching.
- the n-type layer and the p-type layer improve the carrier confinement effect, so that the bandgap of the active layer side such as AlGaN-based (which means that the ratio of A1 to Ga can vary, the same applies hereinafter) compounds A semiconductor layer with high energy may be used.
- the p-side electrode is formed by a laminated structure of Ti and Au
- the n-side electrode is formed by a metal layer in which Ti and A1 are laminated and alloyed (for example, see Patent Document 1) ).
- the p-side electrode is provided via a light-transmitting conductive layer such as an alloy of Ni and Au, ZnO, or ITO provided on the surface of the stacked semiconductor layers, and is connected to the nitride semiconductor layer by this light-transmitting conductive layer. Ohmic contact is employed.
- the n-side electrode is directly provided on the surface of the n-type layer where a part of the nitride semiconductor layer to be laminated is removed by etching and is exposed. It is thought that contact can be obtained.
- Patent Document 1 JP-A-10-173226 Disclosure of the invention
- Ti-Al is generally used as an n-side electrode for obtaining an ohmic contact with a nitride semiconductor layer.
- A1 is exposed on the surface, it is easy to oxidize, and when an Au wire or the like is wire-bonded on this electrode, if an oxidizing film is used, the adhesive strength is low and the contact resistance increases. Therefore, it is necessary to further provide an Au layer on the surface.
- a sufficient omic contact with the nitride semiconductor cannot be obtained only by laminating the above-mentioned Ti film and A1 film, so that after the film is formed, sintering is performed to sufficiently deposit A1 in the nitride semiconductor layer.
- Ti and A1 are also alloyed. If an Au film is also provided at the time of this sintering, Ti, Al, and Au will also be alloyed, and a part of the alloyed A1 will be exposed on the surface, and there is no point in providing the Au film. I will. Therefore, it is necessary to perform sintering after laminating the Ti film and the A1 film, and then further provide a TiZAu or Au film, which requires two film forming steps, which complicates the manufacturing process.
- the present inventors have conducted intensive studies to prevent the operating voltage from increasing due to the influence of contact resistance between the electrode and the nitride semiconductor layer and the like.
- the Ti-Al alloy has a Ti film. If the thickness is about lOnm as specified, the contact resistance will be small and the operating voltage will not increase much.However, the contact resistance will increase significantly just by making the Ti film a little too thick. It has been found that the operating voltage easily rises to about 0.4 IV.
- the present invention has been made in view of such circumstances, and a semiconductor light emitting device having an n-side electrode configured to stably reduce the contact resistance between the n-side electrode and the nitride semiconductor layer is provided. To provide.
- Another object of the present invention is to provide an ohmic contact with a nitride semiconductor in a simple manufacturing process, and to form an n-side electrode having an Au layer on the surface that facilitates wire bonding. It is an object of the present invention to provide a nitride semiconductor light emitting device and a method for manufacturing the same. Means for solving the problem
- the inventors of the present invention have conducted intensive studies to reduce the driving voltage of the nitride semiconductor light-emitting device. As described above, as described above, the force with which a Ti-Al alloy layer is conventionally used as the n-side electrode has been discussed. It has been found that when the Ti layer is slightly too thick, the contact resistance increases and the driving voltage increases. So Conventionally, Ti has been used to improve the adhesion with the nitride semiconductor layer.However, even a single layer of A1 can be sufficiently diffused into the nitride semiconductor layer by heat treatment and alloyed to form an adhesion layer. And A1 and nitride semiconductor have much lower contact resistance than Ti and nitride semiconductor. I found that I can do it.
- a semiconductor light emitting device includes a substrate, a semiconductor laminated portion including a nitride semiconductor provided on the substrate and including an n-type layer and a p-type layer, and the n-type layer and the p-type layer.
- the n-side electrode and the p-side electrode are connected to each other, and are provided so as to be in direct contact with the nitride semiconductor layer of the n-side electrode, and the nitride semiconductor layer of the n-side electrode and The layer on the contact side is formed of a metal layer composed of the A1 layer.
- the nitride semiconductor refers to a compound of a group III element Ga and a group V element N or a part or all of the group III element Ga substituted with another group III element such as Al or In.
- semiconductors composed of compounds (nitrides) in which some of the N of Z or V elements are replaced with other V elements such as P and As.
- Part of A1 is provided so as to diffuse into the n-type nitride semiconductor layer to form an ohmic contact with the nitride semiconductor layer.
- the Au layer is provided on the outermost surface of the A1 via a Noria metal layer having a melting point higher than the melting point of the A1 and having a melting point higher than that of the A1, whereby A1 is sufficiently diffused into the nitride semiconductor by heat treatment.
- the Au layer and the A1 layer on the electrode surface are separated by the non-metal layer even by the heat treatment, while maintaining the ohmic contact between the nitride semiconductor and the metal layer.
- An unalloyed Au layer excellent in wire bonding can be secured on the surface.
- ohmic contact with the nitride semiconductor layer can be obtained by heat treatment after these metal layers are continuously formed.
- an n-type nitride semiconductor layer provided with the n-side electrode is formed of AlGaN (0 ⁇ x1-xx ⁇ 0.5), and the barrier metal is composed of Ni, Pt, V , Cr, Mo, Al and TU are formed of at least one metal selected from the group consisting of: More specifically, the n-side electrode is formed by a laminated structure of AlZNiZAu, AlZPtZAu, or AlZMoZAu from the nitride semiconductor layer side.
- the substrate may be a nitride semiconductor
- the n-side electrode may be provided on the back surface of the substrate
- the substrate-side metal layer of the n-side electrode may be formed of A1.
- the contact resistance of the die bonding can be reduced by / J, while obtaining the ohmic contact between the semiconductor layer and the metal layer.
- a semiconductor laminated portion including an n-type layer and a p-type layer formed of a nitride semiconductor is grown on a substrate, and at least a part of the exposed surface of the n-type layer is exposed.
- An Au layer is laminated in this order, and then heat treatment is performed to diffuse a part of A1 into the n-type nitride semiconductor layer or the back surface of the substrate while leaving the Au layer on the surface. I do.
- the A1 layer is provided on the side of the n-side electrode connected to the n-type nitride semiconductor layer that contacts the nitride semiconductor layer, the contact resistance with the nitride semiconductor layer is reduced.
- An n-side electrode that is much smaller than the TU and does not increase the driving voltage can be formed.
- a Noria metal having a high melting point and a high melting point is provided while an Au layer is provided on the surface to improve adhesiveness of wire bonding. Since the layers are provided, even if heat treatment is performed to obtain ohmic contact between the A1 layer and the nitride semiconductor layer after all metal layers for the n-side electrode are The A1 layer and the Au layer can prevent alloying, and the Au layer on the surface is not damaged. Therefore, while sintering (heat treatment) allows A1 to diffuse into the nitride semiconductor layer and obtain an ohmic contact, the Au layer remains on the surface of the metal layer without alloying. With a simple manufacturing process, the electrical connection with the gold wire for wire bonding can be ensured and the contact resistance can be reduced, resulting in an extremely low electrical connection with the nitride semiconductor layer. Can be done with a resistor.
- FIG. 1 is an explanatory sectional view of one embodiment of a semiconductor light emitting device according to the present invention.
- FIG. 3 is a diagram showing the relationship between the electrode spacing and the resistance between both electrodes when determining the contact resistance between the n-type nitride semiconductor layer and the A1 electrode according to the present invention.
- FIG. 4 is an explanatory sectional view showing another configuration example of the n-side electrode shown in FIG. 1.
- FIG. 5 is an explanatory sectional view showing another embodiment of the semiconductor light emitting device according to the present invention.
- FIG. 1 is a cross-sectional view illustrating an embodiment of a semiconductor light emitting device of the present invention in which a nitride semiconductor layer suitable for blue light emission is stacked on a sapphire substrate.
- the semiconductor light emitting device comprises, for example, sapphire (Al 2 O 3)
- Semiconductor layers 2 to 8 for forming a light emitting layer are laminated on the surface of a powerful substrate 1 such as 23 single crystal), and a p-side electrode 10 is formed on the surface via a light-transmitting conductive layer 9. Further, an n-side electrode 11 is formed on the exposed n-type layer 4 in which a part of the stacked semiconductor layers 4 to 8 is removed by etching.
- the present invention is characterized in that the contact surface side of the n-side electrode 11 with the n-type layer 4 is formed by the A1 layer 1 la as described later.
- an Au layer 1 lc is further formed on this surface via a 1 lb barrier metal layer.
- the A1 layer 11a is provided as a layer that makes ohmic contact with the nitride semiconductor layer, and after film formation, for example, at about 300 to 700 ° C in a nitrogen atmosphere, for example, at about 625 ° C.
- RTA rapid heating
- a part of A1 is sufficiently diffused into the nitride semiconductor layer to provide an ohmic contact.
- This heat treatment can be performed after providing the next barrier metal layer 1 lb and the Au layer 11c, even if the heat treatment is not performed alone in the state where the A1 layer 11a is provided.
- the A1 layer 11a is provided with a thickness of about 0.01 to about LO ⁇ m, preferably about 0.2 to 1 ⁇ m, for example, about 0.25 ⁇ m.
- the noria metal layer l ib is provided to make the A1 layer 11a and the Au layer 1lc provided on the surface independent from each other so that the heat treatment does not cause the A1 layer 11a and the Au layer 1lc to be alloyed.
- the 1 lb of the noria metal layer may have a thickness of about 0.05 to 0.5 / ⁇ , preferably 0.1 to 0.2, since the A1 layer 1 la and the Au layer 1 lc do not react with each other! It is provided with a thickness of about 111.
- the Au layer 11c is provided to enhance wire bonding properties and to perform wire bonding reliably, and is formed to a thickness of about 0.1 to 10 / ⁇ , preferably about 0.2 to 3 / ⁇ .
- the present inventors have conducted intensive studies to lower the driving voltage of the nitride semiconductor light emitting device.As a result, even when a Ti A1 alloy layer was used as the n-side electrode, the Ti layer was formed to be thick. As a result, they found that the contact resistance between the n-side electrode and the nitride semiconductor layer could not always be sufficiently reduced, and as a result of further intensive studies, it was found that the A1 layer was provided as a metal layer in contact with the nitride semiconductor layer. In addition, they have found that the contact resistance can be reliably reduced without the problem of adhesion between the nitride semiconductor layer and the electrode, and the drive voltage can be reduced.
- the present inventors do not separately form the TiZAl film and the TiZAu film to form the n-side electrode connected to the n-type layer of the nitride semiconductor.
- Au that is suitable for wire bonding on the surface while sufficiently increasing the ohmic contact with the nitride semiconductor layer.
- heat treatment for obtaining an ohmic contact with the nitride semiconductor was performed using a laminated structure of A1 layer, Z noria metal layer, and ZAu layer. By doing so, the contact resistance with the nitride semiconductor layer can be reduced, and wire bonding can be performed well on the surface.
- the Au layer can be maintained without alloying, and the n-side electrode can be easily formed with a very small contact resistance Can be formed.
- FIG. 2A shows the principle of the TLM method. That is, as shown in FIG. 2A, circular electrodes 22 and 23 are formed on the surface of the nitride semiconductor layer 21, and the resistance value between the electrodes is determined by the voltage and current applied between the electrodes 22 and 23. Detect R.
- the two electrodes 22 and 23 have a ring-shaped second electrode 23 formed around a circular first electrode 22 having a radius r (for example, about 100 m) at a predetermined interval d.
- r for example, about 100 m
- the detected resistance value R is proportional to the distance d between the two electrodes 22 and 23 as shown in FIG.2C. Then it gets bigger. Therefore, when this interval d is set to 0, that is, the value of the intercept with the y-axis in FIG. 2C is obtained as the contact resistance 2 p.
- the nitride semiconductor layer 21 is formed as an n-type GaN layer doped with Si to about 4 ⁇ 10 18 cm 3 to a thickness of about 10 m, and the electrodes 22 and 23 on the surface are made of a material.
- RTA was performed at 625 ° C for 5 seconds in an atmosphere in which nitrogen gas was flowed at a rate of 1 liter Z seconds after the electrode material was formed. (Rapid heating) An annealing treatment was performed to obtain an ohmic contact, and the force was also measured.
- A1 is formed to a thickness of 250 nm as an electrode material, and the result of measuring the resistance R between the two electrodes while changing the distance d between the two electrodes is shown in FIG.
- the horizontal axis represents the natural logarithmic value In (r + d / r) as the relative d-value! / ⁇ .
- r is the radius of the electrode 22
- d is the distance between the two electrodes.
- the contact resistance of Ti is about 100 times, which is a problem.
- the contact resistance it is necessary to be 5.9 X 10- 4 ⁇ cm 2 or less. From this point, the Ti-Al alloy conventionally used has a contact resistance close to that of the A1 layer of the present invention, and there is no problem in increasing the driving voltage. It is apparent from the contact resistance of Ti that the contact resistance is increased when the amount is large because it is provided on the compound semiconductor layer side. Therefore, the contact resistance may increase depending on the manufacturing conditions, and the stability is lacking.
- a 50 nm thick Ni layer and a 300 nm Au layer are laminated on the 250 nm thick A1 layer according to the present invention and wire bonding is performed, and the bonding is peeled off (electrode peeling at the wire bonding part). Inspection for the presence or absence was performed on 50 samples. As a result, one defective product No generation was observed, and it was confirmed that there was no problem regarding the adhesion between the electrode and the nitride semiconductor layer. In this verification, since the contact resistance of the A1 layer was checked, the heat treatment had already been performed, and the Ni and Au layers were stacked on top of this to produce actual LEDs.
- an A1 layer, a Ni layer, and an Au layer can be successively laminated, and thereafter, a heat treatment can be performed to obtain an ohmic contact.
- a heat treatment can be performed to obtain an ohmic contact.
- the Au layer on the surface does not alloy with the A1 layer, so the AU has a high melting point and a barrier metal layer such as Ni is interposed.
- the semiconductor layers laminated on the sapphire substrate 1 include, for example, a low-temperature buffer layer 2 having a GaN power of about 0.005 to 0.1 ⁇ m, and a high-temperature buffer layer 3 of undoped GaN having a thickness of about 1 to 3 ⁇ m.
- Superlattice layer 5 with a superlattice structure in which 5 to 40 pairs of layers are alternately stacked, a material whose band gap energy is smaller than that of the barrier layer, for example, InGaN of l to 3 nm
- Layer with multiple quantum well (MQW) structure in which 3 to 8 pairs of layers and 10 to 20 nm GaN barrier layers are stacked, is composed of a p-type AlGaN-based compound semiconductor layer of about 0.05 to 0.3 ⁇ m.
- the p-type barrier layer (layer having a large bandgap energy) 7 and the p-type layers 7 and 8 formed of the contact layer 8 made of p-type GaN are sequentially stacked in a thickness of about 0.2 to about m, respectively. ing.
- the undoped high-temperature buffer layer 3 has an undoped first layer grown at a high temperature in order to improve the crystallinity of the nitride semiconductor layer to be laminated. Is not undoped.
- the p-type layer 7 and the contact layer 8 are preferably provided with a layer containing A1 on the active layer 6 side in terms of carrier confinement effect, but may be formed only of the GaN layer.
- the n-type layer 4 may be provided with an AlGaN-based compound semiconductor layer to form a multi-layer, and these may be formed of another nitride semiconductor layer.
- the active layer 6 is sandwiched between the n-type layer 4 and the p-type layer 7, but the pn junction structure in which the n-type layer and the P-type layer are directly joined is used. May be.
- an undoped AlGaN-based compound layer with a power of about several nm was formed by directly growing a p-type AlGaN-based compound layer on the active layer 6. It is preferable that the length be long, because it is possible to prevent leakage due to contact between the p-type layer and the n-type layer while filling pits formed in the active layer.
- the n-type layer and the p-type layer, including the contact layer can be composed of AlGaN (0 ⁇ x ⁇ 0.5),
- n-type layer and the p-type layer are stacked so as to form a light emitting layer.
- a translucent conductive layer 9 having a ZnO force of about 0.1 to about LO m is provided, and a p-side electrode 10 is formed on a part of the transparent conductive layer 9 by a laminated structure of Ti and Au.
- the n-side electrode 11 is formed on the n-type layer 4 where a part of the laminated semiconductor laminated portion is removed by etching and is exposed, with a laminated structure of A1, Ni and Au.
- A1 layer 11a has ⁇ !
- ⁇ 10 ⁇ m, for example 0.1 ⁇ m, Noria metal layer lib Ni layer is 30 ⁇ : LOOnm, for example, 50 nm, Au layer 11c is laminated about 0.2-1 ⁇ m, for example about 0.25 ⁇ m, Heat treatment of rapid heating (RTA) at about 600 ° C for about 5 seconds is performed.Although part of the A1 layer diffuses into the nitride semiconductor, each metal layer is made of a 1 lb. The Au layer 11c that is not alloyed is secured on the surface of the n-side electrode 11, and the bonding characteristics of the wire bonding can be improved. Then, except for the surfaces of the p-side electrode 10 and the n-side electrode 11, passivation of SiO or the like (not shown) is performed on the entire surface.
- RTA rapid heating
- the translucent conductive layer 9 is not limited to ZnO. ITO or Ni and Au can be used to spread the current throughout the chip while transmitting light even with a thin alloy layer of about 2 to LOOnm. .
- the contact resistance can be extremely reduced. Furthermore, in order to form the n-side electrode, Al, Ni, and Au are continuously formed and laminated in a single film-forming process, and heat treatment is performed only to form ohmic contact between the electrode and the semiconductor layer. In addition, since A1 is not exposed on the surface, it is possible to prevent contamination of the electrode surface due to oxidation and the like, and it is possible to perform wire bonding well. As a result, a very low contact resistance can be established between the external leads and the driving voltage can be kept low even when the light emitting device is formed. Is obtained.
- MOCVD metalorganic chemical vapor deposition
- TMG trimethylgallium
- NH 3 Ammonia
- TMA trimethyl aluminum
- TIn trimethyl indium
- SiH as a reactive gas and dopant gas for n-type, p-type
- a low-temperature buffer layer 2 having a GaN layer strength of about 0.005 to 0.1 m is formed on an insulating substrate 1 having a sapphire force at a low temperature of about 400 to 600 ° C., for example.
- the high-temperature buffer layer 3 made of undoped GaN is about 1 to 3 ⁇ m
- the n-type layer (barrier layer) 4 that also has Si-doped n-type GaN is 1 to 5 ⁇ m. Approximately m is formed.
- the growth temperature is lowered to a low temperature of 400 to 600 ° C., and the InGaN layer and the GaN layer are removed.
- the superlattice layer 5 having a superlattice structure is further formed, for example, with a Ga layer of 1 to 3 nm made of InGaN and a G layer of 10 to 20 nm.
- An active layer 6 having a multiple quantum well (MQW) structure in which 3 to 8 pairs of aN barrier layers are stacked is formed to a thickness of about 0.05 to 0.3 ⁇ m.
- MQW multiple quantum well
- the temperature in the growth apparatus was raised to about 600 to 1200 ° C.
- the p-type AlGaN-based compound semiconductor layer 7 was set to about 0.1 to 0.5 ⁇ m
- the contact layer 8 made of p-type GaN was set to 0.1 to 0.5 ⁇ m. Lay each about 0.5 ⁇ m.
- a protective film such as SiN is provided on the surface, and annealing is performed at about 400 to 800 ° C. for about 10 to 60 minutes to activate the p-type dopant.
- the light-transmitting conductive layer 9 is formed by forming a film of about 0.1 to 10 m by a method such as vacuum deposition, PLD, or ion plating.
- a part of the laminated semiconductor layer is etched by reactive ion etching with chlorine gas or the like so that the n-type layer 4 is exposed.
- A1 was continuously adhered to the exposed surface of the n-type layer 4 by about 0.1 ⁇ m, Ni was about 50 nm, and Au was successively deposited by vacuum or vacuum deposition at about 250 nm. Heat treatment for about 5 seconds. If the n-side electrode is formed by a lift-off method, the n-side electrode having a predetermined shape can be formed by removing the mask. Then, for the p-side electrode, 0.1 m and 0. The p-side electrode 10 is formed by performing vacuum deposition at a rate of about 3 / zm. Thereafter, the semiconductor light emitting device chip shown in FIG. 1 is obtained by forming a chip from the wafer.
- the n-side electrode 11 has a laminated structure of an A1 layer 1 la, a Ni layer (barrier metal layer 1 lb), and an Au layer 11 c.
- the intermediate barrier metal layer l ib is not limited to Ni, and a metal having a high melting point than AU can be used.
- the A1 layer is about 0.01 ⁇ m
- the Mo layer is about 0.05 ⁇ m
- the Au layer is about 0.25 ⁇ m.
- the heat treatment C 5 seconds, to those of a small contact resistance 5.61 X 10- 4 [ ⁇ cm 2 ] is obtained, as shown in FIG. 4B, A1 layer, Pt layer, a stack of Au layer It can also be structured.
- another metal as described above is used for the noria metal layer.
- a nitride semiconductor layer is laminated using a sapphire substrate as a substrate, and a part of the laminated semiconductor layer is removed by etching in order to connect an n-side electrode to an n-type layer.
- a GaN substrate is used instead of a sapphire substrate and a nitride semiconductor layer is laminated on the GaN substrate, An n-side electrode can be formed directly on the back surface of the GaN substrate, which needs to etch part of the stacked semiconductor layers. An example of this case is shown in FIG. In FIG.
- a GaN substrate is used instead of a sapphire substrate, and the undoped high-temperature buffer layer is omitted.
- the rest of the structure is the same as the stacked structure shown in FIG.
- the same portion as above is formed by laminating the above-mentioned Al / NiZAu metal film on the back surface of the substrate 1 and performing heat treatment, except that the p-side electrode 10 is provided substantially at the center of the chip.
- the undoped GaN layer is omitted to reduce the series resistance.
- An n-type high-temperature buffer layer can also be provided.
- a light-emitting element such as a blue light or an ultraviolet light having a low drive voltage
- a light source of a wide range of electric devices such as a white light source and a lighting device, a pilot lamp, a lighting device, a disinfecting device, and the like Can be used for
Abstract
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US11/596,124 US20080258166A1 (en) | 2004-05-11 | 2005-05-10 | Semiconductor Light Emitting Device and Method for Manufacturing the Same |
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JP2005130570A JP2005354040A (ja) | 2004-05-11 | 2005-04-27 | 半導体発光素子およびその製法 |
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US20070029555A1 (en) * | 2005-08-04 | 2007-02-08 | Lester Steven D | Edge-emitting LED light source |
JP5354622B2 (ja) * | 2009-02-18 | 2013-11-27 | 独立行政法人産業技術総合研究所 | 半導体発光ダイオード |
JP2014239082A (ja) * | 2011-09-28 | 2014-12-18 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
EP2763192B1 (en) | 2011-09-30 | 2019-12-25 | Soko Kagaku Co., Ltd. | Nitride semiconductor element and method for producing same |
KR20140001332A (ko) * | 2012-06-26 | 2014-01-07 | 엘지이노텍 주식회사 | 발광 소자 |
JP2014165337A (ja) | 2013-02-25 | 2014-09-08 | Rohm Co Ltd | 発光素子、発光素子パッケージおよび発光素子の製造方法 |
WO2015029281A1 (ja) * | 2013-08-26 | 2015-03-05 | パナソニックIpマネジメント株式会社 | 半導体発光素子及び半導体発光素子の製造方法 |
Citations (2)
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JPH08274372A (ja) * | 1995-03-31 | 1996-10-18 | Toyoda Gosei Co Ltd | 3族窒化物半導体発光素子 |
JPH0955559A (ja) * | 1995-08-10 | 1997-02-25 | Sanyo Electric Co Ltd | 半導体レーザ装置及びそのサブマウント基板 |
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2005
- 2005-04-27 JP JP2005130570A patent/JP2005354040A/ja active Pending
- 2005-05-06 TW TW094114742A patent/TW200605406A/zh unknown
- 2005-05-10 WO PCT/JP2005/008510 patent/WO2005109530A1/ja active Application Filing
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH08274372A (ja) * | 1995-03-31 | 1996-10-18 | Toyoda Gosei Co Ltd | 3族窒化物半導体発光素子 |
JPH0955559A (ja) * | 1995-08-10 | 1997-02-25 | Sanyo Electric Co Ltd | 半導体レーザ装置及びそのサブマウント基板 |
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