WO2005030439A1 - 研磨布及び研磨布の加工方法並びにそれを用いた基板の製造方法 - Google Patents
研磨布及び研磨布の加工方法並びにそれを用いた基板の製造方法 Download PDFInfo
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- WO2005030439A1 WO2005030439A1 PCT/JP2004/013661 JP2004013661W WO2005030439A1 WO 2005030439 A1 WO2005030439 A1 WO 2005030439A1 JP 2004013661 W JP2004013661 W JP 2004013661W WO 2005030439 A1 WO2005030439 A1 WO 2005030439A1
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- Prior art keywords
- groove
- substrate
- polishing cloth
- polishing
- grooves
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Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/11—Lapping tools
- B24B37/20—Lapping pads for working plane surfaces
- B24B37/26—Lapping pads for working plane surfaces characterised by the shape of the lapping pad surface, e.g. grooved
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/11—Lapping tools
- B24B37/20—Lapping pads for working plane surfaces
- B24B37/24—Lapping pads for working plane surfaces characterised by the composition or properties of the pad materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32115—Planarisation
- H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
Definitions
- the present invention relates to a polishing cloth, a method of processing a polishing cloth, and a method of manufacturing a substrate using the polishing cloth.
- the present invention relates to a polishing cloth for polishing a substrate, particularly a main surface of a semiconductor substrate, a method for processing the polishing cloth, and a method for manufacturing a substrate using the polishing cloth.
- a semiconductor substrate is required to have high surface flatness in order to form a semiconductor device on a main surface thereof. This is because the minimum line width of the wiring constituting the semiconductor device is very small, less than 0.2 m, and it is necessary to flatten the main surface of the semiconductor substrate to reduce defects such as disconnection. The minimum line width of the wiring tends to be smaller in order to increase the degree of integration of the semiconductor device, and further improvement in the surface flatness of the semiconductor substrate is required.
- a polishing material for polishing the surface is important.
- CMP Chemical Mechanical Polishing
- the semiconductor substrate 11 held by the polishing head 10 is desirably placed on a polishing cloth 13 stuck on a polishing machine platen 12. Pressed with pressure.
- the platen 12 and the semiconductor substrate 11 rotate at a predetermined number of revolutions, and at the same time, an abrasive (slurry) 15 is supplied from a nozzle 14 near the center of the platen, and the abrasive 15 is polished with the semiconductor substrate 11. Polishing proceeds between the cloths 13.
- the polishing method is substantially the same for any size semiconductor substrate, but the size of the semiconductor substrate is increasing in size to reduce the cost of the semiconductor device.
- rotation of the semiconductor substrate and the surface plate is necessary to maintain uniformity of polishing in the surface of the semiconductor substrate.
- large diameter of the semiconductor substrate is caused by centrifugation at the outer peripheral portion of the semiconductor substrate due to rotation of the semiconductor substrate.
- This causes a phenomenon that the abrasive hardly enters the central portion of the semiconductor substrate, and as a result, uniform polishing is not performed on the surface of the semiconductor substrate, and as a result, the flatness of the semiconductor substrate is deteriorated. It becomes a factor. Therefore, in order to allow the polishing agent to reach the center of the semiconductor substrate so that uniform polishing is performed within the semiconductor substrate surface, a polishing cloth having grooves of various patterns has been invented.
- a lattice shape for example, see JP-A-2002-100592, JP-A-2000-286218, JP-A-2000-354952, and JP-A-2002-367937; (See, for example, JP-A-2000-354952), turtle-shaped, radial (for example, see JP-A-7-321076, JP-A-2002-100592), concentric (for example, see JP-A-2002-100592), Combinations of radial grooves and concentric or spiral grooves (see, for example, JP-A-2000-286218, JP-A-2000-354952, and JP-A-2002-367937), all of which are used in abrasives
- the purpose is to make the polishing amount uniform within the surface of the semiconductor substrate by increasing the retention and fluidity and allowing the abrasive to reach the center of the semiconductor substrate.
- the grooves may be parallel to the diameter direction of the platen. Most of the grooves are not parallel. If the grooves are parallel to the diameter direction of the surface plate, the centrifugal force due to the rotation of the surface plate is transmitted to the abrasive as it is, so that its fluidity is largely maintained. It can reach the center of the surface.
- the centrifugal force is divided in the direction perpendicular to the grooves and in the direction perpendicular to the grooves, and only the force in the groove direction acts on the abrasive, so that the fluidity of the abrasive decreases.
- the abrasive that has entered the groove immediately below the substrate is diverted at the branch point of the groove while moving toward the outer periphery of the surface plate, so that the amount of the abrasive passing through one groove itself decreases.
- the amount of the abrasive reaching the center of the surface of the semiconductor substrate via the groove decreases, the amount of the abrasive entering between the polishing pad and the semiconductor substrate also decreases.
- the polishing rate at the central portion of the semiconductor substrate surface is smaller than the polishing rate at the outer peripheral portion of the semiconductor substrate surface where the abrasive easily enters between the polishing pad and the semiconductor substrate from a portion other than the groove, and the polishing speed at the main surface of the semiconductor substrate is reduced.
- the flatness may be deteriorated.
- polishing rings are formed on the surface of the semiconductor substrate polished with such a polishing cloth.
- the surface of the polishing cloth is viewed from the center of the semiconductor substrate surface. This is caused by the irregularity of the polishing pad formed by the grooves being transferred to the radius region because it is always in contact with the radius region. Therefore, when a semiconductor substrate is polished with a polishing cloth having concentric or spiral grooves, the surface flatness of the semiconductor substrate may be deteriorated.
- polishing cloths are formed on the polishing cloth surface by combining radial grooves and concentric or spiral grooves, but as long as concentric or spiral grooves are present on the polishing cloth, Polishing ring problems always occur and adversely affect the surface flatness of the substrate.
- a polishing pad in which the radial grooves of the polishing pad are straight or curved to the opposite side to the rotating direction of the polishing pad is disclosed.
- the number of radial grooves to be formed and the interval between the grooves can be variously modified, but the diameter can be changed.
- the diameter of the substrate is set to 200 mm or more. If you do not specify the groove volume directly below the substrate to be polished by the radial grooves, even if you change the polishing platen ⁇ substrate rotation speed, substrate pressing load, type and concentration of abrasive, etc. It is difficult for the abrasive to penetrate to the center of the main surface of the substrate in contact with the polishing cloth, and the surface flatness of the substrate may be degraded.
- Japanese Patent Application Laid-Open No. 2002-100592 discloses a polishing cloth with radial grooves manufactured by sticking a fan-shaped polishing cloth piece to the surface of a polishing platen. As in the publication, there is the same problem that the definition of the volume of the groove immediately below the substrate to be polished by the radial grooves is not easy.
- the groove dimensions specified in this document may be applied to the radial grooves, but only at the outermost periphery of the polishing cloth. Is it sufficient to apply it near the center of the radial groove, or is the total force of the groove to be formed S sufficient if it is within this specified dimension? It is not clear that the abrasive can be supplied to the center of the substrate being polished There is a problem that a polishing cloth having an optimum radial groove interval cannot be provided, and there is a problem similar to that of JP-A-7-321076 and JP-A-2002-100595.
- a MOS (Metal Oxide Semiconductor) semiconductor device formed on the silicon active layer has a source Since the PN junction area of the drain can be reduced, the parasitic capacitance can be reduced, and high-speed device driving can be achieved. Furthermore, since the capacitance of the BOX oxide film as the insulating layer is in series with the depletion layer capacitance formed immediately below the gate oxide film, the capacitance of the depletion layer is substantially reduced, thereby realizing low power consumption. Can be.
- Such an SOI wafer has, for example, a first wafer (hereinafter, referred to as a bond wafer) and a second wafer (hereinafter, referred to as a base wafer) having a principal surface having at least one surface flattened and mirrored. ) Is provided with a BOX oxide film on at least one of them, and the two main surfaces are bonded to each other and bonded, and further heat treatment is performed to strengthen the bonding. It is manufactured by grinding and polishing from the opposite side to form a silicon active layer of a predetermined thickness on an insulating film.
- the silicon active layer has a thickness of 0.1 or less, particularly about 0.1 ⁇ m, the silicon active layer itself to be polished is thin, so that the polishing allowance is reduced. There is a tendency to remove fine irregularities on the surface of the silicon active layer by fine polishing while maintaining the film thickness uniformity.
- a suede-type polishing cloth having a lattice, triangular lattice, turtle-shaped, radial, concentric, or spiral groove as described above is also used for polishing a silicon active layer of an SOI wafer.
- a problem in terms of quality in which a polishing ring is generated and good film thickness uniformity cannot be obtained. Disclosure of the invention
- the polishing agent in polishing a semiconductor substrate or the like, can be polished with a high flatness by supplying a required amount of the polishing agent to the center of the substrate. It is an object of the present invention to provide a polishing pad capable of removing minute irregularities on the surface while maintaining the film thickness uniformity. Furthermore, in forming grooves on the surface of the polishing cloth, no kinks or burrs are generated on the polishing cloth, and the surface of the semiconductor substrate including the SOI wafer is not scratched. It is an object of the present invention to provide a method of manufacturing a substrate using the same.
- the present invention relates to a polishing cloth used for polishing a substrate, wherein a groove having a radial pattern is formed on a surface of the polishing cloth.
- the average value of the total volume of all the groove portions existing directly under the substrate (the average value of the total sum of the groove volumes immediately below the substrate) Force (the average value of the total sum of the groove volumes immediately below the substrate (mm 3 )
- a polishing cloth characterized by having a Z substrate area (mm 2 ) of not less than 0.06 and not more than 0.23.
- the value obtained by averaging the total volume of all the groove portions existing immediately below the substrate is the above value relative to the area of the substrate. If it is 0.06 or more, the required amount of abrasive supplied between the substrate and the polishing cloth at the time of polishing via the grooves formed on the polishing cloth surface regardless of the absolute value of the substrate area Since it is located directly under the substrate, a substrate with high surface flatness or SOI wafer with high film thickness uniformity can be manufactured. Can be a polishing cloth.
- the present invention relates to a polishing cloth used for polishing a substrate, wherein a groove having a radial pattern is formed on a surface of the polishing cloth, and the groove is located at a center more than the substrate.
- the groove depth of the groove portion located on the side is formed to be shallower than the groove depth of the groove portion located immediately below the substrate, and the intersection of the groove and the groove at the center of the radial pattern of the groove is Provided is a polishing cloth characterized in that it does not exist immediately below a substrate.
- the groove is formed such that the groove depth of the groove portion located on the center side of the polishing cloth with respect to the substrate to be polished is smaller than the groove depth of the groove portion existing immediately below the substrate. If so, a necessary amount of polishing agent is supplied via a groove immediately below the semiconductor substrate during polishing, and a polishing cloth sandwiched between grooves near the center of the polishing cloth during groove forming processing. The polishing cloth twists due to the narrow width of the polishing pad.Peeling from the surface plate does not occur due to the shallow groove depth, and the gap between the grooves at the center of the radial pattern of the grooves.
- the polishing pad having such grooves formed thereon is particularly suitable for use as a single-wafer polishing pad having no cutout at the center of the polishing pad. At this time, if the angle between the grooves exceeds 5 °, even if the grooves are formed by a groove processing method in which the groove depth to the center of the outer peripheral portion of the polishing pad is constant, the polishing rate is not changed.
- polishing cloth of the present invention since the board strength may be peeled off or twisted, and glue may be generated, and the wafer may be affected by scratches or the like.
- the groove depth of the groove located on the center side of the substrate to be polished is larger than the groove depth of the groove immediately below the substrate. A polishing cloth formed so as to be shallow may be used.
- the groove has a constant groove width and is formed so that an angle formed between the grooves exceeds a numerical value obtained by the following equation (1).
- the overlapping portion of the grooves will be located immediately below the substrate to be polished. If there is an overlapping portion of the grooves directly below the substrate, the triangular end of the polishing pad sandwiched between the radial grooves also exists directly below the substrate. If the triangular end is peeled or twisted from the surface plate during the groove processing, and if the glue is generated or immediately occurs, the polishing process will cause a polishing flaw on the substrate surface. However, if a groove exceeding the above angle is formed, the overlapping portion of the groove can be located directly below the substrate, so that such a polishing flaw can be prevented.
- the groove has a groove width of 2.Omm or less.
- the groove width is 2.Omm or less, the irregularities on the polishing cloth formed by the polishing cloth surface and the grooves will be transferred to the surface of the substrate to be polished and adversely affect the surface Less likely. Further, when the groove width is 1.5 mm or less, the possibility of adverse effects is further reduced, which is preferable. In order to secure a certain amount of the abrasive flowing in the groove, it is more preferable that the groove width is 0.4 mm or more.
- the polishing cloth of the present invention is preferably a nonwoven cloth type or a suede type polishing cloth.
- Nonwoven cloth type or suede type polishing cloths are generally widely used. If the grooves are formed, the surface flatness will be higher! In addition, it is possible to easily provide a polishing cloth capable of manufacturing a substrate and an SOI wafer having a uniform thickness.
- the present invention provides a method for manufacturing a substrate, characterized by polishing the substrate using a polishing cloth having the above-described grooves.
- a required amount of abrasive is supplied between the substrate and the polishing cloth, and uniform polishing can be performed. It is possible to manufacture SOI wafers with high flatness and high uniformity of substrate and film thickness.
- the substrate can be polished with a polishing cloth that does not peel, twist, or chip, the substrate can be manufactured without causing polishing scratches on the surface.
- a silicon single crystal wafer or a SOI wafer is used as the substrate to be polished. It's preferable!
- silicon single crystal wafers require high surface flatness, and SOI wafers need to maintain uniform thickness of the silicon active layer.
- polishing scratches do not occur on the surface.
- the present invention is also a method for forming a groove on a surface of a polishing cloth used for polishing a substrate, wherein the groove is formed so as to have a radial pattern.
- the average value of the total volume of all the groove portions existing immediately below the substrate (the average value of the total sum of the groove volumes immediately below the substrate) 1 (the average value of the total sum of the groove volumes immediately below the substrate)
- the value obtained by averaging the total volume of all the grooves existing directly below the substrate among the grooves radially formed on the surface of the polishing cloth for polishing the substrate is determined by the area of the substrate.
- the thickness is set so as to satisfy the relation of 0.06 or more, the required amount of polishing agent is provided through a groove between the substrate and the polishing cloth during polishing, regardless of the absolute value of the substrate area. Is supplied, so that a substrate with high surface flatness or SOI wafer with high film thickness uniformity can be manufactured, and if it is formed so as to satisfy the relationship of 0.23 or less, polishing flaws may be generated. In addition, the polishing cloth can be removed.
- the present invention is a method for forming a groove on a surface of a polishing cloth used for polishing a substrate, wherein the groove is formed so as to have a radial pattern.
- the groove depth of the groove portion located on the center side is smaller than the groove depth of the groove portion immediately below the substrate, and the intersection of the groove and the groove at the center of the radial pattern of the groove is directly below the substrate. Do not exist in!
- Provided is a method for processing a polishing cloth characterized by being formed as described above.
- the polishing process is performed.
- the required amount of abrasive is supplied directly below the substrate.
- Such groove processing is particularly suitable for processing a single-wafer CMP polishing cloth having no cutout at the center of the polishing cloth.
- the polishing pad will peel off, twist, or set off near the center of the polishing platen.
- the depth of the groove located on the center side of the substrate to be polished is made shallower than the depth of the groove immediately below the substrate. You can also use a polishing cloth on the surface.
- the groove is formed so that the angle between the groove and the groove exceeds the numerical value obtained by the following equation (1).
- the overlapping portion of the grooves is located immediately below the substrate to be polished. If there is an overlapping portion of the grooves directly below the substrate, the triangular end of the polishing pad sandwiched between the radial grooves also exists directly below the substrate. If this triangular end is peeled off or twisted from the surface plate during the groove processing, and burrs are generated or they are generated immediately, polishing processing will cause polishing flaws on the substrate surface. Therefore, if the groove is formed so as to exceed the above angle, the overlapping portion of the groove is not located immediately below the substrate, so that the polishing cloth can be caloried without such a polishing flaw.
- the groove is formed so that the groove width is 2.Omm or less.
- the groove width is less than 2.Omm.
- the likelihood that irregularities on the formed polishing cloth will be transferred to the surface of the substrate to be polished and adversely affect the surface will be reduced.
- the groove width is 1.5 mm or less, the possibility of adverse effects is further reduced, which is preferable.
- the polishing cloth is preferably of a nonwoven fabric type or a suede type.
- Nonwoven fabric type or suede type polishing cloths are generally widely used, and by forming such grooves in such polishing cloths, a substrate having a higher surface flatness and a uniform film thickness can be obtained. Polishing cloth that can manufacture SOI wafers can be easily prepared.
- the present invention provides a method for manufacturing a substrate, characterized by polishing a substrate using a polishing cloth processed by the above method.
- a required amount of abrasive is supplied between the substrate and the polishing cloth, and uniform polishing can be performed. It is possible to manufacture SOI wafers with high surface flatness, high substrate and film thickness uniformity. In addition, since the substrate can be polished with a polishing cloth that does not peel, twist, or chip, the substrate can be manufactured without causing polishing scratches on the surface.
- silicon single crystal wafers require high surface flatness, and SOI wafers need to maintain uniform thickness of the silicon active layer.
- polishing scratches do not occur on the surface.
- polishing cloth of the present invention a polishing pad capable of producing a substrate having a high surface flatness or a SOI wafer having a high uniformity of film thickness can be obtained.
- Abrasive cloth can be used. This is particularly effective in the case of a single-wafer CMP polishing cloth having no cutout at the center of the polishing cloth.
- polishing cloth processing method of the present invention it is possible to process a polishing cloth capable of producing a substrate having a high surface flatness or an SOI wafer having a high film thickness uniformity. Polishing cloth with no scratches on the plate surface can be removed.
- the method of manufacturing a substrate of the present invention it is possible to manufacture a substrate having a higher surface flatness and an SOI wafer having a uniform film thickness.
- the substrate can be polished with a polishing cloth that does not cause peeling, kinking, or burrs, the substrate can be manufactured without causing polishing scratches on the surface.
- FIG. 1 is a schematic diagram illustrating a method for processing a polishing pad according to the present invention.
- FIG. 2 is a schematic view of a polishing cloth according to the present invention.
- FIG. 3 is a schematic view of polishing a semiconductor substrate with a conventional polishing cloth.
- FIG. 4 is a cross-sectional perspective view of a groove formed on the polishing cloth surface.
- FIG. 5 is a schematic view showing a groove portion immediately below a wafer.
- FIG. 6 is a cross-sectional perspective view showing a groove formed on the surface of the polishing pad and the volume of the groove.
- FIG. 7 is a graph showing the change in the sum of the groove volume portions immediately below the wafer due to the rotation of the polishing table (when the wafer has a diameter of 300 mm).
- FIG. 8 is a cross-sectional perspective view showing grooves formed on the polishing cloth surface and the groove areas.
- FIG. 9 is a graph showing the change in the sum of the groove area portions directly below the wafer due to the rotation of the polishing platen (when the wafer has a diameter of 300 mm).
- FIG. 10 Schematic diagrams showing the positions of intersections between grooves, where (a) shows the case where the angle between the grooves is larger than Equation 1, and (b) shows the angle between the grooves. It is the case of 1 or less.
- the radial grooves are formed on the polishing pad at a constant angle between the grooves. cm
- a silicon single crystal wafer or SOI wafer is polished by attaching such a radial grooved polishing cloth to a surface plate of a single-side polishing apparatus such as a P apparatus, the wafer is at a fixed distance from the center of the polishing cloth. Since it is held by the pressing ring of a certain polishing head, the distance between the center of the wafer and the center of the polishing cloth becomes constant. Therefore, if the diameter of the wafer is different, the number of grooves present immediately below the wafer will also be different, and the amount of abrasive supplied between the wafer and the polishing cloth via the groove will differ. Therefore, even if the polishing is performed with the same polishing apparatus, the same polishing cloth, and the same polishing conditions, if the diameter of the wafer to be polished is different, the final flatness of the wafer surface may be different.
- Japanese Patent Application Laid-Open No. 2002-100592 discloses a polishing cloth with radial grooves manufactured by sticking a fan-shaped polishing cloth piece to the surface of a surface plate.
- this method does not require grooves to be formed in the polishing cloth, so it does not peel, twist, or generate burrs, but the surface height of each polishing cloth must be uniform and it must have a certain width.
- precision is also required when attaching to the surface plate.
- the surface of the silicon single crystal wafer is polished with high flatness, or the SOI wafer is polished while maintaining high film thickness uniformity. It is difficult to do.
- the present inventors conducted experiments by forming radial grooves in a polishing cloth and polishing silicon single crystal wafers of various diameters and SOI wafers, and conducted experiments on the volume of the radial grooves and the silicon single crystal wafer.
- the present inventors have found that there is a special relationship between the area of the SOI wafer and the area of the wafer and completed the present invention.
- the present inventors have found a method for forming a groove without peeling off, and have completed the present invention.
- embodiments of the present invention will be specifically described with reference to the drawings, but the present invention is not limited thereto.
- FIG. 1 is a schematic diagram for explaining a polishing cloth processing method according to the present invention.
- a groove formed in a polishing cloth has a radial pattern corresponding to a predetermined silicon single crystal wafer to be polished and an SOI wafer (hereinafter sometimes simply referred to as wafer).
- the value obtained by dividing the average value of the total volume of all the groove portions existing directly below the wafer (the average value of the sum of the groove volumes immediately below the wafer) by the wafer area is 0.06 or more and 0.23 or less
- the groove width is 2. Omm or less, and the overlap between the grooves does not enter directly below the wafer due to the wafer radius, the polishing cloth center force, the distance to the wafer center, and the groove width.
- the angle between such grooves is calculated. In this way, a groove to be formed having a groove volume satisfying the above-described relationship is determined when the angle between the grooves is equal to or greater than the angle obtained above.
- the groove volume is the volume 4 of the groove 6 formed in the polishing pad 5, as shown in FIG.
- the total sum of the groove volumes immediately below the wafer is obtained by adding all the groove parts (see Fig. 5) directly below the wafer in the groove volume 4.
- the sum of the groove volumes immediately below the wafer changes with a certain period according to the rotation angle (movement angle) of the groove caused by the rotation of the polishing platen to which the polishing cloth is attached.
- the average value of the sum of the groove volumes during this one cycle is the average value of the sum of the groove volumes immediately below the wafer.
- the present inventor investigated the relationship between this and the in-plane flatness of the silicon single crystal wafer surface and the uniformity of the film thickness of the SOI wafer. Regardless of the value, it was found that the in-plane flatness of the surface of the silicon single crystal wafer and the uniformity of the film thickness of the SOI wafer could be kept well without causing polishing scratches.
- the polishing cloth is compressed by a load applied to the silicon single crystal wafer or the SOI wafer during polishing. Therefore, the sum of the groove volumes directly below the wafer may also change. ⁇
- the sum of the groove area (the area indicated by the reference numeral 16 in FIG. 8) of the groove part (the area indicated by the reference numeral 8 in FIG. 5) located immediately below the wafer is, as shown in FIG. Change.
- the groove part existing in the area (area 8 in FIG. 5) is subtracted, and the force applied to the area by the load applied to the wafer is subtracted as described above.
- the surface flatness of the silicon single crystal wafer is deteriorated, and the film thickness uniformity of the SOI wafer cannot be maintained.
- the polishing cloth is peeled or twisted, so that the groove is formed at the portion where the groove is formed. Burrs can scratch the surface of the silicon single crystal wafer or SOI wafer during polishing. Therefore, it is preferable that the angle between the grooves is larger than the angle given by Equation 1 above.
- the groove width is a force arbitrarily determined by the center force of the polishing pad, the distance to the center of the wafer, and the radius of the wafer to be polished.
- the groove width increases, irregularities on the polishing cloth formed by the polishing cloth surface and the grooves 1S It becomes easy to be transferred to the surface of the wafer to be polished, and the possibility of adversely affecting the surface flatness of the silicon single crystal wafer and the uniformity of the film thickness of the SOI wafer increases.
- the groove width is 2.0 mm or less, the force on the flat polishing cloth surface that contacts the wafer is much larger than the groove that contacts the wafer. The potential for adverse effects on the surface is reduced.
- the groove width is 1.5 mm or less, the possibility of adversely affecting the surface of the wafer to be polished is further reduced, which is more preferable. Further, in order to secure a certain amount of the abrasive flowing in the groove, it is more preferable that the groove width is 0.4 mm or more.
- the material of the polishing cloth of the present invention may be any material that is usually used for polishing a substrate such as silicon.
- a foamable polyurethane can be used regardless of the foam density and foam size.
- it may be a suede type polyurethane or polyester nonwoven fabric.
- a non-woven type polishing cloth can be suitably used for polishing silicon single crystal wafers requiring high surface flatness.
- a suede type polishing cloth can be suitably used for polishing an SOI wafer where high film thickness uniformity is required.
- the polishing cloth is fixed to a conventional groove forming apparatus to form the groove. Then, a groove is formed in the polishing cloth using a groove forming jig.
- An example of a specific processing procedure will be described with reference to FIG. C indicates the center of the polishing cloth, and A indicates the surface of the polishing cloth before the grooves are formed.
- the tip of the jig is brought into contact with the polishing cloth surface A, and the height is set as the origin.
- the tip of the groove forming jig is lowered to a height B where a desired groove depth is obtained.
- the groove is formed by cutting the groove forming jig from the outer periphery of the polishing cloth toward the center of the polishing cloth.
- the B surface formed at this time corresponds to the bottom of the groove, and is initially formed at a constant depth.
- This groove processing at a constant depth is performed from the outer periphery of the polishing cloth to at least a groove portion that enters immediately below the wafer at the time of wafer polishing, that is, to the position of the wafer end face on the center side of the polishing cloth. Shrink the depth of the groove to make it easier.
- a groove having a constant depth is formed from the outer peripheral edge of the polishing cloth to a groove position that enters directly below the wafer, and processing is continued while reducing the groove depth as it is.
- the groove formation processing continued while reducing the groove depth toward the center of the polishing pad, and the groove depth became D
- the upward feed of the groove forming jig is stopped, and then a groove of a certain depth is formed up to the center of the polishing cloth.
- the D surface indicates the bottom surface of a shallow groove formed on the center side of the polishing pad.
- the groove shape may be a misaligned shape as long as the required amount of the abrasive can flow under the substrate being polished.
- a V-shaped groove having a V-shaped bottom or a U-shaped groove having a U-shaped bottom may be used.
- the groove depth at least about 0.5 to 2 mm is preferable for the groove part from the outer periphery of the polishing cloth to the end face of the substrate on the center side of the polishing cloth. Is preferably about 0.5 mm or less.
- such kafun may be processed by a machine.
- a rotating carbide reamer can be brought into contact with the polishing cloth from the outer peripheral side of the polishing cloth, and can be formed by moving the polishing head toward the center of the polishing cloth.
- the groove on the inner side of the wafer at the position of the wafer end face on the center of the polishing pad needs to be formed shallow similarly to the above.
- the groove width is approximately 0.1 mm or more, the force that can be removed can be obtained.
- the groove width is preferably 0.4 mm or more.
- Such a kagami is suitably used particularly in a polishing cloth used for a single-wafer type CMP apparatus which does not cut out the center of the polishing cloth.
- the polishing cloth near the center of rotation will be cut by the groove forming jig many times because the grooves overlap. Therefore, the width of the polishing cloth existing between the grooves becomes extremely narrow.
- the polishing cloth itself may be twisted and the flatness may not be maintained.
- burrs may be generated in the grooves. In this case, it is preferable to form the groove with a shallow groove depth because the kink of the polishing pad is reduced and the occurrence of burrs is reduced.
- the grooves formed in the polishing pad be formed without interruption from the peripheral edge of the polishing pad to the center of the polishing pad. If the groove formed from the center of the polishing cloth is formed only up to the polishing cloth position where it enters directly below the wafer, a groove is formed at the end of the groove just below the wafer. Burrs may be generated, and the generated burrs may cause scratches on the polished surface of the wafer.
- the angle between the grooves may exceed 5 °. If the angle between the grooves exceeds 5 °, the polishing cloth existing between the grooves will not peel off or generate burrs due to the groove processing.
- the groove formation can be performed while keeping the relationship constant between the groove volume and the wafer area.
- the processing may be performed with a predetermined groove depth from the outer periphery of the polishing cloth to the position of the wafer end face on the center side of the polishing cloth, and the processing may be performed with a smaller groove depth on the center side.
- the polishing pad is rotated by the determined groove angle, and a second groove is formed in the same manner.
- a second groove is formed in the same manner.
- grooves having a desired shape at a desired groove angle are radially formed on the polishing pad. This groove is formed such that the intersection of the groove and the groove at the center of the radial pattern of the groove does not exist directly below the wafer.
- FIG. 2 shows the polishing cloth thus prepared.
- This polishing cloth 20 is preferably a non-woven cloth type or a suede type, in which grooves 21 are formed in a radial pattern, and an average value (mm 3 )
- the area (mm 2 )) is not less than 0.06 and not more than 0.23, and the groove 21 has a predetermined groove depth from the outer periphery of the polishing cloth to the position of the wafer end face on the center side of the polishing cloth.
- the groove depth is shallower on the center side.
- the overlapping intersection of the grooves at the center of the radial pattern of the grooves 21 does not exist directly below the wafer.
- the groove width of the groove 21 is preferably not more than 2. Omm, and more preferably not less than 0.4 mm.
- the angle between the grooves is
- the polishing cloth of the present invention or the polishing cloth processed by the processing method of the present invention is attached to a surface plate of a polishing apparatus, and the wafer is polished, so that V has high surface flatness and is free from scratches. ⁇ Eye can be manufactured.
- the wafer to be polished is a silicon single crystal wafer, a wafer having a high surface flatness can be manufactured. If an SOI wafer is used, a wafer having a highly uniform silicon active layer can be manufactured.
- the relationship of (the average value of the sum of the groove volumes immediately below the wafer Z ⁇ the area of the wafer) and the relationship of the groove depth in the present invention are sufficiently effective even if they are individually satisfied. However, if they are satisfied at the same time, it becomes possible to polish a substrate with even better flatness.
- the distance between the center of the polishing cloth and the center of the wafer is 200 mm
- the wafer to be polished is an SOI wafer with a diameter of 300 mm
- the groove shape is a V-shaped groove
- the outer edge of the polishing cloth to the position of the wafer end face on the center of the polishing cloth.
- the groove depth of 1.5 mm, the position of the wafer end face on the center of the polishing cloth, the groove depth to the center of the polishing cloth 0.5 mm, the groove width 2.Omm, and the groove A groove was formed in a polyurethane suede-type polishing cloth by the method of the present invention with an angle of 4 ° and a number of grooves of 90.
- the value obtained by dividing the average value of the sum of the groove volumes directly below the SOI and the wafer by the SOI area was 0.117.
- the SOI film thickness range which is an index indicating the film thickness uniformity of the silicon active layer, was 4.21 nm.
- the SOI film thickness range is the difference between the maximum film thickness and the minimum film thickness of the silicon active layer. Also, no scratches or the like were generated on the polished SOI wafer surface.
- the grooves were formed in a polyurethane polishing cloth with a U-shaped groove, a groove width of 2. Omm, and 30 grooves. Since the angle between the grooves is large in this polishing cloth, the groove depth from the outer peripheral end face position of the polishing cloth to the center of the polishing cloth was kept constant at 1.5 mm.
- the wafer to be polished was an SOI wafer having a diameter of 200 mm
- the value obtained by dividing the average value of the sum of the groove volumes immediately below the wafer by the SOI wafer area was 0.065.
- the SOI film thickness range was 4.87 nm. There was no scratch on the polished SOI wafer surface.
- polish the center of the polishing cloth and the center of the abrasion 200mm Polish the center of the polishing cloth and the center of the abrasion 200mm, the angle between the grooves is 15 °, the groove shape is U-shaped groove, the groove width is 2.Omm, the number of grooves is 24, and the grooves are polyurethane polishing cloth. Formed. Since the angle between the grooves is large in this polishing cloth, the groove depth from the outer peripheral end face position of the polishing cloth to the center of the polishing cloth was kept constant at 1.5 mm.
- the wafer to be polished was an SOI wafer having a diameter of 300 mm
- the value obtained by dividing the average value of the sum of the groove volumes immediately below the wafer by the SOI wafer area was 0.041.
- the SOI film thickness range was 6.000 nm. There was no scratch on the polished SOI wafer surface.
- the distance between the center of the polishing cloth and the center of the wafer is 200 mm
- the wafer to be polished is an SOI wafer with a diameter of 300 mm
- the groove shape is a V-shaped groove
- the outer edge of the polishing cloth to the position of the wafer end face on the center of the polishing cloth.
- the value obtained by dividing the average value of the sum of the groove volumes immediately below the SOI and the wafer by the SOI area was 0.234.
- the present invention is not limited to the above embodiment.
- the above embodiment is merely an example, and is substantially the same as the technical idea described in the claims of the present invention. Anything having the same configuration and the same effect is included in the technical scope of the present invention.
- the force illustrated for SOI wafers as examples and comparative examples may be silicon single crystal wafers, and the diameters of wafers may be more than those illustrated for 200 mm and 300 mm diameters. Or below.
- the polishing cloth used is capable of preventing scratches on the wafer surface
- at least the surface is made of urethane foam, or non-foamed epoxy resin, acrylic resin, polyester resin, and chloride chloride.
- a polishing cloth made of resin or polycarbonate resin may be used.
- the present invention can be used for a polishing cloth used for polishing a substrate such as a silicon single crystal wafer, a groove forming step of such a polishing cloth, and a substrate production.
Abstract
Description
Claims
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/573,497 US7591713B2 (en) | 2003-09-26 | 2004-09-17 | Polishing pad, method for processing polishing pad, and method for producing substrate using it |
KR1020067005964A KR101128932B1 (ko) | 2003-09-26 | 2004-09-17 | 연마포와 연마포의 가공방법 및 그것을 이용한 기판의제조방법 |
EP04773285A EP1666202A4 (en) | 2003-09-26 | 2004-09-17 | POLISHING TAG, POLISHING TREATMENT PROCESS AND THIS USING SUBSTRATE MANUFACTURING METHOD |
CN2004800266353A CN1852786B (zh) | 2003-09-26 | 2004-09-17 | 研磨布及其加工方法及使用该研磨布的基板的制造方法 |
JP2005514176A JP4449905B2 (ja) | 2003-09-26 | 2004-09-17 | 研磨布及び研磨布の加工方法並びにそれを用いた基板の製造方法 |
US12/003,839 US7677957B2 (en) | 2003-09-26 | 2008-01-02 | Polishing apparatus, method for providing and mounting a polishing pad in a polishing apparatus, and method for producing a substrate using the polishing apparatus |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003335939 | 2003-09-26 | ||
JP2003-335939 | 2003-09-26 |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10573497 A-371-Of-International | 2004-09-17 | ||
US12/003,839 Division US7677957B2 (en) | 2003-09-26 | 2008-01-02 | Polishing apparatus, method for providing and mounting a polishing pad in a polishing apparatus, and method for producing a substrate using the polishing apparatus |
Publications (1)
Publication Number | Publication Date |
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WO2005030439A1 true WO2005030439A1 (ja) | 2005-04-07 |
Family
ID=34386080
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2004/013661 WO2005030439A1 (ja) | 2003-09-26 | 2004-09-17 | 研磨布及び研磨布の加工方法並びにそれを用いた基板の製造方法 |
Country Status (7)
Country | Link |
---|---|
US (2) | US7591713B2 (ja) |
EP (1) | EP1666202A4 (ja) |
JP (1) | JP4449905B2 (ja) |
KR (1) | KR101128932B1 (ja) |
CN (2) | CN1852786B (ja) |
TW (1) | TW200512062A (ja) |
WO (1) | WO2005030439A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006289605A (ja) * | 2005-04-12 | 2006-10-26 | Rohm & Haas Electronic Materials Cmp Holdings Inc | 半径方向の偏った研磨パッド |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9180570B2 (en) | 2008-03-14 | 2015-11-10 | Nexplanar Corporation | Grooved CMP pad |
TWI599447B (zh) | 2013-10-18 | 2017-09-21 | 卡博特微電子公司 | 具有偏移同心溝槽圖樣之邊緣排除區的cmp拋光墊 |
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- 2004-09-17 KR KR1020067005964A patent/KR101128932B1/ko active IP Right Grant
- 2004-09-17 WO PCT/JP2004/013661 patent/WO2005030439A1/ja active Application Filing
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Also Published As
Publication number | Publication date |
---|---|
KR20060090237A (ko) | 2006-08-10 |
TWI334373B (ja) | 2010-12-11 |
US7677957B2 (en) | 2010-03-16 |
CN1852786B (zh) | 2011-01-12 |
US7591713B2 (en) | 2009-09-22 |
JP4449905B2 (ja) | 2010-04-14 |
JPWO2005030439A1 (ja) | 2006-12-07 |
CN1852786A (zh) | 2006-10-25 |
EP1666202A1 (en) | 2006-06-07 |
US20070032175A1 (en) | 2007-02-08 |
US20080139094A1 (en) | 2008-06-12 |
CN101456165B (zh) | 2011-06-15 |
KR101128932B1 (ko) | 2012-03-27 |
EP1666202A4 (en) | 2008-09-03 |
CN101456165A (zh) | 2009-06-17 |
TW200512062A (en) | 2005-04-01 |
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