WO2005010983A3 - Speicherzelle und verfahren zur herstellung einer speichereinrichtung - Google Patents
Speicherzelle und verfahren zur herstellung einer speichereinrichtung Download PDFInfo
- Publication number
- WO2005010983A3 WO2005010983A3 PCT/DE2004/001588 DE2004001588W WO2005010983A3 WO 2005010983 A3 WO2005010983 A3 WO 2005010983A3 DE 2004001588 W DE2004001588 W DE 2004001588W WO 2005010983 A3 WO2005010983 A3 WO 2005010983A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- memory
- producing
- memory cell
- storage layer
- organic storage
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 238000000034 method Methods 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0009—RRAM elements whose operation depends upon chemical change
- G11C13/0014—RRAM elements whose operation depends upon chemical change comprising cells based on organic memory material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66833—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a charge trapping gate insulator, e.g. MNOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Theoretical Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Mathematical Physics (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Engineering & Computer Science (AREA)
- Semiconductor Memories (AREA)
Abstract
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/565,578 US20070166924A1 (en) | 2003-07-23 | 2004-07-21 | Memory cell and method for fabricating a memory device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10333557.9 | 2003-07-23 | ||
DE10333557A DE10333557B8 (de) | 2003-07-23 | 2003-07-23 | Verfahren zur Herstellung einer Speichereinrichtung, Speicherzelle, Speichereinrichtung und Verfahren zum Betrieb der Speichereinrichtung |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2005010983A2 WO2005010983A2 (de) | 2005-02-03 |
WO2005010983A3 true WO2005010983A3 (de) | 2005-03-24 |
Family
ID=34088765
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2004/001588 WO2005010983A2 (de) | 2003-07-23 | 2004-07-21 | Speicherzelle und verfahren zur herstellung einer speichereinrichtung |
Country Status (5)
Country | Link |
---|---|
US (1) | US20070166924A1 (de) |
KR (1) | KR100767881B1 (de) |
CN (1) | CN100446183C (de) |
DE (1) | DE10333557B8 (de) |
WO (1) | WO2005010983A2 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1717862A3 (de) * | 2005-04-28 | 2012-10-10 | Semiconductor Energy Laboratory Co., Ltd. | Speicherelement und Halbleiterbauelement |
US8890234B2 (en) * | 2012-09-05 | 2014-11-18 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device |
US10163917B2 (en) * | 2016-11-01 | 2018-12-25 | Micron Technology, Inc. | Cell disturb prevention using a leaker device to reduce excess charge from an electronic device |
US10748931B2 (en) * | 2018-05-08 | 2020-08-18 | Micron Technology, Inc. | Integrated assemblies having ferroelectric transistors with body regions coupled to carrier reservoirs |
CN110526923A (zh) * | 2019-08-09 | 2019-12-03 | 南京邮电大学 | 一种侧链修饰的卟啉分子及其应用 |
US20230223066A1 (en) * | 2022-01-07 | 2023-07-13 | Ferroelectric Memory Gmbh | Memory cell and methods thereof |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5981335A (en) * | 1997-11-20 | 1999-11-09 | Vanguard International Semiconductor Corporation | Method of making stacked gate memory cell structure |
US6051467A (en) * | 1998-04-02 | 2000-04-18 | Chartered Semiconductor Manufacturing, Ltd. | Method to fabricate a large planar area ONO interpoly dielectric in flash device |
US20020015322A1 (en) * | 1999-02-26 | 2002-02-07 | Micron Technology, Inc. | Applications for non-volatile memory cells |
US20030111670A1 (en) * | 2001-12-14 | 2003-06-19 | The Regents Of The University Of California | Method and system for molecular charge storage field effect transistor |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05327062A (ja) * | 1992-05-22 | 1993-12-10 | Sharp Corp | 強誘電体記憶素子 |
US6559469B1 (en) * | 1992-10-23 | 2003-05-06 | Symetrix Corporation | Ferroelectric and high dielectric constant transistors |
JP3281839B2 (ja) * | 1997-06-16 | 2002-05-13 | 三洋電機株式会社 | 誘電体メモリおよびその製造方法 |
US6140672A (en) * | 1999-03-05 | 2000-10-31 | Symetrix Corporation | Ferroelectric field effect transistor having a gate electrode being electrically connected to the bottom electrode of a ferroelectric capacitor |
JP2002016233A (ja) * | 2000-06-27 | 2002-01-18 | Matsushita Electric Ind Co Ltd | 半導体記憶装置及びその駆動方法 |
EP1207558A1 (de) * | 2000-11-17 | 2002-05-22 | STMicroelectronics S.r.l. | Kontaktstruktur für ein ferroelektrisches Speicherbauelement |
US6773929B2 (en) * | 2001-09-14 | 2004-08-10 | Hynix Semiconductor Inc. | Ferroelectric memory device and method for manufacturing the same |
-
2003
- 2003-07-23 DE DE10333557A patent/DE10333557B8/de not_active Expired - Fee Related
-
2004
- 2004-07-21 CN CNB2004800275757A patent/CN100446183C/zh not_active Expired - Fee Related
- 2004-07-21 US US10/565,578 patent/US20070166924A1/en not_active Abandoned
- 2004-07-21 KR KR1020067001512A patent/KR100767881B1/ko not_active IP Right Cessation
- 2004-07-21 WO PCT/DE2004/001588 patent/WO2005010983A2/de active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5981335A (en) * | 1997-11-20 | 1999-11-09 | Vanguard International Semiconductor Corporation | Method of making stacked gate memory cell structure |
US6051467A (en) * | 1998-04-02 | 2000-04-18 | Chartered Semiconductor Manufacturing, Ltd. | Method to fabricate a large planar area ONO interpoly dielectric in flash device |
US20020015322A1 (en) * | 1999-02-26 | 2002-02-07 | Micron Technology, Inc. | Applications for non-volatile memory cells |
US20030111670A1 (en) * | 2001-12-14 | 2003-06-19 | The Regents Of The University Of California | Method and system for molecular charge storage field effect transistor |
Non-Patent Citations (1)
Title |
---|
JUNG DAL CHOI ET AL: "A triple polysilicon stacked flash memory cell with wordline self-boosting programming", ELECTRON DEVICES MEETING, 1997. TECHNICAL DIGEST., INTERNATIONAL WASHINGTON, DC, USA 7-10 DEC. 1997, NEW YORK, NY, USA,IEEE, US, 7 December 1997 (1997-12-07), pages 283 - 286, XP010265507, ISBN: 0-7803-4100-7 * |
Also Published As
Publication number | Publication date |
---|---|
US20070166924A1 (en) | 2007-07-19 |
WO2005010983A2 (de) | 2005-02-03 |
KR100767881B1 (ko) | 2007-10-17 |
CN1856865A (zh) | 2006-11-01 |
CN100446183C (zh) | 2008-12-24 |
DE10333557A1 (de) | 2005-02-24 |
DE10333557B8 (de) | 2008-05-29 |
DE10333557B4 (de) | 2008-02-14 |
KR20060052859A (ko) | 2006-05-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
AU2003252675A1 (en) | Nonvolatile semiconductor storage device and manufacturing method | |
TWI319621B (en) | One transistor dram cell structure and method for forming | |
AU2003263748A1 (en) | Nrom memory cell, memory array, related devices and methods | |
WO2005050712A3 (en) | High-temperature memory systems | |
EP1533702A4 (de) | Halbleiterspeicherbaustein und verfahren zum schreiben von daten in flash-speicher | |
EP1657723A4 (de) | Halbleiterspeicher und verfahren zum betrieb eines halbleiterspeichers | |
EP1428831A4 (de) | Verfahren zur aufbewahrung von wasserstoff, wasserstoffeinschlussverbindung und verfahren zu deren herstellung | |
AU2003229476A1 (en) | Doped organic semiconductor material and method for production thereof | |
EP1732139A4 (de) | Träger fàr dünnfilmsolarzelle, verfahren zu deren herstellung und ihn einsetzende dünnfilmsolarzelle | |
WO2010047924A3 (en) | Method of making a split gate memory cell | |
AU2003241844A1 (en) | Nonvolatile memory and its manufacturing method | |
TW200633236A (en) | Non-volatile electrically alterable memory cell for storing multiple data and manufacturing thereof | |
AU2003293923A1 (en) | Fin field effect transistor memory cell, fin field effect transistor memory cell arrangement, and method for the production of a fin field effect transistor memory cell | |
EP1282189A4 (de) | Halbleiterschicht, diese verwendende solarzelle, herstellungsverfahren und anwendung dafür | |
EP1786030A4 (de) | Siliziumoxidfilm-erzeugungsverfahren, verfahren zur herstellung von halbleiterbauelementen und computerspeichermedium | |
WO2002074039A3 (de) | Elektrisch aktive filme | |
EP1385213A4 (de) | Halbleiterspeicherbaustein und verfahren zu seiner herstellung | |
TW200505026A (en) | Method for manufacturing polysilicon film | |
AU2003294845A1 (en) | Semiconductor memory and fabrication method | |
WO2005010983A3 (de) | Speicherzelle und verfahren zur herstellung einer speichereinrichtung | |
AU2003279478A8 (en) | Non-volatile memory cell and method of fabrication | |
WO2007001942A3 (en) | Floating body memory cell system and method of manufacture | |
TW200717782A (en) | Split gate flash memory cell and fabrication method thereof | |
DE50213262D1 (de) | Nichtflüchtige zweitransistor-halbleiterspeicherzelle sowie zugehöriges herstellungsverfahren | |
WO2004025747A3 (de) | Organisches photovoltaisches bauelement und herstellungsverfahren dazu |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 200480027575.7 Country of ref document: CN |
|
AK | Designated states |
Kind code of ref document: A2 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A2 Designated state(s): GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 142/KOLNP/2006 Country of ref document: IN |
|
WWE | Wipo information: entry into national phase |
Ref document number: 1020067001512 Country of ref document: KR |
|
DPEN | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed from 20040101) | ||
WWP | Wipo information: published in national office |
Ref document number: 1020067001512 Country of ref document: KR |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2007166924 Country of ref document: US Ref document number: 10565578 Country of ref document: US |
|
122 | Ep: pct application non-entry in european phase | ||
WWP | Wipo information: published in national office |
Ref document number: 10565578 Country of ref document: US |