WO2005006003A1 - Lsi test socket for bga - Google Patents

Lsi test socket for bga Download PDF

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Publication number
WO2005006003A1
WO2005006003A1 PCT/JP2004/009832 JP2004009832W WO2005006003A1 WO 2005006003 A1 WO2005006003 A1 WO 2005006003A1 JP 2004009832 W JP2004009832 W JP 2004009832W WO 2005006003 A1 WO2005006003 A1 WO 2005006003A1
Authority
WO
WIPO (PCT)
Prior art keywords
hole
pogo pin
layer
bga
power supply
Prior art date
Application number
PCT/JP2004/009832
Other languages
French (fr)
Japanese (ja)
Inventor
Yasushi Kinoshita
Original Assignee
Nec Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corporation filed Critical Nec Corporation
Priority to JP2005511543A priority Critical patent/JP4775554B2/en
Priority to US10/553,189 priority patent/US7129728B2/en
Publication of WO2005006003A1 publication Critical patent/WO2005006003A1/en
Priority to US11/527,538 priority patent/US7477062B2/en

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • G01R1/0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0433Sockets for IC's or transistors
    • G01R1/0441Details
    • G01R1/0466Details concerning contact pieces or mechanical details, e.g. hinges or cams; Shielding
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • G01R1/0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0433Sockets for IC's or transistors
    • G01R1/0483Sockets for un-leaded IC's having matrix type contact fields, e.g. BGA or PGA devices; Sockets for unpackaged, naked chips
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/06711Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
    • G01R1/06716Elastic
    • G01R1/06722Spring-loaded

Definitions

  • the present invention relates to an LSI test socket used for testing an LSI incorporated in a BGA (Ball Grid Array) package, and more particularly to a BGA LSI test socket used for checking electrical parameters and the like. It relates to the structure of the socket.
  • BGA Bit Grid Array
  • LSI sockets Test sockets
  • pogo pin type pogo pin type
  • sheet type pogo pin type
  • Pogo pins are also referred to as spring pins or spring probe pins. Have been.
  • a pogo pin type LSI socket using this pogo pin is provided with a coil-shaped spring structure together with a pin held by a resin housing, and by pressing up and down on the pin, an electrical connection is realized. You.
  • FIGS. 2A and 2B and FIGS. 3A and 3B are cross-sectional views showing the structure of a conventional BGA LSI socket using pogo pins.
  • this LSI socket is configured by combining a pogo pin 001 and a pogo pin support housing 005. That is, the structure of the LSI socket is such that the pogo pin 001 is inserted into the housing hole 010 from above or below the pogo pin support housing 005, which is a non-conductive material such as resin.
  • FIG. 2A shows a case where the pogo pin 001 is inserted into the housing hole 010 from below the pogo pin support housing 005 and fixed, and the stopper 006 is installed above the pogo pin support housing 005.
  • FIG. 2B shows a case in which it is inserted and fixed from above, and a stopper 006 is installed below the pogo pin supporting housing 005.
  • FIG. 3A shows a case where the LSI socket having the structure shown in FIG. 2A is set on the test board 009
  • FIG. 7B shows a case where the LSI socket having the structure shown in FIG. 2B is set on the test board 009.
  • the pogo pins 001 arranged corresponding to the positions of the solder balls 007 of the LSI enclosed in the BGA package are used to mechanically connect the wiring pad 008 on the test board 009 on which the LSI socket is mounted.
  • the electrical connection is realized by pressing it from above.
  • this type of LSI socket has advantages such as low cost due to its simple structure, high mechanical strength, and the ability to be used repeatedly.
  • sheet-type LSI sockets use a conductive sheet, and there are two types of sheet, a metal wire-carrying type and a conductive rubber type.
  • the sheet type has the advantage of being superior in high frequency characteristics because the pin length can be made shorter than the above-mentioned pogo pin type.
  • the sheet which generates a large amount of dust due to scraping of the metal oxide is expensive and has a high running cost, and furthermore, there is a problem that the metal oxide adheres to the contact surface and the contact resistance increases.
  • the reason is that the number of electrodes for LSI input / output signals, power supply and GND is increasing compared to the conventional one due to the improvement in integration, and the space between electrodes in the BGA package is narrowed due to the downsizing of the BGA package and the electrodes are dense. Gathering, and so on. Even if the test frequency is not so high, for example, in the case of an LSI having 512 parallel input / output lines, there is a problem that a very large instantaneous power supply current flows during simultaneous operation of IO.
  • a plurality of electrodes on one side of a conductive sheet are connected by a conductive layer, and this conductive layer is brought into close contact with the sheet.
  • a conductive sheet is used as a capacitor by connecting a plurality of electrodes on the other side with a conductive layer and making this conductive layer adhere to a sheet to form a GND layer (for example, see Patent Document 1). .
  • a package-sized capacitor can be placed directly under the BGA package incorporating the LSI, and the effect of noise generated on the power supply and GND during high-frequency operation of the LSI can be reduced.
  • Patent Document 1 Japanese Patent Application Laid-Open No. 2000-97991 (Page 3, FIG. 1-3)
  • an object of the present invention is to solve a problem that occurs when testing an LSI encapsulated in a BGA package having an extremely large number of input / output signals, power supplies, and GND pins at a high frequency. It has a built-in decoupling capacitor that facilitates socket pin replacement, is low cost, and has a highly stable pogo pin structure, but also reduces power supply and GND potential fluctuations near the BGA package during testing. Pogo Pin Type LSI Soke Is to provide
  • a first aspect of the gist of the present invention is that the first power supply plate coupled to the inner surface of the first through-hole and the second power supply plate coupled to the inner surface of the second through-hole are connected to a separator.
  • a printed circuit board having at least one or more decoupling capacitors built therein via a printed circuit board, and the printed circuit board superimposed and integrated to form a first substrate at a position corresponding to the first and second through holes.
  • a pogo-pin supporting housing portion in which at least one set of second housing holes is opened; the first and second through holes formed in the printed circuit board; and the first and second housing holes. At least one set of first and second pogo pins to be inserted into the through-holes that match the hole position of the BGA package.
  • the pogo pin support casing to provide a BGA for LSI test socket which is arranged in the end.
  • the power supply plate is a plate that spreads in a plane that supplies power instead of a signal.It is made of foil or other material such as metal that has the function of an electrode of a decoupling capacitor.
  • the potential to be applied includes not only the power supply voltage but also an intermediate potential, GND and a negative potential.
  • a power supply layer corresponding to the first and second power supply plates and one GND layer are formed, and decoupling is performed using the capacitance between the power supply layer and the GND layer. Even if a capacitor is formed.
  • a plating layer may be formed on the inner surface of the through hole into which the pogo pin for power supply and the pogo pin for GND other than the through hole into which the pogo pin for signal is inserted.
  • the pogo-pin supporting housing portion may be made of a non-conductive material, and the plating layer may not be formed on the inner surface of the housing hole.
  • the power supply layer is electrically connected to the plating layer on the inner surface of the through hole into which the pogo pin for power supply is inserted
  • the GND layer is electrically connected to the plating layer on the inner surface of the through hole into which the pogo pin for GND is inserted. It is connected, and it may be.
  • a second aspect of the gist of the present invention is a first power supply plug coupled to an inner surface of a first through hole.
  • a printed circuit board with a built-in decoupling capacitor in which a power supply plate and a second power supply plate coupled to the inner surface of the second through hole are laminated via a separator, and this printed circuit board are superposed and integrated.
  • a pogo pin support housing portion having first and second housing holes opened at positions corresponding to the first and second through holes, respectively, and the first and second housing holes formed in the print substrate; And a pogo pin inserted into a through-hole in which the hole positions of the first and second housing holes are matched with each other, and the pogo pin support is used when testing an LSI incorporated in a BGA package.
  • a BGA LSI test socket in which one end of a housing portion faces a BGA package and the other end has the printed board.
  • a power supply layer corresponding to the first and second power supply plates and one GND layer are formed, and decoupling is performed using the capacitance between the power supply layer and the GND layer.
  • the capacitor formed it may be.
  • the printed circuit board has a plating layer formed on the inner surface of all through holes into which the signal pogo pins, the power pogo pins, and the GND pogo pins are inserted.
  • the pogo-pin supporting housing portion may be made of a non-conductive material, and a plating layer may not be formed on the inner surface of the housing hole.
  • the power supply layer is electrically connected to a plating layer on the inner surface of the through hole into which the pogo pin for power supply is inserted
  • the GND layer is electrically connected to the plating layer on the inner surface of the through hole into which the pogo pin for GND is inserted.
  • the plating layer on the inner surface of the through hole into which the signal pogo pin is inserted may not be electrically connected to the power supply layer and the GND layer.
  • the pogo pins may be fixed to the through holes of the corresponding printed circuit boards by inserting the lower portions of the pogo pins and soldering via the plating layers.
  • FIG. 4 is an exploded longitudinal sectional view showing each component constituting the LSI socket for BGA of the present invention.
  • FIG. 5 is a longitudinal sectional view showing a BGA LSI socket according to the first embodiment of the present invention.
  • the LSI socket 101 of the present invention is composed of a printed circuit board 102, a pogo pin 103, and a pogo pin support casing 104.
  • the printed circuit board 102 has a plurality of through-holes 109 into which a first power supply pin 105 and a second power supply pin 106, a GND pin 107, and a pogo pin 103 serving as a signal pin 108 having different voltage values to be applied are respectively inserted.
  • the plating layer 116 is formed on the inner surface of all the through holes 109 except for the through hole 109 through which the signal pin 108 penetrates.
  • a first power supply layer 110, a second power supply layer 111, and a GND layer 112 are formed as a power supply plate, and each layer corresponds to an inner surface of a corresponding through hole 109 for each pogo pin. It is electrically connected to the plating layer 116.
  • a decoupling capacitor 113 is formed using the capacitance of a separator made of a dielectric or the like laminated between the power supply layers 110 and 111 and the GND layer 112.
  • the pogo pin supporting casing 104 is provided with a similar casing hole 114 at a position corresponding to the through hole 109 of the printed circuit board 102.
  • a printed circuit board 102 is superimposed on the upper surface side of the pogo pin supporting casing 104, and is pressed or mechanically joined by using an adhesive material as shown in FIG. Note that no plating layer is formed on the inner surface of the housing hole 114.
  • the pogo pins 103 are inserted into the upper surface on which the printed circuit board 102 is installed, and is fixed by a stopper 115 formed below the housing hole 114 of the pogo pin support housing 104.
  • the first and second power supply layers 110 and 111 formed in the printed circuit board 102 and the GND layer Electrical connection between the 112 and the pogo pin 103 is realized by mechanical contact between the conductive material of the pogo pin 103 and the plating layer 116 on the inner surface of the through hole 109 in consideration of the ease of replacement of the socket pin.
  • the present embodiment incorporates a decoupling capacitor closer to the LSI side enclosed in a BGA package, while easily replacing socket pins and supporting multiple power supplies of recent LSIs. Since the printed circuit board is arranged, good characteristics can be obtained without being affected by the inductance component of the LSI socket pin.
  • FIG. 6 is an exploded longitudinal sectional view showing each component constituting the BGA LSI socket according to the second embodiment.
  • FIG. 7 is a longitudinal sectional view showing a BGA LSI socket according to the second embodiment.
  • the LSI socket 201 of the present invention is composed of four parts: a lower part 203A of pogo pins, a printed circuit board 202, an upper part 203B of pogo pins, and a pogo pin support housing part 204. .
  • a first power supply pin 205 and a second power supply pin 206, a GND pin 207, and a pogo pin 203 (consisting of 203A and 203B) for a signal pin 208 having different applied voltage values are respectively provided.
  • a plurality of through holes 209 to be inserted are provided, and a plating layer 216 is formed on the inner surface of all the through holes 209.
  • a first power supply layer 210, a second power supply layer 211, and a GND layer 212 are formed in the printed circuit board 202, and each of the layers is a plating layer on the inner surface of the corresponding through hole 209 for a pogo pin. 216 is electrically connected.
  • a decoupling capacitor 213 is formed using the capacitance of a separator made of a dielectric or the like laminated between the power supply layers 210 and 211 and the GND layer 212. Note that two types of power pins are shown in FIGS. 6 and 7. There is no limit to the number of types of applied voltage. What? In addition, the pogo pin support housing portion 204 is provided with a similar housing hole 214 at a position corresponding to the through hole 209 of the printed circuit board 202.
  • the lower part 203 A of the pogo pin is inserted into the through hole 209 of the printed board 202, and is fixed by soldering through the plating layer 216.
  • the spring and the upper part 203B of the pogo pin are fitted into the lower part 203A of the pogo pin fixed to the printed circuit board 202, and the pogo pin support housing part 204 is placed so as to cover it from above.
  • the upper part 203B of the pogo pin is fixed by a stopper 215 provided above the housing hole 214.
  • the printed circuit board 202 is disposed below the pogo pin support housing 204 and fixed with screws or the like (not shown) in consideration of the exchangeability of the pogo pins. Integrated into the housing of 01.
  • a printed circuit board having a built-in decoupling capacitor is arranged in a direction away from the LSI side, so that the influence of the inductance component of the LSI socket pin occurs somewhat.
  • the ease of replacement of the socket pins is sacrificed, but the electrical connection between the lower conductive part of the pogo pins and the decoupling capacitor is improved, making the LSI socket suitable for applications where large currents flow.
  • the present invention is an LSI socket used for testing an LSI encapsulated in a BGA package at a high frequency.
  • the adoption of a pogo pin structure allows the contact pins to be replaced, and at a low cost. Because it can be manufactured with a high degree of availability.
  • the present invention can be applied to any LSI socket used for testing an LSI enclosed in a BGA package at a high frequency, and can be applied to any LSI socket. There is no limitation at all.
  • FIG. 1 is a longitudinal sectional view showing a structure of a conventional pogo pin.
  • FIG. 2A is a vertical cross-sectional view showing a structure when a conventional pogo pin is inserted from below.
  • FIG. 2B is a longitudinal sectional view showing a structure when a conventional pogo pin is inserted from above.
  • FIG. 3A is a vertical sectional view showing a structure of a conventional LSI socket, and showing a structure when pogo pins are inserted from below.
  • FIG. 3B is a vertical sectional view showing a structure of a conventional LSI socket, and showing a structure when pogo pins are inserted from above.
  • FIG. 4 is an exploded longitudinal sectional view showing an LSI socket according to the first embodiment of the present invention.
  • FIG. 5 is a longitudinal sectional view showing an LSI socket according to the first embodiment of the present invention.
  • FIG. 6 is a structural exploded view showing an LSI socket according to a second embodiment of the present invention.
  • FIG. 7 is a longitudinal sectional view showing an LSI socket according to a second embodiment of the present invention.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Connecting Device With Holders (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Measuring Leads Or Probes (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)

Abstract

An LSI test socket incorporating a POGO pin type decoupling capacitor for relaxing variation in the power supply and the GND potential when an LSI in a BGA package is tested. The LSI test socket comprises a printed board (102) incorporating a decoupling capacitor (113) corresponding to one or more power supply voltages, a POGO pin supporting housing section (104) being integrated with the overlying printed board (102), and a POGO pin (103) being inserted into a through hole formed by aligning a through hole (109) made through the printed board (102) and a hole (114) made through the POGO pin supporting housing section (104). When the LSI in the BGA package is tested, the printed board (102) is arranged on the upper surface side of the POGO pin supporting housing section (104) facing the BGA package or on the lower surface side of the POGO pin supporting housing section (104) facing a test board.

Description

明 細 書  Specification
BGA用 LSIテストソケット  LSI test socket for BGA
技術分野  Technical field
[0001] 本発明は、 BGA(Ball Grid Array)パッケージに組み込まれた LSIの検査の際に用 レ、られる LSIテストソケットに関し、特に、電気的パラメータ等を確認する場合に用い られる BGA用 LSIテストソケットの構造に関するものである。  The present invention relates to an LSI test socket used for testing an LSI incorporated in a BGA (Ball Grid Array) package, and more particularly to a BGA LSI test socket used for checking electrical parameters and the like. It relates to the structure of the socket.
背景技術  Background art
[0002] 本発明に関する現時点での技術水準をより十分に説明する目的で、本願で引用さ れ或いは特定される特許、特許出願、特許公報、科学論文等の全てを、ここに、参照 することでそれらの全ての説明を組入れる。  [0002] For the purpose of more fully explaining the current state of the art relating to the present invention, reference should be made to all patents, patent applications, patent publications, scientific articles, and the like cited or specified in the present application. Incorporate all of those descriptions.
[0003] 従来、高密度かつ多ピンである BGAパッケージに組み込まれた LSIの選別テストを 行なう際には、 BGAパッケージの半田ボールに対して熱的、機械的なダメージを与 えないように LSIテストソケット(以下、 LSIソケットと呼ぶ)が使用されている。この目的 で使用される LSIソケットとしては、一般にポゴピンタイプとシートタイプの二つに大別 されている。  [0003] Conventionally, when performing a sorting test of an LSI incorporated in a BGA package having a high density and a large number of pins, it is necessary to prevent thermal and mechanical damage to solder balls of the BGA package. Test sockets (hereinafter referred to as LSI sockets) are used. LSI sockets used for this purpose are generally classified into two types: pogo pin type and sheet type.
[0004] ポゴピンはバネピンもしくはスプリングプローブピンとも呼ばれ、図 1の断面図に示 すように、ポゴピン 001 fま、ピン 002、ノ ネ 003、支持咅 B004の三つの咅 B品力ら構成さ れている。このポゴピンを用いたポゴピンタイプの LSIソケットは、コイル状のバネ構造 が樹脂筐体により保持されたピンとともに設けられ、このピンの上下を押さえることによ り電気的な接続を実現してレ、る。  [0004] Pogo pins are also referred to as spring pins or spring probe pins. Have been. A pogo pin type LSI socket using this pogo pin is provided with a coil-shaped spring structure together with a pin held by a resin housing, and by pressing up and down on the pin, an electrical connection is realized. You.
[0005] 図 2A、 2Bと図 3A、 3Bは、それぞれポゴピンを使用した従来の BGA用 LSIソケット の構造を示す断面図である。まず、図 2A、 2Bのように、この LSIソケットは、ポゴピン 001とポゴピン支持筐体部 005とを組み合わせて構成されている。すなわち、 LSIソ ケットの構造としては、樹脂などの非導電性材質であるポゴピン支持筐体部 005の上 側もしくは下側からポゴピン 001を筐体穴 010に挿入する構造となっている。  FIGS. 2A and 2B and FIGS. 3A and 3B are cross-sectional views showing the structure of a conventional BGA LSI socket using pogo pins. First, as shown in FIGS. 2A and 2B, this LSI socket is configured by combining a pogo pin 001 and a pogo pin support housing 005. That is, the structure of the LSI socket is such that the pogo pin 001 is inserted into the housing hole 010 from above or below the pogo pin support housing 005, which is a non-conductive material such as resin.
[0006] 図 2Aはポゴピン 001をポゴピン支持筐体部 005の下側から筐体穴 010に挿入し固 定する場合であり、ストッパー 006がポゴピン支持筐体部 005の上側に設置されてい る。一方、図 2Bは上側から挿入し固定する場合であり、ストッパー 006がポゴピン支 持筐体部 005の下側に設置されている。 FIG. 2A shows a case where the pogo pin 001 is inserted into the housing hole 010 from below the pogo pin support housing 005 and fixed, and the stopper 006 is installed above the pogo pin support housing 005. The On the other hand, FIG. 2B shows a case in which it is inserted and fixed from above, and a stopper 006 is installed below the pogo pin supporting housing 005.
[0007] また、図 3Aは図 2Aの構造の LSIソケットをテストボード 009に設置した場合であり、 図 7Bは図 2Bの構造の LSIソケットをテストボード 009に設置した場合である。いずれ の場合も、 BGAパッケージに封入された LSIの半田ボール 007の位置に対応して配 置されているポゴピン 001は、 LSIソケットが搭載されるテストボード 009上の配線パ ッド 008を機械的に上から押しつけることで電気的接続を実現している。一般的にこ のタイプの LSIソケットは、構造が単純なため価格が安いこと、機械的強度が大きく繰 り返し使用が可能であることなどが利点となっている。  FIG. 3A shows a case where the LSI socket having the structure shown in FIG. 2A is set on the test board 009, and FIG. 7B shows a case where the LSI socket having the structure shown in FIG. 2B is set on the test board 009. In each case, the pogo pins 001 arranged corresponding to the positions of the solder balls 007 of the LSI enclosed in the BGA package are used to mechanically connect the wiring pad 008 on the test board 009 on which the LSI socket is mounted. The electrical connection is realized by pressing it from above. In general, this type of LSI socket has advantages such as low cost due to its simple structure, high mechanical strength, and the ability to be used repeatedly.
[0008] 一方、シートタイプ LSIソケットは導電性のシートを用レ、るものであり、シートのタイプ として金属細線坦め込みタイプと導電性ゴムタイプがある。シートタイプは前述のポゴ ピンタイプに比べてピン長を短くできるので、高周波特性に優れている点が利点であ る。しかし、酸化金属の削れによるゴミの発生が多ぐシートも高価でランニングコスト が大きいという問題があり、さらに、接触表面に酸化金属が付着するため接触抵抗が 大きくなるという問題がある。  [0008] On the other hand, sheet-type LSI sockets use a conductive sheet, and there are two types of sheet, a metal wire-carrying type and a conductive rubber type. The sheet type has the advantage of being superior in high frequency characteristics because the pin length can be made shorter than the above-mentioned pogo pin type. However, there is a problem that the sheet which generates a large amount of dust due to scraping of the metal oxide is expensive and has a high running cost, and furthermore, there is a problem that the metal oxide adheres to the contact surface and the contact resistance increases.
[0009] また、これらいずれのタイプの LSIソケットを使用する場合でも、近年の LSIの高周 波かつ大電源電流動作に伴い、きわめて重要な問題点が浮上してきている。それは 、テストするべき LSIの大幅な性能向上に伴ってテスト周波数が高くなり、 BGAパッケ ージに組み込まれた LSIのテスト条件が GHzオーダーの高周波領域数で行われるよ うになつてきている。そのため、きわめて大きな電源電流が生じてしまレ、、 LSIの電源 及び GNDの電位変動が起こりやすくなつてきていることである。また、 LSIの選別テ ストに際しては、 LSIの動作に必要な電源を LSIから遠く離れたテスタから供給するた め、 BGAパッケージ近傍では品質のよい電源を供給できに《なっている問題もある  [0009] Even when using any of these types of LSI sockets, extremely important problems have emerged with the recent high frequency operation and large power supply operation of LSIs. This is because the test frequency has increased with the significant improvement in the performance of the LSI to be tested, and the test conditions for the LSI incorporated in the BGA package have come to be performed in the high-frequency range on the order of GHz. As a result, an extremely large power supply current is generated, and the potential fluctuations of the LSI power supply and GND are apt to occur. In addition, in the test for sorting LSIs, the power required for LSI operation is supplied from a tester far from the LSI, so high-quality power can be supplied near the BGA package.
[0010] このため、テストをする BGAパッケージの最近傍にコンデンサを配置することができ ないと、 LSIの高周波動作による電源電流が生じ、テスト基板の電源及び GNDの電 位を変動させてしまレ、、 BGAパッケージに組み込まれた LSIの安定動作を確保する ことが困難となってしまう。 [0011] しかしながら、これとは別に従来の LSIソケットでは、 BGAパッケージの近傍で電源 及び GNDの電位変動の揺れを緩和するためのデカップリングコンデンサの取り付け ができなくなつているという本質的な問題がある。それは、 LSIの入出力信号、電源 及び GNDの電極数が集積度の向上により従来に比べて増加していること、 BGAパ ッケージの小型化により BGAパッケージにおける電極間の間隔が狭くなり電極が密 集すること、などが原因である。また、テスト周波数がそれほど高くなくても、例えば、 パラレル入出力の本数が 512本も有るような LSIの場合、 IOの同時動作時に非常に 大きな瞬間電源電流が流れるという問題もある。 [0010] For this reason, if a capacitor cannot be placed in the vicinity of the BGA package to be tested, a power supply current will be generated due to the high frequency operation of the LSI, and the power supply and GND potential of the test board will fluctuate. However, it becomes difficult to ensure stable operation of the LSI incorporated in the BGA package. [0011] However, in addition to this, the conventional LSI socket has an essential problem that a decoupling capacitor for mitigating fluctuations in the power supply and GND potential fluctuations near the BGA package cannot be installed. is there. The reason is that the number of electrodes for LSI input / output signals, power supply and GND is increasing compared to the conventional one due to the improvement in integration, and the space between electrodes in the BGA package is narrowed due to the downsizing of the BGA package and the electrodes are dense. Gathering, and so on. Even if the test frequency is not so high, for example, in the case of an LSI having 512 parallel input / output lines, there is a problem that a very large instantaneous power supply current flows during simultaneous operation of IO.
[0012] 上記の電源及び GNDの電位変動を緩和する手段として、例えば、シートタイプの L SIソケットにおいて、導電シートの片面側の複数電極を導電層で接続しこの導電層 をシートに密着させて電源層とし、他面側の複数電極を導電層で接続しこの導電層 をシートに密着させて GND層とすることで、導電シートをコンデンサとして使用するも のである(例えば、特許文献 1参照)。これにより、 LSIを組み込んだ BGAパッケージ の直下にパッケージサイズのコンデンサを配置でき、 LSIの高周波動作の際に電源 及び GNDに発生するノイズの影響を小さくすることができる。  [0012] As a means for alleviating the above-described fluctuations in the power supply and GND potentials, for example, in a sheet-type LSI socket, a plurality of electrodes on one side of a conductive sheet are connected by a conductive layer, and this conductive layer is brought into close contact with the sheet. A conductive sheet is used as a capacitor by connecting a plurality of electrodes on the other side with a conductive layer and making this conductive layer adhere to a sheet to form a GND layer (for example, see Patent Document 1). . As a result, a package-sized capacitor can be placed directly under the BGA package incorporating the LSI, and the effect of noise generated on the power supply and GND during high-frequency operation of the LSI can be reduced.
上記した従来のシートタイプの LSIソケットは、その構造上きわめて実現が困難であ るという問題、また、高価で繰り返し使用の安定性がないためランニングコストが大き いという問題、さらには LSIソケット自体のコンタクト性の欠如などの問題があり、実際 に量産レベルで繰り返し使用できるものではない。また、近年の LSIは複数の電源電 圧を必要とするものが多ぐシートタイプでは対応することができない。  The above-mentioned conventional sheet-type LSI sockets are extremely difficult to realize due to their structure, and are expensive and lack the stability of repeated use, resulting in high running costs. Due to problems such as lack of contact, it cannot be used repeatedly at the mass production level. In addition, recent LSIs require a plurality of power supply voltages, and a large number of sheet voltages cannot be used.
特許文献 1 :特開 2000 - 97991号公報 (第 3頁、第 1 - 3図)  Patent Document 1: Japanese Patent Application Laid-Open No. 2000-97991 (Page 3, FIG. 1-3)
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0013] このため本発明の目的は、入出力信号や電源及び GNDピン数が非常に多い BG Aパッケージに封入された LSIを高周波でテストする際に発生する問題を解決するた めになされたもので、ソケットピンの交換が容易であり、かつ低コストで安定性の高い ポゴピン構造でありながら、テストの際、 BGAパッケージの近傍での電源及び GND 電位の変動を緩和するデカップリングコンデンサを内蔵したポゴピンタイプの LSIソケ ットを提供することである。 [0013] Therefore, an object of the present invention is to solve a problem that occurs when testing an LSI encapsulated in a BGA package having an extremely large number of input / output signals, power supplies, and GND pins at a high frequency. It has a built-in decoupling capacitor that facilitates socket pin replacement, is low cost, and has a highly stable pogo pin structure, but also reduces power supply and GND potential fluctuations near the BGA package during testing. Pogo Pin Type LSI Soke Is to provide
課題を解決するための手段  Means for solving the problem
[0014] 本発明の主旨の第 1の側面は、第 1のスルーホール内面と結合される第 1の電源プ レートと第 2のスルーホール内面と結合される第 2の電源プレートとがセパレータとを 介して積層されたデカップリングコンデンサが少なくとも 1つ以上内蔵されているプリ ント基板と、前記プリント基板を重ね合わせて一体化して前記第 1及び第 2のスルー ホールに対応する位置にそれぞれ第 1及び第 2の筐体穴が少なくとも 1組以上開口さ れるポゴピン支持筐体部と、前記プリント基板に開けられた前記第 1及び第 2のスル 一ホールと前記第 1及び第 2の筐体穴との穴位置を一致させた貫通穴に挿入される 第 1及び第 2のポゴピンとを少なくとも 1組以上備え、 BGAパッケージに組み込まれた LSIのテストの際にプリント基板の一端が BGAパッケージと対面して他端に前記ポゴ ピン支持筐体部が配置されている BGA用 LSIテストソケットを提供する。なお、電源 プレートとは、信号ではなく電源を供給する面状に広がるプレートあって、デカツプリ ングコンデンサの電極の機能を有する金属等の箔その他の素材から構成されるととも に、このプレートに印加される電位は電源電圧の他に中間電位や GNDさらに負の電 位等も含まれるものである。  [0014] A first aspect of the gist of the present invention is that the first power supply plate coupled to the inner surface of the first through-hole and the second power supply plate coupled to the inner surface of the second through-hole are connected to a separator. A printed circuit board having at least one or more decoupling capacitors built therein via a printed circuit board, and the printed circuit board superimposed and integrated to form a first substrate at a position corresponding to the first and second through holes. A pogo-pin supporting housing portion in which at least one set of second housing holes is opened; the first and second through holes formed in the printed circuit board; and the first and second housing holes. At least one set of first and second pogo pins to be inserted into the through-holes that match the hole position of the BGA package. One end of the printed circuit board faces the BGA package when testing the LSI incorporated in the BGA package. do it The pogo pin support casing to provide a BGA for LSI test socket which is arranged in the end. The power supply plate is a plate that spreads in a plane that supplies power instead of a signal.It is made of foil or other material such as metal that has the function of an electrode of a decoupling capacitor. The potential to be applied includes not only the power supply voltage but also an intermediate potential, GND and a negative potential.
[0015] プリント基板内には、前記第 1及び第 2の電源プレートにそれぞれ対応した電源層 及び一つの GND層が形成され、この電源層と GND層間の静電容量を利用してデカ ップリングコンデンサが形成されてもょレ、。  In the printed circuit board, a power supply layer corresponding to the first and second power supply plates and one GND layer are formed, and decoupling is performed using the capacitance between the power supply layer and the GND layer. Even if a capacitor is formed.
[0016] プリント基板は、信号用ポゴピンが揷入されるスルーホール以外の電源用ポゴピン 及び GND用ポゴピンが揷入されるスルーホール内面にメツキ層が形成されてもよい  [0016] In the printed circuit board, a plating layer may be formed on the inner surface of the through hole into which the pogo pin for power supply and the pogo pin for GND other than the through hole into which the pogo pin for signal is inserted.
[0017] ポゴピン支持筐体部は非導電性材料からなり、筐体穴内面にはメツキ層が形成され ていなくともよい。 [0017] The pogo-pin supporting housing portion may be made of a non-conductive material, and the plating layer may not be formed on the inner surface of the housing hole.
[0018] そして、電源層は電源用ポゴピンが挿入されるスルーホール内面のメツキ層と電気 的に接続され、また、前記 GND層は GND用ポゴピンが挿入されるスルーホール内 面のメツキ層と電気的に接続されてレ、てもよレ、。  [0018] The power supply layer is electrically connected to the plating layer on the inner surface of the through hole into which the pogo pin for power supply is inserted, and the GND layer is electrically connected to the plating layer on the inner surface of the through hole into which the pogo pin for GND is inserted. It is connected, and it may be.
[0019] 本発明の主旨の第 2の側面は、第 1のスルーホール内面と結合される第 1の電源プ レートと第 2のスルーホール内面と結合される第 2の電源プレートとがセパレータとを 介して積層されたデカップリングコンデンサが内蔵されているプリント基板と、このプリ ント基板を重ね合わせて一体化して前記第 1及び第 2のスルーホールに対応する位 置にそれぞれ第 1及び第 2の筐体穴が開口されるポゴピン支持筐体部と、前記プリン ト基板に開けられた前記第 1及び第 2のスルーホールと前記第 1及び第 2の筐体穴と の穴位置を一致させた貫通穴に挿入されるポゴピンとからなり、 BGAパッケージに組 み込まれた LSIのテストの際に前記ポゴピン支持筐体部の一端が BGAパッケージと 対面して他端に前記プリント基板が配置されている BGA用 LSIテストソケットを提供 する。 [0019] A second aspect of the gist of the present invention is a first power supply plug coupled to an inner surface of a first through hole. A printed circuit board with a built-in decoupling capacitor, in which a power supply plate and a second power supply plate coupled to the inner surface of the second through hole are laminated via a separator, and this printed circuit board are superposed and integrated. A pogo pin support housing portion having first and second housing holes opened at positions corresponding to the first and second through holes, respectively, and the first and second housing holes formed in the print substrate; And a pogo pin inserted into a through-hole in which the hole positions of the first and second housing holes are matched with each other, and the pogo pin support is used when testing an LSI incorporated in a BGA package. Provided is a BGA LSI test socket in which one end of a housing portion faces a BGA package and the other end has the printed board.
[0020] プリント基板内には、前記第 1及び第 2の電源プレートにそれぞれ対応した電源層 及び一つの GND層が形成され、この電源層と GND層間の静電容量を利用してデカ ップリングコンデンサが形成されてレ、てもよレ、。  In the printed circuit board, a power supply layer corresponding to the first and second power supply plates and one GND layer are formed, and decoupling is performed using the capacitance between the power supply layer and the GND layer. With the capacitor formed, it may be.
[0021] プリント基板は、信号用ポゴピン、電源用ポゴピン及び GND用ポゴピンが挿入され るすべてのスルーホール内面にメツキ層が形成されてレ、てもよレ、。  The printed circuit board has a plating layer formed on the inner surface of all through holes into which the signal pogo pins, the power pogo pins, and the GND pogo pins are inserted.
[0022] 前記ポゴピン支持筐体部は非導電性材料からなり、筐体穴内面にはメツキ層が形 成されていなくともよい。  [0022] The pogo-pin supporting housing portion may be made of a non-conductive material, and a plating layer may not be formed on the inner surface of the housing hole.
[0023] 電源層は電源用ポゴピンが挿入されるスルーホール内面のメツキ層と電気的に接 続され、また、前記 GND層は GND用ポゴピンが挿入されるスルーホール内面のメッ キ層と電気的に接続され、一方、信号用ポゴピンが挿入されるスルーホール内面のメ ツキ層は電源層及び GND層と電気的に接続されていなくともよい。  The power supply layer is electrically connected to a plating layer on the inner surface of the through hole into which the pogo pin for power supply is inserted, and the GND layer is electrically connected to the plating layer on the inner surface of the through hole into which the pogo pin for GND is inserted. On the other hand, the plating layer on the inner surface of the through hole into which the signal pogo pin is inserted may not be electrically connected to the power supply layer and the GND layer.
[0024] そして、ポゴピンは、それぞれ対応するプリント基板のスルーホールにポゴピンの下 部を揷入しメツキ層を介して半田付けにより固定されていてもよい。  [0024] The pogo pins may be fixed to the through holes of the corresponding printed circuit boards by inserting the lower portions of the pogo pins and soldering via the plating layers.
発明の効果  The invention's effect
[0025] 本発明によれば、 BGA用の LSIソケット内にデカップリングコンデンサを内蔵したこ とによって、高周波で動作する LSIの電源電位変動を減少させることができ、安定し た動作テストを行うことができる。また、デカップリングコンデンサの内蔵部とポゴピン 支持筐体部が別層のパーツに分かれていることにより、良好な製造安定性及びテスト 安定性を有する BGA用の LSIソケットを実現することができる。 発明を実施するための最良の形態 According to the present invention, by incorporating a decoupling capacitor in a BGA LSI socket, fluctuations in power supply potential of an LSI operating at a high frequency can be reduced, and a stable operation test can be performed. Can be. In addition, since the built-in part of the decoupling capacitor and the pogo-pin supporting housing part are separated into different parts, it is possible to realize a BGA LSI socket with good manufacturing stability and test stability. BEST MODE FOR CARRYING OUT THE INVENTION
[0026] 以下に本発明の実施の形態を図を用いて説明する。  Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0027] (第 1の実施の形態)  (First Embodiment)
本発明の第 1の実施の形態につき以下説明する。図 4は本発明の BGA用 LSIソケ ットを構成する各構成要素を示す分解縦断面図である。図 5は本発明における第 1の 実施の形態を示す BGA用 LSIソケットを示す縦断面図である。  The first embodiment of the present invention will be described below. FIG. 4 is an exploded longitudinal sectional view showing each component constituting the LSI socket for BGA of the present invention. FIG. 5 is a longitudinal sectional view showing a BGA LSI socket according to the first embodiment of the present invention.
[0028] 図 4に示すように、本発明の LSIソケット 101は、プリント基板 102、ポゴピン 103、ポ ゴピン支持筐体部 104の 3つの部品から構成されている。プリント基板 102には、印 カロされる電圧値が異なる第 1の電源ピン 105と第 2の電源ピン 106、 GNDピン 107、 信号ピン 108用となるポゴピン 103がそれぞれ挿入される複数のスルーホール 109 が設けられており、信号ピン 108が貫通するスルーホール 109以外の全てのスルー ホール 109内面にメツキ層 116が形成されている。そして、プリント基板 102内には、 電源プレートとして第 1の電源層 110と第 2の電源層 111、及び GND層 112が形成 されており、それぞれの層が対応する各ポゴピン用のスルーホール 109内面のメツキ 層 116と電気的に接続されている。  As shown in FIG. 4, the LSI socket 101 of the present invention is composed of a printed circuit board 102, a pogo pin 103, and a pogo pin support casing 104. The printed circuit board 102 has a plurality of through-holes 109 into which a first power supply pin 105 and a second power supply pin 106, a GND pin 107, and a pogo pin 103 serving as a signal pin 108 having different voltage values to be applied are respectively inserted. The plating layer 116 is formed on the inner surface of all the through holes 109 except for the through hole 109 through which the signal pin 108 penetrates. In the printed circuit board 102, a first power supply layer 110, a second power supply layer 111, and a GND layer 112 are formed as a power supply plate, and each layer corresponds to an inner surface of a corresponding through hole 109 for each pogo pin. It is electrically connected to the plating layer 116.
[0029] この電源層 110および 111と GND層 112間に積層される誘電体等からなるセパレ ータの静電容量を利用して、デカップリングコンデンサ 113が形成される。なお、図 4 、 5では 2種類の電源ピンが図示されている力 印加される電圧の種類の数には制限 はない。また、ポゴピン支持筐体部 104には、プリント基板 102のスルーホール 109と 対応する位置に同様の筐体穴 114が設けられている。このポゴピン支持筐体部 104 の上面側にプリント基板 102を重ねあわせ、図 2に示すように接着材料を使用して圧 着もしくは機械的に接合し、 LSIソケット 101の筐体として一体化する。なお、筐体穴 114の内面にはメツキ層は形成されていない。  [0029] A decoupling capacitor 113 is formed using the capacitance of a separator made of a dielectric or the like laminated between the power supply layers 110 and 111 and the GND layer 112. In FIGS. 4 and 5, two types of power pins are shown. The number of types of applied voltages is not limited. Further, the pogo pin supporting casing 104 is provided with a similar casing hole 114 at a position corresponding to the through hole 109 of the printed circuit board 102. A printed circuit board 102 is superimposed on the upper surface side of the pogo pin supporting casing 104, and is pressed or mechanically joined by using an adhesive material as shown in FIG. Note that no plating layer is formed on the inner surface of the housing hole 114.
[0030] そして、スルーホール 109と筐体穴 114の穴位置が一致している穴にポゴピン 103 を挿入することによって、最終的な LSIソケット 101としての構造を実現している。なお 、ポゴピン 103はプリント基板 102が設置された上面側力 挿入され、ポゴピン支持 筐体部 104の筐体穴 114の下部に形成されているストッパー 115で固定される。ここ で、プリント基板 102内に形成されている第 1、第 2の電源層 110、 111及びGND層 112とポゴピン 103との電気的接続は、ソケットピンの交換容易性を考慮してポゴピン 103の導電性材料とスルーホール 109内面のメツキ層 116との機械的接触で実現し ている。 Then, by inserting the pogo pins 103 into the holes where the positions of the through holes 109 and the housing holes 114 coincide with each other, the final structure as the LSI socket 101 is realized. The pogo pin 103 is inserted into the upper surface on which the printed circuit board 102 is installed, and is fixed by a stopper 115 formed below the housing hole 114 of the pogo pin support housing 104. Here, the first and second power supply layers 110 and 111 formed in the printed circuit board 102 and the GND layer Electrical connection between the 112 and the pogo pin 103 is realized by mechanical contact between the conductive material of the pogo pin 103 and the plating layer 116 on the inner surface of the through hole 109 in consideration of the ease of replacement of the socket pin.
[0031] このように構成された図 5に示す LSIソケットを用いてテストを行う際は、 BGAパッケ ージの図示しない半田ボールをポゴピン 103の上部先端に接触させ、ポゴピン 103 の下部先端を図示しないテストボードのパッドに接触させ、ポゴピンのバネ力によって 電気的接触を実現している。  When a test is performed using the thus configured LSI socket shown in FIG. 5, a solder ball (not shown) of a BGA package is brought into contact with the upper end of the pogo pin 103, and the lower end of the pogo pin 103 is shown in the drawing. The electrical contact is realized by the spring force of the pogo pins by contacting the pads of the test board.
[0032] 以上の構造により、本実施の形態ではソケットピンの交換容易性と近年の LSIの複 数電源に対応しつつ、 BGAパッケージに封入された LSI側に近い方にデカップリン グコンデンサを内蔵したプリント基板が配置されるので、 LSIソケットピンのインダクタ ンス成分の影響を受けることなく良好な特性を得ることができる。  [0032] With the above structure, the present embodiment incorporates a decoupling capacitor closer to the LSI side enclosed in a BGA package, while easily replacing socket pins and supporting multiple power supplies of recent LSIs. Since the printed circuit board is arranged, good characteristics can be obtained without being affected by the inductance component of the LSI socket pin.
[0033] (第 2の実施の形態)  (Second Embodiment)
次に、本発明の第 2の実施の形態について図面を参照して説明する。図 6は第 2の 実施の形態における BGA用 LSIソケットを構成する各構成要素を示す分解縦断面 図である。図 7は第 2の実施の形態における BGA用 LSIソケットを示す縦断面図であ る。  Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 6 is an exploded longitudinal sectional view showing each component constituting the BGA LSI socket according to the second embodiment. FIG. 7 is a longitudinal sectional view showing a BGA LSI socket according to the second embodiment.
[0034] 図 6に示すように、本発明の LSIソケット 201は、ポゴピンの下部部品 203A、プリン ト基板 202、ポゴピンの上部部品 203B、ポゴピン支持筐体部 204の 4つの部品から 構成されている。プリント基板 202には、印加される電圧値が異なる第 1の電源ピン 2 05と第 2の電 Cピン 206、 GNDピン 207、信号ピン 208用となるポゴピン 203 (203A と 203Bからなる)がそれぞれ挿入される複数のスルーホール 209が設けられており、 すべてのスルーホール 209内面にメツキ層 216が形成されている。そして、プリント基 板 202内には、第 1の電源層 210と第 2の電源層 211、及び GND層 212が形成され ており、それぞれの層が対応するポゴピン用のスルーホール 209内面のメツキ層 216 と電気的に接続されている。  As shown in FIG. 6, the LSI socket 201 of the present invention is composed of four parts: a lower part 203A of pogo pins, a printed circuit board 202, an upper part 203B of pogo pins, and a pogo pin support housing part 204. . On the printed circuit board 202, a first power supply pin 205 and a second power supply pin 206, a GND pin 207, and a pogo pin 203 (consisting of 203A and 203B) for a signal pin 208 having different applied voltage values are respectively provided. A plurality of through holes 209 to be inserted are provided, and a plating layer 216 is formed on the inner surface of all the through holes 209. A first power supply layer 210, a second power supply layer 211, and a GND layer 212 are formed in the printed circuit board 202, and each of the layers is a plating layer on the inner surface of the corresponding through hole 209 for a pogo pin. 216 is electrically connected.
[0035] この電源層 210及び 211と GND層 212間に積層される誘電体等からなるセパレー タの静電容量を利用して、デカップリングコンデンサ 213が形成される。なお、図 6、 7 では 2種類の電源ピンが図示されている力 印加される電圧の種類の数には制限は なレ、。また、ポゴピン支持筐体部 204には、プリント基板 202のスルーホール 209と対 応する位置に同様の筐体穴 214が設けられている。 A decoupling capacitor 213 is formed using the capacitance of a separator made of a dielectric or the like laminated between the power supply layers 210 and 211 and the GND layer 212. Note that two types of power pins are shown in FIGS. 6 and 7. There is no limit to the number of types of applied voltage. What? In addition, the pogo pin support housing portion 204 is provided with a similar housing hole 214 at a position corresponding to the through hole 209 of the printed circuit board 202.
[0036] このプリント基板 202のスルーホール 209にポゴピンの下部部品 203Aを挿入し、メ ツキ層 216を介して半田付け処理することで固定する。次に、プリント基板 202に固 定されたポゴピンの下部部品 203Aにバネ及びポゴピンの上部部品 203Bをはめ込 み、さらにポゴピン支持筐体部 204をその上からかぶせるように設置する。この際、ポ ゴピンの上部部品 203Bは筐体穴 214の上部に設けられたストッパー 215によって固 定される。 The lower part 203 A of the pogo pin is inserted into the through hole 209 of the printed board 202, and is fixed by soldering through the plating layer 216. Next, the spring and the upper part 203B of the pogo pin are fitted into the lower part 203A of the pogo pin fixed to the printed circuit board 202, and the pogo pin support housing part 204 is placed so as to cover it from above. At this time, the upper part 203B of the pogo pin is fixed by a stopper 215 provided above the housing hole 214.
[0037] そして、図 7に示すように、プリント基板 202をポゴピン支持筐体部 204の下側に配 置してポゴピンの交換性を考慮して図示しないネジ止めなどで固定し、 LSIソケット 2 01の筐体として一体化する。  Then, as shown in FIG. 7, the printed circuit board 202 is disposed below the pogo pin support housing 204 and fixed with screws or the like (not shown) in consideration of the exchangeability of the pogo pins. Integrated into the housing of 01.
[0038] 以上の構造により、本実施の形態では、 LSI側から離れた方向にデカップリングコ ンデンサを内蔵したプリント基板が配置されることになるため LSIソケットピンのインダ クタンス成分の影響が多少発生することと、ソケットピンの完全な交換容易性は犠牲 になるが、ポゴピンの下部導電部分とデカップリングコンデンサの電気的な接続が良 好となり、大電流が流れる用途に適した LSIソケットとなる。  [0038] With the above structure, in the present embodiment, a printed circuit board having a built-in decoupling capacitor is arranged in a direction away from the LSI side, so that the influence of the inductance component of the LSI socket pin occurs somewhat. In addition, the ease of replacement of the socket pins is sacrificed, but the electrical connection between the lower conductive part of the pogo pins and the decoupling capacitor is improved, making the LSI socket suitable for applications where large currents flow.
産業上の利用の可能性  Industrial potential
[0039] 本発明は、 BGAパッケージに封入された LSIを高周波でテストする際に使用する L SIソケットであって、ポゴピン構造を採用していることによって接触ピンの交換が可能 で、かつ低コストで製造できるため、利用可能性が大きい。  The present invention is an LSI socket used for testing an LSI encapsulated in a BGA package at a high frequency. The adoption of a pogo pin structure allows the contact pins to be replaced, and at a low cost. Because it can be manufactured with a high degree of availability.
[0040] 本発明は、 BGAパッケージに封入された LSIを高周波でテストする際に使用する L SIソケットに関するものであれば、あらゆるものに適用することが可能であり、その利 用の可能性において何ら限定するものではない。  [0040] The present invention can be applied to any LSI socket used for testing an LSI enclosed in a BGA package at a high frequency, and can be applied to any LSI socket. There is no limitation at all.
[0041] 幾つかの好適な実施の形態及び実施例に関連付けして本発明を説明したが、これ ら実施の形態及び実施例は単に実例を挙げて発明を説明するためのものであって、 限定することを意味するものではないことが理解できる。本明細書を読んだ後であれ ば、当業者にとって等価な構成要素や技術による数多くの変更および置換が容易で あることが明白である力 このような変更および置換は、添付の請求項の真の範囲及 び精神に該当するものであることは明白である。 Although the present invention has been described in connection with some preferred embodiments and examples, these embodiments and examples are merely illustrative of the invention and are not intended to be limiting. It is understood that this is not meant to be limiting. After reading this specification, it will be obvious to those skilled in the art that many changes and substitutions in terms of equivalent components and techniques will be readily apparent. Scope It is clear that this is true.
図面の簡単な説明 Brief Description of Drawings
[図 1]従来のポゴピンの構造を示す縦断面図である。 FIG. 1 is a longitudinal sectional view showing a structure of a conventional pogo pin.
[図 2A]は、従来のポゴピンを下から揷入する場合の構造を示す縦断面図である。  FIG. 2A is a vertical cross-sectional view showing a structure when a conventional pogo pin is inserted from below.
[図 2B]は、従来のポゴピンを上から揷入する場合の構造を示す縦断面図である。 [FIG. 2B] is a longitudinal sectional view showing a structure when a conventional pogo pin is inserted from above.
[図 3A]は、従来の LSIソケットの構造を示す縦断面図あって、ポゴピンを下から揷入 した場合の構造を示す縦断面図である。 FIG. 3A is a vertical sectional view showing a structure of a conventional LSI socket, and showing a structure when pogo pins are inserted from below.
[図 3B]は、従来の LSIソケットの構造を示す縦断面図あって、ポゴピンを上から挿入 した場合の構造を示す縦断面図である。  FIG. 3B is a vertical sectional view showing a structure of a conventional LSI socket, and showing a structure when pogo pins are inserted from above.
[図 4]は、本発明の第 1の実施形態における LSIソケットを示す分解縦断面図である。  FIG. 4 is an exploded longitudinal sectional view showing an LSI socket according to the first embodiment of the present invention.
[図 5]は、本発明の第 1の実施形態における LSIソケットを示す縦断面図である。 FIG. 5 is a longitudinal sectional view showing an LSI socket according to the first embodiment of the present invention.
[図 6]は、本発明の第 2の実施形態における LSIソケットのを示す構造分解図である。 FIG. 6 is a structural exploded view showing an LSI socket according to a second embodiment of the present invention.
[図 7]は、本発明の第 2の実施形態における LSIソケットを示す縦断面図である。 FIG. 7 is a longitudinal sectional view showing an LSI socket according to a second embodiment of the present invention.

Claims

請求の範囲 The scope of the claims
[1] 第 1のスルーホール内面と結合される第 1の電源プレートと第 2のスルーホール内 面と結合される第 2の電源プレートとがセパレータとを介して積層されたデカップリン グコンデンサが少なくとも 1つ以上内蔵されているプリント基板と、前記プリント基板を 重ね合わせて一体化して前記第 1及び第 2のスルーホールに対応する位置にそれぞ れ第 1及び第 2の筐体穴が少なくとも 1組以上開口されるポゴピン支持筐体部と、前 記プリント基板に開けられた前記第 1及び第 2のスルーホールと前記第 1及び第 2の 筐体穴との穴位置を一致させた貫通穴に挿入される第 1及び第 2のポゴピンとを少な くとも 1組以上備え、 BGAパッケージに組み込まれた LSIのテストの際にプリント基板 の一端が BGAパッケージと対面して他端に前記ポゴピン支持筐体部が配置されて レ、る BGA用 LSIテストソケット。  [1] At least a decoupling capacitor in which a first power supply plate coupled to the inner surface of the first through hole and a second power supply plate coupled to the inner surface of the second through hole are laminated via a separator is provided. One or more built-in printed boards and the printed boards are overlapped and integrated to form at least one first and second housing holes at positions corresponding to the first and second through holes, respectively. A pair of pogo-pin supporting casings that are opened, and a through-hole in which the positions of the first and second through-holes and the first and second casing-holes formed in the printed circuit board are matched. At least one set of first and second pogo pins to be inserted into the BGA package, one end of the printed circuit board faces the BGA package and the other end supports The housing is LSI test socket for BGA.
[2] 前記プリント基板内には、前記第 1及び第 2の電源プレートにそれぞれ対応した電 源層及び一つの GND層が形成され、この電源層と GND層間の静電容量を利用し てデカップリングコンデンサが形成されている請求項 1記載の BGA用 LSIテストソケッ 卜。 [2] In the printed circuit board, a power layer corresponding to the first and second power plates and one GND layer are formed, and decoupling is performed by utilizing a capacitance between the power layer and the GND layer. 2. The BGA LSI test socket according to claim 1, wherein a ring capacitor is formed.
[3] 前記プリント基板は、信号用ポゴピンが揷入されるスルーホール以外の電源用ポゴ ピン及び GND用ポゴピンが揷入されるスルーホール内面にメツキ層が形成されてい る請求項 1記載の BGA用 LSIテストソケット。  3. The BGA according to claim 1, wherein the printed circuit board has a plating layer formed on an inner surface of the through-hole other than the through-hole into which the signal pogo pin is inserted, and the through-hole into which the pogo pin for GND is inserted. For LSI test socket.
[4] 前記ポゴピン支持筐体部は非導電性材料からなり、筐体穴内面にはメツキ層が形 成されていない請求項 1記載の BGA用 LSIテストソケット。  4. The BGA LSI test socket according to claim 1, wherein the pogo pin supporting housing portion is made of a non-conductive material, and no plating layer is formed on an inner surface of the housing hole.
[5] 前記電源層は電源用ポゴピンが揷入されるスルーホール内面のメツキ層と電気的 に接続され、また、前記 GND層は GND用ポゴピンが揷入されるスルーホール内面 のメツキ層と電気的に接続されている請求項 2又は 3記載の BGA用 LSIテストソケット  [5] The power supply layer is electrically connected to the plating layer on the inner surface of the through hole into which the pogo pin for power supply is inserted, and the GND layer is electrically connected to the plating layer on the inner surface of the through hole into which the pogo pin for GND is inserted. 4. The BGA LSI test socket according to claim 2, which is electrically connected.
[6] 第 1のスルーホール内面と結合される第 1の電源プレートと第 2のスルーホール内 面と結合される第 2の電源プレートとがセパレータとを介して積層されたデカップリン グコンデンサが内蔵されているプリント基板と、このプリント基板を重ね合わせて一体 化して前記第 1及び第 2のスルーホールに対応する位置にそれぞれ第 1及び第 2の 筐体穴が開口されるポゴピン支持筐体部と、前記プリント基板に開けられた前記第 1 及び第 2のスルーホールと前記第 1及び第 2の筐体穴との穴位置を一致させた貫通 穴に挿入されるポゴピンとからなり、 BGAパッケージに組み込まれた LSIのテストの 際に前記ポゴピン支持筐体部の一端が BGAパッケージと対面して他端に前記プリン ト基板が配置されてレ、る BGA用 LSIテストソケット。 [6] A built-in decoupling capacitor in which a first power supply plate coupled to the inner surface of the first through-hole and a second power supply plate coupled to the inner surface of the second through-hole are laminated via a separator The printed circuit board and the printed circuit board are overlapped and integrated to form first and second positions respectively corresponding to the first and second through holes. A pogo pin supporting housing portion having a housing hole opened, and a through-hole in which the hole positions of the first and second through-holes and the first and second housing holes formed in the printed circuit board are matched. A pogo pin inserted into the hole, and at the time of testing an LSI incorporated in a BGA package, one end of the pogo pin support housing faces the BGA package and the print substrate is disposed at the other end. LSI test socket for BGA.
[7] 前記プリント基板内には、前記第 1及び第 2の電源プレートにそれぞれ対応した電 源層及び一つの GND層が形成され、この電源層と GND層間の静電容量を利用し てデカップリングコンデンサが形成されている請求項 6記載の BGA用 LSIテストソケッ 卜。 [7] In the printed circuit board, a power layer corresponding to the first and second power plates and one GND layer are formed, and decoupling is performed using the capacitance between the power layer and the GND layer. 7. The BGA LSI test socket according to claim 6, wherein a ring capacitor is formed.
[8] 前記プリント基板は、信号用ポゴピン、電源用ポゴピン及び GND用ポゴピンが揷入 されるすべてのスルーホール内面にメツキ層が形成されている請求項 6記載の BGA 用 LSIテストソケット。  8. The BGA LSI test socket according to claim 6, wherein the printed circuit board has a plating layer formed on the inner surfaces of all through holes into which the signal pogo pins, the power pogo pins, and the GND pogo pins are inserted.
[9] 前記ポゴピン支持筐体部は非導電性材料からなり、筐体穴内面にはメツキ層が形 成されてレヽなレ、請求項 6記載の BGA用 LSIテストソケット。  9. The BGA LSI test socket according to claim 6, wherein the pogo pin supporting housing portion is made of a non-conductive material, and a plating layer is formed on an inner surface of the housing hole.
[10] 前記電源層は電源用ポゴピンが挿入されるスルーホール内面のメツキ層と電気的 に接続され、また、前記 GND層は GND用ポゴピンが挿入されるスルーホール内面 のメツキ層と電気的に接続され、一方、信号用ポゴピンが挿入されるスルーホール内 面のメツキ層は電源層及び GND層と電気的に接続されていない請求項 7又は 8記 載の BGA用 LSIテストソケット。 [10] The power supply layer is electrically connected to the plating layer on the inner surface of the through hole into which the pogo pin for power supply is inserted, and the GND layer is electrically connected to the plating layer on the inner surface of the through hole into which the pogo pin for GND is inserted. 9. The BGA LSI test socket according to claim 7 or 8, wherein the plating layer inside the through hole into which the signal pogo pin is inserted is not electrically connected to the power supply layer and the GND layer.
[11] 前記ポゴピンは、それぞれ対応するプリント基板のスルーホールにポゴピンの下部 を挿入しメツキ層を介して半田付けにより固定されている請求項 8記載の BGA用 LSI テストソケット。 11. The BGA LSI test socket according to claim 8, wherein each of the pogo pins is inserted into a corresponding through hole of a printed circuit board by inserting a lower portion of the pogo pin and soldering the pogo pin via a plating layer.
PCT/JP2004/009832 2003-07-10 2004-07-09 Lsi test socket for bga WO2005006003A1 (en)

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US7477062B2 (en) 2009-01-13
JP4775554B2 (en) 2011-09-21
US20070018667A1 (en) 2007-01-25
JPWO2005006003A1 (en) 2007-09-20
US20060132160A1 (en) 2006-06-22
US7129728B2 (en) 2006-10-31

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