WO2004112291A1 - デジタル信号受信装置 - Google Patents
デジタル信号受信装置 Download PDFInfo
- Publication number
- WO2004112291A1 WO2004112291A1 PCT/JP2004/008662 JP2004008662W WO2004112291A1 WO 2004112291 A1 WO2004112291 A1 WO 2004112291A1 JP 2004008662 W JP2004008662 W JP 2004008662W WO 2004112291 A1 WO2004112291 A1 WO 2004112291A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- signal
- circuit
- frequency
- digital
- baseband
- Prior art date
Links
- 238000006243 chemical reaction Methods 0.000 claims description 23
- 238000000034 method Methods 0.000 claims description 8
- 230000010363 phase shift Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 10
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 5
- 230000010355 oscillation Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/41—Structure of client; Structure of client peripherals
- H04N21/414—Specialised client platforms, e.g. receiver in car or embedded in a mobile appliance
- H04N21/41407—Specialised client platforms, e.g. receiver in car or embedded in a mobile appliance embedded in a portable device, e.g. video client on a mobile phone, PDA, laptop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/41—Structure of client; Structure of client peripherals
- H04N21/426—Internal components of the client ; Characteristics thereof
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/438—Interfacing the downstream path of the transmission network originating from a server, e.g. retrieving encoded video stream packets from an IP network
- H04N21/4382—Demodulation or channel decoding, e.g. QPSK demodulation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
- H03J1/00—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general
- H03J1/0008—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor
- H03J1/0041—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor for frequency synthesis with counters or frequency dividers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/4302—Content synchronisation processes, e.g. decoder synchronisation
- H04N21/4305—Synchronising client clock from received content stream, e.g. locking decoder clock with encoder clock, extraction of the PCR packets
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/443—OS processes, e.g. booting an STB, implementing a Java virtual machine in an STB or power management in an STB
- H04N21/4436—Power management, e.g. shutting down unused components of the receiver
Definitions
- the present invention relates to a digital signal receiving device for receiving a high-frequency signal modulated with a digital signal.
- FIG. 5 is a block diagram of a conventional digital signal receiving apparatus disclosed in Japanese Patent Application Laid-Open No. 11-341376.
- An input terminal 106 receives a high-frequency signal modulated with a digital signal by an orthogonal frequency division multiplexing (Orthogona1FrequencyncDivision on Mu1tip1exing: OFDM) method.
- the signal is input to the OFDM demodulation circuit 110 via the frequency conversion circuit 102 and the frequency conversion circuit 108.
- the reference signal generation circuit 101 generates a reference signal, and the reference signal is input to the frequency conversion circuit 102 and the frequency conversion circuit 108, and is converted into a signal having a desired frequency.
- the output signal from the frequency conversion circuit 108 is input to the OFCM demodulation circuit 110.
- the frequency of the reference signal from the reference signal generation circuit 101 is converted by the multiplier circuit 109, and the frequency-converted reference signal is input to the OFDM demodulation circuit 110.
- OFCM demodulation circuit 110 demodulates the output signal of frequency conversion circuit 108 with reference to the frequency-converted reference signal, and outputs a transport stream signal as a demodulated signal to output terminal 107.
- the duplexer 109 consumes a large amount of current because it operates at a high frequency. Disclosure of the invention
- the digital signal receiver uses the first high-frequency signal modulated with the digital signal as a base.
- a baseband conversion circuit for converting to a spanned signal, a reference signal generation circuit for sending a reference signal to the baseband conversion circuit, a frequency division circuit for dividing the reference signal, and a signal output from the frequency division circuit It includes a multiplexing circuit and a digital demodulation circuit for demodulating a signal output from the baseband conversion circuit.
- the digital demodulation circuit operates using the signal output from the duplexer as a reference signal.
- FIG. 1 is a block diagram of a digital signal receiving device according to an embodiment of the present invention.
- FIG. 2 is a block diagram of a baseband orthogonal transform circuit of the digital signal receiving device according to the embodiment.
- FIG. 3 is a block diagram of another digital signal receiving device according to the embodiment.
- 4A and 4B are schematic diagrams of a device used in the digital signal receiving device according to the first embodiment.
- FIG. 5 is a block diagram of a conventional digital signal receiving device. BEST MODE FOR CARRYING OUT THE INVENTION
- FIG. 1 is a block diagram of a digital signal receiving device according to an embodiment of the present invention.
- a high frequency signal modulated by a digital signal in an orthogonal frequency division multiplexing (Orthogonal Frequency Division Multiplexing Mu 1 tip 1 exing: OFDM) system is received by an antenna.
- the frequency conversion circuit 2 mixes the signal from the input terminal 8 with the reference signal generated by the reference signal generation circuit 1 and converts the signal from the input terminal 8 into an intermediate frequency signal.
- the baseband orthogonal transform circuit 3 converts the frequency of the intermediate frequency signal output from the frequency transform circuit 2 using the reference signal generated by the reference signal generating circuit 1 to generate a baseband signal of the orthogonal baseband signal.
- Band I signal Convert to baseband Q signal 15
- the OFDM digital demodulation circuit 6 OFDM-demodulates the baseband I signal 14 and the baseband Q signal 15 and outputs the resulting signal from the output terminal 7 as a transport stream signal.
- the frequency of the reference signal generated by the reference signal generating circuit 1 is divided by a frequency dividing circuit 4, and the frequency of the divided reference signal is multiplied by a frequency multiplying circuit 5.
- the demodulation circuit 6 demodulates the baseband I signal 14 and the base span Q signal 15 using the output signal of the multiplier circuit 5 as a reference signal, and outputs a transport stream signal.
- the multiplier circuit 5 has a buffer circuit at its input.When the frequency of the reference signal generated by the reference signal generation circuit 1 is high, a large amount of current can flow through this buffer circuit to operate the buffer circuit at a high frequency. Need to be In the receiving apparatus according to the embodiment, the reference signal whose frequency is divided is input to the multiplication circuit 5, so that the buffer circuit, that is, the multiplication circuit 5 does not flow a large current and the multiplier circuit 5 is stably provided. Operate. Therefore, according to the first embodiment, a portable digital signal receiving device that can be driven by a battery for a long time with low power consumption is obtained.
- FIG. 2 is an internal circuit block diagram of the baseband orthogonal transform circuit 3.
- An intermediate frequency signal is input from the frequency conversion circuit 2 to the input terminal 13 of the baseband orthogonal conversion circuit 3.
- Phase—L0cked_Loop (PLL) The synthesizer 12 generates a local oscillation signal from the reference signal input from the terminal 50.
- the mixer circuit 9 converts the frequency of the intermediate frequency signal by mixing the local oscillation signal from the PLL synthesizer 12 and the intermediate frequency signal, and converts the intermediate frequency signal into a baseband I signal 14.
- the mixer circuit 10 converts the frequency of the intermediate frequency signal by mixing the 90-degree phase-shifted signal of the local oscillation signal from the PLL synthesizer 12 with the 90-degree phase-shift circuit 11 and the intermediate-frequency signal. Then, the intermediate frequency signal is converted into a baseband Q signal 15.
- the baseband orthogonal transform circuit 3 and the frequency dividing circuit 4 can be formed as one device 21 by a CMOS process.
- Frequency conversion circuit 2 and base The band orthogonal transform circuit 3 and the frequency dividing circuit 4 can be formed into one device 22 by using a high frequency process based on bi-CM ⁇ S. Operates at a high frequency with a small drive current.
- the OFDM demodulation circuit 6 and the duplexer 5 are formed using a CMOS process, they do not operate at a high frequency unless a certain amount of current flows.
- FIG. 3 is a block diagram of another digital signal receiving device according to the embodiment.
- a low-pass filter 16 is provided between the frequency dividing circuit 4 and the multiplying circuit 5 to block a signal having a higher frequency than the output signal of the frequency dividing circuit 4.
- the noise radiated from the connection path can be reduced by the low-pass filter 16 and the noise input to the demodulation circuit 6 can be reduced, so that the receiving performance of the receiving apparatus can be improved. Further, the low-pass filter 16 reduces noise entering other devices.
- the digital signal receiving apparatus receives a high-frequency signal modulated by the OFDM method.
- a receiver that receives a high-frequency signal changed by another method such as the 8 Vestigia 1 Side B and (8 VSB) method, which is a digital terrestrial broadcasting system in the United States, also has the configuration of the receiver according to the embodiment. Applicable.
- the output baseband signal is not a quadrature output but a uniaxial signal. Furthermore, the received high-frequency signal is converted to an intermediate frequency signal by the frequency conversion circuit 2 and then is not converted to a baseband signal, but the received signal is directly converted to a baseband signal by the baseband orthogonal conversion circuit. Has the same effect.
- the digital signal receiver according to the present invention has low power consumption and operates for a long time even when driven by a battery.
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Multimedia (AREA)
- Computer Networks & Wireless Communication (AREA)
- General Engineering & Computer Science (AREA)
- Superheterodyne Receivers (AREA)
- Circuits Of Receivers In General (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/524,203 US20050249316A1 (en) | 2003-06-16 | 2004-06-14 | Digital signal receiver |
JP2005507012A JP4039442B2 (ja) | 2003-06-16 | 2004-06-14 | デジタル信号受信装置 |
EP04736803A EP1526669A4 (en) | 2003-06-16 | 2004-06-14 | DIGITAL SIGNAL RECEIVER |
CN2004800007734A CN1701549B (zh) | 2003-06-16 | 2004-06-14 | 数字信号接收装置 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003170290 | 2003-06-16 | ||
JP2003-170290 | 2003-06-16 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2004112291A1 true WO2004112291A1 (ja) | 2004-12-23 |
Family
ID=33549420
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2004/008662 WO2004112291A1 (ja) | 2003-06-16 | 2004-06-14 | デジタル信号受信装置 |
Country Status (5)
Country | Link |
---|---|
US (1) | US20050249316A1 (ja) |
EP (1) | EP1526669A4 (ja) |
JP (1) | JP4039442B2 (ja) |
CN (1) | CN1701549B (ja) |
WO (1) | WO2004112291A1 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111917411A (zh) * | 2020-08-03 | 2020-11-10 | 中南民族大学 | 一种基于模拟电路的类数字qpsk调制电路 |
CN117291134A (zh) * | 2023-11-07 | 2023-12-26 | 成都天贸科技有限公司 | 一种数字调制加载到信号源的设计 |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01245720A (ja) * | 1988-03-28 | 1989-09-29 | Pioneer Electron Corp | シンセサイザチューナ |
JPH06164429A (ja) * | 1992-11-25 | 1994-06-10 | Nec Corp | 局部発振器及び周波数切替方式 |
JPH06291697A (ja) * | 1993-03-31 | 1994-10-18 | Matsushita Electric Ind Co Ltd | 送受信装置 |
JPH09181527A (ja) * | 1995-12-27 | 1997-07-11 | Nec Corp | 周波数逓倍回路 |
JPH11341376A (ja) * | 1998-05-25 | 1999-12-10 | Sharp Corp | デジタル放送受信装置 |
JP2001136140A (ja) * | 1999-08-26 | 2001-05-18 | Victor Co Of Japan Ltd | マルチキャリア伝送送受信システム |
JP2002057592A (ja) * | 2000-06-28 | 2002-02-22 | Trw Inc | マルチキャリア受信機の周波数変換アーキテクチャ |
JP2002111528A (ja) * | 2000-09-21 | 2002-04-12 | Samsung Electronics Co Ltd | 受信機 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4862107A (en) * | 1986-03-18 | 1989-08-29 | International Mobile Machines Corporation | Frequency synthesizer for broadcast telephone system having multiple assignable frequency channels |
US5113189A (en) * | 1991-06-21 | 1992-05-12 | Motorola, Inc. | Frequency translating coherent analog to digital conversion system for modulated signals |
CA2107632C (en) * | 1992-10-05 | 1997-06-03 | Nec Corporation | Local oscillator and its frequency switching method |
US5387913A (en) * | 1993-11-09 | 1995-02-07 | Motorola, Inc. | Receiver with digital tuning and method therefor |
DE69534067T2 (de) * | 1994-05-09 | 2006-04-13 | Victor Company of Japan, Ltd., Yokohama | Einstellung eines Referenzunterträgers bei Mehrträgerübertragung |
JP3079950B2 (ja) * | 1995-06-20 | 2000-08-21 | 松下電器産業株式会社 | 直交周波数分割多重変調信号の受信装置及び伝送方法 |
JPH09153882A (ja) * | 1995-09-25 | 1997-06-10 | Victor Co Of Japan Ltd | 直交周波数分割多重信号伝送方式、送信装置及び受信装置 |
DE69733706T2 (de) * | 1996-05-30 | 2005-12-29 | Matsushita Electric Industrial Co., Ltd., Kadoma | Empfänger für digitalen Rundfunk |
EP0969636B1 (en) * | 1998-06-30 | 2007-04-25 | Lucent Technologies Inc. | Tracking carrier timing utilising frequency offset error signal |
US6335952B1 (en) * | 1998-07-24 | 2002-01-01 | Gct Semiconductor, Inc. | Single chip CMOS transmitter/receiver |
US6960962B2 (en) * | 2001-01-12 | 2005-11-01 | Qualcomm Inc. | Local oscillator leakage control in direct conversion processes |
US7194044B2 (en) * | 2002-05-22 | 2007-03-20 | Alexander Neil Birkett | Up/down conversion circuitry for radio transceiver |
-
2004
- 2004-06-14 CN CN2004800007734A patent/CN1701549B/zh not_active Expired - Fee Related
- 2004-06-14 JP JP2005507012A patent/JP4039442B2/ja not_active Expired - Fee Related
- 2004-06-14 WO PCT/JP2004/008662 patent/WO2004112291A1/ja active Application Filing
- 2004-06-14 US US10/524,203 patent/US20050249316A1/en not_active Abandoned
- 2004-06-14 EP EP04736803A patent/EP1526669A4/en not_active Withdrawn
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01245720A (ja) * | 1988-03-28 | 1989-09-29 | Pioneer Electron Corp | シンセサイザチューナ |
JPH06164429A (ja) * | 1992-11-25 | 1994-06-10 | Nec Corp | 局部発振器及び周波数切替方式 |
JPH06291697A (ja) * | 1993-03-31 | 1994-10-18 | Matsushita Electric Ind Co Ltd | 送受信装置 |
JPH09181527A (ja) * | 1995-12-27 | 1997-07-11 | Nec Corp | 周波数逓倍回路 |
JPH11341376A (ja) * | 1998-05-25 | 1999-12-10 | Sharp Corp | デジタル放送受信装置 |
JP2001136140A (ja) * | 1999-08-26 | 2001-05-18 | Victor Co Of Japan Ltd | マルチキャリア伝送送受信システム |
JP2002057592A (ja) * | 2000-06-28 | 2002-02-22 | Trw Inc | マルチキャリア受信機の周波数変換アーキテクチャ |
JP2002111528A (ja) * | 2000-09-21 | 2002-04-12 | Samsung Electronics Co Ltd | 受信機 |
Non-Patent Citations (1)
Title |
---|
See also references of EP1526669A4 * |
Also Published As
Publication number | Publication date |
---|---|
CN1701549A (zh) | 2005-11-23 |
JPWO2004112291A1 (ja) | 2006-07-20 |
JP4039442B2 (ja) | 2008-01-30 |
EP1526669A1 (en) | 2005-04-27 |
US20050249316A1 (en) | 2005-11-10 |
CN1701549B (zh) | 2010-07-14 |
EP1526669A4 (en) | 2012-03-21 |
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