WO2004095551A1 - Procede et appareil pour le developpement a sec de photoresist multicouche - Google Patents

Procede et appareil pour le developpement a sec de photoresist multicouche Download PDF

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Publication number
WO2004095551A1
WO2004095551A1 PCT/US2004/001405 US2004001405W WO2004095551A1 WO 2004095551 A1 WO2004095551 A1 WO 2004095551A1 US 2004001405 W US2004001405 W US 2004001405W WO 2004095551 A1 WO2004095551 A1 WO 2004095551A1
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Prior art keywords
recited
time
period
gas
substrate
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PCT/US2004/001405
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English (en)
Inventor
Vaidyanathan Balasubramaniam
Koichiro Inazawa
Rich Wise
Arpan P. Mahorowala
Siddhartha Panda
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Tokyo Electron Limited
International Business Machines Corporation
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Priority claimed from US10/640,577 external-priority patent/US7344991B2/en
Application filed by Tokyo Electron Limited, International Business Machines Corporation filed Critical Tokyo Electron Limited
Priority to JP2006508615A priority Critical patent/JP2006522480A/ja
Priority to EP04704022A priority patent/EP1609175A1/fr
Publication of WO2004095551A1 publication Critical patent/WO2004095551A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H01L21/0276—Photolithographic processes using an anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics

Definitions

  • the present invention relates to a method and apparatus for plasma processing a substrate, and more particularly to a method for multilayer photoresist dry development.
  • a (dry) plasma etch process can be utilized to remove or etch material along fine lines or within vias or contacts patterned on a silicon substrate.
  • the plasma etch process generally involves positioning a semiconductor substrate with an overlying patterned, protective layer, for example a photoresist layer, in a processing chamber. Once the substrate is positioned within the chamber, an ionizable, dissociative gas mixture is introduced within the chamber at a pre-specified flow rate, while a vacuum pump is throttled to achieve an ambient process pressure.
  • a plasma is formed when a fraction of the gas species present are ionized by electrons heated via the transfer of radio frequency (RF) power either inductively or capacitively, or microwave power using, for example, electron cyclotron resonance (ECR). Moreover, the heated electrons serve to dissociate some species of the ambient gas species and create reactant specie(s) suitable for the exposed surface etch chemistry.
  • RF radio frequency
  • ECR electron cyclotron resonance
  • the heated electrons serve to dissociate some species of the ambient gas species and create reactant specie(s) suitable for the exposed surface etch chemistry.
  • selected surfaces of the substrate are etched by the plasma. The process is adjusted to achieve appropriate conditions, including an appropriate concentration of desirable reactant and ion populations to etch various features (e.g., trenches, vias, contacts, etc.) in the selected regions of the substrate.
  • substrate materials where etching is required include silicon dioxide (SiO 2 ), low-k dielectric materials, poly-silicon, and silicon n
  • the present invention relates to a method and apparatus for plasma processing a substrate, and to a method and apparatus for multilayer photoresist dry development.
  • the present invention also relates to the multilayer mask itself.
  • a method and apparatus are described for etching an anti-reflective coating (ARC) layer on a substrate in a plasma processing system.
  • a process gas comprising one or more gasses collectively containing ammonia (NH 3 ) and a passivation gas is introduced.
  • a plasma is formed from the process gas in the plasma processing system. The substrate is exposed to the plasma.
  • a method and apparatus are described for forming a bilayer mask for etching a thin film on a substrate.
  • the thin film is formed on the substrate.
  • An anti-reflective coating (ARC) layer is formed on the thin film.
  • a photoresist pattern is formed on the ARC layer.
  • the photoresist pattern is transferred to the ARC layer by etching the ARC layer using a process gas comprising one or more gasses collectively containing ammonia (NH 3 ) and a passivation gas.
  • a method of smoothing a sidewall in a multilayer mask on a substrate in a plasma processing system comprises: introducing a process gas comprising one or more gasses collectively containing ammonia (NH 3 ), and a passivation gas; forming a plasma from the process gas in the plasma processing system; and exposing the substrate to the plasma, wherein the passivation gas facilitates the formation of a passivation film on the sidewall of the multilayer mask in order to smooth surface roughness of the sidewall.
  • a process gas comprising one or more gasses collectively containing ammonia (NH 3 ), and a passivation gas
  • FIGs. 1A, 1B, and 1 C show a schematic representation of a typical procedure for pattern etching a thin film
  • FIG. 2 shows a simplified schematic diagram of a plasma processing system according to an embodiment of the present invention
  • FIG. 3 shows a schematic diagram of a plasma processing system according to another embodiment of the present invention.
  • FIG. 4 shows a schematic diagram of a plasma processing system according to another embodiment of the present invention.
  • FIG. 5 shows a schematic diagram of a plasma processing system according to another embodiment of the present invention.
  • FIG. 6 shows a schematic diagram of a plasma processing system according to another embodiment of the present invention.
  • FIG. 7 presents a method of etching an anti-reflective coating (ARC) layer on a substrate in a plasma processing system according to an embodiment of the present invention
  • FIG. 8 presents a method of forming a bilayer mask for etching a thin film on a substrate according to another embodiment of the present invention.
  • FIGs. 9A and 9B show a schematic representation of a multilayer mask.
  • pattern etching comprises the application of a thin layer of light-sensitive material, such as photoresist, to an upper surface of a substrate, that is subsequently patterned in order to provide a mask for transferring this pattern to the underlying thin film on a substrate during etching.
  • the patterning of the light-sensitive material generally involves exposure by a radiation source through a reticle (and associated optics) of the light-sensitive material using, for example, a micro- lithography system, followed by the removal of the irradiated regions of the light-sensitive material (as in the case of positive photoresist), or non- irradiated regions (as in the case of negative resist) using a developing solvent.
  • Multi-layer masks can be implemented for etching features in a thin film.
  • a bilayer mask 6 comprising light- sensitive layer 3 with pattern 2 formed using conventional lithographic techniques and an organic anti-reflective coating (ARC) layer 7 can be utilized as a mask for etching the thin film 4 on substrate 5, wherein the mask pattern 2 in the light-sensitive layer 3 is transferred to the ARC layer 7 using a separate etch step preceding the main etch step for the thin film 4.
  • a process gas comprising ammonia (NH 3 ) and a passivation gas is utilized in a method of bilayer photoresist dry development.
  • the passivation gas can comprise a hydrocarbon gas such as at least one of C2H4, CH4, C 2 H , C2H6, C3H4, C3H6, C3H8, C4H6, C4H8, C4H-10, C5H8, C5H10, C ⁇ H ⁇ , C ⁇ Hio, C6H12, or the like.
  • a hydrocarbon gas such as at least one of C2H4, CH4, C 2 H , C2H6, C3H4, C3H6, C3H8, C4H6, C4H8, C4H-10, C5H8, C5H10, C ⁇ H ⁇ , C ⁇ Hio, C6H12, or the like.
  • the etching can be of substrate 5 itself, with or without thin film 4.
  • a plasma processing system 1 is depicted in FIG. 2 comprising a plasma processing chamber 10, a diagnostic system 12 coupled to the plasma processing chamber 10, and a controller 14 coupled to the diagnostic system 12 and the plasma processing chamber 10.
  • the controller 14 is configured to execute a process recipe comprising at least one of the above-identified chemistries to etch an organic ARC layer.
  • controller 14 is configured to receive at least one endpoint signal from the diagnostic system 12 and to post-process the at least one endpoint signal in order to accurately determine an endpoint for the process.
  • plasma processing system 1 depicted in FIG. 2, utilizes a plasma for material processing.
  • Plasma processing system 1 can comprise an etch chamber.
  • plasma processing system 1a can comprise plasma processing chamber 10, substrate holder 20, upon which a substrate 25 to be processed is affixed, and vacuum pumping system 30.
  • Substrate 25 can be, for example, a semiconductor substrate, a wafer or a liquid crystal display.
  • Plasma processing chamber 10 can be, for example, configured to facilitate the generation of plasma in processing region 15 adjacent a surface of substrate 25.
  • An ionizable gas or mixture of gases is introduced via a gas injection system (not shown) and the process pressure is adjusted.
  • a control mechanism (not shown) can be used to throttle the vacuum pumping system 30.
  • Plasma can be utilized to create materials specific to a pre-determined materials process, and/or to aid the removal of material from the exposed surfaces of substrate 25.
  • the plasma processing system 1a can be configured to process 200 mm substrates, 300 mm substrates, or larger.
  • Substrate 25 can be, for example, affixed to the substrate holder 20 via an electrostatic clamping system.
  • substrate holder 20 can, for example, further include a cooling system including a re-circulating coolant flow that receives heat from substrate holder 20 and transfers heat to a heat exchanger system (not shown), or when heating, transfers heat from the heat exchanger system.
  • gas can, for example, be delivered to the backside of substrate 25 via a backside gas system to improve the gas-gap thermal conductance between substrate 25 and substrate holder 20. Such a system can be utilized when temperature control of the substrate is required at elevated or reduced temperatures.
  • the backside gas system can comprise a two-zone gas distribution system, wherein the helium gas gap pressure can be independently varied between the center and the edge of substrate 25.
  • heating/cooling elements such as resistive heating elements, or thermo-electric heaters/coolers can be included in the substrate holder 20, as well as the chamber wall of the plasma processing chamber 10 and any other component within the plasma processing system 1a.
  • substrate holder 20 can comprise an electrode through which RF power is coupled to the processing plasma in process space 15.
  • substrate holder 20 can be electrically biased at a RF voltage via the transmission of RF power from a RF generator 40 through an impedance match network 50 to substrate holder 20.
  • the RF bias can serve to heat electrons to form and maintain plasma.
  • the system can operate as a reactive ion etch (RIE) reactor, wherein the chamber and an upper gas injection electrode serve as ground surfaces.
  • RIE reactive ion etch
  • a typical frequency for the RF bias can range from 0.1 MHz to 100 MHz.
  • RF systems for plasma processing are well known to those skilled in the art.
  • RF power is applied to the substrate holder electrode at multiple frequencies.
  • impedance match network 50 serves to improve the transfer of RF power to plasma in plasma processing chamber 10 by reducing the reflected power.
  • Match network topologies e.g. L-type, ⁇ - type, T-type, etc.
  • automatic control methods are well known to those skilled in the art.
  • Vacuum pump system 30 can, for example, include a turbo-molecular vacuum pump (TMP) capable of a pumping speed up to 5000 liters per second (and greater) and a gate valve for throttling the chamber pressure.
  • TMP turbo-molecular vacuum pump
  • a 1000 to 3000 liter per second TMP is generally employed.
  • TMPs are useful for low pressure processing, typically less than 50 mTorr.
  • a mechanical booster pump and dry roughing pump can be used.
  • a device for monitoring chamber pressure (not shown) can be coupled to the plasma processing chamber 10.
  • the pressure measuring device can be, for example, a Type 628B Baratron absolute capacitance manometer commercially available from MKS Instruments, Inc. (Andover, MA).
  • Controller 14 comprises a microprocessor, memory, and a digital I/O port capable of generating control voltages sufficient to communicate and activate inputs to plasma processing system 1a as well as monitor outputs from plasma processing system 1a. Moreover, controller 14 can be coupled to and can exchange information with RF generator 40, impedance match network 50, the gas injection system (not shown), vacuum pump system 30, as well as the backside gas delivery system (not shown), the substrate/substrate holder temperature measurement system (not shown), and/or the electrostatic clamping system (not shown). For example, a program stored in the memory can be utilized to activate the inputs to the aforementioned components of plasma processing system 1a according to a process recipe in order to perform the method of etching an organic ARC layer.
  • the diagnostic system 12 can include an optical diagnostic subsystem (not shown).
  • the optical diagnostic subsystem can comprise a detector such as a (silicon) photodiode or a photomultiplier tube (PMT) for measuring the light intensity emitted from the plasma.
  • the diagnostic system 12 can further include an optical filter such as a narrow-band interference filter.
  • the diagnostic system 12 can include at least one of a line CCD (charge coupled device), a CID (charge injection device) array, and a light dispersing device such as a grating or a prism.
  • diagnostic system 12 can include a monochromator (e.g., grating/detector system) for measuring light at a given wavelength, or a spectrometer (e.g., with a rotating grating) for measuring the light spectrum such as, for example, the device described in U.S. Patent No. 5,888,337.
  • the diagnostic system 12 can include a high resolution Optical Emission Spectroscopy (OES) sensor such as from Peak Sensor Systems, or Verity Instruments, Inc.
  • OES Optical Emission Spectroscopy
  • Such an OES sensor has a broad spectrum that spans the ultraviolet (UV), visible (VIS), and near infrared (NIR) light spectrums.
  • the resolution is approximately 1.4 Angstroms, that is, the sensor is capable of collecting 5550 wavelengths from 240 to 1000 nm.
  • the OES sensor can be equipped with high sensitivity miniature fiber optic UV- VIS-NIR spectrometers which are, in turn, integrated with 2048 pixel linear CCD arrays.
  • the spectrometers receive light transmitted through single and bundled optical fibers, where the light output from the optical fibers is dispersed across the line CCD array using a fixed grating. Similar to the configuration described above, light passing through an optical vacuum window is focused onto the input end of the optical fibers via a convex spherical lens.
  • Three spectrometers each specifically tuned for a given spectral range (UV, VIS and NIR), form a sensor for a process chamber. Each spectrometer includes an independent A/D converter. And lastly, depending upon the sensor utilization, a full emission spectrum can be recorded every 0.1 to 1.0 seconds.
  • the plasma processing system 1b can, for example, be similar to the embodiment of FIG. 2 or 3 and further comprise either a stationary, or mechanically or electrically rotating magnetic field system 60, in order to potentially increase plasma density and/or improve plasma processing uniformity, in addition to those components described with reference to FIG. 2 and FIG. 3.
  • controller 14 can be coupled to magnetic field system 60 in order to regulate the speed of rotation and field strength.
  • the design and implementation of a rotating magnetic field is well known to those skilled in the art.
  • the plasma processing system 1c can, for example, be similar to the embodiment of FIG. 2 or FIG. 3, and can further comprise an upper electrode 70 to which RF power can be coupled from RF generator 72 through impedance match network 74.
  • a typical frequency for the application of RF power to the upper electrode can range from 0.1 MHz to 200 MHz.
  • a typical frequency for the application of power to the lower electrode can range from 0.1 MHz to 100 MHz.
  • controller 14 is coupled to RF generator 72 and impedance match network 74 in order to control the application of RF power to upper electrode 70.
  • the design and implementation of an upper electrode is well known to those skilled in the art.
  • the plasma processing system 1d can, for example, be similar to the embodiments of FIGs. 2 and 3, and can further comprise an inductive coil 80 to which RF power is coupled via RF generator 82 through impedance match network 84.
  • RF power is inductively coupled from inductive coil 80 through a dielectric window (not shown) to plasma processing region 15.
  • a typical frequency for the application of RF power to the inductive coil 80 can range from 10 MHz to 100 MHz.
  • a typical frequency for the application of power to the chuck electrode can range from 0.1 MHz to 100 MHz.
  • a slotted Faraday shield (not shown) can be employed to reduce capacitive coupling between the inductive coil 80 and plasma.
  • controller 14 is coupled to RF generator 82 and impedance match network 84 in order to control the application of power to inductive coil 80.
  • inductive coil 80 can be a "spiral" coil or “pancake” coil in communication with the plasma processing region 15 from above as in a transformer coupled plasma (TCP) reactor.
  • ICP inductively coupled plasma
  • TCP transformer coupled plasma
  • the plasma can be formed using electron cyclotron resonance (ECR).
  • ECR electron cyclotron resonance
  • the plasma is formed from the launching of a Helicon wave.
  • the plasma is formed from a propagating surface wave.
  • the plasma processing device can comprise various elements, such as described in FIGs. 2 through 6, and combinations thereof.
  • the method of etching an organic ARC layer comprises NH 3 and a hydrocarbon gas such as at least one of C 2 H 4 , CH 4 , C 2 H 2 , C 2 H6, C3H4, C3H6, C3H8, C4H6, C4H8, C4H10.
  • a process parameter space can comprise a chamber pressure of 20 to 1000 mTorr, an NH 3 process gas flow rate ranging from 50 to 1000 seem, a hydrocarbon process gas flow rate ranging from 5 to 100 seem, an upper electrode (e.g., element 70 in FIG.
  • the upper electrode bias frequency can range from 0.1 MHz to 200 MHz, e.g., 60 MHz.
  • the lower electrode bias frequency can range from 0.1 MHz to 100 MHz, e.g., 2 MHz.
  • Chamber pressure 100 mTorr
  • Upper electrode RF power 1200 W
  • Lower electrode RF power 100 W
  • Table I reports results (for both metal contacts (MC) as well as contacts (CA)) such as thickness of the remaining photoresist following the ARC layer etch, top and bottom critical dimensions for the ARC feature, and the critical dimension bias, wherein the bias indicates the change in CD from top to bottom (i.e. negative bias indicates a CD reduction, and positive bias indicates a CD increase). Additionally, the data is reported at center and edge. The data demonstrates the success of the process in maintaining the CD as well as the potential for reducing the CD.
  • the process chemistry can further comprise Helium (He). The introduction of Helium to the process can relieve feature side-wall roughness.
  • the etch time can be determined using design of experiment (DOE) techniques; however, it can also be determined using endpoint detection.
  • DOE design of experiment
  • One possible method of endpoint detection is to monitor a portion of the emitted light spectrum from the plasma region that indicates when a change in plasma chemistry occurs due to substantially near completion of the ARC layer etching and contact with the underlying material film.
  • portions of the spectrum that indicate such changes comprise wavelengths of 387.2 nm (carbon-nitrogen (CN)), and can be measured using optical emission spectroscopy (OES). After emission levels corresponding to those frequencies cross a specified threshold (e.g., drop to substantially zero or increase above a particular level), an endpoint can be considered to be complete.
  • a specified threshold e.g., drop to substantially zero or increase above a particular level
  • Other wavelengths that provide endpoint information can also be used.
  • the etch time can be extended to include a period of over-etch, wherein the over-etch period constitutes a fraction (i.e. 1 to
  • FIG. 7 presents a flow chart of a method for etching an anti-reflective coating (ARC) layer on a substrate in a plasma processing system according to an embodiment of the present invention.
  • Procedure 400 begins in 410 in which a process gas is introduced to the plasma processing system, wherein the process gas comprises ammonia (NH 3 ) containing gas, and a passivation gas.
  • a process gas comprises ammonia (NH 3 ) containing gas, and a passivation gas.
  • the passivation gas can comprise a hydrocarbon gas such as at least one of C 2 H 4 , CH 4 , C 2 H 2) C 2 H 6 , C3H4, C 3 H 6 , C 3 H 8 , C 4 H 6 , C 4 H 8 , C 4 H 10 , C 5 H 8 , C 5 H 10 , C ⁇ He, C ⁇ HI O , and C ⁇ H ⁇ 2 .
  • the process gas can further comprise helium (He).
  • a plasma is formed in the plasma processing system from the process gas using, for example, any one of the systems described in FIGs. 2 through 6, or combinations thereof.
  • the substrate comprising the ARC layer is exposed to the plasma formed in 420.
  • procedure 400 ends.
  • the first period of time during which the substrate with the ARC layer is exposed to the plasma is generally dictated by the time required to etch the ARC layer, or the time required to transfer a photoresist pattern to the ARC layer.
  • the first period of time required to transfer a photoresist pattern through the thickness of the ARC layer is pre-determined.
  • the first period of time can be further augmented by a second period of time, or an over-etch time period.
  • the over-etch time can comprise a fraction of time, such as 1 to 100%, of the first period of time, and this over-etch period can comprise an extension of etching beyond the detection of endpoint.
  • FIG. 8 presents a method for forming a bilayer mask for etching a thin film on a substrate in a plasma processing system according to another embodiment of the present invention.
  • the method is illustrated in a flowchart 500 beginning in 510 with forming the thin film on the substrate.
  • the thin film can comprise an oxide layer, such as silicon dioxide (SiO 2 ), and it can be formed by a variety of processes including chemical vapor deposition (CVD).
  • CVD chemical vapor deposition
  • an anti-reflective coating (ARC) layer is formed on the substrate overlying the thin film.
  • the ARC layer can, for example, be an organic ARC layer that is formed using conventional techniques such as a spin coating system.
  • a photoresist pattern is formed on the substrate overlying the ARC layer.
  • the photoresist film can be formed using conventional techniques, such as a photoresist spin coating system.
  • the pattern can be formed within the photoresist film by using conventional techniques such as a stepping micro-lithography system, and a developing solvent.
  • the photoresist pattern is transferred to the ARC layer in order to form the bilayer mask.
  • the pattern transfer is accomplished using a dry etching technique, wherein the etch process is performed in a plasma processing system that utilizes a process gas comprising ammonia (NH 3 ) containing gas, and a passivation gas.
  • the passivation gas can comprise a hydrocarbon gas such as at least one of C2H4, CH 4 , C 2 H 2 , C 2 H 6 , C3H4, C3H6, C3H8, C4H6, C4H8, C4H10, C5H8, C5H10, C ⁇ H ⁇ , C ⁇ HIO, and CeH ⁇ 2 -
  • the process gas as described above, can further comprise helium (He). Plasma is formed in the plasma processing system from the process gas using, for example, any one of the systems described in FIGs. 2 through 6, and the substrate comprising the ARC layer is exposed to the plasma formed.
  • a first period of time during which the substrate with the ARC layer is exposed to the plasma is generally dictated by the time required to etch the ARC layer, or the time required to transfer a photoresist pattern to the ARC layer.
  • the first period of time required to transfer a photoresist pattern through the thickness of the ARC layer is pre-determined.
  • the first period of time is further augmented by a second period of time, or an over-etch time period.
  • the over-etch time can comprise a fraction of time, such as 1 to 100%, of the first period of time, and this over-etch period can comprise an extension of etching beyond the detection of endpoint.
  • FIGs. 9A and 9B present a side view and a top view of an etched multilayer mask, respectively.
  • Feature 600 comprises sidewalls 610 through light-sensitive layer 640 and ARC layer 650 upon which surface roughness 620 is formed during etching.
  • the passivation gas facilitates the formation of a passivation film 630 to smooth the surface roughness 620 of the etched multilayer mask; see FIG. 9B.

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  • Drying Of Semiconductors (AREA)

Abstract

L'invention concerne un procédé de gravure d'une couche de revêtement antireflet organique (ARC) sur un substrat se trouvant dans un système de traitement au plasma, qui consiste à : introduire un gaz de procédé comprenant de l'ammoniac (NH3) et un gaz de passivation ; former un plasma à partir du gaz de procédé ; et exposer le substrat au plasma. Le gaz de procédé peut, par exemple, être du NH3 et un gaz hydrocarboné tel qu'au moins un parmi C2H4, CH4, C2H2, C2H6, C3H4, C3H6, C3H8, C4H6, C4H8, C4H10, C5H8, C5H10, C6H6, C6H10,et C6H12. Par ailleurs, la chimie de traitement consiste également à ajouter de l'hélium. L'invention porte également sur un procédé de formation d'un masque bicouche pour graver une couche mince sur un substrat, qui consiste à : former la couche mince sur le substrat ; former une couche d'ARC sur la couche mince ; former un motif de photorésist sur la couche d'ARC ; et transférer le motif de photorésist sur la couche d'ARC par un procédé de gravure utilisant un gaz de procédé comprenant de l'ammoniac (NH3), et un gaz de passivation.
PCT/US2004/001405 2003-03-31 2004-01-21 Procede et appareil pour le developpement a sec de photoresist multicouche WO2004095551A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2006508615A JP2006522480A (ja) 2003-03-31 2004-01-21 多層フォトレジストのドライ現像のための方法及び装置
EP04704022A EP1609175A1 (fr) 2003-03-31 2004-01-21 Procede et appareil pour le developpement a sec de photoresist multicouche

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US45843003P 2003-03-31 2003-03-31
US60/458,430 2003-03-31
US48422503P 2003-05-05 2003-05-05
US60/484,225 2003-05-05
US10/640,577 US7344991B2 (en) 2002-12-23 2003-08-14 Method and apparatus for multilayer photoresist dry development
US10/640,577 2003-08-14

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WO2004095551A1 true WO2004095551A1 (fr) 2004-11-04

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EP (1) EP1609175A1 (fr)
JP (1) JP2006522480A (fr)
KR (1) KR100989107B1 (fr)
TW (1) TWI228751B (fr)
WO (1) WO2004095551A1 (fr)

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EP1623275A2 (fr) * 2003-05-09 2006-02-08 Lam Research Corporation Procede pour produire un motif de photoresine bi-couche amelioree
WO2021158433A1 (fr) * 2020-02-04 2021-08-12 Lam Research Corporation Traitements post-application/exposition destinés à améliorer la performance de développement à sec d'une réserve euv contenant du métal
US11209729B2 (en) 2014-01-31 2021-12-28 Lam Research Corporation Vacuum-integrated hardmask processes and apparatus
WO2022005855A1 (fr) * 2020-07-01 2022-01-06 Applied Materials, Inc. Procédé de développement à sec de résine photosensible
WO2022005808A1 (fr) * 2020-07-01 2022-01-06 Applied Materials, Inc. Solutions de gravure thermique en phase vapeur pour résines photosensibles métalliques oxo
US11314168B2 (en) 2020-01-15 2022-04-26 Lam Research Corporation Underlayer for photoresist adhesion and dose reduction
WO2024039498A1 (fr) * 2022-08-15 2024-02-22 Tokyo Electron Limited Procédé cyclique de développement réactif de résines photosensibles
US11921427B2 (en) 2018-11-14 2024-03-05 Lam Research Corporation Methods for making hard masks useful in next-generation lithography
US12033866B2 (en) 2023-03-02 2024-07-09 Applied Materials, Inc. Vapor phase thermal etch solutions for metal oxo photoresists

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US7700494B2 (en) 2004-12-30 2010-04-20 Tokyo Electron Limited, Inc. Low-pressure removal of photoresist and etch residue
US8709706B2 (en) * 2011-06-15 2014-04-29 Applied Materials, Inc. Methods and apparatus for performing multiple photoresist layer development and etching processes
US9984858B2 (en) * 2015-09-04 2018-05-29 Lam Research Corporation ALE smoothness: in and outside semiconductor industry
US10727073B2 (en) 2016-02-04 2020-07-28 Lam Research Corporation Atomic layer etching 3D structures: Si and SiGe and Ge smoothness on horizontal and vertical surfaces
KR102642011B1 (ko) 2018-03-30 2024-02-27 램 리써치 코포레이션 내화성 금속들 및 다른 고 표면 결합 에너지 재료들의 원자 층 에칭 및 평활화 (smoothing)

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Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1623275A2 (fr) * 2003-05-09 2006-02-08 Lam Research Corporation Procede pour produire un motif de photoresine bi-couche amelioree
US11209729B2 (en) 2014-01-31 2021-12-28 Lam Research Corporation Vacuum-integrated hardmask processes and apparatus
US11921427B2 (en) 2018-11-14 2024-03-05 Lam Research Corporation Methods for making hard masks useful in next-generation lithography
US11314168B2 (en) 2020-01-15 2022-04-26 Lam Research Corporation Underlayer for photoresist adhesion and dose reduction
US11988965B2 (en) 2020-01-15 2024-05-21 Lam Research Corporation Underlayer for photoresist adhesion and dose reduction
WO2021158433A1 (fr) * 2020-02-04 2021-08-12 Lam Research Corporation Traitements post-application/exposition destinés à améliorer la performance de développement à sec d'une réserve euv contenant du métal
EP4100793A4 (fr) * 2020-02-04 2024-03-13 Lam Research Corporation Traitements post-application/exposition destinés à améliorer la performance de développement à sec d'une réserve euv contenant du métal
WO2022005855A1 (fr) * 2020-07-01 2022-01-06 Applied Materials, Inc. Procédé de développement à sec de résine photosensible
WO2022005808A1 (fr) * 2020-07-01 2022-01-06 Applied Materials, Inc. Solutions de gravure thermique en phase vapeur pour résines photosensibles métalliques oxo
US11621172B2 (en) 2020-07-01 2023-04-04 Applied Materials, Inc. Vapor phase thermal etch solutions for metal oxo photoresists
WO2024039498A1 (fr) * 2022-08-15 2024-02-22 Tokyo Electron Limited Procédé cyclique de développement réactif de résines photosensibles
US12033866B2 (en) 2023-03-02 2024-07-09 Applied Materials, Inc. Vapor phase thermal etch solutions for metal oxo photoresists

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TWI228751B (en) 2005-03-01
KR20050112115A (ko) 2005-11-29
JP2006522480A (ja) 2006-09-28
EP1609175A1 (fr) 2005-12-28
KR100989107B1 (ko) 2010-10-25
TW200425247A (en) 2004-11-16

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