WO2003098732A1 - A switch arrangement and method of making same - Google Patents

A switch arrangement and method of making same Download PDF

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Publication number
WO2003098732A1
WO2003098732A1 PCT/US2003/015479 US0315479W WO03098732A1 WO 2003098732 A1 WO2003098732 A1 WO 2003098732A1 US 0315479 W US0315479 W US 0315479W WO 03098732 A1 WO03098732 A1 WO 03098732A1
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WO
WIPO (PCT)
Prior art keywords
substrate
switch
mems switches
mems
switch arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2003/015479
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English (en)
French (fr)
Inventor
Daniel F. Sievenpiper
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HRL Laboratories LLC
Original Assignee
HRL Laboratories LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HRL Laboratories LLC filed Critical HRL Laboratories LLC
Priority to JP2004506117A priority Critical patent/JP2005526433A/ja
Priority to GB0424852A priority patent/GB2404095B/en
Priority to AU2003232149A priority patent/AU2003232149A1/en
Publication of WO2003098732A1 publication Critical patent/WO2003098732A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices
    • H01P1/10Auxiliary devices for switching or interrupting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices
    • H01P1/10Auxiliary devices for switching or interrupting
    • H01P1/12Auxiliary devices for switching or interrupting by mechanical chopper
    • H01P1/127Strip line switches
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00Coupling devices of the waveguide type
    • H01P5/04Coupling devices of the waveguide type with variable factor of coupling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q13/00Waveguide horns or mouths; Slot antennas; Leaky-waveguide antennas; Equivalent structures causing radiation along the transmission path of a guided wave
    • H01Q13/08Radiating ends of two-conductor microwave transmission lines, e.g. of coaxial lines, of microstrip lines
    • H01Q13/085Slot-line radiating ends

Definitions

  • the present disclosure relates to single-pole, multi-throw switches that are built using single-pole, single-throw devices combined in a hybrid circuit.
  • the switches of this invention are symmetrically located around a central point which is a vertical via in a muiti layer printed circuit board.
  • the present disclosure describes a single-pole multi-throw switch having low parasitic reactance, and an antenna incorporating the same.
  • this invention addresses several problems with existing single-pole, multi-throw switches built using single-pole, single-throw devices preferably combined in a switch matrix.
  • the switches are symmetrically located around a centra! point which is preferably a vertical via in a multi layer printed circuit board.
  • a maximum number of switches can be located around the common port with a minimum amount of separation. This leads to the lowest possible parasitic reactance, and gives the circuit the greatest possible frequency response.
  • any residual parasitic reactance can be matched by a single element on the common port, so that all ports will have the same frequency response.
  • This patent describes a 1 x4 switch, but the concept may be extended to a 1x6 switch or to a 1 x8 switch or a switch with even greater fan out (I N). Also, such a switch can be integrated with an antenna array for the purpose of producing a switched beam diversity antenna.
  • the switch arrangement disclosed herein can be conveniently used with a Vivaldi Cloverleaf Antenna to determine which antenna of the Vivaldi Cloverleaf Antenna is active.
  • the present invention has a number of possible applications and uses.
  • a single-pole, multi-throw radio frequency switch has numerous applications.
  • communication systems get increasingly complicated, and they require diversity antennas, reconf ⁇ gurable receivers, and space time processing, the need for more sophisticated radio frequency components will grow.
  • These advanced communications systems will need single-pole multi-throw switches having low parasitic reactance. Such switches will be used, for example, in connection with the antenna systems of these communication systems.
  • a common port represented here as a microstrip line 5 ends at a point 6 near which several RF MEMS switches 10-1 through 10-4 are clustered.
  • RF MEMS switches 10-1 through 10-4 are preferably spaced equidistantly from a centerline of microstrip 5 and laterally on each side of it. Ports 1, 2, 3, and 4 then spread out from this central point 6, with each port being addressed by a single MEMS switch 10.
  • the substrate of which only a portion is shown, is represented by element 12.
  • RF energy can be directed from the common port provided by microstrip line 5 to the chosen selectable port (port 4 in this example) with very low loss.
  • This switching circuit will also demonstrate high isolation between the common port and the three open ports, as well as high isolation between each of the selectable ports.
  • the effect, in this embodiment, is likely to be undesirable.
  • the second pair of ports 3, 4 likely may not be brought any closer to the first pair 1, 2, because this would cause unwanted coupling between the closely spaced sections of microstrip line that would result.
  • one wanted to compensate for the parasitic reactance caused by the microstrip stub one would need to separately tune each of the lines because they do not all see the same reactance. There may not be space on the top side of the circuit to allow a separate tuning element for each of the selectable ports, and still allow room for the DC bias lines and the RF signal lines.
  • Figure 1 depicts a rather straightforward way of combining single-pole, single-throw RF MEMS switches into a single-pole, multi-throw hybrid design; however, the preferred designs are described with reference to the remaining figures.
  • the invention provides a switch arrangement comprising a plurality of MEMS switches arranged on a substrate about a central point, each MEMS switch being disposed on a common imaginary circle centered on said central point, and each MEMS switch being spaced equidistantly along the circumference of said imaginary circle; and connections for connecting a RF port of each one of said MEMS switches with said central point.
  • the invention provides a method of making a switch arrangement comprising: disposing a plurality of MEMS switches on a substrate in a circular pattern about a point; disposing a plurality of RF lines disposed in a radial pattern relative to said point on said substrate; and connecting said plurality of RF strip lines to a common junction point at said point on said substrate via said plurality of MEMS switches whereby operation of a one of said plurality of MEMS switches couples a one of said plurality of RF strip lines to said common junction.
  • Figure 1 depicts one technique for combining single-pole, single-throw RF MEMS switches into a single-pole, multi-throw hybrid design
  • Figures 2a and 2b are top and side elevation views of one embodiment of the present invention.
  • FIGS. 3 a and 3b are top and side elevation views of another embodiment of the present invention:
  • Figure 4 shows a modification to the embodiment of Figures 3a and 3b
  • Figures 5a and 5b are top and side elevation views of yet another embodiment of the present invention.
  • Figures 6a and 6b are top and side elevation views of still another embodiment of the present invention.
  • Figure 7 depicts a switching arrangement of Figures 5a and 5b used in combination with a flared notch antenna
  • Figure 8 depicts a switching arrangement of Figures 5a and 5b used in combination with a flared notch antenna having eight flared notch elements;
  • Figure 9 depicts another improvement compared to the switch of Figure 1.
  • Figures 2a and 2b preferably consists of a multi-layer printed circuit board 12, on which a common RF line 14 is formed on the bottom side 13 of the board 12, and is fed through a ground plane 18 by a metal plated via 20 to a central point 7 in the center of a 1x4 switch matrix of switches 10-1 through 10-4, which switches may be made as a hybrid on a common substrate (not shown) or which may be individually attached to surface 9.
  • Switches 10-1 through 10-4 comprise a set of RF MEMS switches 10 (the numeral 10 when used without a dash and another numeral is used herein to refer to these RF MEMS switches in general as opposed to a particular switch). As will be seen, the number of switches 10 in the set can be greater than four, if desired.
  • RF MEMS switches 10 are positioned around common point 7, preferably in a radial geometry as shown.
  • the benefit of this geometry is that each of the selectable ports 1 - 4 sees the same RF environment (including the same impedance) by utilizing the same local geometry which is preferably only varied by rotation about an axis "A" defined through common point 7. Therefore, each of the ports 1-4 should have the same RF performance (or, at least, nearly identical RF performances to each other).
  • parasitic reactance should be minimized.
  • control line pairs 11 can be arranged at right angles to each other, resulting in very low coupling between them.
  • This embodiment has four ports, but, as will be seen, this basic design can be modified to provide a greater (or lesser) number of ports.
  • the MEMS switches 10 are preferably disposed in a circular arrangement around central point 7 on substrate 12. Note that the switches 10 lie on a circular arrangement as indicated by the circular line identified by the letter B. Note also that the switches are preferably arranged equidistantly along the circumference of the circular line identified by the letter B.
  • the MEMS switches 10 can be placed individually directly on surface 9 of the circuit board 12 or they may be formed on a small substrate (not shown) as a switch hybrid, which is in turn mounted on surface 9.
  • Via 20 preferably has a pad 8 on the top surface of the printed circuit board 12 to which the MEMS switches 10 can be wired, for example, using ball bonding techniques.
  • the switches 10 are also wired to the control lines pairs 1 1 and to the ports 1 - 4.
  • a common port 7 is fed from the underside of the ground plane through a vertical metal plated via 20 to the top side of the board 12 where it terminates at centra] point 7.
  • MEMS switches 10 are radially clustered around this central point.
  • the centers of the MEMS switches 10 are preferably spaced a common distance (a common radius) away from an axis A of the via 20. This allows a large number of switches 10 to be fit into a small area, yet allows the coupling between the ports to be minimized.
  • the coupling is further minimized by the fact that the RF microstrip lines directed to ports 1 - 4 are disposed at right angles to each other.
  • the substrate 12 of this structure preferably is a multi-layer microwave substrate with a buried ground plane 18.
  • the RF microstrip lines coupling to ports 1 - 4 may form the driven elements of an antenna structure, for example, or may be coupled to antenna elements. Such elements may be used for sending and/or receiving RF signals.
  • FIGS 3a and 3b show another embodiment of the present invention, in which some of the DC bias lines are implemented as vias 21 which connect with the buried ground plane 18 in substrate 12.
  • the vias 21 may have pads 8 formed on their top surfaces in order to facilitate connecting the ground connections on the MEMS switches 10 thereto. Since each bias line pair 11 consists of a ground line 24 and a signal or control line 23, each of the ground lines 24-1 - 24-4, may be tied to the RF ground plane 18, with no loss of performance, by means of vias 21. This results in fewer external connections to the circuit because only one DC control connection 23-1 - 23-4 is needed for each switch 10-1 — 10-4, which is half as many total connections compared with the embodiment of Figures 2a and 2b.
  • FIG. 4 An additional possible advantage of the geometry of Figures 3a and 3c is shown in Figure 4.
  • a feed-through via 20 such as that used for the common port 7 can sometimes have its own parasitic reactance.
  • a complementary reactance Z as an external lumped element 25, one may optimize the RF match of the circuit.
  • the reactance Z couples via 20 to ground using one of the vias 21 coupled to ground plane 18. Since the impedance match is done on the central port 7, and all other ports are symmetrical, the same matching structure Z will work for all of the ports.
  • This lumped element solution is one example of a matching structure, and others will be apparent to those skilled in the art of RF design.
  • the ground connections of the MEMS switches 10 are wired to metal plated vias 21 directly or to their associated pads 8, either of which is in electrical communication with the buried ground plane 18. Note that the via 20 that provides the central RF port passes through a hole or opening 19 in the ground plane 18, while the vias 21 contact the ground plane 18.
  • the plurality of MEMS switch devices 10-1 10-4 of Figures 3a, 3b and 4 are arranged on substrate 12 about a vertical axis A through the substrate, each switch 10 being disposed in a circular arrangement centered on axis A (central point 7) with each switch 10 being preferably spaced equidistantly along the circumference of the imaginary circle B defining the circular arrangement.
  • the MEMS switches 10 are preferably disposed in a circular arrangement around central point 7 on substrate 12. Note that the switches 10 he on indicated by the circular line identified by the letter B. Note also that the switches are preferably arranged equidistantly along the circumference of the circular line identified by the letter B.
  • the DC control lines 11 and 22 are depicted as being thinner than are the RF lines 1 - 4. If the DC lines are much thinner than the RF lines, they will have a higher impedance and coupling with the RF lines will be thereby reduced. While the percentage by which the DC are made thinner than the RF lines is somewhat a matter of tradeoffs, it is believed their width should preferably be about 25% of the width of the RF lines or less. The DC lines should be separated by at least one RF line width from the RF lines to reduce unwanted coupling.
  • the MEMS switches may be wired to their RF lines, DC control lines, ground pads or lines by means of wires 13 bonded to the respective switches 10 and their various lines and/or pads.
  • both the DC bias switch control lines 23, 24 associated with each switch 10 are fed through vertical metal plated vias 21, 26.
  • one of the lines (line 24) is grounded by means of via 21 contacting ground plane 18 and the other line (line 23) is connected, by means of a via 26 through a hole in the ground plane 18, to a trace 27 on the back side of the board 12 which functions as a MEMS switch 10 control line.
  • Both the RF and the DC ports of the MEMS switches 10-1 ... 10-4 are connected together, as shown in Figure 6a.
  • the DC portion of the signal may be separated from the RF portion by using an inductor 32-1 ... 32-4 in each of the switches' DC circuit.
  • This may be either a lumped element, a printed inductor, or an inductive structure such as a very high-impedance RF line.
  • Another inductor 34 may be needed to separate the RF signal from the DC ground as shown in Figure 6b. In that case, the end of inductor 34 remote from the connection to via 20 is coupled to a line 15 at ground potential.
  • an external DC blocking capacitor may be used on each of the RF lines. These capacitors are not shown in the figures.
  • Figures 6a and 6b show a four port arrangement, but it is to be understood that this modification would be more apt to be used where space constraints do not allow the other embodiments to be easily utilized.
  • the radial switching structure described above is combined with a printed antenna structure which may or may not share the same substrate 12.
  • the printed antenna structure 40 preferably includes four conductive cloverleaf elements 36 which define flared notch antennas 37 therebetween.
  • the DC bias lines 11 a disposed on the back side of the board, as well as the common RF line 14, also on the backside of the board, are shown in dashed lines.
  • the selectable RF lines on the front side of the board are shown in solid lines.
  • the conductive cloverleaf elements are preferably formed on one surface of board 12 using conventional printed circuit board fabrication techniques.
  • the cloverleaf elements 36 may be made by appropriately etching a copper-clad printed circuit board, for example.
  • the lines on the bottom side can be similarly made by appropriately etching a copper-clad printed circuit board.
  • Each flared notch 37 is fed by a separate microstrip line 1- 4, each of which crosses over the notch of an antenna and is shorted to the ground plane 18 (see, e.g., Figure 5b) on the opposite side of board 12 at vias 39.
  • These microstrip lines correspond to the similarly numbered ports 1 -4 discussed with respect to the switch arrangements of the earlier mentioned figures.
  • RF energy passing down these microstrip lines is radiated from the associated antenna structure in a direction that antenna is pointing (i.e. along the mid-points of the notch of the notch antenna which is excited).
  • the DC bias lines 11 and 1 la are preferably routed to a common connector
  • the RF input preferably comprises a single feed point
  • Figure 8 An embodiment more complicated than that of Figure 7 is shown in Figure 8. This embodiment has eight flared notches 37 defined by cloverleaf elements 36 and a single 1x8 array of RF
  • FIG. 7 uses the 1x8 MEMS switch to route the common input port to one of eight flared notch antennas 37.
  • This drawing only shows the general concept of the structure and does not show the required DC bias lines or inductors. But those bias lines would be similar to those shown in Figure 7, but more numerous given the fact that this embodiment has eight notches 37 rather than four notches 37.
  • Figures 7 and 8 demonstrate that the matrix of single-pole, multi-throw MEMS switches can be combined with an antenna structure 40 to create a switched beam diversity antenna of rather inexpensive components.
  • the structure shown by Figure 7 uses four flared notches 37, which are addressed by a 1x4 MEMS switch matrix preferably arranged in the radial configuration described above.
  • the embodiment of Figure 9 is not a presently preferred embodiment of this invention, but it is an embodiment that may have sufficient advantages in certain applications, such as when metal plated vias cannot be used, that some practicing the present invention may choose to utilize it. This may be the case when a monolithic approach is taken, when vias and internal ground layers may not be feasible or may not be simple to realize.
  • This embodiment builds on the concept that the individual MEMS devices 10 are preferably clustered as closely as possible around a central point 7 to avoid parasitic reactance. This embodiment also recognizes that this may not be possible for a design to have a large number of ports, because when the microstrip transmission lines are brought too close to each other, unwanted coupling occurs.
  • a 1x3 switching unit SU is used as a building block for a lxN switch of any desired size.
  • Each SU has a pair of MEMS switches 10 for coupling the transmission lines to a central point 7 of the SU.
  • Each transmission line port 1 ,2 of a first unit is accessed through a MEMS device 10, while subsequent transmission line ports (for example, ports 3,4 of a second SU) are accessed through one or more third MEMS device(s) 45 which route the RF signals along sections of central transmission line 46 (which may now be of any length required to minimize coupling between ports) to a next 1x3 switching unit SU.
  • Each switching unit SU comprises two (or possibly more) MEMS switches 10 clustered around its own central point 7 for coupling the transmission lines thereto and another MEMS switch 45 for passing the incoming signal to yet another switching unit SU.
  • two additional (or more) transmission lines may be addressed each through their own individual MEMS device 10, or the signals may be sent to the next SU through the third MEMS device 45. Since unused sections of transmission line are switched off when they are not used, they do not present unwanted parasitic reactance.
  • all of the DC bias methods described in previous embodiments may be applied to this structure as well.
  • Figure 9 thus depicts an alternate design that may be used if a central metal-plated via 20 feature of the earlier embodiments is not feasible.
  • the design of Figure 9 uses a 1x3 switch SU as a building block for a I N switch of any size. It benefits from the knowledge that dangling sections of RF line will cause parasitic reactance when they are not used.
  • the third switch 45 is opened if one of the ports on that unit is selected by means of closing its associated MEMS switch 10. If neither switch 10 is selected, the third switch 45 is closed, and the signal is routed to the next SU.
  • the MEMS switches 10 are preferably disposed in a circular arrangement around central point 7. Note that in this embodiment the switches 10, 45 also preferably lie on an imaginary circle, here again identified by the letter B. Note also that the switches 10, 45 and segment 46 are preferably arranged equidistant ly along the circumference identified by the letter B.
  • the first portion refers to the element type (a MEMS switch in this case) and the second portion (the 2 in this case) refer to a particular one of those elements (a second MEMS switch 10 in this case).
  • This numbering scheme is likely self-explanatory, but it is nevertheless here explained for the reader who might not have previously encountered it.
  • the MEM switches 10-1 ... 10-4 and 45 may be provided with integral impedance matching elements, such as capacitors, in order to increase the return loss to more than 20 dB. For that reason, the MEM switches disclosed by US Provisional Patent Application Serial Number filed and entitled "RF MEMS Switch with Integrated Impedance
  • One embodiment according to the present invention is a switch arrangement comprising plurality of MEMS switches arranged on a substrate about a central point, each MEMS switch being disposed on a common imaginary circle centered on the central point. Additionally, and each MEMS switch is preferably spaced equidistantly along the circumference of the imaginary circle. Connections are provided for connecting a RF port of each one of the MEMS switches with the central point.

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  • Waveguide Switches, Polarizers, And Phase Shifters (AREA)
  • Variable-Direction Aerials And Aerial Arrays (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
PCT/US2003/015479 2002-05-15 2003-05-14 A switch arrangement and method of making same Ceased WO2003098732A1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2004506117A JP2005526433A (ja) 2002-05-15 2003-05-14 スイッチ配列及びその製造方法
GB0424852A GB2404095B (en) 2002-05-15 2003-05-14 A switch arrangement and method of making same
AU2003232149A AU2003232149A1 (en) 2002-05-15 2003-05-14 A switch arrangement and method of making same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US38109902P 2002-05-15 2002-05-15
US60/381,099 2002-05-15

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JP (2) JP2005526433A (https=)
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US7298228B2 (en) 2007-11-20
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TW200402906A (en) 2004-02-16
GB0424852D0 (en) 2004-12-15
GB2404095A (en) 2005-01-19
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US20030227351A1 (en) 2003-12-11
AU2003232149A1 (en) 2003-12-02

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