WO2003067754A1 - Circuit de sortie et circuit melangeur - Google Patents

Circuit de sortie et circuit melangeur Download PDF

Info

Publication number
WO2003067754A1
WO2003067754A1 PCT/JP2003/001075 JP0301075W WO03067754A1 WO 2003067754 A1 WO2003067754 A1 WO 2003067754A1 JP 0301075 W JP0301075 W JP 0301075W WO 03067754 A1 WO03067754 A1 WO 03067754A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit
output
signal
mixer
differential
Prior art date
Application number
PCT/JP2003/001075
Other languages
English (en)
Japanese (ja)
Inventor
Tsuyoshi Koike
Hiroshi Miyagi
Original Assignee
Kabushiki Kaisha Toyota Jidoshokki
Niigata Seimitsu Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kabushiki Kaisha Toyota Jidoshokki, Niigata Seimitsu Co., Ltd. filed Critical Kabushiki Kaisha Toyota Jidoshokki
Publication of WO2003067754A1 publication Critical patent/WO2003067754A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14—Balanced arrangements
    • H03D7/1425—Balanced arrangements with transistors
    • H03D7/1441—Balanced arrangements with transistors using field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14—Balanced arrangements
    • H03D7/1425—Balanced arrangements with transistors
    • H03D7/1458—Double balanced arrangements, i.e. where both input signals are differential
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
    • H03D2200/0001—Circuit elements of demodulators
    • H03D2200/0033—Current mirrors

Definitions

  • the present invention relates to an output circuit and a mixer circuit that convert a differential input signal into a single signal.
  • a mixer circuit for a radio receiver is an example of a circuit that combines two input signals and outputs one signal, such as a differential amplifier.
  • the mixer circuit is, for example, a circuit that combines a carrier signal with a local signal having a predetermined frequency in order to convert a carrier signal that is a high frequency signal into an intermediate frequency signal.
  • a differential amplifier or the like is used as a mixer circuit for combining the two signals, such as the carrier signal and the oral signal, to obtain an intermediate frequency signal.
  • FIG. 1 is a diagram illustrating an example of a mixer circuit used in a radio receiver.
  • the mixer circuit includes a Gilbert cell circuit 51 surrounded by a broken line and a transformer connected to a differential output of the Gilbert cell circuit 51. 52.
  • the Gilbert cell circuit 51 in FIG. 1 is a generally known circuit capable of multiplication of four quadrants, and is composed of a FET (Fie Id—Effect Transistor) 53 and a FET 54.
  • the circuit has a configuration in which a source junction circuit and a circuit in which a source junction circuit composed of FET 55 and FET 56 and a source junction circuit composed of FET 57 and FET 58 are cross-connected are connected in series. That is, in the Gilbert cell circuit 51, the sources of the FET 53 and the FET 54 are commonly connected, and the power supply VDD is connected via the constant current circuit 59.
  • the drain of the FET 53 is connected to the common source of the FET 55 and the FET 56.
  • the drain of FET54 is connected to the common source of FET57 and FET58.
  • RF IN +> RF IN— in FIG. 1 and Lo IN +, Lo IN— indicate that the signal is 180 degrees out of phase, and the same applies to other drawings below.
  • the Gilbert cell circuit 51 in FIG. 1 is an ordinary Gilbert cell circuit constituted by an FET.
  • This mixer circuit outputs, via the transformer 52, an intermediate frequency signal obtained by multiplying the difference between the carrier signal and the difference between the local signals.
  • the signals output from the Gilbert cell circuit 51 are signals having phases opposite to each other, and the respective signals are sent to the transformer 52.
  • the transformer 52 combines the signals output from the Gilbert cell circuit 52 and outputs a single signal from one terminal of the secondary coil.
  • the mixer circuit having the above configuration is a double-balanced mixer circuit in which both the RF signal and the oral signal are balanced inputs, and the output signal of the mixer circuit has a single intermediate frequency via the transformer 52. Output as signal IF. Then, the transformer 52 outputs the sum frequency and the difference frequency of the RF signal and the local signal. The frequency of this sum or difference is selected in the filter after the mixer circuit and sent to the I-amp or the like.
  • the mixer circuit having the above configuration has the following problems.
  • the transformer 52 When the output of the Gilbert cell circuit 51 was output as a single-ended signal, the transformer 52 was used, so that the entire circuit was large. In other words, there is a limit to the miniaturization of the transformer 52, and it is difficult to form the transformer 52 on a semiconductor chip. Also, the circuit area There was also a problem that the cost increased as the size increased.
  • the output of the Gilbert cell circuit is phase-combined by a conversion circuit using a current mirror circuit composed of FET, and single-ended output is performed.
  • the single-ended output circuit can be configured on a semiconductor chip by enabling single-ended output using a conversion circuit that uses a current mirror circuit.
  • FIG. 2 is a diagram illustrating a mixer circuit using a current mirror circuit in a> radio receiver.
  • the mixer circuit includes a Gilbert cell circuit 61 surrounded by a broken line and a conversion circuit 62 connected to a differential output of the Gilbert cell circuit 61.
  • the Gilbert cell circuit 61 has almost the same configuration as the Gilbert cell circuit 51 in FIG. 1, except that the current mirror circuit 63 is connected to the differential output of the Gilbert cell circuit 51. Is different.
  • the conversion circuit 62 is composed of P-channel type FETs 64 and FET 65 and N-channel type FETs 66 and FET 67, and the differential output signal output from the Gilbert cell circuit 61 is provided. To a single output signal.
  • the conversion circuit 62 combines the differential output signals output from the Gilbert cell circuit 61 as in the transformer 52 in FIG. 1, and outputs the combined signal as the intermediate frequency signal IF. As described above, when the differential output signal output from the Gilbert cell circuit 61 is output at the single end, the conversion circuit 62 using the power-rent mirror circuit constituted by the FET is used.
  • the output circuit can be configured on a semiconductor chip, and the entire circuit can be reduced in size.
  • the mixer circuit shown in Fig. 2 has the following problems.
  • the FETs that make up the conversion circuit 62 respond to changes in the voltage of the output signal.
  • the output impedance of the FET itself also changes, resulting in a problem that the output signal is distorted.
  • an output circuit that outputs a differential output signal as a single output signal has a problem in that when the output signal is extracted using a transformer, the cost / the circuit area increases.
  • the output impedance changes due to fluctuations in the output voltage, and thus the output signal waveform may be distorted.
  • an object of the present invention is to provide an output circuit and a mixer circuit which convert a differential signal into a single signal and output the signal, the cost and circuit area are small, and the output waveform is less distorted.
  • the output circuit of the present invention is an output circuit that converts a differential signal output from the differential circuit into a single signal and outputs the single signal, and converts the differential signal output from the differential circuit into a single signal.
  • the configuration includes a conversion circuit for converting and an output impedance converter connected in parallel to an output stage of the conversion circuit.
  • the conversion circuit is, for example, a conversion circuit using a current mirror circuit composed of FET, and an output impedance converter is provided in parallel at a stage subsequent to FET at the output stage.
  • the output impedance converter is, for example, a voltage-dividing resistor.
  • the above current mirror circuit is mounted on a semiconductor chip such as a FET or transistor. Therefore, the cost and the circuit area can be reduced.
  • the differential circuit of the output circuit may be configured as a differential amplifier that amplifies a difference between the voltage values of a pair of input signals.
  • the output impedance of the FET can be reduced and the amplitude of the output signal can be set to a desired value. Therefore, distortion of the output signal can be reduced.
  • the mixer circuit of the present invention is a mixer circuit which obtains an output signal by multiplying a first input signal and a second input signal, wherein the first input signal and the second input signal are , A conversion circuit for converting a set of signals output from the multiplication circuit into a single signal, and an output impedance converter connected in parallel to an output stage of the conversion circuit.
  • the output impedance of the FET can be reduced, and the amplitude of the output signal can be set to a desired value.
  • distortion of the output signal can be reduced.
  • first input signal, the second input signal, and the output signal may be configured as a carrier signal, a low frequency signal, and an intermediate frequency signal.
  • the output impedance of the FET can be reduced and the amplitude of the intermediate frequency signal can be set to a desired magnitude, so that the distortion of the intermediate frequency signal can be reduced.
  • the output circuit or the mixer circuit may be configured to further include a common-source FET connected in parallel to a stage subsequent to the output impedance converter. In this way, by connecting a source-grounded FET in parallel after the output impedance converter in the conversion circuit, it is possible to reduce the output impedance while maintaining a constant amplitude.
  • the output impedance converter is a> voltage-dividing resistor.> The voltage-dividing resistor connects the differential signal output impedance to a stage subsequent to the output circuit or the mixer circuit.
  • the resistance value may be set so as to match the impedance of the circuit.
  • FIG. 1 is a diagram showing a conventional mixer circuit.
  • FIG. 2 is a diagram showing a mixer circuit using a conventional current mirror circuit.
  • FIG. 3 is a diagram showing a mixer circuit according to the embodiment of the present invention.
  • FIG. 4 is a diagram illustrating a configuration example of a receiver using the mixer circuit according to the embodiment of the present invention.
  • FIG. 5 is a diagram showing a circuit configuration of another embodiment of the present invention.
  • FIG. 6 is a diagram showing a circuit configuration of another embodiment of the present invention. BEST MODE FOR CARRYING OUT THE INVENTION
  • FIG. 3 is a diagram showing a configuration of the mixer circuit 11 according to the embodiment of the present invention.
  • the> mixer circuit 11 (mixer circuit) is connected to the Gilbert cell circuit 12 (differential circuit) surrounded by a broken line and the differential output of the Gilbert cell circuit 12. And a conversion circuit 13 (conversion circuit) using a current mirror circuit.
  • the Gilbert cell circuit 12 has almost the same configuration as the Gilbert cell circuit 61 in FIG. 2, and outputs a signal obtained by multiplying the first input signal S1 and the second input signal S2 as an output signal S3. I do.
  • the set of output signals S 3 output from the Gilbert cell circuit 12 is converted by the conversion circuit 13 into a single signal S 4.
  • the conversion circuit 13 is composed of a P-channel type FET 14 and FET 15 and an N-channel type FET 16 and FET 17, and converts the differential output signal of the Gilbert cell circuit 12 into a single output signal. Is converted to The FET constituting the Gilbert cell circuit 12 is desirably a P-channel FET in order to suppress noise in the input signal, and the Gilbert cell circuit and the amplifying circuit described in other embodiments below are also used. The same is true.
  • the currents flowing through the FETs 15 and 17 are reduced by the resistors 18 and 19 connected in parallel to the FETs 15 and 17 on the output stage side of the conversion circuit 13, and the currents flowing through the FETs 15 and 17 are reduced. Due to fluctuations in the output voltage Output impedance fluctuation is reduced. As a result, the change in the amplitude of the voltage waveform of the output signal is reduced, an output signal having a power supply voltage that is not limited to the power supply voltage is obtained, and an output signal with less distortion can be obtained.
  • each of the resistors 18 and 19 should be smaller than the output impedance of each of the FET 15 and FET17.
  • the current flowing through the FETs 15 and 17 can be reduced by reducing the resistance values of the resistors 18 and 19, and an output signal with less distortion can be obtained.
  • the resistance values of the resistors 18 and 19 are too small, the output signal will have a small amplitude. The current flowing through the FETs 15 and 17 will be suppressed, and the output signal with a small amplitude will be output.
  • each of the resistors 18 and 19 It is necessary to set the resistance value of each of the resistors 18 and 19 to be smaller than the output impedance value of each of the FETs 15 and 17 so as not to make it impossible. That is, it is desirable that the resistances 18 and 19 be appropriately determined in consideration of the gain and the like in the conversion circuit 13 so that the amplitude of the output signal becomes a desired value.
  • the mixer circuit 11 as a mixer circuit used in a receiver for obtaining an intermediate frequency by multiplying a carrier signal and a local signal.
  • FIG. 4 is a diagram illustrating a configuration example of a receiver in which the mixer circuit 11 is used.
  • 2 1 is an antenna
  • 2 2 is an RF (Radio Frequency).
  • ncy) filter is an RF amplifier
  • 23 is an RF amplifier
  • 24 is a local oscillator
  • 25 is an IF (Intermediate Frequency) filter
  • 26 is an IF amplifier
  • 27 is a signal processing section. Is shown.
  • the carrier signal first input signal
  • the signal is removed by the RF filter 22 and then amplified by the RF amplifier 23.
  • the amplified carrier signal is input to the mixer circuit 11, where it is mixed with the local signal (second input signal) output from the local oscillator 24 in the mixer circuit 11, and the intermediate frequency signal (output signal) Is output as Then, the intermediate frequency signal is amplified by an IF amplifier 26 after an extra signal is removed by an IF filter 25, and is subjected to digital processing and detection processing in a signal processing unit 27.
  • the resistance of the resistor 18 and the resistor 19 connected in parallel to the FET on the output stage side of the conversion circuit 13 is set arbitrarily to prevent the output signal from becoming too small.
  • the mixer circuit 11 includes a signal wave (baseband signal) and a carrier wave at the transmitter side which are different from a mixer circuit that obtains an intermediate frequency signal by multiplying the carrier signal and the local signal at the receiver side.
  • the mixer circuit 11 may be a mixer circuit that outputs a mixed wave that is not limited to a signal output by a mixer circuit used in a receiver and a transmitter.
  • FIG. 5 is a diagram showing a configuration of a mixer circuit 31 according to another embodiment, in which a source follower circuit is provided after the resistor of the conversion circuit 13 in FIG.
  • the mixer circuit 31 in FIG. 5 is almost the same as the mixer circuit 11 in FIG. 3, and includes a Gilbert cell circuit 12 and a conversion circuit 32 using a current mirror circuit.
  • the difference from the mixer circuit 11 in FIG. 3 is that the resistors 33 and 34 for preventing distortion of the output signal S3 multiplied by the first input signal S1 and the second input signal S2.
  • a source follower circuit source-grounded FET
  • the conversion circuit 13 of the mixer circuit 11 in FIG. 3 and the conversion circuit 3 2 of the mixer circuit 31 in FIG. 5 an output circuit for synthesizing a differential signal to obtain a single signal S 4)
  • the output impedance can be reduced by providing a voltage-dividing resistor in parallel after the FET in the output stage of the conversion circuit 32, so that an output signal with less distortion can be obtained.
  • a source follower circuit common source FET
  • FIG. 6 is a diagram illustrating a configuration of an output circuit when the Gilbert cell circuit 12 in FIG. 3 is a differential amplifier circuit.
  • reference numeral 41 denotes a differential amplifier circuit (differential amplifier), and reference numeral 42 denotes a conversion circuit using a current mirror circuit.
  • the differential amplifier circuit 41 includes FETs 43 and 44, a constant current circuit 45, a current mirror circuit 46, and a current mirror circuit 47.
  • the FET 43 and the FET 44 are connected in common at their respective sources, and are connected to the power supply VDD via the constant current circuit 45.
  • the drains of the FET 43 and the FET 44 are connected to the current mirror circuit 46 and the current mirror circuit 47, respectively, and are also connected to the conversion circuit 42.
  • the conversion circuit 42 has a circuit configuration similar to that of the conversion circuit 13 in FIG. 3, and the operation is the same.
  • the output circuit in FIG. 6 outputs a composite signal S7 obtained by phase-synthesizing the differential signal from the conversion circuit 42.
  • the conversion circuit 42 can reduce distortion of the combined signal S7 by using the resistors 48 and 49 connected in parallel to the FET on the output stage side. Become.
  • the output circuit in FIG. 6 has not only a form in which voltage-dividing resistors (resistors 4.8 and 49) are connected in parallel to the FET on the output stage side of the conversion circuit 42, but also a common source A configuration in which the resistors are connected in parallel after the resistors may be used.
  • the signal input to the mixer circuit or the differential amplifier circuit is a single signal. You may use it.
  • the output circuit and the mixer circuit of the present invention since the voltage-dividing resistor is connected in parallel at the subsequent stage of the conversion circuit including the FET, the output impedance is reduced, and an output signal with less distortion can be obtained. It becomes possible.
  • the output circuit is constituted by FET, it is possible to reduce cost and circuit area.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)
  • Superheterodyne Receivers (AREA)

Abstract

Il est difficile de miniaturiser un circuit de sortie classique permettant d'émettre un signal unique converti à partir d'un signal différentiel en raison de l'utilisation d'un transformateur. Une constitution comprenant un circuit miroir de courant implique un signal unique contraint en raison de son impédance de sortie élevée. En vue de résoudre ces problèmes, l'invention concerne un circuit de conversion (13) transformant un signal différentiel émis à partir d'un circuit différentiel (12) en un signal unique et un convertisseur d'impédance de sortie (résistances (18, 19)) relié en parallèle avec l'étage de sortie du circuit de conversion (13)..
PCT/JP2003/001075 2002-02-08 2003-02-03 Circuit de sortie et circuit melangeur WO2003067754A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2002032967A JP2003234620A (ja) 2002-02-08 2002-02-08 出力回路及びミキサ回路
JP2002-032967 2002-02-08

Publications (1)

Publication Number Publication Date
WO2003067754A1 true WO2003067754A1 (fr) 2003-08-14

Family

ID=27677988

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2003/001075 WO2003067754A1 (fr) 2002-02-08 2003-02-03 Circuit de sortie et circuit melangeur

Country Status (3)

Country Link
JP (1) JP2003234620A (fr)
TW (1) TW200303119A (fr)
WO (1) WO2003067754A1 (fr)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000151287A (ja) * 1998-11-10 2000-05-30 Rohm Co Ltd ダブルバランスドミキサ回路
JP2000252768A (ja) * 1998-12-28 2000-09-14 Nec Corp 演算増幅器
JP2001156549A (ja) * 1999-11-26 2001-06-08 Sony Corp 高周波ミキサ回路
JP2001260358A (ja) * 2000-03-17 2001-09-25 Nec Corp インクジェット記録ヘッドの駆動装置及びその方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000151287A (ja) * 1998-11-10 2000-05-30 Rohm Co Ltd ダブルバランスドミキサ回路
JP2000252768A (ja) * 1998-12-28 2000-09-14 Nec Corp 演算増幅器
JP2001156549A (ja) * 1999-11-26 2001-06-08 Sony Corp 高周波ミキサ回路
JP2001260358A (ja) * 2000-03-17 2001-09-25 Nec Corp インクジェット記録ヘッドの駆動装置及びその方法

Also Published As

Publication number Publication date
TW200303119A (en) 2003-08-16
JP2003234620A (ja) 2003-08-22

Similar Documents

Publication Publication Date Title
US7676212B1 (en) Signal mixer having a single-ended input and a differential output
US5945878A (en) Single-ended to differential converter
US6704560B1 (en) Low-voltage transconductance amplifier/filters
JP4985978B2 (ja) 変換回路
US7057426B2 (en) Frequency converter, orthogonal demodulator and orthogonal modulator
KR20080074336A (ko) 신호 변환기, 신호 변환 보상방법, 신호 변환기를 포함하는 rf 수신기, 및 rf신호 수신 방법
US6388502B2 (en) Semiconductor integrated circuit
US7603091B2 (en) Hybrid balun apparatus and receiver comprising the same
US7627303B2 (en) Signal downconverter
US7834703B2 (en) Amplifier with single-ended input and differential output
CN117526946A (zh) 一种对数转换电路和芯片
US7227406B2 (en) Differential amplifier for balanced/unbalanced converter
US7298203B2 (en) Amplification system capable of reducing DC offset
JP3476318B2 (ja) 周波数変換器およびこれを用いた無線受信機
US8461900B2 (en) Frequency converting circuit, signal processing circuit and receiver
WO2003067754A1 (fr) Circuit de sortie et circuit melangeur
US20100219875A1 (en) Mixer Capable of Improving Signal Quality
JP3392679B2 (ja) 周波数変換器およびこれを用いた無線受信機
US20030064698A1 (en) Linearization apparatus for mixer
KR100689614B1 (ko) 초광대역 무선 통신 시스템의 수신 장치 및 이를 이용한신호 변환 방법
US20080061887A1 (en) Apparatus for converting single-ended signal into differential signal
US20050140402A1 (en) Frequency converter
US20040116095A1 (en) High dynamic range radio frequency mixer
WO2011027387A1 (fr) Amplificateur
CN111654245A (zh) 一种低噪声放大器

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): CN KR US

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): DE FR GB NL

121 Ep: the epo has been informed by wipo that ep was designated in this application
122 Ep: pct application non-entry in european phase