WO2003043092A2 - Ohmsche kontaktstruktur und verfahren zu deren herstellung - Google Patents
Ohmsche kontaktstruktur und verfahren zu deren herstellung Download PDFInfo
- Publication number
- WO2003043092A2 WO2003043092A2 PCT/DE2002/004178 DE0204178W WO03043092A2 WO 2003043092 A2 WO2003043092 A2 WO 2003043092A2 DE 0204178 W DE0204178 W DE 0204178W WO 03043092 A2 WO03043092 A2 WO 03043092A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- semiconductor material
- concentration
- contact layer
- metallization
- ohmic contact
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims description 18
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 239000004065 semiconductor Substances 0.000 claims abstract description 70
- 239000000463 material Substances 0.000 claims abstract description 40
- 238000001465 metallisation Methods 0.000 claims abstract description 26
- 239000002184 metal Substances 0.000 claims description 12
- 239000002800 charge carrier Substances 0.000 claims description 5
- 150000002736 metal compounds Chemical class 0.000 claims description 4
- -1 nitride compound Chemical class 0.000 claims 4
- 229910002704 AlGaN Inorganic materials 0.000 claims 2
- 229910001092 metal group alloy Inorganic materials 0.000 claims 2
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
- 230000004888 barrier function Effects 0.000 description 6
- 239000000370 acceptor Substances 0.000 description 4
- 230000008569 process Effects 0.000 description 3
- 238000000137 annealing Methods 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000001004 secondary ion mass spectrometry Methods 0.000 description 2
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 238000007725 thermal activation Methods 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/452—Ohmic electrodes on AIII-BV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
- H01L33/325—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen characterised by the doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
Definitions
- the present invention relates to an ohmic contact structure between a metallization and a semiconductor material according to the preamble of claim 1 and a method for producing such an ohmic contact structure according to the preamble of claim 12.
- contacts made of metal are generally used, which should have the lowest possible contact resistance between the metallization and the semiconductor material.
- Such metal-semiconductor contacts are usually referred to as ohmic contacts.
- the height of the interface barrier is determined, among other things, by the work function of the metal or the alloy formed after contact annealing and by interface conditions, which determine the Fermi level depending on the density and the electronic occupation. Thin layers of insulation between the semiconductor material and the metal, e.g. due to inadequate cleaning prior to metallization, can have an additional impact on the interface barrier.
- the minority charge carriers i.e. the holes
- the minority charge carriers can be lifted over the interface barrier by thermal activation, on the other hand they can tunnel through this interface barrier.
- the tunnel mechanism depends exponentially on the width of this interface barrier, which in turn is determined by the width of the space charge zone in the semiconductor material.
- this width of the space charge zone is determined by the net concentration of the acceptors (i.e. the acceptor concentration minus the donor concentration). The higher this net concentration, the higher the negative space charge density and the smaller the width of the space charge zone.
- GaN As a semiconductor material has increased in recent years. In particular, meanwhile
- the ohmic contact structure according to the invention between a metallization and a semiconductor material is characterized in that the semiconductor material has a contact layer with a first partial region bordering on the metallization and a second partial region adjoining the first partial region, the doping being greater in the first partial region than in the second partial region is.
- the invention is based on the finding that the electronic occupation of the defects in the vicinity of the surface of a semiconductor material does not match that within the semiconductor layer. Rather, in the vicinity of the semiconductor surface, the doping concentration required for a maximum concentration of negative space charges is shifted in comparison to the doping concentration for a maximum hole concentration in the interior of the semiconductor layer. To ensure the lowest possible contact between the To achieve the semiconductor layer and the metallization, a mostly significantly different doping concentration must be selected in the vicinity of the contact area than it is considered optimal in the interior of the semiconductor layer, so that a smaller width of the space charge zone and thus a lower tunnel and thus contact resistance is achieved. Below this contact layer, the semiconductor layer can then be optimized for other properties regardless of the need for a lower specific contact resistance.
- the doping concentration in the first partial region of the contact layer of the semiconductor material is preferably chosen to be higher than the doping concentration which leads to maximum conductivity within the semiconductor material.
- the semiconductor material is GaN doped with Mg.
- the Mg concentration in the first partial region of the contact layer of the semiconductor material is preferably greater than or equal to 3 ⁇ 10 19 cm “3 and is particularly preferably between 3 ⁇ 10 19 cm “ 3 and 5 ⁇ 10 20 cm “3 inclusive.
- a metal or a metal compound with a work function as high as possible of at least 4.0 eV for the metallization it is advantageous to choose a metal or a metal compound with a work function as high as possible of at least 4.0 eV for the metallization.
- Such an ohmic contact structure can be used in particular for semiconductor components such as light-emitting diodes or laser diodes.
- Figure 1 is a schematic representation of an ohmic contact structure according to the present invention.
- FIG. 2 shows a diagram to illustrate the doping concentration in the semiconductor layer of the ohmic
- the contact structure shown in FIG. 1 between a semiconductor material 10 and a metallization 14 has a contact area 16 between the semiconductor material 10 and the metallization 14 and a formed contact layer with a first partial region 12 and a second partial region 18.
- the semiconductor material is GaN, which is formed by means of a MOVPE (Metal Organic Vapor Phase Epitaxy) method and is doped with Mg.
- MOVPE Metal Organic Vapor Phase Epitaxy
- the present invention is not limited only to this selection of materials, but rather that the knowledge of the present invention can also be applied to any other semiconductor materials.
- the Mg doping concentration Ni in the interior of the semiconductor layer 10 is preferably 2 ⁇ 10 19 cm "3. This concentration leads to a maximum concentration of the free charge carriers (here holes) and thus to a maximum conductivity in the semiconductor layer 10. This optimal value is based on the knowledge already mentioned in the introduction to the description.
- the optimal doping concentration in the area of the semiconductor surface is different from the optimal doping concentration N x in the interior of the semiconductor Layer 10 usually deviates significantly, a region 12 is formed in the semiconductor layer 10 in the vicinity of the contact area 16 to be formed, which has a different doping concentration N 2 , which is greater than the optimal doping concentration in the interior of the semiconductor layer.
- the optimal doping concentration N 2 in this partial region 12 of the contact layer lies above the optimal doping concentration Ni in the interior of the semiconductor layer 10 and is preferably more than 3 ⁇ 10 19 cm 3.
- a minimal contact resistance of the ohmic contact structure could a Mg concentration between about 3 x 10 19 cm “3 and 5 x 10 20 cm " 3 can be achieved
- the following table shows the results of investigations which were achieved with a p-doped GaN semiconductor with different Mg concentrations N 2 in the region 12 of the contact layer bordering on the metallization.
- the Mg concentration N 2 in this area was determined using SIMS (Secondary Ion Mass Spectroscopy), the hole concentration p 2 using HALL measurements and the specific contact resistance R c using C-TLM (Circular Transmission Line Method).
- SIMS Secondary Ion Mass Spectroscopy
- the hole concentration p 2 using HALL measurements
- R c Chemical Transmission Line Method
- the ohmic contact structure of the present invention can be combined with any cleaning method of the semiconductor surface before the metallization and with any annealing processes after the metallization process.
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003544820A JP2005510062A (ja) | 2001-11-12 | 2002-11-12 | 電気的に励起した多結晶ZnOレーザ及び加工方法 |
EP02792590A EP1449259A2 (de) | 2001-11-12 | 2002-11-12 | Ohmsche kontaktstruktur und verfahren zu deren herstellung |
US10/495,620 US20050042864A1 (en) | 2001-11-12 | 2002-11-12 | Ohmic contact structure and method for the production of the same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10155442A DE10155442A1 (de) | 2001-11-12 | 2001-11-12 | Ohmsche Kontaktstruktur und Verfahren zu deren Herstellung |
DE10155442.7 | 2001-11-12 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2003043092A2 true WO2003043092A2 (de) | 2003-05-22 |
WO2003043092A3 WO2003043092A3 (de) | 2003-10-02 |
Family
ID=7705435
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2002/004178 WO2003043092A2 (de) | 2001-11-12 | 2002-11-12 | Ohmsche kontaktstruktur und verfahren zu deren herstellung |
Country Status (7)
Country | Link |
---|---|
US (1) | US20050042864A1 (de) |
EP (1) | EP1449259A2 (de) |
JP (1) | JP2005510062A (de) |
CN (1) | CN100380677C (de) |
DE (1) | DE10155442A1 (de) |
TW (1) | TWI307166B (de) |
WO (1) | WO2003043092A2 (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8581280B2 (en) | 2006-01-27 | 2013-11-12 | Osram Opto Semiconductors Gmbh | Optoelectronic semiconductor chip |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2013035817A1 (ja) * | 2011-09-08 | 2013-03-14 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10017758A1 (de) * | 1999-06-08 | 2000-12-21 | Agilent Technologies Inc | Verfahren zum Bilden von transparenten Kontakten an einer p-Typ-GaN-Schicht |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0942459B1 (de) * | 1997-04-11 | 2012-03-21 | Nichia Corporation | Wachstumsmethode für einen nitrid-halbleiter |
-
2001
- 2001-11-12 DE DE10155442A patent/DE10155442A1/de not_active Withdrawn
-
2002
- 2002-11-11 TW TW091133048A patent/TWI307166B/zh not_active IP Right Cessation
- 2002-11-12 JP JP2003544820A patent/JP2005510062A/ja active Pending
- 2002-11-12 EP EP02792590A patent/EP1449259A2/de not_active Withdrawn
- 2002-11-12 US US10/495,620 patent/US20050042864A1/en not_active Abandoned
- 2002-11-12 WO PCT/DE2002/004178 patent/WO2003043092A2/de active Application Filing
- 2002-11-12 CN CNB028224078A patent/CN100380677C/zh not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10017758A1 (de) * | 1999-06-08 | 2000-12-21 | Agilent Technologies Inc | Verfahren zum Bilden von transparenten Kontakten an einer p-Typ-GaN-Schicht |
Non-Patent Citations (2)
Title |
---|
ISHIKAWA H ET AL: "EFFECTS OF SURFACE TREATMENT AND METAL WORK FUNCTIONS ON ELECTRICALPROPERTIES AT P-GAN/METAL INTERFACES" JOURNAL OF APPLIED PHYSICS, AMERICAN INSTITUTE OF PHYSICS. NEW YORK, US, Bd. 81, Nr. 3, 1. Februar 1997 (1997-02-01), Seiten 1315-1322, XP000659459 ISSN: 0021-8979 in der Anmeldung erwähnt * |
KAUFMANN U ET AL: "HOLE CONDUCTIVITY AND COMPENSATION IN EPITAXIAL GAN:MG LAYERS" PHYSICAL REVIEW, B. CONDENSED MATTER, AMERICAN INSTITUTE OF PHYSICS. NEW YORK, US, Bd. 62, Nr. 16, 15. Oktober 2000 (2000-10-15), Seiten 10867-10872, XP001090924 ISSN: 0163-1829 in der Anmeldung erwähnt * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8581280B2 (en) | 2006-01-27 | 2013-11-12 | Osram Opto Semiconductors Gmbh | Optoelectronic semiconductor chip |
EP1977457B1 (de) * | 2006-01-27 | 2018-05-09 | OSRAM Opto Semiconductors GmbH | Optoelektronischer halbleiterchip |
Also Published As
Publication number | Publication date |
---|---|
CN100380677C (zh) | 2008-04-09 |
JP2005510062A (ja) | 2005-04-14 |
WO2003043092A3 (de) | 2003-10-02 |
EP1449259A2 (de) | 2004-08-25 |
CN1586011A (zh) | 2005-02-23 |
DE10155442A1 (de) | 2003-05-28 |
TWI307166B (en) | 2009-03-01 |
US20050042864A1 (en) | 2005-02-24 |
TW200300606A (en) | 2003-06-01 |
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