Classifications

• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
  • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
  • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
  • H05K3/3447—Lead-in-hole components
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
  • H05K2201/09—Shape and layout
  • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
  • H05K2201/099—Coating over pads, e.g. solder resist partly over pads
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
  • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
  • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
  • H05K3/3452—Solder masks
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
  • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
  • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
  • H05K3/3457—Solder materials or compositions; Methods of application thereof
  • H05K3/3463—Solder compositions in relation to features of the printed circuit board or the mounting process

Definitions

• Circuit board Electronic device using the same, and method of selecting circuit board
• the present invention relates to a circuit board, an electronic device using the same, and a method of selecting a circuit board.
• the present invention relates to a circuit board for mounting an insertion-type electronic component using lead-free solder, and an electronic device and a circuit using the same.
• the present invention relates to a method for sorting substrates. Background art
• FIG. 15 is a perspective view of a soldered portion where an electronic component is mounted on a circuit board
• FIG. 16 is a cross-sectional view taken along the line bb ′ of FIG.
• the conventional circuit board 11 is made of a paper base, glass base, polyester fiber base, etc., on an insulating sheet impregnated with epoxy resin, phenol resin, etc.
• a through-hole is formed at a desired portion of the substrate, and a catalyst is applied to a side surface of the through-hole, and then a base plate is formed by electroless copper plating.
• a conductor is formed by electrolytic copper plating thereon, and the conductor and the copper film on the surface of the copper-clad laminate substrate are joined to form a through hole 4.
• the land 2 is formed by etching the conductive film made of copper on the surface of the copper-clad multilayer substrate.
• a circuit board 11 is formed by printing and applying a solder resist 5 so that the tin-lead solder 12 does not adhere to portions other than the land 2 where soldering is performed, and then exposing the solder resist 5 to light.
• the solder resist 5 has a role of protecting the circuit 7 other than the land 2 on which the lead 3 is mounted.
• the solder resist 5 on the circuit board 11 is printed so as to be larger than the area of the land 2 so that the solder resist 5 does not cover the land 2. Have been.
• solder resist 5 is applied to the land 2 in the soldering using the tin-lead eutectic solder (Sn 63 wt%, balance Pb), which is currently used most frequently for soldering electronic devices. This is because the formation of the fillet 12a of the tin-lead solder 12 is inhibited.
• the land 2 is also formed as small as possible within the range where the minimum bonding strength can be secured.
• the tin-lead eutectic solder plays a role of relaxing the stress of the thermal expansion mismatch caused by the joining of different substances, so that the reliability is improved. Above, there was no particular problem.
• This lead-free solder is mainly composed of tin and is composed of silver, copper, zinc, bismuth, indium, antimony, nickel, germanium, etc.
• Pb_63Sn eutectic solder
• the melting temperature of tin-lead eutectic solder is 183 ° C compared to that of tin-lead eutectic solder, which is 190 ° C. ° C to 230 ° C.
• solders are tin-zinc-based solder (Sn—9.0 wt% Zn, which is a eutectic composition of tin-zinc, and the amount of zinc is changed or other elements are added.
• the solders with improved properties are collectively referred to as tin-zinc solders.
• Typical examples are Sn- 8. OZn-3.0 Bi) and tin-copper-based solder (tin-copper solder).
• Tin-copper-based solder with its eutectic composition of Sn—0.7 wt% Cu, whose properties are improved by changing the amount of copper or adding other elements ; It is possible to change the amount of silver around Sn — 0.7 Cu-0.3 Ag) or tin-silver solder (Sn — 3.5 wt% Ag, which is the eutectic composition of tin-silver). Or tin-silver solders whose properties have been improved by adding other elements are collectively referred to as Sn-3.0Ag-0.5Cu, Sn-3.5A. g-0.75 Cu).
• tin-zinc solder has the advantage of a low melting point of around 19 Ot: around 0.01 Ot, it tends to be oxidized, so soldering must be performed in an inert atmosphere or in a vacuum, and workability is poor. There is a problem of bad.
• Tin-copper and tin-silver solders have less problems with oxidation. Tin-copper solders have a high melting temperature of about 230 ° C, and have the disadvantage that lands are liable to peel off. I have.
• the melting point of tin-silver solder is about 220 ° C, which is lower than that of tin-copper solder.
• Bi bismuth
• the melting point can be lowered to about 205 ° C. .
• the melting point can be lowered by increasing the amount of bismuth added, but it has the drawback that if the amount of bismuth added is increased, the filet peels off.
• the glass transition temperature of the epoxy-based material which is the main material of the circuit board, is 125 to 140, and the difference in solidification shrinkage temperature is wider than that of the tin-lead solder, and it is applied to the joint of lead-free solder Stress increases. From the metal characteristics of such lead-free solder, it is clear that land insertion, which hardly occurs with tin-lead solder 12, occurs frequently when tin-lead solder 6 is used for solder mounting using a conventional circuit board 11 It became.
• FIG. 17 is a cross-sectional view schematically showing a state in which land peeling has occurred.
• the first Fig. 8 is a view showing the occurrence of land peeling confirmed in the verification experiment, and is a cross-sectional photograph of the part B (left-right inversion) in Fig. 17.
• the present invention has been made in view of the above problems, and a main object of the present invention is to provide a high-reliability circuit board which does not cause land peeling even if lead-free solder is used. To provide.
• Another object of the present invention is to provide a highly reliable electronic device using the circuit board. Disclosure of the invention
• the present invention provides a circuit board having a circuit wiring on a front surface and a back surface, the circuit board having a through hole into which a conductive member of an electronic component is inserted; Wherein the conductive member and the land are mounted using lead-free solder, and wherein the lead-free solder fillet is formed on the land. And a solder resist formed so as to cover at least a part of an end portion. The fillet is formed in at least a part of an area of the solder resist. Of the solder resist is smaller than the opening radius of the solder resist.
• the solder register is formed so as to cover an end of the land outer peripheral end on a side connected to a circuit formed on the circuit board.
• the solder resist is formed so as to cover an end of the outer peripheral end of the land on a side facing a side connected to a circuit formed on the circuit board.
• the shape of the land include a circle, an oval, a polygon, a cross, and a star.
• a sub-brand is formed at a connection portion between the land and a circuit formed on the circuit board.
• the lead-free solder include tin-zinc-based solder, tin-silver-based solder, and tin-copper-based solder.
• the present invention also provides a circuit board having circuit wiring on a front surface and a back surface, the circuit board having a through hole into which a conductive member of an electronic component is inserted, and the through hole having a land covered with a conductive film.
• the glass transition temperature of the circuit board is T g
• the linear expansion coefficient at a temperature lower than the glass transition temperature in the substrate thickness direction is ⁇ 1
• the linear expansion coefficient at the glass transition temperature in the substrate thickness direction or higher is ⁇ 2
• the lead-free solder is a tin-zinc-based solder, a tin-silver-based solder, or a tin-copper-based solder.
• the electronic device of the present invention is one in which an electronic component is inserted and mounted with a lead-free solder on the circuit board having the above configuration.
• the present invention relates to a circuit board having a circuit wiring on a front surface and a back surface, the circuit board having a through hole into which a conductive member of an electronic component is inserted, and the through hole is covered with a conductive film.
• Circuit board with land That is, it is applied to double-sided boards and multilayer boards.
• lead-free solder may include lead as an impurity to the extent that its properties do not change.
• the land 2 formed on the surface of the circuit board 1 by an etching method or the like (regardless of the land forming method).
• a through hole is formed at the center of the land 2 for inserting and mounting a lead (which will be a conductive member) 3 of an electronic component, and the surface of the through hole is plated to form a land 2 on the surface of the circuit board 1.
• through holes 4 are formed, and solder resist 5 is printed and applied so that lead-free solder 6 is not attached to the parts other than the land 2 where soldering is to be performed last, and then exposed to light.
• the solder resist 5 should be applied to the entire circumference or a part of the land end 2a, so that the radius of the fillet is equal to or smaller than the solder-resist opening radius. By doing so, it is possible to prevent the lead-free solder 6 from spreading to the land end 2 and prevent the solder fillet 6a from being formed to the land end 2a.
• the solder fillet 6a is formed inside the land end 2a, the solder fillet 6a when the lead-free solder 6 shrinks is formed.
• the force that repels the thermal contraction of the circuit board 1, which is generated by the relationship between the tension in the diagonally upward direction and the solder fillet formation angle, is not the land end 2a that has the weakest adhesion to the circuit board.
• the land 2 can be hardly peeled off.
• the land end 2a is not fixed by the lead-free solder 6, there is an effect that the land 2 can easily follow the circuit board 1 due to thermal expansion and contraction.
• the circuit 7 can be disconnected even when it is manufactured using lead-free solder 6 that is easily affected by mismatch of the thermal expansion coefficient due to high melting temperature. Land peeling can be suppressed. As a result, there is an effect that a sufficiently reliable electronic device can be manufactured even when the lead-free solder 6 is used.
• FIG. 1 is a perspective view showing a first embodiment of a circuit board of the present invention
• FIG. 2 is a cross-sectional view showing a first embodiment of the circuit board of the present invention
• FIG. It is a plan view showing a second embodiment of the present invention
• FIG. 4 is a plan view showing a third embodiment of the present invention.
• FIG. 5 is a plan view showing a fourth embodiment of the present invention.
• FIG. 6 is a plan view showing another structure of the fourth embodiment of the present invention
• FIG. 7 is a plan view showing another structure of the fourth embodiment of the present invention
• FIG. 9 is a plan view showing another structure of the fourth embodiment of the present invention
• FIG. 9 is a plan view showing another structure of the fourth embodiment of the present invention. Is a cross-sectional photograph showing the occurrence of manufacturing defects in the conventional configuration example based on the experimental data in Table 1.
• FIG. 11 is a partially enlarged view of FIG. 10,
• FIG. 12 is a cross-sectional photograph showing the effect of the first embodiment of the present invention based on the experimental data in Table 1,
• FIG. 13 is a diagram showing the incidence rate of land peeling failure according to the fifth embodiment of the present invention.
• Figure 14 shows the relationship between the calculation results in Table 2 and the rate of land peeling based on experimental data.
• FIG. 15 is a perspective view showing a configuration example of a conventional circuit board.
• FIG. 16 is a cross-sectional view showing a configuration example of a conventional circuit board.
• FIG. 17 is a cross-sectional view showing the occurrence of manufacturing defects when using a conventional circuit board configuration example.
• FIG. 18 is a cross-sectional photograph showing the occurrence of manufacturing defects when the conventional configuration example is used.
• FIG. 1 is a perspective view showing a state in which electronic components are mounted on a circuit board of the present invention
• FIG. 2 is a cross-sectional view taken along aa ′ of FIG.
• FIGS. 10 to 12 are diagrams for explaining the effects of the present embodiment. Note that the method of manufacturing the circuit board is the same as that of the conventional technology, and a description thereof will be omitted.
• the land end 2a is covered with the solder resist 5, and the radius of the fillet 6a is smaller than the opening radius of the solder resist 5. I made it.
• the solder fillet 6a is formed inside the land end 2a, and the tension in the diagonally upward direction along the solder fillet 6a when the lead-free solder 6 shrinks,
• the force that repels the thermal shrinkage of the circuit board 1 generated due to the relationship with the fillet forming angle is not the land 2a where the adhesion to the circuit board is weakest, but the land 2 that has a higher adhesion to the circuit board 1
• the land 2 can be prevented from peeling off because it hangs on the inside of the circuit board.Also, since the land end 2a is not fixed by the lead-free solder 6, the land 2 follows the thermal expansion and contraction of the circuit board 1. It will be easier. This makes it possible to suppress land peeling that occurs frequently in the lead-free solder 6. Next, the effect when electronic equipment was manufactured using the circuit board 1 of the present embodiment was verified. This will be explained specifically using the results (Table 1).
• FIG. 10 shows a cross-sectional photograph of the circuit board 11 indicated by an asterisk (20-cycle disconnection (C in Fig. 17)) in Table 1 in Table 1. Show. As shown in FIG. 10, the land 2 rises larger than the circuit board 11 and the circuit 7 connected to it rises greatly. Further, as can be seen from FIG. 11 showing the enlargement of the arrow D, the boundary between the land end 2a and the circuit 7 is greatly deformed. That is, it can be seen that the occurrence of land peeling causes the disconnection of the circuit 7, thereby significantly reducing the reliability of the electronic device.
• FIG. 12 shows a cross-sectional photograph (part A in FIG. 2) of the circuit board 1 of the present embodiment, which was tested under the same conditions.
• the circuit board 1 of the present embodiment no abnormality was particularly observed in the land 2, and it was confirmed that the configuration of the present embodiment was effective for land peeling.
• the conventional circuit board 11 in which land peeling frequently occurs is compared to the circuit board 1 of the present embodiment.
• the life to disconnection is short.
• the circuit board 1 of the present embodiment and the circuit board Electronic devices manufactured by using 1 can suppress the occurrence of land peeling that occurs frequently with lead-free solder, and can manufacture highly reliable electronic devices.
• the lower limit of the overlap between the land 2 and the solder resist 5 is basically that the solder resist opening range should be smaller than the land diameter so that the solder resist 5 covers the land end 2a.
• the width of the overlapping portion between the solder resist 2 and the solder resist 5 is preferably at least 0.01 mm, and more preferably at least 0.2 mm.
• the reason for this is that the lower limit of the overlap width is determined by the relationship between the margin and the stress at the time of exposure alignment, and when only the stress due to fillet formation is considered, the overlap of 0.01 mm or more is considered as land separation. This is preferable in order to prevent the occurrence of defects. However, considering the alignment accuracy at the time of exposure, it is more preferable that the overlap of 0.02 mm or more causes less production defects.
• the upper limit of the overlap width is determined so that a fillet can be formed and the solder-resist opening range becomes larger than the through-hole diameter.
• FIG. 3 is a plan view showing an example of a case where solder resists 5 are covered in units of columns on continually adjacent oval lands 8.
• a strip-shaped solder resist 5 is arranged to cross a central portion in the longitudinal direction of a plurality of oblong lands 8 arranged continuously.
• the solder resist 5 does not cover the land end 8 a in the short direction near the center in the longitudinal direction, but the circuit 7 is more susceptible to the thermal shrinkage of the lead-free solder 6.
• solder resist is covered only on the longitudinal land end 8b to which the wire is connected and the part opposite to it, and no solder-resist is formed on the other parts.
• solder resist Solder resist 5 is formed such that a plurality of oval lands 8 are exposed in opening 5a.
• the second embodiment is particularly effective when the lead pitch of the electronic component is narrow and it is difficult to print the solder register between the pitches.
• the circuit 7 can be prevented from floating from the circuit board 1, and the first embodiment The same effect can be obtained. Furthermore, even if the solder resist 5 is applied only to the land end opposite to the land end on the side where the circuit 7 of the circular land 2 is formed, the occurrence of land separation at the land end can be suppressed. Can be.
• FIG. 5 is a plan view showing an example in which the star-shaped irregular land 9 and the opening of the round solder resist 5 are combined, and FIGS. 6 and 7 show a configuration in which a subland 10 is provided.
• FIG. Fig. 9 is a plan view showing an example in which a cross-shaped irregular land is combined with a round solder resist 5 opening, and an octagonal irregular land is combined with a round solder resist 5 opening. is there.
• Figures 6 and 7 show examples for this purpose.
• the solder resist 5 is aligned so that the center of the land 2 where the lead 3 of the electronic component is inserted and mounted is aligned with the center of the solder register 5.
• the shape of the sub-brand 10 can be a semicircle shape (Fig. 6), a teardrop shape (Fig. 7), etc., but any shape is acceptable.
• a circuit board according to a fifth embodiment of the present invention will be described with reference to FIG.
• an insulating substrate having a high glass transition temperature is used.
• the following linear expansion coefficient is described as indicating the linear expansion coefficient in the thickness direction of the substrate.
• Hitachi Chemical's MCL-RO-67G (a glass transition temperature of 150 ° C, smaller than the glass transition temperature) made of epoxy resin from which halogen elements have been removed as a substrate with a low thermal expansion and high glass transition Coefficient of linear expansion at temperature (a 1) 38 ppm, Coefficient of linear expansion above glass transition temperature (a 2) 185 ppm, below, abbreviated as 150 ° C, 38 ppm, 185 ppm Solder electronic components to a circuit board using a substrate with tin-silver based lead-free solder (Sn—3.0Ag-0.5Cu) at 250 ° C for 5 seconds / atmosphere. (Fig. 13).
• Equation (2) shows the glass transition temperature T g of the circuit board, the linear expansion coefficient a at a temperature lower than the glass transition temperature in the board thickness direction;
• the substrate expansion coefficient L calculated using the above-described linear expansion coefficient a2, solder melting point Tm, and room temperature Ts (normally 25 ° C) as parameters is shown.
• the board expansion coefficient L shown in equation (2) is calculated as follows: In the process of cooling the soldered circuit board, after the solder starts to solidify through the melting point from the molten state, the solder joints reach room temperature. It shows the thermal expansion change rate of the circuit board before returning.
• Tg Glass transition temperature (° C)
• Tm melting point of solder (equivalent to solidification start point during cooling) (° C)
• T s normal temperature (temperature at which solder joints return to normal) (° C)
• the present inventors have determined that the coefficient of thermal expansion L obtained by the equation (2) is a predetermined coefficient of thermal expansion L
• Table 2 shows a calculation example of the board expansion coefficient L when soldering 2) with Sn-Ag-Cu solder.
• the substrate of Example 2 was manufactured by Hitachi Chemical
• the expansion rate L of the substrate and the occurrence rate of land delamination obtained from the experiment are graphed in FIG.
• the glass transition temperature Tg must be at least 141 ° C and at least the glass transition temperature.
• Equation (3) is for a case where the room temperature is 25 ° C.
• Tg Glass transition temperature (° c)
• Tm melting point of solder (equivalent to solidification start point during cooling) (° C)
• an electronic device By manufacturing an electronic device using the above-described circuit board, it is possible to manufacture an electronic device that is resistant to repeated thermal stress cycles, has a long service life, and has high reliability.
• Examples of such electronic devices include printers, facsimile machines, LCD monitors, personal computers, large computers (including servers and supercomputers), exchanges, transmission equipment, base station equipment, and the like.
• the present invention it is possible to prevent the lead-free solder from wetting and spreading to the land end, and to prevent the fillet from being formed to the land end. Since the fillet is formed on the inner side of the land end, the stress caused by the thermal expansion and contraction of the lead-free solder at the land end can be suppressed, and it becomes easier to follow the thermal expansion and contraction of the circuit board. Accordingly, it is possible to provide a circuit board that can suppress land peeling that frequently occurs with lead-free solder.

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• Engineering & Computer Science (AREA)
• Manufacturing & Machinery (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Electric Connection Of Electric Components To Printed Circuits (AREA)

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• 2001
  • 2001-11-08 JP JP2001343511A patent/JP3686861B2/ja not_active Expired - Fee Related
  • 2001-11-27 WO PCT/JP2001/010312 patent/WO2002047449A1/ja active Application Filing
  • 2001-11-27 CN CNB018200664A patent/CN100346679C/zh not_active Expired - Fee Related
  • 2001-11-29 TW TW90129517A patent/TW511403B/zh not_active IP Right Cessation

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