CIRCUIT AND METHOD OF SOURCE DRIVING OF TFT LCD
TECHNICAL FIELD
The present invention relates to a driving circuit and a driving method of a liquid crystal display and more particularly to a source driving circuit and a method therefor of a liquid crystal display which may display the high gray scale with a simple circuit.
BACKGROUND ART The liquid crystal display (LCD), which is ordinarily used for displaying characters, symbols or graphics, is a display device incorporating the liquid crystal technology and the semiconductor technology, in which the liquid crystal's optical feature of changing molecular arrays by electric fields is used. The thin film transistor (TFT) LCD uses a TFT as a switching component turning on or off the internal pixels. As the TFT is turned on or off, the pixels are accordingly turned on or off. As shown in Figure 1, in a general TFT liquid crystal display, cells constituting pixels are arranged in an array form. Each cell comprises a TFT 132 for the switching function, a liquid crystal cell 134, and a storage capacitor Cs. Sources for TFTs are connected commonly in the direction of the column, forming data lines Dl-DN, and then are connected to a source driver 120. Gates of TFTs are connected commonly in the direction of the row, forming scan lines Sl-SM, and then are connected to a gate driver 110. Thus, a display device of NxM resolution (i.e., SVGA of 800x600, XGA of 1024x768, UXGA of 1600x1200) is implemented. The source driver 120 is also called as a data driver or a column driver. The gate driver 110 is also called as a row driver.
As shown in Figure 1, a liquid crystal cell 134 is connected to the drain of a TFT 132 through a pixel electrode and the other side is connected to the common electrode. The pixel electrode is made of ITO which is transparent and electrically conductive. When the on signal is supplied to the TFT gate, the pixel electrode supplies the signal voltage supplied through the source driver 120 to the liquid crystal cell 134. The common electrode is also made of ITO and supplies the common voltage Vcom to the liquid crystal cell.
The storage capacitor Cs sustains the signal voltage supplied to the pixel electrode (pixel ITO) for a certain period of time. It also controls the light transmission rate of a pixel by changing the array status of the liquid crystal cell through charging and discharging. One end of the storage capacitor Cs may be connected to an independent electrode or a gate electrode. If it is connected to a gate electrode, the structure thereof is called the "storage on gate" method.
When driving the above-described pixel array, if the voltage is supplied only in one direction of the liquid crystal, the liquid crystal is quickly degraded. Thus, the inversion, i.e., the method of periodically changing the direction of supplying the image data voltage, is used. The data voltage direction is usually changed to the opposing direction by the period of every one field. There are three types of inversion. According to the field inversion method, in each field, all pixels of the panel change the voltage polarity at the same time. According to the line inversion method, the pixel line connected to a certain scanning line is inverted alternately. According to the dot inversion method, each pixel is separately inverted. In any of the above three methods, when inversion is conducted, the pixel voltage (voltage supplied to the pixel electrode from the TFT drain) in relation to the common voltage Vcom is changed from the
positive (+) direction to the negative (-) direction and vice versa.
As methods for displaying high gray scale in a liquid crystal display, the frame rate control (FRC) method and the dithering method are used. As shown in Figure 2a and Figure 2b, the FRC method uses the time average of each frame constituting one picture.
Figure 2a and Figure 2b illustrate an example in which four frames constitute one screen. For example, if V0 and VI are supplied alternately to the odd and even screens respectively, the effective value becomes (1/2)(V0"+V12)1/2 and thus the middle gray-scale (e.g., the Low-Level Gray-Scale in Figure 2a) may be displayed. However, _ this method is subject to flickers and the circuit is complicated. Also, the color display quality is lower than the eight-bit color display.
The dithering method performs the interpolation using the space average. For example, assuming that the 12th gray-scale is displayed at the standard voltage V4 and the 16 gray-scale is displayed at V5, if all of four pixels constitution one unit display thel2l gray-scale, the four pixels in average display the 12th gray-scale. If two pixels display the 12th gray-scale and the other two display the 16th gray-scale, the four pixels, in average, display the 14 gray-scale. The dithering method has the problem of bad resolution because multiple pixels are united to represent one image.
Therefore, the method of displaying 64 gray-scales by using 6 bits for data signals is ordinarily used. In order to display 64 gray-scales with 6 bits, voltages (V1-V64) corresponding to all combinations of input data of 6 bits need to be selected and outputted.
Figure 4a illustrates a conventional LCD source driver of the related art. As shown in Figure 4a, the source driver comprises a shift register 401, a latch unit 402, a D/A converter 403, an output buffer 404, a data latch 405 and a line conversion logic
406. The shift register 401 generates the clock to latch data. The latch unit 402 latches data according to the latch clock and transmits to the D/A converter 403. The
D/A converter 403 converts the 6 bit data into analog signals corresponding to V1-V64.
The output buffer 404 drives the data lines (Dl, D2, ... ) upon receiving the output from the D/A converter 403. The data latch 405 receives image data from a video card not shown in the drawing. The line conversion logic 406 provides the polarity change signals for the line inversion. Figure 4b illustrates the conventional source driving circuit of the related art.
It illustrates a source driver 410 and a panel 420. The data line of the panel 420 is shown with a resistance and a capacitor. The source driver 410, comprising a digital block 411, a digital-analog converter (DAC) 412 and an operation amplifier (OP Amp) 413, provides the driving signal to the data line. The digital block 411 in Figure 4b generally illustrates the data input portion for the source driving. The digital-analog converter 412 converts digital image data into analog signals. The OP Amp 413 performs the function of the output buffer.
In the conventional LCD source driving circuit illustrated in Figure 4b, the input/output error rate of the analog circuit such as the Op Amp used as the output buffer must be not greater than approximately 5mV so as to display high gray-scales of eight bits, for example. Thus, the uniform processing sufficient to satisfy such low error rate is required or a separate error compensation circuit is required. As a result, the circuit becomes complex and the necessary area becomes large.
DISCLOSURE OF THE INVENTION
The object of the present invention is to provide a source driving circuit of a liquid crystal display and a method therefor, which enables the eight-bit driving using the processing having the uniformity of the conventional six-bit driving circuit of the related art. In order to achieve the above object, the source driving method of a liquid crystal display according to a preferred embodiment of the present invention is the
method for driving a panel's data lines using the liquid crystal display's source driver comprising a digital-analog converter and an operation amplifier, wherein the one-line time for supplying image signals to the panel's data lines is divided into two phases: the first phase for driving data lines with the operation amplifier's output and the second phase for compensating for errors by driving data lines directly with the digital-analog converter's output. Therefore, the high gray-scales may be displayed by merely using the operation amplifier of 6 bits.
Furthermore, the source driving circuit of a liquid crystal display according to a preferred embodiment of the present invention is the source driving circuit for driving the liquid crystal display's data lines in accordance with image data, comprising: a digital block for receiving the image data; a digital-analog converter for converting the image data inputted from the digital block to analog signals; an operation amplifier for buffering outputs from the digital-analog converter and driving the data lines; the first switch, turned on at the first phase of a line time, for transferring the outputs from the operation amplifier to the data lines; and the second switch, turned on at the second phase of a line time, for connecting the outputs from the digital-analogy converter directly to the data lines.
BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 illustrates an equivalent circuit of a conventional TFT liquid crystal display of the related art.
Figure 2a is a diagram illustrating the gray-scale display using the frame rate control method.
Figure 2b illustrates the gray-scales shown in Figure 2a.
Figure 3 a is a graph illustration the relationship between the driving voltage and the gray-scale.
Figure 3b is a diagram illustrating the gray-scale display using the dithering method. Figure 4a is a block diagram illustrating the structure of a conventional source driver of the related art.
Figure 4b illustrates a conventional source driver of the related art. Figure 5 illustrates the source driving circuit according to a preferred embodiment of the present invention. Figure 6 is a timing diagram illustrating the switch control signals during the source driving according to a preferred embodiment of the present invention. ** Descriptions of important parts of the drawings ** 401: Shift register 402: Latch unit
403: D/A converter 404: Output buffer 405: Data latch 406: Line conversion logic
BEST MODE FOR CARRYING OUT THE INVENTION
Reference will now be made in detail to preferred embodiments of the present invention as illustrated in the accompanying drawings. Figure 5 illustrates the source driving circuit according to a preferred embodiment of the present invention. It illustrates a source driver 510 and a panel 520. The data line of the panel 520 includes a resistance and a capacitor as shown in the equivalent circuit. The source driver 510 comprises a digital block 411, a digital- analog converter 412, an operation amplifier (OP Amp) 413, the first switch SWl
connected to the output port of the OP Amp 413, and the second switch SW2 connected parallel to the OP Amp 413.
The source driving circuit of the present invention shown in Figure 5 is to implement the 8 bit gray-scale display using a widely used OP Amp 413 having the uniformity of 6 bit driving circuit. In the structure of the source driving circuit of the present invention, the same reference numerals are used for the components that are the same as those in the conventional LCD source driver as shown in Figure 4b. In comparison with the conventional source driver of the related art, the source driver 510 of the present invention newly includes the first switch SWl connecting the outputs of the OP Amp 413 used as a buffer to the panel and the second switch SW2 connecting the outputs of the digital-analog converter (DAC) 412 directly to the panel.
Now, the operations of the source driving circuit shown in Figure 5 are explained in detail with references to the timing diagram of the switch control signals shown in Figure 6. As shown in Figure 6, one line time is divided into two phases, the phase for operating the OP Amp and the phase for compensating for errors by the digital-analog converter (DAC)'s direct driving of data lines.
The first phase is the period in which the first switch SWl shown in Figure 5 is closed. In the first phase, the outputs from the OP Amp used as a buffer are connected to the panel's data lines. The second phase is the period in which the second switch SW2 shown in Figure 5 is closed. In the second phase, the outputs from the digital-analog converter (DAC) are connected directly to the panel's data lines. Thus, in the LCD source driving method according to a preferred embodiment of the present invention, during the first phase in which the first switch SWl is closed,
the voltage of the panel is charged approximately to the level desired to be displayed by the OP Amp used as a buffer (i.e., charged with the difference of the offset amount) and during the second phase in which the second switch SW2 is closed, the error in the panel voltage caused by the buffer OP Amp's input/output error is compensated for by the output of the digital-analog converter (DAC) directly connected to the panel. Consequently, high gray-scales may be displayed even when the input/output error rate in the buffer used in the LCD source driving circuit is greater than the level of error rate permitted in the relevant gray-scale.
The foregoing embodiments of the LCD source driving circuit and method are merely exemplary and are not to be construed as limiting the present invention. Many alternatives, modifications and variations will be apparent to those skilled in the art.
INDUSTRIAL APPLICABILITY
As explained above, according to the present invention, the one-line time for supplying image signals to the panel's data lines is divided into two phases, the first phase for driving data lines with the operation amplifier's output and the second phase for compensating for errors by driving data lines directly with the digital-analog converter's output. Therefore, high gray-scales may be displayed by merely using the operation amplifier of 6 bits. Consequently, high gray-scales may be displayed at low cost.