KR100366315B1 - Circuit and method of driving data line by low power in a lcd - Google Patents

Abstract

The present invention relates to a source driving circuit of a thin film transistor (TFT) liquid crystal display (LCD). The circuit of the present invention is a low-power source driving circuit for driving a data line of a TFT liquid crystal display device in accordance with image data, comprising: a digital-analog converter for converting image data into an analog signal; A polarity modulation unit for providing a multi-stage charge / discharge voltage for polarity modulation; And a polarity modulating unit which is connected to the polarity modulating unit for charging / discharging and polarity-modulated. When the charging voltage of the polarity modulating unit during charging is higher than the video signal, the video signal is saturated at a video signal level, An output buffer which is saturated with a video signal when a discharge voltage of the polarity modulation unit is lower than a video signal during discharge and applies a polar modulation output to the data line in a gray scale display period; And a switching means for connecting the polarity modulation section to the output buffer in the polarity modulation period and connecting the output buffer to the power source in the gray-scale display period. Therefore, according to the present invention, it is possible to prevent unnecessary power consumption by preventing overcharging or overdischarge by charging / discharging only a level controlled according to a video signal rather than a fixed voltage level during polarity modulation.

Description

TECHNICAL FIELD [0001] The present invention relates to a low power source driving circuit and a driving method of a liquid crystal display device,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a source driving circuit of a thin film transistor (TFT) liquid crystal display (LCD), and more particularly to a low power source driving circuit capable of driving a data line with low power. And methods.

2. Description of the Related Art In general, a liquid crystal display (LCD) used for displaying character symbols or graphics is a display device in which liquid crystal technology and semiconductor technology are fused by using optical properties of a liquid crystal whose molecular arrangement is changed by an electric field. An LCD for a thin film transistor (TFT) uses a TFT as a switching element for turning on / off an internal pixel, and pixels are turned on / off as the TFT is turned on / off. That is, as shown in FIG. 1, a general TFT liquid crystal display device has cells 130 constituting pixels arranged in an array, and each cell includes a TFT 132, a liquid crystal cell 134, And a storage capacitor Cs.

The sources of the respective TFTs are connected in common in the column direction to form the data lines D1 to DN and are then connected to the source driver 120. The gates of the TFTs are connected to the low- (for example, SVGA is 800x600, XGA is 1024x768, and UXGA is 1600x1200) connected to the gate driver 110 after the scan lines S1 to SM are formed in common, The source driver 120 is also referred to as a data driver or a column driver, and the gate driver is also referred to as a row driver.

1, a liquid crystal cell 134 is connected to the drain of the TFT 132 through a pixel electrode, and the other is connected to a common electrode. The pixel electrode is made of transparent and electrically conductive ITO, and applies a signal voltage applied through the source driver 120 to the liquid crystal cell 134 when an ON signal is applied to the TFT gate, and the common electrode is also made of ITO The common voltage Vcom is applied to the liquid crystal cell.

The storage capacitor Cs maintains the signal voltage applied to the pixel electrode (pixel ITO) for a predetermined period of time, and adjusts the light transmittance of the pixel by changing the arrangement state of the liquid crystal cell through charging and discharging . One side of the storage capacitor Cs may be connected to an independent electrode or a gate electrode, and a structure connected to the gate electrode is referred to as a storage on gate method.

When driving the above-described pixel array, degradation of the liquid crystal is promoted when a voltage is applied only to one direction of the liquid crystal of the pixel, so inversion is used to periodically apply the image data voltage applied to the liquid crystal in the opposite polarity . The period in which the data voltage is changed in the direction opposite to the normal direction is usually changed for every field. In each field, a version method of changing the voltage polarity of all the pixels of the panel all at once, that is, And a dot inversion method for inversion for each pixel, and the like. In either case, the pixel voltage (the voltage applied to the pixel electrode in the TFT drain) is alternately changed so as to be positive (+) or negative (negative) with respect to the common voltage Vcom.

2 shows a part of a conventional source driving circuit. The D / A converting unit 21, the output buffer unit 22, the odd-numbered polarity modulating unit 23, the even-numbered polarity modulating unit 24, (MUX) 25 are shown.

2, a latch clock is generated in a shift register (not shown), and digital video data input from a video card is latched in accordance with a latch clock in a latch unit (not shown) and input to a D / A conversion unit 21 do.

The video signal voltage converted into the analog signal by the D / A converter 21 is divided into an odd data line and an even data line via the output buffer 22, and an odd data line is connected to the output of the odd polarity modulator 23 Polarity modulation is applied to the data lines through the mux 25 and the even data lines are polarly modulated to the output of the even polarity modulator 24 and applied to the data lines through the mux 25.

Thus, since the conventional source driver circuit requires a MUX switch for each column line, the circuit becomes complicated and further power consumption is required to drive the switch.

An output waveform diagram of a multi-stage source driving circuit for applying a video signal to a data line using such a source driving circuit is shown in Fig. 3A.

Referring to FIG. 3A, the VSS voltage is '0V', the VDD voltage is '10V', and the common voltage VCOM applied to the common electrode is '5V'. The positive intermediate voltage VH applied to the pixel electrode for inversion is 7.75 V, the negative intermediate voltage VL is 2.25 V, and the positive image signal is applied to the positive intermediate voltage VH. And a negative image signal exists in a hatched region around the negative intermediate voltage VL.

As described above, conventionally, polarity modulation is performed at a fixed voltage of VH and VL at every line time (B in Fig. 3A), followed by gradation display (C and D in Fig. 3A). Also, as shown in FIG. 3B, when the load capacitance C _LOAD is driven by dividing V ₁ by 5 (generally N equals) from the voltage V ₂ , the power consumption is calculated by Equation 1 To 1/5 (N steps, 1 / N).

3B, the load capacitor C _LOAD is the sum of the capacitances of N data lines, where N is one-half the number of outputs of one source driver.

However, in the conventional method of driving a liquid crystal display device as described above, the efficiency is high as shown in FIG. 4A in the all-black mode or the all-gray mode. However, in the all- Charging / discharging is performed up to an intermediate voltage (VH: 7.75, VL: 2.25V) in order to perform polarity inversion, thereby causing overcharging and unnecessarily consuming power. In other words, in the all-black mode, since the black level is higher than the intermediate voltage VH and is lower than the intermediate voltage VL, the efficiency is high even when the black level is modulated to the intermediate voltage VH or VL. (I.e., charging at a higher voltage level than the required voltage level) occurs despite the fact that it is lower than the intermediate voltage VH and is lower than the intermediate voltage VL to require a lower swing width. Therefore, it is necessary to eliminate overcharging in order to improve power saving efficiency irrespective of the mode.

Disclosure of the Invention The present invention has been made in order to solve the above problems, and it is an object of the present invention to provide a source driver circuit and a driving method in which overcharging is prevented by charging / discharging only up to a voltage determined according to a video signal voltage without charging to a fixed intermediate voltage, The purpose is to provide.

It is a further object of the present invention to provide a method and a device for controlling the operation of a source driver circuit in which a circuit configuration is simplified by collectively controlling an operational amplifier (Op-Amp) of an output buffer by a small number of switches, .

1 is a view showing an equivalent circuit of a general TFT liquid crystal display device;

2 is a diagram showing a conventional multi-stage source driving circuit.

FIG. 3A is an output voltage waveform diagram in a conventional multi-stage source driving method. FIG.

FIG. 3B is a circuit diagram showing a polarity modulation unit in a conventional multi-stage source driving method. FIG.

4A is a driving waveform diagram of an all-black image of a conventional multi-stage source driving method.

4B is an all-white image driving waveform diagram of a conventional multi-stage source driving method.

5 is an output voltage waveform diagram for a low-power source driving method according to the present invention.

6A is a configuration diagram showing a source driver circuit of a liquid crystal display device according to the present invention.

6B is a detailed circuit diagram of an output stage operational amplifier (Op-Amp) according to the present invention.

FIG. 7 is a waveform diagram of the switch control signal shown in FIG. 6A. FIG.

8A is a drive waveform diagram of an all-black image of a low-power source driving method according to the present invention.

8B is an all-white image driving waveform diagram of a low-power source driving method according to the present invention.

9 is a circuit diagram of a polarity modulation section of a source driver circuit according to the present invention.

DESCRIPTION OF REFERENCE NUMERALS

610: D / A conversion section 620: polarity modulation section

630: Output buffer 632: Operational amplifier

634: input amplifier 640: LCD panel

According to an aspect of the present invention, there is provided a multi-stage source driver circuit for driving a data line of a TFT liquid crystal display device in accordance with image data, the multi-stage source driver circuit comprising: A polarity modulation unit for providing a multi-stage charge / discharge voltage for polarity modulation; And a polarity modulating unit which is connected to the polarity modulating unit to charge and discharge the polarized modulated signal. When the charging voltage of the polarity modulating unit is higher than the video signal, And an output buffer that is saturated with the video signal when the discharge voltage of the polar modulation unit is lower than the video signal during discharge and applies the polar-modulated output in the gray-scale display period to the data line; And switching means for connecting the polarity modulation section to the output buffer in a polarity modulation period and for connecting the output buffer to a power source in a gray scale display period.

According to another aspect of the present invention, there is provided a method of driving a low-power source for driving a data line of a TFT liquid crystal display device, the method comprising the steps of: The charging and discharging are performed only up to a level controlled according to a non-video signal to prevent overcharging or overdischarging.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

5 is an output voltage waveform diagram for a low-power source driving method according to the present invention.

Referring to FIG. 5, the VSS voltage is '0V', the VDD voltage is '10V', and the common voltage VCOM applied to the common electrode is '5V'. 1H, 2H, ... indicate line time, and each line time is divided into a polarity inversion time (i.e., charge / discharge time (A, C)) and gray scale display time (B, D). On the other hand, 1H for the line inversion is a period in which a positive is applied to the pixel electrode, and 2H is a period in which a negative is applied. In particular, VCH is the maximum positive charge level controlled by the video signal and VCL is the negative maximum discharge level controlled by the video signal.

As described above, in the present invention, charge / discharge is performed only up to the voltages (VCH, VCL) controlled according to the image signal (Image) without charging / discharging to the intermediate voltage levels (VH, VL) will be.

FIG. 6A is a configuration diagram showing a low power source driving circuit of a liquid crystal display according to the present invention, and FIG. 6B is a detailed operational amplifier (Op-Amp) circuit diagram of the output buffer shown in FIG. 6A.

6A, the source driver circuit includes a digital-analog converter 610 for outputting video signal voltages of odd data lines (hereinafter simply referred to as odd lines) and even data lines (hereinafter simply referred to as even lines) A polarity modulator 620, an output buffer 630, and switches sw1a, sw1b, sw2a, and sw2b for controlling charge and discharge, and applies a driving voltage to the LCD panel 640. 6B, the operational amplifier 632 includes an input amplifier 634, a PMOS transistor M _p , and an output amplifier 640. The output buffer 630 includes a plurality of operational amplifiers 632, And an NMOS transistor M _N.

When the first switch sw1a is turned on, the output terminal of the charging terminal VD of the polarity modulation unit 620 is connected to V _H of the even line and the output terminal VS of the polarity modulation unit 620 is connected to the odd line V _L to charge even lines and discharge odd lines. A second switch (sw1b) is turned on when the supply voltage VDD to the V _H of the odd-numbered line, and connect the GND to V _L of the even lines.

A third switch (sw2a) is when one of the connections to the charging terminal (VD) output from the polar modulator 620 to the V _H of the odd lines and even lines of the discharge terminal (VS) output from the polar modulator 620 V _L to charge the odd lines and discharge even lines. A fourth switch (sw2b) are turned on when the supply voltage VDD to the V _H of the even-numbered line, and connect the GND to V _L of the odd-numbered line.

6B, the input amplifier 634 of the operational amplifier receives the output of the D / A converter 610 as an inverted (-) terminal, receives a feedback signal as a non-inverted (+) terminal, ₀ ), and the output of the input amplifier 634 is transferred to the gate of the PMOS transistor M _P and the NMOS transistor M _N connected in series between V _H and V _L , and output as Vo do.

Next, the charging / discharging operation in the all-white mode will be described with reference to FIGS. 6A and 6B.

1. Charging operation

A voltage of 6.5 V is applied to V _I of the operational amplifier 632 when the V _O load of the data line is charged and when a voltage lower than V _I is applied to V _H at the polarity modulation unit 620, M _P) is turned on (oN) is so gradually filling is made, if a voltage higher than V _I is applied to the V _H input amplifier (input amp: because it puts a high (high) signal at 634) PMOS transistor (M _P The gate-source voltage of the gate electrode decreases and is cut off. Therefore, it is possible to prevent the voltage of V _I or more from being charged to V _O , thereby eliminating the overcharging phenomenon.

2. Discharge operation

When a voltage lower than V _I is applied to the V _L of the operational amplifier 632 in the polarity modulation unit 620 at the time of discharging, a low signal is generated in an input amplifier 634 to generate an NMOS transistor M _N , The gate-source voltage of the gate electrode decreases and cut off. Therefore, the phenomenon of discharging at a voltage lower than V _I is eliminated.

7 is a waveform diagram of a control signal for turning on / off the switches shown in FIG. 6A according to the present invention.

In FIG. 7, it is assumed that even lines are in a negative image, that is, a discharging state, and an odd line is a positive image, that is, a charging state. It is assumed that one line time is 22 μs as the waveform condition (1 line time is 1 / (75 × 1200) ≈11.1 μs when the frame frequency is 75 Hz and 1600 × 1200 UXGA, ), And the cycle in which even and odd lines charge / discharge during two line times. In FIG. 7, 'Period A' is an even line charge and odd line discharge (polarity modulation) time of a first line time, 'Period B' is a gray-scale display time of a first line time, (Odd line charging) and an even line discharging (polarity modulation) time of the second line time, and the 'D' is the gray-scale display time of the second line time.

Referring to FIGS. 6A and 7, when all the switches SW1a are turned on in the section A, the even lines are charged stepwise through the polarity modulating section 620, and at the same time, the odd number lines are stepped through the polarity modulating section 620 . The switch SW1a and SW2a are turned off and the switches SW1b and SW2b are turned on so that VDD and VSS voltage sources are connected to all the operational amplifiers of the output buffer 630 and the output buffer 630 Is applied to each data line (column line).

In interval C, when sw2a is turned on, the even lines are discharged stepwise, and the odd lines are charged stepwise. In the interval D, the switch on / off operation is the same as that in the interval B (that is, sw1a and sw2a are off, and sw1b and sw2b are on), and the gradation is displayed.

Table 1 summarizes these.

switch Section A Section B Section C Section D SW1a On off off off SW1b off On off On SW2a off off On off SW2b off On off On

FIG. 8A is a driving waveform diagram of an all-black image of a low-power source driving method according to the present invention, and FIG. 8B is an all-white image driving waveform of a low-power source driving method according to the present invention.

As shown in FIGS. 8A and 8B, unlike the conventional stepwise charging method, the charging / discharging is always performed up to a desired voltage and there is no overcharging. Therefore, when the stepwise driving is performed in five steps, There is an effect of reducing driving power consumption of about 80% regardless of the power consumption.

6A) and a conventional multi-stage source driving circuit (FIG. 2) according to the present invention, in the driving circuit of the present invention, when the polarity modulation is performed, the switches of the output buffer 630 of the entire driving circuit It can be seen that the MUX switch existing in each line between the output terminal Op-Amp and the LCD panel in the conventional multi-stage source driving method is removed by collectively controlling the buffers by dividing them into even and odd lines . Therefore, the present invention can reduce the additional power consumption required to drive the mux switch, and simplify the circuit.

9 is a circuit diagram of a polarity modulation unit for driving a source driver circuit according to the present invention.

9, the polarity modulating unit 620 according to the present invention includes seven capacitors C ₁ to C ₇ for charging stepwise and capacitors C ₁ to C ₇ connected to a discharge terminal VS Switches SW8 to SW14 for connecting the capacitors C ₁ to C ₇ to the charging terminal VD and two diodes D ₁ and D ₂ for switching the switches SW1 to SW7.

A diode D ₁ is added to prevent the current from reversely flowing from the capacitor C ₇ to the discharge terminal VS during the stepwise discharge in the all-white mode (VH: 6.5 V) A diode D ₂ is added to prevent current from reversely flowing from the charging terminal VD to the capacitor C ₁ during charging at the voltage VL (VL: 3.5 V). Therefore, the polarity modulation unit 620 according to the present invention can be composed of seven external capacitors, fourteen switches, and two diodes.

As described above, the source driver circuit of the present invention eliminates the switches existing in each line in the conventional driver circuit by collectively controlling the operational amplifier (Op-Amp) of the buffers by a small number of switches, And the power consumption for driving the switch can be reduced. In addition, during polarity modulation, charging / discharging is performed only up to a level controlled according to a video signal rather than a fixed voltage level, thereby preventing overcharging or overdischarge, thereby preventing unnecessary power consumption.

Claims (7)

A multi-level source driving method for driving a data line of a liquid crystal display device in accordance with video data, (A) converting digital image data into an analog image signal and providing the same to an output buffer; (B) providing a charge / discharge voltage to the output buffer for polarity modulation; The polarity of the data line may be adjusted such that the data line is charged with the video signal level when the charge voltage is higher than the video signal, (C) charging the data line with the charging voltage when the voltage is lower than the video signal; The discharge voltage is compared with the video signal in the output buffer in the polarity modulation for discharging the data line and the data line is discharged at the video signal level when the discharge voltage is lower than the video signal, (D) discharging the data line to the discharge voltage when the voltage is higher than the video signal; And During the gray scale display cycle, (c) or (d) when the charging voltage is higher than the video signal in step (c) or when the discharge voltage is lower than the video signal in step (d) The output is continuously applied to the corresponding data line, (e) applying the video signal to the corresponding data line when the charging voltage is lower than the video signal in the step (c) or when the discharge voltage is higher than the video signal in the step (d) Wherein the data line is connected to the data line through the data line. A multi-stage source driver circuit for driving a data line of a liquid crystal display device in accordance with image data, A digital-analog converter for converting the image data into an analog signal; A polarity modulation unit for providing a multi-stage charge / discharge voltage for polarity modulation; And a polarity modulating unit which is connected to the polarity modulating unit to charge and discharge the polarized modulated signal. When the charging voltage of the polarity modulating unit is higher than the video signal, And an output buffer that is saturated with the video signal when the discharge voltage of the polar modulation unit is lower than the video signal during discharge and applies the polar-modulated output in the gray-scale display period to the data line; And And switching means for connecting said polarity modulation section to said output buffer in a polarity modulation period and for connecting said output buffer to a power supply in a gray scale display period. ≪ Desc / Clms Page number 20 > 3. The low-power source driving circuit according to claim 2, wherein the output buffer comprises as many operational amplifiers as the number of data lines. 4. The method of claim 3 wherein the operational amplifier is gradually filled with the turns on when the video signal (V _I) is applied to from the input receiving amplifier and the video signal (V _I) said polar modulation lower voltage during charging unit A PMOS transistor M _P which is cut off when a high voltage is applied, and a PMOS transistor M _{P which} is turned on when a voltage higher than the video signal V _I is applied from the polarity modulation unit during discharging, And an NMOS transistor (M _N ) which is cut off when the voltage is applied. The plasma display panel of claim 3, wherein the switching means comprises: a first switch (SW1a) for controlling even-numbered line charge / odd line discharge when divided into odd-numbered lines and even- A third switch SW1b for connecting the GND power supply to the operational amplifier of the even number line, a second switch SW2b for connecting the even number line operational amplifier to the operational amplifier of the even number line, VDD, And a fourth switch (SW2b) for connecting the GND power supply to the amplifier. The display device according to claim 5, wherein the first switch is turned on when the even line charging (odd line discharging) time on of the first line time, the first line time gradation display time off, the second line time even line discharging (odd line charging) , The second line-time gradation display time-off, The second switch is turned off at the first line time even line charge (odd line discharge) time, the first line time gradation display time is turned on, the second line time is even line discharge (odd line charge) Table time off, The third switch is turned off at the first line time even line charge (odd line discharge) time, the first line time gray scale display time is off, the second line time is even line discharge (odd line charge) Table time off, The fourth switch is turned off at the first line time even line charge (odd line discharge) time, the first line time gradation display time is turned on, the second line time is even line discharge (odd line charge) And the operation is performed at a time point of the display of the low power source. 3. The method of claim 2, wherein the polarity modulation unit comprises N capacitors, N switches for connecting the capacitors to the discharge terminals, N switches for connecting the capacitors to the charge terminals, to prevent the current to C ₁ at the charging terminal (VD) in white mode, the charge flows in the reverse-discharge terminal (VS) the diode (D _1), all to prevent the current from flowing back to the at C _N a diode (D ₂₎ a low power-source driving circuit of a liquid crystal display device characterized in that is configured for.