TW565824B - Circuit and method of driving data line by low power in a LCD - Google Patents

Circuit and method of driving data line by low power in a LCD Download PDF

Info

Publication number
TW565824B
TW565824B TW090125343A TW90125343A TW565824B TW 565824 B TW565824 B TW 565824B TW 090125343 A TW090125343 A TW 090125343A TW 90125343 A TW90125343 A TW 90125343A TW 565824 B TW565824 B TW 565824B
Authority
TW
Taiwan
Prior art keywords
line
time
polarity
voltage
discharge
Prior art date
Application number
TW090125343A
Other languages
Chinese (zh)
Inventor
Oh-Kyong Kwon
Original Assignee
Neo Tek Res Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Neo Tek Res Co Ltd filed Critical Neo Tek Res Co Ltd
Application granted granted Critical
Publication of TW565824B publication Critical patent/TW565824B/en

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3685Details of drivers for data electrodes
    • G09G3/3688Details of drivers for data electrodes suitable for active matrices only
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243Details of the generation of driving signals
    • G09G2310/0248Precharge or discharge of column electrodes before or after applying exact column voltages
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/027Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • G09G2330/021Power management, e.g. power saving
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3614Control of polarity reversal in general

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal (AREA)

Abstract

The present invention relates to the source driving circuit of thin film transistor liquid crystal device (TFT-LCD). The circuit of the present invention, the low power source driving circuit for driving data line of TFT-LCD according to video data, comprises: a digital-analog converter for converting the image data into analog signals; a polarity modulator for providing multi-step charging and discharging voltages for the polarity modulation; an output buffer for receiving image signals inputted from the digital-analog converter and conducting the polarity modulation through charging and discharging at the polarity modulation period in which the output buffers are connected to the polarity modulator, wherein at the time of charging, if the charging voltage of the polarity modulator is higher than the image signals, the level of image signals becomes the saturation level and at the time of discharging, if the discharging voltage of the polarity modulator is lower than the image signals, the level of image signals becomes the saturation level, and at the gray-scale display period, the polarity modulated outputs are supplied to the relevant data lines; and switching means for connecting the polarity modulator to the output buffers at the polarity modulation period and connecting the output buffers to the power supplier at the gray-scale display period. According to the present invention, as preventing overcharging or over-discharging as charging and discharging until not fixed voltage level but level controlled by video signal in polarity modulation, it is possible to prevent unnecessary power consumption.

Description

565824 五、發明說明(1) 【發明所屬之技術範疇與該範疇之習知技術】 本發明係關於一種薄膜電晶體(Th i n F i 1 m565824 V. Description of the invention (1) [Technical category to which the invention belongs and conventional technologies in this category] The present invention relates to a thin film transistor (Th i n F i 1 m

Transistor;TFT)液晶顯示裝置(Liquid Crystal Device; LCD)之源極(Source)驅動回路,尤有關一種可籍由低電力 驅動資料線之低電力源極驅動回路及方法。 一般,使用於顯示(display)文字、記號或圖形之液 晶顯示裝置(Liquid Crystal Device;LCD)係利用以電場 變化分子排列之液晶之光學性質融合液晶技術與半導體技 術所成之顯示裝置。薄膜電晶體(Thin Film TFT)用LCD其作為使晝素(pixel )0N/OFF之切換元件係使用 TFT,藉由使該TFT作0N/0FF作動可使像素〇N/〇FF。亦即, 一般之TFT液晶顯示裝置係如第一圖所示般其構成畫素之 元件(1 3 0 )係排列成陣列狀’而各個元件係由切換功能之 TFT(132)與液晶元件(134)與,儲存電容器(cs)所構成。Transistor (TFT) source driving circuit of Liquid Crystal Device (LCD), especially relates to a low power source driving circuit and method which can drive data line by low power. Generally, a liquid crystal display (Liquid Crystal Device; LCD) used to display characters, symbols, or graphics is a display device that combines the liquid crystal technology and semiconductor technology with the optical properties of liquid crystals arranged in an electric field to change molecules. As a thin film TFT, an LCD is used as a switching element for turning ON / OFF of a pixel ON / OFF. A TFT is used, and the ON / OFF of the TFT can be used to make the pixel ON / OFF. That is, a general TFT liquid crystal display device is such that the elements (130) constituting pixels are arranged in an array shape as shown in the first figure, and each element is a TFT (132) and a liquid crystal element (132) that switch functions. 134) and a storage capacitor (cs).

又,各個TFT之源極(source)係於在行方向共同接續 而形成資料線(D1 - D N )後連接於源極驅動器(1 2 0 ),而各 TFT之閘極於在列方向共同接續而形成掃描線(gi ―別)後連 接於閘極驅動器(11 〇 )而具現為具有N X Μ解析度(例如s V G A 為800x600 ,XGA 為1024x768 ,UXGA 為1600x1200)之顯示裝 置。在此’源極驅動器(1 2 〇 )又稱為資料線驅動器或行驅 動器,而閘極驅動器又稱為列驅動器。 如第一圖所示’液晶元件(1 3 4 )係經由晝素電極與 TFT ( 1 3 2 )之漏極連接,而另一方則以共通電極連接。畫素 電極係以透明且具有電傳導性之銦錫氧化物(I T 〇 )製成,In addition, the source of each TFT is connected together in the row direction to form a data line (D1-DN), and then connected to the source driver (120), and the gates of each TFT are connected in common in the column direction. After forming the scanning line (gi — other), the display device is connected to the gate driver (110) and has a resolution of NX M (for example, s VGA is 800x600, XGA is 1024x768, and UXGA is 1600x1200). Here, the 'source driver (120) is also called a data line driver or a row driver, and the gate driver is also called a column driver. As shown in the first figure, the 'liquid crystal element (1 3 4) is connected to the drain of the TFT (1 3 2) via a day electrode and the other is connected to a common electrode. Pixel electrodes are made of transparent and electrically conductive indium tin oxide (I T 〇),

第5頁 565824 五、發明說明(2) 於對TFT閘極賦ΛσΓΗι #咕晚 y m m ^认N诌唬時,經過源極驅動器(12〇)賦加之 乜就電壓施加於液晶元件(13 、刀心 氧化物製成,可對液曰元株醋^ #而共通電極亦以銦錫 ν μ 士』對液日日70件賦加共通電壓(Vcom)。 ιτο)之#费‘,= = (Cs)係發揮將賦加於晝素電極(Pixel ΐ曰曰列狀態產生變化,藉此以調整晝素之透光 :二u;(cs)之一側可連接獨立電極或閉極電極 ⑽meU式。極連接之構造係稱為閘極儲存(St〇rage 方向Γΐϊ前述晝素陣列時,若對畫素之液晶僅賦加-個 之:音二i:ΐ促進液晶之劣化故乃使用將賦加於液晶上 =素貝料電壓作週期性之反極性賦加之反相法。 區:正方向及相反方向而賦加之週期-般係對各個 全部改變亦即使其反相之區域反= : = = 條知描線之畫素線作區分而對各線交互地作反相之線反 f法,與使各個晝素作反相之點反相法等。不論是何種方 法,於使其反相時,晝素電壓(自TFT漏極賦加於晝素電極 上之電壓)相對於共通電壓(Vcom)係呈現正(+ )方向或呈現 負(-)方向而作交替變化。 * 第一圖為習知之源極驅動回路之一部份之示意圖,係 揭示數位-類比轉換器(21)與輸出緩衝部(22)與奇數極性” 調製部(23)與偶數極性調製部(24)與多工器Μυχ(25)。 如第二圖所示,係以圖未示之移位寄存器產生閂鎖時 565824 五、發明說明(3) 鐘信號,自影像卡輪入之數位影像資 ^被。閃鎖時鐘信號所閃鎖而被輪人數位;;類比轉換(部圖未 I Z 1 y ° 自數位-類比轉換部(2丨)被轉換成類比 & 號電壓係經過輸出緩衝部(22)而區分至奇數%^之衫像信 資料線,而奇數資料線係被奇數 2"之^偶數 ^生調製而經由多工器腹(25)賦加於〜=二輪出作 =枓線係被偶數極性調製部(24)之輸出 數 多工器MUX(25)賦加於資料線上。 乃I而通過 如前述般’習知之源極驅動回路 置多工器〔ΜΙί Y、P弓M m , ; 丁、水上須要設 f為(MUX) 關,因此回路變得 追加之電力消耗將成為問題點。 …動開關所 上用2々使用此種源極驅動回路將影像信號賦加於資料線 示。夕階段源極驅動回路之輸出波形圖係如第三8圖所 而^第三a圖所示,vss電壓為,〇v,,VDD電壓為,ι〇ν,, 用之:於共通電極上之共通電壓(vc〇M)為,5V,。又,反相 性之T加於晝素電極之陽性之中間電壓(VH)為7· 75V,陰 以陽^間電壓(VL)為2· 25V,而陽性之影像信號係存在於、 陰性=中間電壓(VH )為中心而描繪以斜線之領域中,而 f洛之衫像信號則存在於以陰性之中間電壓(VL )為中心而 田、、、曰以斜線之領域中。 電斤如前述般’習知者對各資料線於實施VH與VL之固定之 1之極性調製後(第三a圖之B),係實行色階顯示(第三aPage 5 565824 V. Description of the invention (2) When assigning ΛσΓΗι to the TFT gate # 咕 晚 ymm ^ Recognize N bluff, the voltage is applied to the liquid crystal element (13, knife by adding 乜 through the source driver (12)). It is made of heart oxide, and can be applied to the liquid electrolyte element strain vinegar ^ #, and the common electrode is also indium tin ν μ ′ ”to the common voltage (Vcom) to 70 pieces of liquid day. Ιτο) # 费 ', = = ( Cs) is based on the change in the state of the pixel (Pixel), which can be used to adjust the light transmission of the day: two u; (cs) one side can be connected to an independent electrode or a closed electrode ⑽meU type The structure of the pole connection is called the gate storage (in the direction of StOrage Γΐϊ the aforementioned celestial array, if you add only one pixel to the liquid crystal of the pixel: tone two i: ΐ promote the degradation of the liquid crystal, so the use of Adding to the liquid crystal = the reverse phase method in which the voltage of the prime material is periodically reversed. Zone: the cycle added in the positive direction and the opposite direction-generally changes all of them, even if the reversed area is reversed =: = = Distinguish the pixel lines of the drawing line and make the lines inversely inverse to each other. The inverse f method is the opposite of the inversion of each day element. Inverting method, etc. No matter which method is used, when it is inverted, the daylight voltage (the voltage applied to the daylight electrode from the TFT drain) shows a positive (+) direction with respect to the common voltage (Vcom). Or show negative (-) direction and change alternately. * The first picture is a schematic diagram of a part of the conventional source drive circuit, revealing the digital-to-analog converter (21), the output buffer (22) and the odd polarity Modulation section (23), even-polarity modulation section (24), and multiplexer Μυχ (25). As shown in the second figure, when a latch is generated by a shift register not shown in the figure 565824 5. Description of the invention (3 ) Clock signal, digital image data from the video card turn. Flash lock clock signal flash lock and turn number ;; analog conversion (partial picture is not IZ 1 y ° from digital-analog conversion unit (2 丨) The voltage converted to the analog & signal is divided into the odd-numbered shirt data line through the output buffer section (22), and the odd-numbered data line is modulated by the odd-numbered ^ even-numbered ^ 2 and passed through the multiplexer belly. (25) Added to == 2 rounds of production = 枓 The line number is multiplexed by the even-numbered polar modulation section (24) MUX (25) is added to the data line. However, the multiplexer [ΜΙί Y, P bow M m] is installed through the conventional source driving circuit as described above; D and water must be set to (MUX), Therefore, the additional power consumption of the circuit will become a problem.… The switch signal used on the switch will use this source drive circuit to add the image signal to the data line. The output waveform diagram of the source drive circuit in the evening stage is as follows As shown in Figure 3 and Figure 3a, the vss voltage is 0V, and the VDD voltage is ι0ν, which is used: the common voltage (vc0M) on the common electrode is 5V, . In addition, the positive intermediate voltage (VH) of the reverse polarity T applied to the day electrode is 7.75V, and the positive and negative voltage (VL) is 2.25V, and the positive image signal exists in, and the negative = middle The voltage (VH) is the center and the area with a slash is drawn, and the f Luo shirt image signal exists in the field with the negative intermediate voltage (VL) as the center and the field with a slash. The electric jack is as described above. After the polarizer modifies each data line with a fixed polarity of VH and VL (B in the third a picture), it implements color gradation display (the third a

565824 五、發明說明(4) 圖之C與D)。又,如第三b圖所示般,自電壓72至電壓Vi係 五等分(一般為N等分)而於驅動負荷電容(Clgad)時其消耗電 力如數學式2般較驅動為單一色驕之數學式1係減少至 1/5(為N階段時則為1/N)。 【數學式1】 P(:ONV = cvjvvjf 【數學式2】 PStEP = CV2((V2-V! )/5)F = (l/5)Pc_565824 V. Description of the invention (4) Figures C and D). In addition, as shown in the third figure b, the voltage from 72 to Vi is quintile (generally N quintile). When driving the load capacitor (Clgad), the power consumption is driven as a single color as in Equation 2. The proud formula 1 is reduced to 1/5 (1 / N for N stage). [Mathematical formula 1] P (: ONV = cvjvvjf [Mathematical formula 2] PStEP = CV2 ((V2-V!) / 5) F = (l / 5) Pc_

在第三b圖中,負荷電容(cload)係N個資料線之行線之 電容值之合,在此,N為一個源極驅動器之輸出數之丨/ 2。 惟’上述般之習知之液晶顯示裝置之源極驅動方法在 全黑模式及全灰模式下如第四a圖所示係顯示甚高之效 率,但在全白模式下如第四b圖所示因極性反轉而使其充 電/放電至中間電壓(^:7.75^¥1^2.25¥),以此將產生過 充電’而有產生不必要之電力消耗之問題點。亦即,在全 黑模式下’在正方向,黑色位階較中間電壓〇為高,在負 方向上因較中間電壓VL為低故即使調製至中間電壓 (VH,VL)雖亦可獲得高效率,但在全白模式下在正方向上In figure 3b, the load capacitance (cload) is the sum of the capacitance values of the rows of the N data lines. Here, N is the number of outputs of a source driver. However, the conventional source driving method of the liquid crystal display device as described above shows very high efficiency in the full black mode and the full gray mode as shown in FIG. 4a, but in the full white mode as shown in FIG. 4b It shows that it is charged / discharged to an intermediate voltage (^: 7.75 ^ ¥ 1 ^ 2.25 ¥) due to the polarity reversal, which will cause overcharging and cause unnecessary power consumption. That is, in the full black mode, 'in the positive direction, the black level is higher than the intermediate voltage 0, and in the negative direction, it is lower than the intermediate voltage VL, so even if modulated to the intermediate voltage (VH, VL), high efficiency can be obtained. , But in positive direction in all white mode

^色位階較中間電壓VH為低而在負方向上較中間電壓vl為 间而要求要有低振幅同時因亦發生過充電(亦即充電至較 ,求之電壓位階為咼之電壓位階)故將產生追加性之電力 消耗。因此,不論是何模式為提高節減電力消耗之效率係 必須要消除過充電。^ The color level is lower than the intermediate voltage VH and in the negative direction is lower than the intermediate voltage vl. It requires a low amplitude and is also overcharged (that is, charged to the voltage level, the voltage level is 咼). Will generate additional power consumption. Therefore, no matter what the mode is, in order to improve the efficiency of power consumption reduction, overcharge must be eliminated.

第8頁 565824 五、發明說明(5) 【發明欲解決之技術性課題】 本發明係為解決如前述般之問題點所創案者,其係不 充電至固定之中間電壓而係藉由影像信號電壓充/放電至 ,定電壓,藉以防止過充電而提高電力效率,而以提供能 達到别述效果之源極驅動回路及驅動方法為其目的。 拉f發:之另-目的在於提供一種源極驅動回路,其係 措由以 > 數之開關一起控制輸出緩衝器之演曾 匕:=、,而以習知之驅動回路分別除去存:於各線之多 工益(MUX)開關而使回路構成變得簡單。 【發明之 為達 驅動回路 料線,其 述影像資 性調製用 前述數位 期起與極 時若前述 飽和至前 電電壓較 階顯示週 上;一切 連接於前 構成】 成上述之目的’本發明之q拉你 甘A - 1 < 口珞係一種多階段源極 ,其係猎由影像資料驅動TFT液晶顯示 特徵在於包含有:上數位-類比轉換 a 料直轉換成類比信號;一極性調製部°,係#提將供則 之多階段充放電電Μ ; 一輸出緩衝器系收 •類比轉換部所輸入之影像信號而自極性調自 1生调製部連接而實行充放電而調製極性,於電 =製部之充電電壓較前述影像信號為高二 述衫像信號位階,又,放電時若極性 二 影像信號為低則飽和至前述影像信號。,又",之 期起將前述調製極性之輸出賦加於‘ $ ’自色 換裝備,係自極性調製週期起將前貝料線 述輪出緩衝器而自色階顯示週期:==部 、將别逑輸出緩 565824Page 8 565824 V. Description of the invention (5) [Technical problem to be solved by the invention] The present invention is to create a solution to the problem as mentioned above, it is not charged to a fixed intermediate voltage and is based on the image signal The voltage is charged / discharged to a constant voltage to prevent overcharging and improve the power efficiency. The purpose is to provide a source driving circuit and driving method that can achieve other effects. Pulling the hair: The other purpose is to provide a source drive circuit, which consists of controlling the output buffer by a number of switches: =, and removing the existing drive circuit with a conventional drive circuit: The multiple MUX switches on each line simplify the circuit configuration. [Invention of the drive circuit material line, the image data modulation using the aforementioned digital period and pole if the aforementioned saturation to the previous electric voltage is displayed on the higher order display; everything is connected to the front structure] to achieve the above purpose 'the present invention The q pull you Gan A-1 is a multi-stage source, which is driven by the image data to drive the TFT liquid crystal display. It is characterized by the following: digital-to-analog conversion a material is directly converted to an analog signal; a polarity modulation部 ° , ## Multi-stage charge and discharge electricity provided by the supply rule; an output buffer receives the video signal input by the analog conversion unit and adjusts the polarity from the original modulation unit to perform charge and discharge to modulate the polarity The charging voltage at the power source is higher than the image signal level, and if the polarity two image signal is low during discharge, it saturates to the image signal. From the beginning of the period, the output of the aforementioned modulation polarity is added to the '$' self-color changing equipment, which means that the front shell material is rotated out of the buffer from the polarity modulation period and the color scale display period is: == Ministry, slow down output 565824

衝器連接於電源者。 又’為達成前述 晶顯示裝置之資料線 反轉用之充電及放電 定之電壓位階之影像 放電’為其特徵者。 以下參照附圖詳 第五圖為本發明 目的,本發明之方法係於驅動TFT液 用之低電力源極驅動回路上,將極性 時之中間電壓僅充電及放電至被非固 4吕5虎所控制之位階而防止過充電及過 細說明本發明之較佳實施例。 形圖。 之低電力源極驅動方式之輸出電壓波 如第五圖所示 11 电魘馬,VDD電壓為,1 ον,, 二賦加於共通電極之共通電壓_為,Ho,v (亦即v:表示線時間’各個線時間係區分成極性反轉時間 (亦即充電/放電時間(A,C))與色階顯示時間(B D)。轉二間 2H為=轉之故,1H為於4素電極上賦加正電之週期, 陽週期。特別是V C H為藉由影像信號控制之 二、::!之最大充電位階’VCL為藉由影像信 性(―)側最大放電位階。 j^ 中門2述般在本發明中於極性調製時並不充電至固定之 電i (VCH,VCL)位階,藉此防止過充電。 、 回路為/發明,液晶顯示裝置之低電力源極驅動 Ξ 成!,第六b圖為揭示於第h圖中之輸出緩 •。 ’負才放大器(〇P_Amp)之詳細回路圖。 "" 如第六a圖所示,源極驅動回路係由輸出奇數資料線 565824 五、發明說明(7) 以下&簡稱為奇數線)與偶數資料線(以下簡稱為偶數線)之 影像信號電壓的數位-類比轉換部(6丨〇 )與極性調製部 (Polar Uy modulat〇r;62〇)、輸出缓衝器(63〇)、控制充 電/放電用之開關(5说13,5评1|3,^23,3〜213)所構成,係對 I^D面板( 640 )賦加驅動電壓。又,輸出緩衝器(63〇)係由 為料線數之/秀异放大器(6 3 2)所形成,此演算放大器(6 3 2) 如第六b圖所示係由輸入放大器(634)、pM〇s電晶體( NM0S電晶體(Mn)所形成。 ” 山當第一開關(swl a)為ON時,極性調製部(62〇)之充電 女而子(VD)之輸出係連接偶數線之VH,而極性調製部(6 2 〇 ) =放電端子(VS)係連接奇數線之、,而使偶數線充電及使 :數線放電。第一開關(s w 1 b )為〇 N時,將V D D電壓供給至 奇數線之VH,而將接地(GND)連接於偶數線之、。、口 s第二開關(sw2a)為on時則極性調製部(62〇)之充電 端子(VD)之輸出連接至奇數線之%,而將極性調製部 ( 620 )之放電端子(vs)輸出連接於偶數線&,而使奇數線 充,及使偶數線放電。當第四開關(sw2b)為⑽時則將DD 電C仏、$至偶數線之,而將接地(gnd)連接至奇數線之 VL。 、 如第六b圖所不,演算放大器之輸入放大器(634)係以 反轉(―)端子輸入接收數位—類比轉換部(61〇)之輸出而以 非反轉(+ )端子輸入接收返饋轉換信號,而放大增益(A〇) 而輸出^,輸入放大器( 634)之輸出係傳送至串聯於%與、間 之P金乳半導體電晶體(Mp^N金氧半導體電晶體(⑷)之問The punch is connected to the power supply. It is also characterized by "discharging at a certain voltage level for charging and discharging for inverting the data line of the aforementioned crystal display device". The following is a detailed description of the fifth figure with reference to the drawings for the purpose of the present invention. The method of the present invention is based on a low power source driving circuit for driving a TFT liquid. Controlled levels to prevent overcharge and over-fine description of the preferred embodiment of the present invention. Shape chart. The output voltage wave of the low-power source driving method is shown in the fifth figure. The electric voltage is VDD, which is 1 ον, and the common voltage added to the common electrode is Ho, v (that is, v: Representing line time 'Each line time is divided into polarity reversal time (that is, charge / discharge time (A, C)) and color gradation display time (BD). 2H for the second turn is = turn, 1H is for The positive electrode is given a period of positive charge and a positive period. In particular, VCH is the maximum charge level 'VCL controlled by the image signal 2:'! Is the maximum discharge level by the image reliability (―) side. J ^ In the present invention, the middle gate 2 does not charge to a fixed electric i (VCH, VCL) level during polar modulation in the present invention, thereby preventing overcharging. The loop is / invented, the low power source driver of the liquid crystal display device. Success !, Figure 6b shows the output slowdown shown in Figure h. 'Detailed circuit diagram of the negative amplifier (〇P_Amp). &Quot; " As shown in Figure 6a, the source drive circuit is composed of Output odd data line 565824 V. Description of the invention (7) The following & abbreviated odd line) and even data line (hereinafter The digital-to-analog conversion unit (6 丨 〇) and the polar modulation unit (Polar Uy modulat〇r; 62〇), the output buffer (63〇), and the control of charging / discharging The switch (composed of 5 and 13, 5 and 1 | 3, ^ 23, and 3 ~ 213) is used to apply a driving voltage to the I ^ D panel (640). In addition, the output buffer (63) is formed by the number of lines / shower amplifier (6 3 2), and the calculation amplifier (6 3 2) is shown by the input amplifier (634) as shown in Figure 6b. , PM0s transistor (NM0S transistor (Mn) is formed. "When the first switch (swl a) is ON, the output of the charging female (VD) of the polar modulation section (62) is connected to an even number The VH of the line, and the polarity modulation unit (6 2 0) = the discharge terminal (VS) is connected to the odd-numbered line to charge the even-numbered line and discharge the: -numbered line. When the first switch (sw 1 b) is 0N When the VDD voltage is supplied to the VH of the odd line, and the ground (GND) is connected to the even line, when the second switch (sw2a) is on, the charging terminal (VD) of the polarity modulation section (62) The output is connected to% of the odd line, and the discharge terminal (vs) output of the polar modulation section (620) is connected to the even line & to charge the odd line and discharge the even line. When the fourth switch (sw2b) For the time, connect DD and C to $ of the even line, and connect the ground (gnd) to VL of the odd line. As shown in Figure 6b, calculate the The input amplifier (634) uses the inverting (-) terminal to input the received digital-analog conversion unit (61) and the non-inverting (+) terminal to input the feedback conversion signal, and amplifies the gain (A0). The output ^, the output of the input amplifier (634) is transmitted to the P-milk semiconductor transistor (Mp ^ N gold-oxide semiconductor transistor (⑷) in series).

第11頁 565824 五、發明說明(8) 極而作為V。而輸出。 動作妾著多‘展第六3圖及第六b圖說明全白模式之充/放電 1 ·充電動作 於充電至資料線之VG負荷之場合,於演算放大器 (6 2 0)料I上係被知加以6 · 5 V之電壓,而以極性調製部 (M ) 士賦加以較' 為低之電壓時因P金氧半導體電晶體 之?雷,為^故實行階段性之充電而於VH被賦加以較V!為高 半導ΐ人放大器(634)產生高(High)信號故p金氧 此,體電曰曰體(Mp)之閘極源極電壓減少而成為斷路。因 象 防止將丨充電至V!以上之電壓故可消除過充電現 2 ·放電動作 ▲放電時自極性調製部(62<〇)對演算放大器(632 )之V 1口較I1為〃低之電壓時,自輸入放大器(634 )產生低([抑)\言 ^ 金氧半導體電晶體(MN)之閘極源極電壓減少而被切 斷。因此可消除以較Vi為低之電壓放電之現象。 第七圖為利用本發明將第六a圖所示之開關作〇N/〇ff 控制之控制信號之波形圖。 第七圖中,初期條件下係假設偶數線為負影像 、 (negative image)亦即為放電狀態,奇數線為正影像 ^positive image)亦即為充電狀態。關於波形之條件係假 設22 /zs為一線時間(line time)(方波頻率為75Hz時為又 1 60 0又1 20 01^0人之場合一線時間為"(75又12〇〇)与11P.11 565824 V. Description of Invention (8) And the output. The action is shown in Figure 6 and Figure 6b. The charging / discharging in the full white mode is explained. 1. The charging operation is in the case of charging to the VG load of the data line. It is connected to the calculation amplifier (6 2 0) material I. It is known that a voltage of 6. 5 V is applied, and a voltage lower than that of the polar modulation section (M) is applied to the VH due to the lightning of the P-metal oxide semiconductor transistor. Compared with V !, a high-semiconductor amplifier (634) generates a high signal, so p metal oxide is reduced, and the body source voltage (Mp) of the gate source voltage is reduced and becomes an open circuit. Overcharge can be eliminated because it prevents charging to a voltage higher than V! 2 Discharge operation ▲ The V 1 port of the calculation amplifier (632) is lower than the I1 by the self-polarity modulation unit (62 < 〇) during discharge. At the time of voltage, the low ([抑] \) ^ generated by the input amplifier (634) reduces the gate-source voltage of the metal-oxide semiconductor transistor (MN) and is cut off. Therefore, the phenomenon of discharging at a lower voltage than Vi can be eliminated. The seventh diagram is a waveform diagram of the control signal of the ON / OFF control of the switch shown in the sixth a by using the present invention. In the seventh figure, under the initial conditions, it is assumed that the even line is a negative image, (negative image) is the discharging state, and the odd line is a positive image (^ positive image), which is the charging state. The conditions for the waveform are based on the assumption that 22 / zs is the line time (1 60 0 and 1 20 01 ^ 0 when the square wave frequency is 75 Hz) and the line time is " (75 and 12〇〇) and 11

565824565824

為分割驅動時之兩倍)。於兩次之線時間 :間Β為苐一線牯間之色階顯示時間,,區間[, 時間之奇數線充電及偶數線放電(極性調製)時間:、,區-間 D為第二線時間之色階顯示時間。 °σ 日“丨Γ圖及第七圖所示,於區間Α若全部之swla細 ,則偶數線通過極性調製部(62〇 )作階段性之充電,同時 奇數線通過極性調製部(620)作階段性之放電。在區間^"於 極 f± 反轉、、、ς 了後 s w 1 a,s w 2 a 為 〇 ρ ρ,而 s w 1 &,s w 2 b 為 〇 n 時則 V^)D,VSS電壓源連接於輸出缓衝器(63〇)之全部之演算放大 器(6 3 2 ),而輸出緩衝器(6 3 〇 )之輸出則分別賦加於各資料 線0 、 在區間C fsw2a為⑽時則·偶數線作階段性之放電而奇 數線作階段性之充電。在區間D如在區間β —般,開關 ΟΝ/OFF動作為相同(亦即swia,sw2a 為〇ff,swib,sw2b為 0 N)而顯示色階。 將則述敘述作一整理則如以下之表一所示。(Twice as in split drive). Time between two lines: time B is the time display time of the first line, time interval [, the time of the odd line charging and the even line discharge (polar modulation) time:, area, time D is the second time The gradation display time. ° σDay ”丨 and the seventh figure, if all swla in the interval A are thin, even-numbered lines pass through the polarity modulation section (62) for periodic charging, and odd-numbered lines pass through the polarity modulation section (620) For periodic discharge. In the interval ^ " after the pole f ± is reversed, sw, a, sw 1 a, sw 2 a is 0ρ ρ, and sw 1 &, sw 2 b is 0n, then V ^) D, the VSS voltage source is connected to all the operational amplifiers (63 2) of the output buffer (63), and the output of the output buffer (63) is added to each data line 0,. When the interval C fsw2a is ⑽, even lines are used for periodic discharge and odd lines are used for periodic charging. In section D, as in section β, the switch ON / OFF operation is the same (that is, swia, sw2a is 0ff). , Swib, sw2b is 0 N) and display the color gradation. A summary of the description is shown in Table 1 below.

第13頁 565824 五、發明說明(ίο)Page 13 565824 V. Description of the Invention (ίο)

關 區間Α 區間B 區間C 區間D sw\ a s w lb s w2a sw2bOff Interval A Interval B Interval C Interval D sw \ a s w lb s w2a sw2b

ONON

OFFOFF

OFFOFF

OFFOFF

OFFOFF

ONON

OFFOFF

ONON

OFFOFF

OFFOFF

ONON

OFFOFF

OFFOFF

ONON

OFFOFF

ON 第八a圖為本發明之低電力源極驅動方式之全黑影像 之驅動波形圖,第八b圖為本發明之低電力源極驅^ =式 之全白影像驅動波形圖。 如於第八a圖及第八b圖中所示,與習知之多階段充電 方式不同,無論何時均可充/放電至所須之電壓而不會有 過充電之現象故例如為五階段之階段性驅動之場合則θ與影 像信號無關可達到節約80%左•右之驅動消耗電力之7效果、。’ 一方面,本發明之低電力源極驅動回路(第六a圖)盥 習知之多階段源極驅動回路(第二圖)比較時可知,/明 之驅動回路者於極性調製時其全體驅動回路之 (j3〇)之開關係區分成偶數線與奇數線,分別加 藉由將緩衝器作一統式之控制 …專 動方式之在於Φ A 制則了將 > 知之多階段源極驅 ΐ : icot : i ::-—- 開關所須之附加性電力消耗 第九圖為本發明之源極驅1 使口路間早化。 565824Figure 8a is the driving waveform diagram of the all-black image of the low power source driving method of the present invention, and Figure 8b is the full white image driving waveform diagram of the low power source driving method of the present invention. As shown in Figures 8a and 8b, unlike the conventional multi-stage charging method, it can be charged / discharged to the required voltage at any time without overcharging. For example, it is a five-stage charging method. In the case of phased driving, θ has no effect on the image signal and can save 80% of the left and right driving power consumption. '' On the one hand, when comparing the low-power source drive circuit (Figure 6a) of the present invention with the conventional multi-stage source drive circuit (Figure 2), it can be seen from the comparison that the driver circuit of Mingming has its entire drive circuit during polarity modulation The open relationship of (j3〇) is divided into even and odd lines, and the unified control is performed by using the buffer as the unified control ... The special mode is that Φ A rules the multi-stage source drive: icot: i :: ---- Additional power consumption required by the switch. The ninth picture is the source driver 1 of the present invention to make the gates early. 565824

部之回路圖。 如第九圖所不,本發明之極性調製部(62〇)係由作 段性充電之七個電容(Ci〜C?)與分別將電容連接之 電端子(VS)之開關(SW1〜SW7)與分別將電容(Ci〜C7)連接於 充電端子(VD)之開關(SW8-SW14)與兩個二極體(Di,D2)所構 成。 w 〜在全白模式(VH; 6· 5V)下為防止於階段性放電時自電 容(c?)至放電端子(vs)產生電流逆流係追加二極體(Di), 在全白模式(VL;3.5V)下為防止於充電時自充電端子(VD) 至電容(C!)產生電流逆流係追加二極體(% )。因此,本發 明之極性調製部(6 2 0 )可由外部七個電容與十四個開關與 兩個二極體所構成。 【發明之效果】 , 如上所述,本發明之源極驅動回路其以少數之開關一 統控制緩衝器之演算放大器(〇 p — A m p )故可除去習知之驅動 回路中之存在於各線上之開關而可使回路構成簡單化, 又,亦可節省驅動開關用之消耗電力。又,於極性調製時 藉由充/放電至被非固定之電壓位階之影像信號所控制之、 位階係可防止過充電及過放電而有防止不必要之電力消摩毛 之效果。Department of the circuit diagram. As shown in the ninth figure, the polarity modulation section (62) of the present invention is composed of seven capacitors (Ci ~ C?) For step charging and switches (SW1 ~ SW7) for the electric terminals (VS) respectively connecting the capacitors. ) And a switch (SW8-SW14) and a diode (Di, D2) that respectively connect the capacitors (Ci to C7) to the charging terminal (VD). w ~ In full white mode (VH; 6 · 5V), in order to prevent the current from flowing from the capacitor (c?) to the discharge terminal (vs) during phase discharge, a diode (Di) is added. In the full white mode ( VL; 3.5V) To prevent current from flowing from the charging terminal (VD) to the capacitor (C!) During charging, a diode (%) is added. Therefore, the polar modulation section (620) of the present invention can be composed of seven external capacitors, fourteen switches, and two diodes. [Effects of the Invention] As mentioned above, the source driving circuit of the present invention controls the buffer amplifier's operational amplifier (0p — A mp) with a small number of switches, so it can remove the existing driving circuit existing on each line. The switch simplifies the circuit configuration and saves power consumption for driving the switch. In addition, during polarity modulation, the level system is controlled by the image signal from the charge / discharge to a non-fixed voltage level, which can prevent overcharge and overdischarge and prevent unnecessary power friction.

第15頁 565824 圖式簡單說明 第一圖為一般之TFT液晶顯示裝置之等價回路之示意 圖〇 第一圖為§知之多階段源極驅動回路之示意圖。 第三a圖為習知之多階段源極驅動方式之輸出電壓波 形圖。 第三b圖為習知之多階段源極驅動方式之極性調製部 之回路圖。 第四a圖為習知之多階段源極驅動方式之全黑影像信 號之驅動波形圖。Page 15 565824 Brief description of the diagram The first diagram is a schematic diagram of an equivalent circuit of a general TFT liquid crystal display device. The first diagram is a schematic diagram of a multi-stage source driving circuit known in §. The third a is the output voltage waveform of the conventional multi-stage source driving method. Figure 3b is a circuit diagram of the polarity modulation section of the conventional multi-stage source driving method. Figure 4a is the driving waveform diagram of the all-black image signal of the conventional multi-stage source driving method.

第四b圖為習知之多階段源極驅動方式之全白影像信 號之驅動波形圖。 第五圖為本發明之低電力源極驅動方式之輸出電壓波 形圖。 第六a圖為本發明之液晶·顯示裝置之源極驅動回路之 構成圖。 第六b圖為本發明之輸出端演算放大器(〇p —Amp)之詳 細回路圖。 第七圖為第六a圖所示之開關控制信號之波形圖。Figure 4b is the driving waveform diagram of the all-white image signal of the conventional multi-stage source driving method. The fifth figure is an output voltage waveform diagram of the low power source driving method of the present invention. Fig. 6a is a configuration diagram of a source driving circuit of the liquid crystal display device of the present invention. Figure 6b is a detailed circuit diagram of the output operational amplifier (0p-Amp) of the present invention. The seventh diagram is a waveform diagram of the switch control signal shown in the sixth a diagram.

第八a圖為本發明之低電力源極驅動方式之全黑影像 信號之驅動波形圖。 第八b圖為本發明之低電力源極驅動方式之全白影像 信號之驅動波形圖。 第九圖為本發明之源極驅動回路之極性調製部之回路FIG. 8a is a driving waveform diagram of the full black image signal in the low power source driving method of the present invention. FIG. 8b is a driving waveform diagram of the all-white image signal of the low power source driving method of the present invention. The ninth figure is a circuit of the polarity modulation section of the source driving circuit of the present invention

第16頁 565824 圖式簡單說明 【圖式標號說明】 21 ------數位-類比轉換器 22 ------輸出緩衝部 2 3------奇數極性調製部 24 ------偶數極性調製部 25 ------多工器(MUX) 120------源極驅動器 132------薄膜電晶體(TFT) 134------液晶元件 610------數位-類比轉換部 620------極性調製部 630 輸出緩衝器 632------演算放大器 634------輸入放大器 6 4 0------LCD 面板Page 16 565824 Simple explanation of the drawings [Description of the drawing symbols] 21 ------ Digital-to-analog converter 22 ------ Output buffer section 2 3 --------- Odd number polar modulation section 24- ----- Even Polarity Modulation Unit 25 ------ Multiplexer (MUX) 120 ------ Source Driver 132 ------ Thin Film Transistor (TFT) 134 ---- --Liquid crystal element 610 ------ Digital-analog conversion section 620 ------ Polarity modulation section 630 Output buffer 632 ------ Calculation amplifier 634 ------ Input amplifier 6 4 0 ------ LCD panel

第17頁Page 17

Claims (1)

565824565824 六、申請專利範圍 1 · 一種液晶顯示裝置之低電力源極驅動方法,其係驅 動液晶顯示裝置之資料線用之低電力源極驅動方法,其特 釋支在於:其於極性反轉用之充電及放電時,將中間電遷僅 充電及放電至被非固定之電壓位階之影像信號所控 階而防止過充電及過放電者。 饥 裡狹日日顯示裝置I低,運刀綠極驅動回路,1 夕 ? 2源極驅動回路’係藉由影像資料驅動液晶顯示i置: =;後=在於包含有:一數位_類比轉換部,1 系置將之 :之多階段充放電電壓;-輸 類比轉換部所輸入之影像信號而自極性調接: 電以製部連接而實行充放電而調 =^右別述極性調製部之充電電壓較前 ^ ϊ電電壓較影像信號為低則飽和至前調製部之 ,階顯示週期起將前述調製 ;象;D,自 ;接;係'自極性調製週 ί;;::;:;衝…色階顯示週期^前 極驅動回::ί: J】J2項,液晶顯示裝置之低電力源 之演算放大器所於:前述輪出緩衝器係由資料線數 5658246. Scope of patent application 1 · A low-power source driving method for a liquid crystal display device, which is a low-power source driving method for driving the data line of the liquid crystal display device. Its special explanation lies in its use for polarity inversion. During charging and discharging, the intermediate electrical charger is only charged and discharged to a level controlled by an image signal of a non-fixed voltage level to prevent overcharge and overdischarge. The display device I is low, and the green electrode driving circuit is driven. The 2 source driving circuit is driven by the image data to set the LCD display: =; after = is included: a digital _ analog conversion 1, the multi-stage charge / discharge voltage is set;-Self-polarity is adjusted by inputting the video signal input by the analog conversion unit: Electricity is connected by the system to perform charge-discharge and is adjusted = ^ the right-side polar modulation unit The charging voltage is lower than the previous voltage. When the electric voltage is lower than the image signal, it saturates to the front modulation section, and the aforementioned modulation will be performed from the step display period; like; D, since; connected; Department of self-polarity modulation cycle ;; ::; :; Punch ... gradation display period ^ front pole drive back :: ί: J] item J2, the low-power source calculation amplifier of the liquid crystal display device is provided by: the aforementioned round-out buffer is composed of data line number 565824 4·如申請專利範圍第3項之液晶顯示裝置之 士、 極驅動回路,其特徵在於··前述演算放大器係包括μ源 輸入放大态,係輸入接收前述影像信號(V )·'、 導體電晶體(ΜΡ),於充電時若自前述極性調製賦’氧半^ 述影像信號(V。為低之電壓時則為0Ν,而成‘;# σ較前 電,而於賦加高電壓時則切斷;_Ν金氧半導c:充 (ΜΝ) ’於放電時於自前述極性調製部賦加較前述影曰; (Vl)為高之電壓時則為〇Ν,而成為階段性放電,而 加低電壓時則切斷。 於破賦 ^如申請專利範圍第3項之液晶顯示褒置之低電力源 回路’其特徵在於:前述開關裝備係包括有區分; :m偶數線而於線反相乏場合則對控制偶數線充電/ :放,電"用:ϊ之二一開關(swia)與控制奇數線充電/偶數 vtn日* 關iSW2a)與對奇數線之演算放大器連^ •、馬i:線之演算放大器連接接地電源用之第三開關4. The driver circuit of a liquid crystal display device, such as the patent application No. 3, is characterized in that the aforementioned operational amplifier includes a μ source input amplification state, and the input receives the aforementioned image signal (V). Crystal (MP), when charging from the aforementioned polarity modulation, the oxygen signal is given to the oxygen signal (V. is 0N when the voltage is low, and becomes'; # σ is higher than before, and when high voltage is applied Then it is cut off; _Νmetal oxide semiconductor c: charge (MN) 'is added to the above-mentioned shadow from the polarity modulation part at the time of discharge; (Vl) when the voltage is high, it is ON, and becomes a staged discharge When the voltage is low, it will be cut off. In the case of a low power source circuit, such as the liquid crystal display set in item 3 of the patent application scope, it is characterized in that the aforementioned switching equipment includes a distinction; When the line is inverting, charge the control even-numbered line: / discharge, electricity " Use: 二 21 switch (swia) and control the odd-numbered line charge / even-numbered vtn * Off iSW2a) and the calculation amplifier for the odd-numbered line ^ • Ma i: The third switch of the line's calculation amplifier for grounding power supply ;女::ί偶數線之演算放大器連接VDD而對奇數線之演 异放大益連接接地電源用之第四開關(sw2b)者。 、 “如申請專利範圍第5項之液晶顯示裝置之低電力源 亟驅回路’其特徵在⑨:前述第一開關係於第一線時間 之偶^線充電(奇數線放電)時間為⑽而於第一線時間色階 顯不%間為OFF ’而於第二線時間之偶數線放電(奇數線充; Female :: ίThe amplifier for the even line is connected to VDD, and the amplifier for the odd line is connected to the fourth switch (sw2b) for ground power. "" If the low power source of the liquid crystal display device in the scope of patent application No. 5 drives the circuit urgently, its characteristics are as follows: The aforementioned first opening is related to the first line time. Even the line charging (odd line discharge) time is ⑽ and OFF in the first line time when the gradation is not %%, and the even line discharge in the second line time (odd line charge 565824 六 、申請專利範圍 電)時間^ &為UN而於第二線時間色階顯示時間OFF ; 月1J述箓 一P曰 放電)日士 開關係於第一線時間之偶數線充電(奇數線 化間為OFF而於第一線時 階顯示時間為〇N, -綠# @ t偶數線放電(奇數線充電)時間為OFF而於第 一線f間色階顯示時間0FF; 弟 放電)护 開關係於第一線時間之偶數線充電(奇數線 於第二^間士為〇FF而於第一線時間色階顯示時間為0FF,而 二線0+ 2 &間之偶數線放電(奇數線充電)時間為0N而於第 線=間色階顯示時間01^ ; 弟 放電mi開關係於第一線時間之偶數線充電(奇數線 第二始\間為f而於第一線時間色階顯示時間為⑽,而於 二線m’之偶數線放電(奇數線充電)時間為〇ff而於第 、、j日守間色階顯示時間〇 N。 極钯7動:請ί利範圍第2項之液晶顯示裝置之低電力源 個=回路其特徵在於:前述極性調製部係包括有二 白模式下於階段性放電時可防止自電 =1 全 _產生電流逆K極體(D2)= 2子:: ¥可防止自充電端子(VD)對電容⑹產生電流逆流者充電565824 VI. Application for patent scope Electricity) Time ^ & The second line time gradation display time is OFF for UN; Month 1J describes the first P discharge) Japan Shi Kai is related to the first line time even line charging (odd number) The line time is OFF and the display time at the first line time level is 0N, -Green # @ t Even line discharge (odd line charge) time is OFF and the first line f time level display time is 0FF; brother discharge) The protection is related to the charging of the even line of the first line time (the odd line is 0FF in the second line and the color scale display time is 0FF in the first line time, and the even line in the second line 0+ 2 & is discharged (Odd line charge) time is 0N and the first line = inter-gradation display time 01 ^; the discharge of the younger brother is related to the charge of the even line of the first line time (the second line of the odd line is f and the first line is The time gradation display time is 而, and the discharge time (odd line charge) on the second line m ′ is 0 ff, and the display time on the first and the second days is 0 N. The palladium 7 moves: Please ί The low power source of the liquid crystal display device according to the second item of the profit range = loop is characterized by the aforementioned polarity modulation Department includes two phases to prevent self-charge during staged discharge = 1 full _ current reverse K pole body (D2) = 2 subs: ¥ can prevent self-charging terminal (VD) from generating current reverse current to capacitor ⑹ Charge
TW090125343A 2000-09-08 2001-10-15 Circuit and method of driving data line by low power in a LCD TW565824B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020000053553A KR100366315B1 (en) 2000-09-08 2000-09-08 Circuit and method of driving data line by low power in a lcd
PCT/KR2001/001517 WO2002021498A1 (en) 2000-09-08 2001-09-07 Circuit and method of driving data line by low power in a lcd

Publications (1)

Publication Number Publication Date
TW565824B true TW565824B (en) 2003-12-11

Family

ID=19688296

Family Applications (1)

Application Number Title Priority Date Filing Date
TW090125343A TW565824B (en) 2000-09-08 2001-10-15 Circuit and method of driving data line by low power in a LCD

Country Status (4)

Country Link
KR (1) KR100366315B1 (en)
AU (1) AU2001286304A1 (en)
TW (1) TW565824B (en)
WO (1) WO2002021498A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100883030B1 (en) * 2007-02-28 2009-02-09 매그나칩 반도체 유한회사 Circuit and method for driving flat display
KR200453805Y1 (en) * 2011-03-09 2011-05-26 김진화 Pet dog cage

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5528256A (en) * 1994-08-16 1996-06-18 Vivid Semiconductor, Inc. Power-saving circuit and method for driving liquid crystal display
DE69533982T2 (en) * 1994-11-21 2006-01-05 Seiko Epson Corp. LIQUID CRYSTAL CONTROL UNIT, LIQUID CRYSTAL DISPLAY UNIT AND LIQUID CRYSTAL CONTROL METHOD
JPH11161237A (en) * 1997-11-27 1999-06-18 Sharp Corp Liquid crystal display device

Also Published As

Publication number Publication date
KR20020020416A (en) 2002-03-15
KR100366315B1 (en) 2002-12-31
AU2001286304A1 (en) 2002-03-22
WO2002021498A1 (en) 2002-03-14

Similar Documents

Publication Publication Date Title
EP1074966B1 (en) Circuit and method for driving source lines in a liquid crystal display
US8125432B2 (en) Common voltage generation circuit employing a charge-pump operation to generate low-potential-side voltage
US7002568B2 (en) Signal drive circuit, display device, electro-optical device, and signal drive method
US7733160B2 (en) Power supply circuit, display driver, electro-optical device, and electronic instrument
US8314764B2 (en) Voltage amplifier and driving device of display device using the voltage amplifier
JP4225777B2 (en) Display device, driving circuit and driving method thereof
TWI420460B (en) Electrophoretic panel and driving method thereof
US8144090B2 (en) Driver circuit, electro-optical device, and electronic instrument
JP4985020B2 (en) Liquid crystal device, driving method thereof, and electronic apparatus
EP1341313A1 (en) Reference voltage circuit
JP2008292837A (en) Display device
US20080204121A1 (en) Voltage generating circuit having charge pump and liquid crystal display using same
KR20110106686A (en) A charge pump, a method for controlling the same, and a display driving system comprising the charge pump
US20080150866A1 (en) Source driver, electro-optical device, and electronic instrument
CN108630158A (en) driving circuit and electronic equipment
KR20100094087A (en) Liquid crystal display driving circuit with low current consumption
CN101364806B (en) Digital-analog converter circuit, liquid crystal display device and electronic device
JP2005284271A (en) Common voltage generation circuit, power supply circuit, display driver and common voltage generation method
Nonaka et al. 54.1: A Low‐Power SOG LCD with Integrated DACs and a DC‐DC Converter for Mobile Applications
TW565824B (en) Circuit and method of driving data line by low power in a LCD
KR20070027263A (en) A driving circuit of liquid crystal display device and a method for driving the same
JP4456190B2 (en) Liquid crystal panel drive circuit and liquid crystal display device
TWI380271B (en) Driving circuit and related method of a display apparatus
JP2011154386A (en) Integrated circuit device, electro-optical device, and electronic apparatus
JP2010204598A (en) Integrated circuit device, electrooptical device and electronic equipment

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees