WO2002003460A3 - Halbleiterchip-modul mit schutzfolie - Google Patents

Halbleiterchip-modul mit schutzfolie Download PDF

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Publication number
WO2002003460A3
WO2002003460A3 PCT/DE2001/002332 DE0102332W WO0203460A3 WO 2002003460 A3 WO2002003460 A3 WO 2002003460A3 DE 0102332 W DE0102332 W DE 0102332W WO 0203460 A3 WO0203460 A3 WO 0203460A3
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor chip
protective film
chip module
support
module
Prior art date
Application number
PCT/DE2001/002332
Other languages
English (en)
French (fr)
Other versions
WO2002003460A2 (de
Inventor
Simon Muff
Volker Strutz
Original Assignee
Infineon Technologies Ag
Simon Muff
Volker Strutz
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Simon Muff, Volker Strutz filed Critical Infineon Technologies Ag
Publication of WO2002003460A2 publication Critical patent/WO2002003460A2/de
Publication of WO2002003460A3 publication Critical patent/WO2002003460A3/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/562—Protection against mechanical damage
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3164—Partial encapsulation or coating the coating being a foil
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Abstract

Die Erfindung betrifft ein Halbleiterchip-Modul, in welchem wenigstens ein Halbleiterchip (2) auf einem Träger befestigt und mit diesem elektrisch leitend kontaktiert ist. Die auf dem Träger abgewandte Oberfläche des Halbleiterchips aufgebrachte Schutzfolie (7), steht allseitig über die Oberfläche des Halbleiterchips über.
PCT/DE2001/002332 2000-07-03 2001-06-27 Halbleiterchip-modul mit schutzfolie WO2002003460A2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE20011590.1 2000-07-03
DE20011590U DE20011590U1 (de) 2000-07-03 2000-07-03 Halbleiterchip-Modul mit Schutzfolie

Publications (2)

Publication Number Publication Date
WO2002003460A2 WO2002003460A2 (de) 2002-01-10
WO2002003460A3 true WO2002003460A3 (de) 2002-07-18

Family

ID=7943506

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2001/002332 WO2002003460A2 (de) 2000-07-03 2001-06-27 Halbleiterchip-modul mit schutzfolie

Country Status (2)

Country Link
DE (1) DE20011590U1 (de)
WO (1) WO2002003460A2 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10107399A1 (de) * 2001-02-14 2002-09-12 Infineon Technologies Ag Elektronisches Bauteil mit Kantenschutz
DE10300958A1 (de) * 2003-01-13 2004-07-22 Epcos Ag Modul mit Verkapselung
DE102006012232B4 (de) * 2006-02-20 2008-01-24 Siemens Ag Verfahren zur selektiven Herstellung von Folienlaminaten zum Packaging und zur Isolation von ungehäusten elektronischen Bauelementen und Leiterbahnen

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1418949A (en) * 1973-01-30 1975-12-24 Siemens Ag Electrical component assemblies
JPS5956745A (ja) * 1982-09-24 1984-04-02 Sharp Corp 電子部品
JPS60116152A (ja) * 1983-11-28 1985-06-22 Matsushita Electric Works Ltd 封止ハイブリツドｉｃの製法
DE9109295U1 (de) * 1991-04-11 1991-10-10 Export-Contor Aussenhandelsgesellschaft Mbh, 8500 Nuernberg, De
EP0670596A2 (de) * 1994-03-01 1995-09-06 Shinko Electric Industries Co. Ltd. Filmträger für integrierten Schaltkreis
JPH08222667A (ja) * 1995-02-10 1996-08-30 Pfu Ltd 発熱素子の放熱構造
EP0840369A1 (de) * 1995-06-30 1998-05-06 Kabushiki Kaisha Toshiba Elektronisches bauteil und herstellungsverfahren dafür
US5814894A (en) * 1995-04-07 1998-09-29 Nitto Denko Corporation Semiconductor device, production method thereof, and tape carrier for semiconductor device used for producing the semiconductor device
EP0902611A2 (de) * 1997-09-10 1999-03-17 WÜRTH ELEKTRONIK GmbH & Co. KG Recyclingfähige Leiterplatte bestehend aus einem Folien- und Trägersystem

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1418949A (en) * 1973-01-30 1975-12-24 Siemens Ag Electrical component assemblies
JPS5956745A (ja) * 1982-09-24 1984-04-02 Sharp Corp 電子部品
JPS60116152A (ja) * 1983-11-28 1985-06-22 Matsushita Electric Works Ltd 封止ハイブリツドｉｃの製法
DE9109295U1 (de) * 1991-04-11 1991-10-10 Export-Contor Aussenhandelsgesellschaft Mbh, 8500 Nuernberg, De
EP0670596A2 (de) * 1994-03-01 1995-09-06 Shinko Electric Industries Co. Ltd. Filmträger für integrierten Schaltkreis
JPH08222667A (ja) * 1995-02-10 1996-08-30 Pfu Ltd 発熱素子の放熱構造
US5814894A (en) * 1995-04-07 1998-09-29 Nitto Denko Corporation Semiconductor device, production method thereof, and tape carrier for semiconductor device used for producing the semiconductor device
EP0840369A1 (de) * 1995-06-30 1998-05-06 Kabushiki Kaisha Toshiba Elektronisches bauteil und herstellungsverfahren dafür
EP0902611A2 (de) * 1997-09-10 1999-03-17 WÜRTH ELEKTRONIK GmbH & Co. KG Recyclingfähige Leiterplatte bestehend aus einem Folien- und Trägersystem

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 008, no. 155 (E - 256) 19 July 1984 (1984-07-19) *
PATENT ABSTRACTS OF JAPAN vol. 009, no. 270 (E - 353) 26 October 1985 (1985-10-26) *
PATENT ABSTRACTS OF JAPAN vol. 1996, no. 12 26 December 1996 (1996-12-26) *

Also Published As

Publication number Publication date
DE20011590U1 (de) 2000-09-07
WO2002003460A2 (de) 2002-01-10

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