WO2001080304A3 - Structures d'essai ameliorees et leurs procedes d'inspection et d'utilisation - Google Patents

Structures d'essai ameliorees et leurs procedes d'inspection et d'utilisation Download PDF

Info

Publication number
WO2001080304A3
WO2001080304A3 PCT/US2000/034086 US0034086W WO0180304A3 WO 2001080304 A3 WO2001080304 A3 WO 2001080304A3 US 0034086 W US0034086 W US 0034086W WO 0180304 A3 WO0180304 A3 WO 0180304A3
Authority
WO
WIPO (PCT)
Prior art keywords
test structures
defects
scanning area
scan
sample
Prior art date
Application number
PCT/US2000/034086
Other languages
English (en)
Other versions
WO2001080304A8 (fr
WO2001080304A2 (fr
Inventor
Akella V S Satya
Gustavo A Pinto
David L Adler
Robert Thomas Long
Neil Richardson
Kurt H Weiner
David J Walker
Lynda C Mantalas
Original Assignee
Kla Tencor Corp
Akella V S Satya
Gustavo A Pinto
David L Adler
Robert Thomas Long
Neil Richardson
Kurt H Weiner
David J Walker
Lynda C Mantalas
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/648,093 external-priority patent/US6633174B1/en
Application filed by Kla Tencor Corp, Akella V S Satya, Gustavo A Pinto, David L Adler, Robert Thomas Long, Neil Richardson, Kurt H Weiner, David J Walker, Lynda C Mantalas filed Critical Kla Tencor Corp
Priority to JP2001577600A priority Critical patent/JP5108193B2/ja
Priority to AU2001225804A priority patent/AU2001225804A1/en
Priority to EP00989275A priority patent/EP1328971A2/fr
Publication of WO2001080304A2 publication Critical patent/WO2001080304A2/fr
Publication of WO2001080304A8 publication Critical patent/WO2001080304A8/fr
Publication of WO2001080304A3 publication Critical patent/WO2001080304A3/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Automation & Control Theory (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Analysing Materials By The Use Of Radiation (AREA)

Abstract

L'invention concerne des procédés d'inspection d'un échantillon. Un premier procédé consiste à venir vers une première zone associée à un premier groupe de structures d'essai, lequel groupe figure en partie à l'intérieur de ladite première zone. Ce procédé consiste également à balayer cette première zone pour déterminer la présence éventuelle de défauts au sein du premier groupe de structures d'essai. Lorsque la présence d'un défaut dans ledit premier groupe est déterminée, il s'agit ensuite de passer d'un emplacement à un autre et de balayer ces emplacements, afin de localiser ledit défaut, de manière spécifique, au sein du groupe de structures d'essai. L'invention concerne également une structure d'essai convenant particulièrement à la mise en oeuvre de ce premier procédé. Selon un second procédé, un échantillon est balayé dans un premier sens au moyen d'au moins un faisceau de particules. Cet échantillon est balayé dans un second sens au moyen d'au moins un faisceau de particules, ledit second sens formant un certain angle avec le premier sens. Le premier balayage indique le nombre de défauts dans une zone de l'échantillon et le second balayage détermine la position d'un ou de plusieurs défauts détectés. L'invention concerne également des dés de semi-conducteurs comportant une ou plusieurs structures d'essai. Un premier type de dé de semi-conducteur présente une première pluralité de structures d'essai, chacune des structures d'essai dans ladite première pluralité étant entièrement située dans une zone de balayage. Ledit dé de semi-conducteur comprend également une seconde pluralité de structures d'essai, chacune de ces structures d'essai dans la première pluralité n'étant située qu'en partie dans la zone de balayage. Ces structures d'essai sont agencées de façon à ce qu'un balayage de la zone de balayage permette la détection de défauts à l'extérieur de cette zone de balayage.
PCT/US2000/034086 2000-04-18 2000-12-14 Structures d'essai ameliorees et leurs procedes d'inspection et d'utilisation WO2001080304A2 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2001577600A JP5108193B2 (ja) 2000-04-18 2000-12-14 改良された試験構造の検査方法
AU2001225804A AU2001225804A1 (en) 2000-04-18 2000-12-14 Improved test structures and methods for inspecting and utilizing the same
EP00989275A EP1328971A2 (fr) 2000-04-18 2000-12-14 Structures d'essai ameliorees et leurs procedes d'inspection et d'utilisation

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US19846400P 2000-04-18 2000-04-18
US60/198,464 2000-04-18
US09/648,093 2000-08-25
US09/648,093 US6633174B1 (en) 1999-12-14 2000-08-25 Stepper type test structures and methods for inspection of semiconductor integrated circuits

Publications (3)

Publication Number Publication Date
WO2001080304A2 WO2001080304A2 (fr) 2001-10-25
WO2001080304A8 WO2001080304A8 (fr) 2001-12-27
WO2001080304A3 true WO2001080304A3 (fr) 2003-05-15

Family

ID=26893810

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2000/034086 WO2001080304A2 (fr) 2000-04-18 2000-12-14 Structures d'essai ameliorees et leurs procedes d'inspection et d'utilisation

Country Status (4)

Country Link
EP (1) EP1328971A2 (fr)
JP (1) JP5108193B2 (fr)
AU (1) AU2001225804A1 (fr)
WO (1) WO2001080304A2 (fr)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7655482B2 (en) 2000-04-18 2010-02-02 Kla-Tencor Chemical mechanical polishing test structures and methods for inspecting the same
JP5238659B2 (ja) * 2001-10-17 2013-07-17 ケーエルエー−テンカー コーポレイション 半導体ｉｃ欠陥検出の装置および方法
DE10153763B4 (de) 2001-10-31 2006-09-28 Advanced Micro Devices, Inc., Sunnyvale Überwachung der Void-Bildung in einem Damascence-Prozess
US7236847B2 (en) 2002-01-16 2007-06-26 Kla-Tencor Technologies Corp. Systems and methods for closed loop defect reduction
US7078690B2 (en) * 2002-02-04 2006-07-18 Applied Materials, Israel, Ltd. Monitoring of contact hole production
US7038224B2 (en) 2002-07-30 2006-05-02 Applied Materials, Israel, Ltd. Contact opening metrology
US6866559B2 (en) 2002-02-04 2005-03-15 Kla-Tencor Technologies Windows configurable to be coupled to a process tool or to be disposed within an opening in a polishing pad
US7473911B2 (en) 2002-07-30 2009-01-06 Applied Materials, Israel, Ltd. Specimen current mapper
US7217579B2 (en) * 2002-12-19 2007-05-15 Applied Materials, Israel, Ltd. Voltage contrast test structure
US9002497B2 (en) * 2003-07-03 2015-04-07 Kla-Tencor Technologies Corp. Methods and systems for inspection of wafers and reticles using designer intent data
US6929961B2 (en) 2003-12-10 2005-08-16 Hitachi Global Storage Technologies Netherlands B. V. Dual function array feature for CMP process control and inspection
JP4137065B2 (ja) 2005-02-09 2008-08-20 富士通株式会社 半導体装置、デバイス形成基板、配線接続試験方法、および半導体装置の製造方法
WO2006123281A1 (fr) * 2005-05-19 2006-11-23 Koninklijke Philips Electronics N.V. Structure d'essai combinant un essai electrique et un controle de contraste de tension
JP4252056B2 (ja) 2005-09-27 2009-04-08 富士通マイクロエレクトロニクス株式会社 半導体装置のコンタクト不良検査方法及びその検査方法が適用される半導体装置
JP4903469B2 (ja) * 2006-03-28 2012-03-28 富士通セミコンダクター株式会社 欠陥検出方法
JP5353179B2 (ja) * 2008-10-22 2013-11-27 ソニー株式会社 欠陥修正装置および欠陥修正方法
US9311698B2 (en) * 2013-01-09 2016-04-12 Kla-Tencor Corp. Detecting defects on a wafer using template image matching
JP6702955B2 (ja) * 2014-06-12 2020-06-03 ピイディエフ・ソリューションズ・インコーポレーテッド フィラーセル、タップセル、デキャップセル、スクライブライン及び／又はダミーフィル並びにこれらを内包する製品ＩＣチップのために使用されるはずの領域への、ＩＣ試験構造体及び／又はｅビーム標的パッドの日和見的配置
CN104316813A (zh) * 2014-08-11 2015-01-28 上海华虹宏力半导体制造有限公司 判定异常短接位置的电压衬度方法
US10930571B2 (en) * 2019-02-01 2021-02-23 Samsung Electronics Co., Ltd. Test structure and evaluation method for semiconductor photo overlay

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4443278A (en) * 1981-05-26 1984-04-17 International Business Machines Corporation Inspection of multilayer ceramic circuit modules by electrical inspection of green specimens
US5159752A (en) * 1989-03-22 1992-11-03 Texas Instruments Incorporated Scanning electron microscope based parametric testing method and apparatus
US5331161A (en) * 1992-03-06 1994-07-19 Iwao Ohdomari Ion irradiation system and method
US5502306A (en) * 1991-05-30 1996-03-26 Kla Instruments Corporation Electron beam inspection system and method
US5578821A (en) * 1992-05-27 1996-11-26 Kla Instruments Corporation Electron beam inspection system and method
EP0818814A2 (fr) * 1996-07-12 1998-01-14 Kla Instruments Corp. Mesure de recouvrement sur des tranches semi-conductrices
US5736863A (en) * 1996-06-19 1998-04-07 Taiwan Semiconductor Manufacturing Company, Ltd. Abatement of electron beam charging distortion during dimensional measurements of integrated circuit patterns with scanning electron microscopy by the utilization of specially designed test structures
US5872018A (en) * 1997-05-05 1999-02-16 Vanguard International Semiconductor Corporation Testchip design for process analysis in sub-micron DRAM fabrication
US5952674A (en) * 1998-03-18 1999-09-14 International Business Machines Corporation Topography monitor
US5959459A (en) * 1996-12-10 1999-09-28 International Business Machines Corporation Defect monitor and method for automated contactless inline wafer inspection

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3229411B2 (ja) * 1993-01-11 2001-11-19 株式会社日立製作所 薄膜トランジスタ基板の欠陥検出方法およびその修正方法
JPH09282349A (ja) * 1996-04-17 1997-10-31 Shinko Electric Ind Co Ltd データ変換処理装置
JP3070543B2 (ja) * 1997-09-19 2000-07-31 日本電気株式会社 半導体装置の製造方法
JPH11242943A (ja) * 1997-12-18 1999-09-07 Nikon Corp 検査装置
JPH11219997A (ja) * 1998-02-03 1999-08-10 Hitachi Ltd 電子デバイス検査システム及び電子デバイスの製造方法
JP2000081324A (ja) * 1998-06-29 2000-03-21 Hitachi Ltd 欠陥検査方法およびその装置

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4443278A (en) * 1981-05-26 1984-04-17 International Business Machines Corporation Inspection of multilayer ceramic circuit modules by electrical inspection of green specimens
US5159752A (en) * 1989-03-22 1992-11-03 Texas Instruments Incorporated Scanning electron microscope based parametric testing method and apparatus
US5502306A (en) * 1991-05-30 1996-03-26 Kla Instruments Corporation Electron beam inspection system and method
US5331161A (en) * 1992-03-06 1994-07-19 Iwao Ohdomari Ion irradiation system and method
US5578821A (en) * 1992-05-27 1996-11-26 Kla Instruments Corporation Electron beam inspection system and method
US5736863A (en) * 1996-06-19 1998-04-07 Taiwan Semiconductor Manufacturing Company, Ltd. Abatement of electron beam charging distortion during dimensional measurements of integrated circuit patterns with scanning electron microscopy by the utilization of specially designed test structures
EP0818814A2 (fr) * 1996-07-12 1998-01-14 Kla Instruments Corp. Mesure de recouvrement sur des tranches semi-conductrices
US5959459A (en) * 1996-12-10 1999-09-28 International Business Machines Corporation Defect monitor and method for automated contactless inline wafer inspection
US5872018A (en) * 1997-05-05 1999-02-16 Vanguard International Semiconductor Corporation Testchip design for process analysis in sub-micron DRAM fabrication
US5952674A (en) * 1998-03-18 1999-09-14 International Business Machines Corporation Topography monitor

Also Published As

Publication number Publication date
JP5108193B2 (ja) 2012-12-26
WO2001080304A8 (fr) 2001-12-27
JP2004501505A (ja) 2004-01-15
AU2001225804A1 (en) 2001-10-30
EP1328971A2 (fr) 2003-07-23
WO2001080304A2 (fr) 2001-10-25

Similar Documents

Publication Publication Date Title
WO2001080304A3 (fr) Structures d'essai ameliorees et leurs procedes d'inspection et d'utilisation
US6670610B2 (en) System and method for directing a miller
KR102326402B1 (ko) 포커스 용적 측정 방법을 이용한 웨이퍼 검사
US6400454B1 (en) Apparatus and method for inspector defects
US20160118217A1 (en) E-beam inspection apparatus and method of using the same on various integrated circuit chips
KR970075840A (ko) 패턴 결함 검사 장치
CN100592028C (zh) 薄膜样品测量方法和设备及薄膜样品制备方法和设备
JP2010067533A (ja) 基板の検査装置、および、基板の検査方法
KR20130109162A (ko) 결함 검사 방법 및 결함 검사 장치
JP2010067533A5 (fr)
US4537073A (en) Inspection method of square billet using electronic scanning
EP0379865A3 (fr) Procédé d'examen d'un échantillon dans un appareil à faisceau corpusculaire
JP2001077165A (ja) 欠陥検査方法及びその装置並びに欠陥解析方法及びその装置
KR20110044881A (ko) 기판의 편차 맵핑
US20070070335A1 (en) Method and System for Detecting Defects
US10347462B2 (en) Imaging of crystalline defects
EP1724030A3 (fr) Système de détection pour appareil de tri, méthode pour déterminer la dérive de ce système de détection et appareil de tri avec un tel système de détection
JPH10135287A (ja) ウエーハ検査装置および検査方法
JPH09113465A (ja) 亜鉛メッキ系鋼板用表面欠陥検出装置
WO2002031877A8 (fr) Procede d"analyse de specimen
CN111323442A (zh) 用于x射线检查的系统和方法
KR102719272B1 (ko) 위치 선택형 가변 광원 제어 시스템 및 방법
JPH06347418A (ja) レーザ走査装置および画像形成方法
KR0165319B1 (ko) 포토리소그래피 공정에서의 공정 마진 평가 방법
JPH039483A (ja) 微生物の確認方式

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CR CU CZ DE DK DM DZ EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG US UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
AK Designated states

Kind code of ref document: C1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CR CU CZ DE DK DM DZ EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG US UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: C1

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG

CFP Corrected version of a pamphlet front page

Free format text: REVISED ABSTRACT RECEIVED BY THE INTERNATIONAL BUREAU AFTER COMPLETION OF THE TECHNICAL PREPARATIONS FOR INTERNATIONAL PUBLICATION

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
REG Reference to national code

Ref country code: DE

Ref legal event code: 8642

ENP Entry into the national phase

Ref country code: JP

Ref document number: 2001 577600

Kind code of ref document: A

Format of ref document f/p: F

WWE Wipo information: entry into national phase

Ref document number: 2000989275

Country of ref document: EP

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
WWP Wipo information: published in national office

Ref document number: 2000989275

Country of ref document: EP